arch/arm/boot/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 /include/ "skeleton.dtsi"
  11
  12 / {
  13         model = "Atmel AT91SAM9N12 SoC";
  14         compatible = "atmel,at91sam9n12";
  15         interrupt-parent = <&aic>;
  16
  17         aliases {
  18                 serial0 = &dbgu;
  19                 serial1 = &usart0;
  20                 serial2 = &usart1;
  21                 serial3 = &usart2;
  22                 serial4 = &usart3;
  23                 gpio0 = &pioA;
  24                 gpio1 = &pioB;
  25                 gpio2 = &pioC;
  26                 gpio3 = &pioD;
  27                 tcb0 = &tcb0;
  28                 tcb1 = &tcb1;
  29                 i2c0 = &i2c0;
  30                 i2c1 = &i2c1;
  31         };
  32         cpus {
  33                 cpu@0 {
  34                         compatible = "arm,arm926ejs";
  35                 };
  36         };
  37
  38         memory {
  39                 reg = <0x20000000 0x10000000>;
  40         };
  41
  42         ahb {
  43                 compatible = "simple-bus";
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 ranges;
  47
  48                 apb {
  49                         compatible = "simple-bus";
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52                         ranges;
  53
  54                         aic: interrupt-controller@fffff000 {
  55                                 #interrupt-cells = <3>;
  56                                 compatible = "atmel,at91rm9200-aic";
  57                                 interrupt-controller;
  58                                 reg = <0xfffff000 0x200>;
  59                         };
  60
  61                         ramc0: ramc@ffffe800 {
  62                                 compatible = "atmel,at91sam9g45-ddramc";
  63                                 reg = <0xffffe800 0x200>;
  64                         };
  65
  66                         pmc: pmc@fffffc00 {
  67                                 compatible = "atmel,at91rm9200-pmc";
  68                                 reg = <0xfffffc00 0x100>;
  69                         };
  70
  71                         rstc@fffffe00 {
  72                                 compatible = "atmel,at91sam9g45-rstc";
  73                                 reg = <0xfffffe00 0x10>;
  74                         };
  75
  76                         pit: timer@fffffe30 {
  77                                 compatible = "atmel,at91sam9260-pit";
  78                                 reg = <0xfffffe30 0xf>;
  79                                 interrupts = <1 4 7>;
  80                         };
  81
  82                         shdwc@fffffe10 {
  83                                 compatible = "atmel,at91sam9x5-shdwc";
  84                                 reg = <0xfffffe10 0x10>;
  85                         };
  86
  87                         mmc0: mmc@f0008000 {
  88                                 compatible = "atmel,hsmci";
  89                                 reg = <0xf0008000 0x600>;
  90                                 interrupts = <12 4 0>;
  91                                 #address-cells = <1>;
  92                                 #size-cells = <0>;
  93                                 status = "disabled";
  94                         };
  95
  96                         tcb0: timer@f8008000 {
  97                                 compatible = "atmel,at91sam9x5-tcb";
  98                                 reg = <0xf8008000 0x100>;
  99                                 interrupts = <17 4 0>;
 100                         };
 101
 102                         tcb1: timer@f800c000 {
 103                                 compatible = "atmel,at91sam9x5-tcb";
 104                                 reg = <0xf800c000 0x100>;
 105                                 interrupts = <17 4 0>;
 106                         };
 107
 108                         dma: dma-controller@ffffec00 {
 109                                 compatible = "atmel,at91sam9g45-dma";
 110                                 reg = <0xffffec00 0x200>;
 111                                 interrupts = <20 4 0>;
 112                         };
 113
 114                         pinctrl@fffff400 {
 115                                 #address-cells = <1>;
 116                                 #size-cells = <1>;
 117                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 118                                 ranges = <0xfffff400 0xfffff400 0x800>;
 119
 120                                 atmel,mux-mask = <
 121                                       /*    A         B          C     */
 122                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 123                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 124                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 125                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 126                                       >;
 127
 128                                 /* shared pinctrl settings */
 129                                 dbgu {
 130                                         pinctrl_dbgu: dbgu-0 {
 131                                                 atmel,pins =
 132                                                         <0 9 0x1 0x0    /* PA9 periph A */
 133                                                          0 10 0x1 0x1>; /* PA10 periph with pullup */
 134                                         };
 135                                 };
 136
 137                                 usart0 {
 138                                         pinctrl_usart0: usart0-0 {
 139                                                 atmel,pins =
 140                                                         <0 1 0x1 0x1    /* PA1 periph A with pullup */
 141                                                          0 0 0x1 0x0>;  /* PA0 periph A */
 142                                         };
 143
 144                                         pinctrl_usart0_rts: usart0_rts-0 {
 145                                                 atmel,pins =
 146                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
 147                                         };
 148
 149                                         pinctrl_usart0_cts: usart0_cts-0 {
 150                                                 atmel,pins =
 151                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
 152                                         };
 153                                 };
 154
 155                                 usart1 {
 156                                         pinctrl_usart1: usart1-0 {
 157                                                 atmel,pins =
 158                                                         <0 6 0x1 0x1    /* PA6 periph A with pullup */
 159                                                          0 5 0x1 0x0>;  /* PA5 periph A */
 160                                         };
 161                                 };
 162
 163                                 usart2 {
 164                                         pinctrl_usart2: usart2-0 {
 165                                                 atmel,pins =
 166                                                         <0 8 0x1 0x1    /* PA8 periph A with pullup */
 167                                                          0 7 0x1 0x0>;  /* PA7 periph A */
 168                                         };
 169
 170                                         pinctrl_usart2_rts: usart2_rts-0 {
 171                                                 atmel,pins =
 172                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
 173                                         };
 174
 175                                         pinctrl_usart2_cts: usart2_cts-0 {
 176                                                 atmel,pins =
 177                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
 178                                         };
 179                                 };
 180
 181                                 usart3 {
 182                                         pinctrl_usart3: usart3-0 {
 183                                                 atmel,pins =
 184                                                         <2 23 0x2 0x1   /* PC23 periph B with pullup */
 185                                                          2 22 0x2 0x0>; /* PC22 periph B */
 186                                         };
 187
 188                                         pinctrl_usart3_rts: usart3_rts-0 {
 189                                                 atmel,pins =
 190                                                         <2 24 0x2 0x0>; /* PC24 periph B */
 191                                         };
 192
 193                                         pinctrl_usart3_cts: usart3_cts-0 {
 194                                                 atmel,pins =
 195                                                         <2 25 0x2 0x0>; /* PC25 periph B */
 196                                         };
 197                                 };
 198
 199                                 uart0 {
 200                                         pinctrl_uart0: uart0-0 {
 201                                                 atmel,pins =
 202                                                         <2 9 0x3 0x1    /* PC9 periph C with pullup */
 203                                                          2 8 0x3 0x0>;  /* PC8 periph C */
 204                                         };
 205                                 };
 206
 207                                 uart1 {
 208                                         pinctrl_uart1: uart1-0 {
 209                                                 atmel,pins =
 210                                                         <2 16 0x3 0x1   /* PC17 periph C with pullup */
 211                                                          2 17 0x3 0x0>; /* PC16 periph C */
 212                                         };
 213                                 };
 214
 215                                 nand {
 216                                         pinctrl_nand: nand-0 {
 217                                                 atmel,pins =
 218                                                         <3 5 0x0 0x1    /* PD5 gpio RDY pin pull_up*/
 219                                                          3 4 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
 220                                         };
 221                                 };
 222
 223                                 mmc0 {
 224                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 225                                                 atmel,pins =
 226                                                         <0 17 0x1 0x0   /* PA17 periph A */
 227                                                          0 16 0x1 0x1   /* PA16 periph A with pullup */
 228                                                          0 15 0x1 0x1>; /* PA15 periph A with pullup */
 229                                         };
 230
 231                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 232                                                 atmel,pins =
 233                                                         <0 18 0x1 0x1   /* PA18 periph A with pullup */
 234                                                          0 19 0x1 0x1   /* PA19 periph A with pullup */
 235                                                          0 20 0x1 0x1>; /* PA20 periph A with pullup */
 236                                         };
 237
 238                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 239                                                 atmel,pins =
 240                                                         <0 11 0x2 0x1   /* PA11 periph B with pullup */
 241                                                          0 12 0x2 0x1   /* PA12 periph B with pullup */
 242                                                          0 13 0x2 0x1   /* PA13 periph B with pullup */
 243                                                          0 14 0x2 0x1>; /* PA14 periph B with pullup */
 244                                         };
 245                                 };
 246
 247                                 pioA: gpio@fffff400 {
 248                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 249                                         reg = <0xfffff400 0x200>;
 250                                         interrupts = <2 4 1>;
 251                                         #gpio-cells = <2>;
 252                                         gpio-controller;
 253                                         interrupt-controller;
 254                                         #interrupt-cells = <2>;
 255                                 };
 256
 257                                 pioB: gpio@fffff600 {
 258                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 259                                         reg = <0xfffff600 0x200>;
 260                                         interrupts = <2 4 1>;
 261                                         #gpio-cells = <2>;
 262                                         gpio-controller;
 263                                         interrupt-controller;
 264                                         #interrupt-cells = <2>;
 265                                 };
 266
 267                                 pioC: gpio@fffff800 {
 268                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 269                                         reg = <0xfffff800 0x200>;
 270                                         interrupts = <3 4 1>;
 271                                         #gpio-cells = <2>;
 272                                         gpio-controller;
 273                                         interrupt-controller;
 274                                         #interrupt-cells = <2>;
 275                                 };
 276
 277                                 pioD: gpio@fffffa00 {
 278                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 279                                         reg = <0xfffffa00 0x200>;
 280                                         interrupts = <3 4 1>;
 281                                         #gpio-cells = <2>;
 282                                         gpio-controller;
 283                                         interrupt-controller;
 284                                         #interrupt-cells = <2>;
 285                                 };
 286                         };
 287
 288                         dbgu: serial@fffff200 {
 289                                 compatible = "atmel,at91sam9260-usart";
 290                                 reg = <0xfffff200 0x200>;
 291                                 interrupts = <1 4 7>;
 292                                 pinctrl-names = "default";
 293                                 pinctrl-0 = <&pinctrl_dbgu>;
 294                                 status = "disabled";
 295                         };
 296
 297                         usart0: serial@f801c000 {
 298                                 compatible = "atmel,at91sam9260-usart";
 299                                 reg = <0xf801c000 0x4000>;
 300                                 interrupts = <5 4 5>;
 301                                 atmel,use-dma-rx;
 302                                 atmel,use-dma-tx;
 303                                 pinctrl-names = "default";
 304                                 pinctrl-0 = <&pinctrl_usart0>;
 305                                 status = "disabled";
 306                         };
 307
 308                         usart1: serial@f8020000 {
 309                                 compatible = "atmel,at91sam9260-usart";
 310                                 reg = <0xf8020000 0x4000>;
 311                                 interrupts = <6 4 5>;
 312                                 atmel,use-dma-rx;
 313                                 atmel,use-dma-tx;
 314                                 pinctrl-names = "default";
 315                                 pinctrl-0 = <&pinctrl_usart1>;
 316                                 status = "disabled";
 317                         };
 318
 319                         usart2: serial@f8024000 {
 320                                 compatible = "atmel,at91sam9260-usart";
 321                                 reg = <0xf8024000 0x4000>;
 322                                 interrupts = <7 4 5>;
 323                                 atmel,use-dma-rx;
 324                                 atmel,use-dma-tx;
 325                                 pinctrl-names = "default";
 326                                 pinctrl-0 = <&pinctrl_usart2>;
 327                                 status = "disabled";
 328                         };
 329
 330                         usart3: serial@f8028000 {
 331                                 compatible = "atmel,at91sam9260-usart";
 332                                 reg = <0xf8028000 0x4000>;
 333                                 interrupts = <8 4 5>;
 334                                 atmel,use-dma-rx;
 335                                 atmel,use-dma-tx;
 336                                 pinctrl-names = "default";
 337                                 pinctrl-0 = <&pinctrl_usart3>;
 338                                 status = "disabled";
 339                         };
 340
 341                         i2c0: i2c@f8010000 {
 342                                 compatible = "atmel,at91sam9x5-i2c";
 343                                 reg = <0xf8010000 0x100>;
 344                                 interrupts = <9 4 6>;
 345                                 #address-cells = <1>;
 346                                 #size-cells = <0>;
 347                                 status = "disabled";
 348                         };
 349
 350                         i2c1: i2c@f8014000 {
 351                                 compatible = "atmel,at91sam9x5-i2c";
 352                                 reg = <0xf8014000 0x100>;
 353                                 interrupts = <10 4 6>;
 354                                 #address-cells = <1>;
 355                                 #size-cells = <0>;
 356                                 status = "disabled";
 357                         };
 358                 };
 359
 360                 nand0: nand@40000000 {
 361                         compatible = "atmel,at91rm9200-nand";
 362                         #address-cells = <1>;
 363                         #size-cells = <1>;
 364                         reg = < 0x40000000 0x10000000
 365                                 0xffffe000 0x00000600
 366                                 0xffffe600 0x00000200
 367                                 0x00100000 0x00100000
 368                                >;
 369                         atmel,nand-addr-offset = <21>;
 370                         atmel,nand-cmd-offset = <22>;
 371                         pinctrl-names = "default";
 372                         pinctrl-0 = <&pinctrl_nand>;
 373                         gpios = <&pioD 5 0
 374                                  &pioD 4 0
 375                                  0
 376                                 >;
 377                         status = "disabled";
 378                 };
 379
 380                 usb0: ohci@00500000 {
 381                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 382                         reg = <0x00500000 0x00100000>;
 383                         interrupts = <22 4 2>;
 384                         status = "disabled";
 385                 };
 386         };
 387
 388         i2c@0 {
 389                 compatible = "i2c-gpio";
 390                 gpios = <&pioA 30 0 /* sda */
 391                          &pioA 31 0 /* scl */
 392                         >;
 393                 i2c-gpio,sda-open-drain;
 394                 i2c-gpio,scl-open-drain;
 395                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 396                 #address-cells = <1>;
 397                 #size-cells = <0>;
 398                 status = "disabled";
 399         };
 400 };