2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
11 compatible = "ti,dm816";
12 interrupt-parent = <&intc>;
31 compatible = "arm,cortex-a8";
38 compatible = "arm,cortex-a8-pmu";
43 * The soc node represents the soc top level view. It is used for IPs
44 * that are not memory mapped in the MPU view or for the MPU itself.
47 compatible = "ti,omap-infra";
49 compatible = "ti,omap3-mpu";
55 * XXX: Use a flat representation of the dm816x interconnect.
56 * The real dm816x interconnect network is quite complex. Since
57 * it will not bring real advantage to represent that in DT
58 * for the moment, just use a fake OCP bus entry to represent
59 * the whole bus hierarchy.
62 compatible = "simple-bus";
63 reg = <0x44000000 0x10000>;
70 compatible = "ti,dm816-prcm";
71 reg = <0x48180000 0x4000>;
78 prcm_clockdomains: clockdomains {
83 compatible = "ti,dm816-scrm", "simple-bus";
84 reg = <0x48140000 0x21000>;
88 ranges = <0 0x48140000 0x21000>;
90 dm816x_pinmux: pinmux@800 {
91 compatible = "pinctrl-single";
96 pinctrl-single,register-width = <16>;
97 pinctrl-single,function-mask = <0xf>;
100 /* Device Configuration Registers */
101 scm_conf: syscon@600 {
102 compatible = "syscon", "simple-bus";
104 #address-cells = <1>;
106 ranges = <0 0x600 0x110>;
108 usb_phy0: usb-phy@20 {
109 compatible = "ti,dm8168-usb-phy";
112 clocks = <&main_fapll 6>;
113 clock-names = "refclk";
115 syscon = <&scm_conf>;
118 usb_phy1: usb-phy@28 {
119 compatible = "ti,dm8168-usb-phy";
122 clocks = <&main_fapll 6>;
123 clock-names = "refclk";
125 syscon = <&scm_conf>;
129 scrm_clocks: clocks {
130 #address-cells = <1>;
134 scrm_clockdomains: clockdomains {
138 edma: edma@49000000 {
139 compatible = "ti,edma3";
140 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
141 reg = <0x49000000 0x10000>,
143 interrupts = <12 13 14>;
148 compatible = "ti,am3352-elm";
150 reg = <0x48080000 0x2000>;
154 gpio1: gpio@48032000 {
155 compatible = "ti,omap4-gpio";
158 reg = <0x48032000 0x1000>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
166 gpio2: gpio@4804c000 {
167 compatible = "ti,omap4-gpio";
170 reg = <0x4804c000 0x1000>;
174 interrupt-controller;
175 #interrupt-cells = <2>;
178 gpmc: gpmc@50000000 {
179 compatible = "ti,am3352-gpmc";
181 reg = <0x50000000 0x2000>;
182 #address-cells = <2>;
188 gpmc,num-waitpins = <2>;
189 interrupt-controller;
190 #interrupt-cells = <2>;
196 compatible = "ti,omap4-i2c";
198 reg = <0x48028000 0x1000>;
199 #address-cells = <1>;
202 dmas = <&edma 58 &edma 59>;
203 dma-names = "tx", "rx";
207 compatible = "ti,omap4-i2c";
209 reg = <0x4802a000 0x1000>;
210 #address-cells = <1>;
213 dmas = <&edma 60 &edma 61>;
214 dma-names = "tx", "rx";
217 intc: interrupt-controller@48200000 {
218 compatible = "ti,dm816-intc";
219 interrupt-controller;
220 #interrupt-cells = <1>;
221 reg = <0x48200000 0x1000>;
225 compatible = "ti,am3352-rtc", "ti,da830-rtc";
226 reg = <0x480c0000 0x1000>;
227 interrupts = <75 76>;
231 mailbox: mailbox@480c8000 {
232 compatible = "ti,omap4-mailbox";
233 reg = <0x480c8000 0x2000>;
235 ti,hwmods = "mailbox";
237 ti,mbox-num-users = <4>;
238 ti,mbox-num-fifos = <12>;
240 ti,mbox-tx = <3 0 0>;
241 ti,mbox-rx = <0 0 0>;
245 spinbox: spinbox@480ca000 {
246 compatible = "ti,omap4-hwspinlock";
247 reg = <0x480ca000 0x2000>;
248 ti,hwmods = "spinbox";
252 mdio: mdio@4a100800 {
253 compatible = "ti,davinci_mdio";
254 #address-cells = <1>;
256 reg = <0x4a100800 0x100>;
257 ti,hwmods = "davinci_mdio";
258 bus_freq = <1000000>;
259 phy0: ethernet-phy@0 {
262 phy1: ethernet-phy@1 {
267 eth0: ethernet@4a100000 {
268 compatible = "ti,dm816-emac";
270 reg = <0x4a100000 0x800
272 clocks = <&sysclk24_ck>;
273 syscon = <&scm_conf>;
274 ti,davinci-ctrl-reg-offset = <0>;
275 ti,davinci-ctrl-mod-reg-offset = <0x900>;
276 ti,davinci-ctrl-ram-offset = <0x2000>;
277 ti,davinci-ctrl-ram-size = <0x2000>;
278 interrupts = <40 41 42 43>;
279 phy-handle = <&phy0>;
282 eth1: ethernet@4a120000 {
283 compatible = "ti,dm816-emac";
285 reg = <0x4a120000 0x4000>;
286 clocks = <&sysclk24_ck>;
287 syscon = <&scm_conf>;
288 ti,davinci-ctrl-reg-offset = <0>;
289 ti,davinci-ctrl-mod-reg-offset = <0x900>;
290 ti,davinci-ctrl-ram-offset = <0x2000>;
291 ti,davinci-ctrl-ram-size = <0x2000>;
292 interrupts = <44 45 46 47>;
293 phy-handle = <&phy1>;
296 sata: sata@4a140000 {
297 compatible = "ti,dm816-ahci";
298 reg = <0x4a140000 0x10000>;
303 mcspi1: spi@48030000 {
304 compatible = "ti,omap4-mcspi";
305 reg = <0x48030000 0x1000>;
306 #address-cells = <1>;
310 ti,hwmods = "mcspi1";
311 dmas = <&edma 16 &edma 17
315 dma-names = "tx0", "rx0", "tx1", "rx1",
316 "tx2", "rx2", "tx3", "rx3";
320 compatible = "ti,omap4-hsmmc";
321 reg = <0x48060000 0x11000>;
324 dmas = <&edma 24 &edma 25>;
325 dma-names = "tx", "rx";
328 timer1: timer@4802e000 {
329 compatible = "ti,dm816-timer";
330 reg = <0x4802e000 0x2000>;
332 ti,hwmods = "timer1";
336 timer2: timer@48040000 {
337 compatible = "ti,dm816-timer";
338 reg = <0x48040000 0x2000>;
340 ti,hwmods = "timer2";
343 timer3: timer@48042000 {
344 compatible = "ti,dm816-timer";
345 reg = <0x48042000 0x2000>;
347 ti,hwmods = "timer3";
350 timer4: timer@48044000 {
351 compatible = "ti,dm816-timer";
352 reg = <0x48044000 0x2000>;
354 ti,hwmods = "timer4";
358 timer5: timer@48046000 {
359 compatible = "ti,dm816-timer";
360 reg = <0x48046000 0x2000>;
362 ti,hwmods = "timer5";
366 timer6: timer@48048000 {
367 compatible = "ti,dm816-timer";
368 reg = <0x48048000 0x2000>;
370 ti,hwmods = "timer6";
374 timer7: timer@4804a000 {
375 compatible = "ti,dm816-timer";
376 reg = <0x4804a000 0x2000>;
378 ti,hwmods = "timer7";
382 uart1: uart@48020000 {
383 compatible = "ti,am3352-uart", "ti,omap3-uart";
385 reg = <0x48020000 0x2000>;
386 clock-frequency = <48000000>;
388 dmas = <&edma 26 &edma 27>;
389 dma-names = "tx", "rx";
392 uart2: uart@48022000 {
393 compatible = "ti,am3352-uart", "ti,omap3-uart";
395 reg = <0x48022000 0x2000>;
396 clock-frequency = <48000000>;
398 dmas = <&edma 28 &edma 29>;
399 dma-names = "tx", "rx";
402 uart3: uart@48024000 {
403 compatible = "ti,am3352-uart", "ti,omap3-uart";
405 reg = <0x48024000 0x2000>;
406 clock-frequency = <48000000>;
408 dmas = <&edma 30 &edma 31>;
409 dma-names = "tx", "rx";
412 /* NOTE: USB needs a transceiver driver for phys to work */
413 usb: usb_otg_hs@47401000 {
414 compatible = "ti,am33xx-usb";
415 reg = <0x47401000 0x400000>;
417 #address-cells = <1>;
419 ti,hwmods = "usb_otg_hs";
422 compatible = "ti,musb-dm816";
423 reg = <0x47401400 0x400
425 reg-names = "mc", "control";
427 interrupt-names = "mc";
429 interface-type = <0>;
431 phy-names = "usb2-phy";
432 mentor,multipoint = <1>;
433 mentor,num-eps = <16>;
434 mentor,ram-bits = <12>;
435 mentor,power = <500>;
437 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
438 &cppi41dma 2 0 &cppi41dma 3 0
439 &cppi41dma 4 0 &cppi41dma 5 0
440 &cppi41dma 6 0 &cppi41dma 7 0
441 &cppi41dma 8 0 &cppi41dma 9 0
442 &cppi41dma 10 0 &cppi41dma 11 0
443 &cppi41dma 12 0 &cppi41dma 13 0
444 &cppi41dma 14 0 &cppi41dma 0 1
445 &cppi41dma 1 1 &cppi41dma 2 1
446 &cppi41dma 3 1 &cppi41dma 4 1
447 &cppi41dma 5 1 &cppi41dma 6 1
448 &cppi41dma 7 1 &cppi41dma 8 1
449 &cppi41dma 9 1 &cppi41dma 10 1
450 &cppi41dma 11 1 &cppi41dma 12 1
451 &cppi41dma 13 1 &cppi41dma 14 1>;
453 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
454 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
456 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
457 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
462 compatible = "ti,musb-dm816";
463 reg = <0x47401c00 0x400
465 reg-names = "mc", "control";
467 interrupt-names = "mc";
469 interface-type = <0>;
471 phy-names = "usb2-phy";
472 mentor,multipoint = <1>;
473 mentor,num-eps = <16>;
474 mentor,ram-bits = <12>;
475 mentor,power = <500>;
477 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
478 &cppi41dma 17 0 &cppi41dma 18 0
479 &cppi41dma 19 0 &cppi41dma 20 0
480 &cppi41dma 21 0 &cppi41dma 22 0
481 &cppi41dma 23 0 &cppi41dma 24 0
482 &cppi41dma 25 0 &cppi41dma 26 0
483 &cppi41dma 27 0 &cppi41dma 28 0
484 &cppi41dma 29 0 &cppi41dma 15 1
485 &cppi41dma 16 1 &cppi41dma 17 1
486 &cppi41dma 18 1 &cppi41dma 19 1
487 &cppi41dma 20 1 &cppi41dma 21 1
488 &cppi41dma 22 1 &cppi41dma 23 1
489 &cppi41dma 24 1 &cppi41dma 25 1
490 &cppi41dma 26 1 &cppi41dma 27 1
491 &cppi41dma 28 1 &cppi41dma 29 1>;
493 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
494 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
496 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
497 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
501 cppi41dma: dma-controller@47402000 {
502 compatible = "ti,am3359-cppi41";
503 reg = <0x47400000 0x1000
507 reg-names = "glue", "controller", "scheduler", "queuemgr";
509 interrupt-names = "glue";
511 #dma-channels = <30>;
512 #dma-requests = <256>;
516 wd_timer2: wd_timer@480c2000 {
517 compatible = "ti,omap3-wdt";
518 ti,hwmods = "wd_timer";
519 reg = <0x480c2000 0x1000>;
525 #include "dm816x-clocks.dtsi"