2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/input/input.h>
24 compatible = "fsl,max8903-charger";
25 pinctrl-names = "default";
26 dok_input = <&gpio2 24 1>;
27 uok_input = <&gpio1 27 1>;
28 chg_input = <&gpio3 23 1>;
29 flt_input = <&gpio5 2 1>;
37 compatible = "gpio-leds";
41 linux,default-trigger = "max8903-charger-charging";
42 retain-state-suspended;
47 reg = <0x10000000 0x40000000>;
51 compatible = "simple-bus";
55 reg_usb_otg_vbus: regulator@0 {
56 compatible = "regulator-fixed";
58 regulator-name = "usb_otg_vbus";
59 regulator-min-microvolt = <5000000>;
60 regulator-max-microvolt = <5000000>;
65 reg_usb_h1_vbus: regulator@1 {
66 compatible = "regulator-fixed";
68 regulator-name = "usb_h1_vbus";
69 regulator-min-microvolt = <5000000>;
70 regulator-max-microvolt = <5000000>;
75 reg_audio: regulator@2 {
76 compatible = "regulator-fixed";
78 regulator-name = "wm8962-supply";
83 reg_sensor: regulator@3 {
84 compatible = "regulator-fixed";
86 regulator-name = "sensor-supply";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
90 startup-delay-us = <500>;
96 compatible = "gpio-keys";
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_gpio_keys>;
101 label = "Power Button";
102 gpios = <&gpio3 29 0>;
104 linux,code = <KEY_POWER>;
109 gpios = <&gpio1 4 0>;
111 linux,code = <KEY_VOLUMEUP>;
115 label = "Volume Down";
116 gpios = <&gpio1 5 0>;
118 linux,code = <KEY_VOLUMEDOWN>;
123 compatible = "fsl,imx6q-sabresd-wm8962",
124 "fsl,imx-audio-wm8962";
125 model = "wm8962-audio";
127 audio-codec = <&codec>;
129 "Headphone Jack", "HPOUTL",
130 "Headphone Jack", "HPOUTR",
131 "Ext Spk", "SPKOUTL",
132 "Ext Spk", "SPKOUTR",
139 hp-det-gpios = <&gpio7 8 1>;
140 mic-det-gpios = <&gpio1 9 1>;
144 compatible = "fsl,imx6q-audio-hdmi",
145 "fsl,imx-audio-hdmi";
146 model = "imx-audio-hdmi";
147 hdmi-controller = <&hdmi_audio>;
151 compatible = "fsl,mxc_sdc_fb";
153 interface_pix_fmt = "RGB666";
161 compatible = "fsl,mxc_sdc_fb";
163 interface_pix_fmt = "RGB24";
164 mode_str ="1920x1080M@60";
172 compatible = "fsl,mxc_sdc_fb";
174 interface_pix_fmt = "RGB565";
175 mode_str ="CLAA-WVGA";
183 compatible = "fsl,mxc_sdc_fb";
185 interface_pix_fmt = "RGB666";
193 compatible = "fsl,lcd";
196 default_ifmt = "RGB565";
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_ipu1>;
203 compatible = "pwm-backlight";
204 pwms = <&pwm1 0 5000000>;
205 brightness-levels = <0 4 8 16 32 64 128 255>;
206 default-brightness-level = <7>;
211 compatible = "fsl,mxc_v4l2_output";
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_audmux>;
223 arm-supply = <&sw1a_reg>;
224 soc-supply = <&sw1c_reg>;
228 fsl,spi-num-chipselects = <1>;
229 cs-gpios = <&gpio4 9 0>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_ecspi1>;
235 #address-cells = <1>;
237 compatible = "st,m25p32";
238 spi-max-frequency = <20000000>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_enet>;
247 phy-reset-gpios = <&gpio1 25 0>;
252 clock-frequency = <100000>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_i2c1>;
258 compatible = "wlf,wm8962";
260 clocks = <&clks 201>;
261 DCVDD-supply = <®_audio>;
262 DBVDD-supply = <®_audio>;
263 AVDD-supply = <®_audio>;
264 CPVDD-supply = <®_audio>;
265 MICVDD-supply = <®_audio>;
266 PLLVDD-supply = <®_audio>;
267 SPKVDD1-supply = <®_audio>;
268 SPKVDD2-supply = <®_audio>;
271 0x0000 /* 0:Default */
272 0x0000 /* 1:Default */
273 0x0013 /* 2:FN_DMICCLK */
274 0x0000 /* 3:Default */
275 0x8014 /* 4:FN_DMICCDAT */
276 0x0000 /* 5:Default */
281 compatible = "fsl,mma8451";
284 vdd-supply = <®_sensor>;
285 vddio-supply = <®_sensor>;
286 interrupt-parent = <&gpio1>;
288 interrupt-route = <1>;
293 clock-frequency = <100000>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pinctrl_i2c2>;
299 compatible = "fsl,imx6-hdmi-i2c";
304 compatible = "maxim,max11801";
306 interrupt-parent = <&gpio3>;
308 work-mode = <1>;/*DCM mode*/
312 compatible = "fsl,pfuze100";
317 regulator-min-microvolt = <300000>;
318 regulator-max-microvolt = <1875000>;
321 regulator-ramp-delay = <6250>;
325 regulator-min-microvolt = <300000>;
326 regulator-max-microvolt = <1875000>;
329 regulator-ramp-delay = <6250>;
333 regulator-min-microvolt = <800000>;
334 regulator-max-microvolt = <3300000>;
340 regulator-min-microvolt = <400000>;
341 regulator-max-microvolt = <1975000>;
347 regulator-min-microvolt = <400000>;
348 regulator-max-microvolt = <1975000>;
354 regulator-min-microvolt = <800000>;
355 regulator-max-microvolt = <3300000>;
359 regulator-min-microvolt = <5000000>;
360 regulator-max-microvolt = <5150000>;
364 regulator-min-microvolt = <1000000>;
365 regulator-max-microvolt = <3000000>;
376 regulator-min-microvolt = <800000>;
377 regulator-max-microvolt = <1550000>;
381 regulator-min-microvolt = <800000>;
382 regulator-max-microvolt = <1550000>;
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <3300000>;
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <3300000>;
397 regulator-min-microvolt = <1800000>;
398 regulator-max-microvolt = <3300000>;
403 regulator-min-microvolt = <1800000>;
404 regulator-max-microvolt = <3300000>;
412 clock-frequency = <100000>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_i2c3>;
418 compatible = "eeti,egalax_ts";
420 interrupt-parent = <&gpio6>;
422 wakeup-gpios = <&gpio6 7 0>;
426 compatible = "fsl,mag3110";
429 vdd-supply = <®_sensor>;
430 vddio-supply = <®_sensor>;
431 interrupt-parent = <&gpio3>;
436 compatible = "fsl,isl29023";
439 vdd-supply = <®_sensor>;
440 interrupt-parent = <&gpio3>;
446 pinctrl-names = "default";
447 pinctrl-0 = <&pinctrl_hog>;
450 pinctrl_hog: hoggrp {
452 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
453 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
454 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
455 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
456 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
457 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
458 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
459 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
460 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
461 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000
462 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
463 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
464 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
465 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
466 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
467 MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
468 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
469 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
470 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000
471 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
475 pinctrl_audmux: audmuxgrp {
477 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
478 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
479 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
480 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
484 pinctrl_ecspi1: ecspi1grp {
486 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
487 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
488 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
492 pinctrl_enet: enetgrp {
494 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
495 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
496 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
497 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
498 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
499 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
500 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
501 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
502 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
503 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
504 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
505 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
506 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
507 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
508 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
509 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
513 pinctrl_enet_irq: enetirqgrp {
515 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
519 pinctrl_gpio_keys: gpio_keysgrp {
521 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
522 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
523 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
527 pinctrl_hdmi_cec: hdmicecgrp {
529 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
533 pinctrl_hdmi_hdcp: hdmihdcpgrp {
535 MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
536 MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
540 pinctrl_i2c1: i2c1grp {
542 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
543 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
547 pinctrl_i2c2: i2c2grp {
549 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
550 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
554 pinctrl_i2c3: i2c3grp {
556 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
557 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
561 pinctrl_ipu1: ipu1grp {
563 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
564 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
565 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
566 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
567 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000
568 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
569 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
570 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
571 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
572 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
573 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
574 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
575 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
576 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
577 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
578 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
579 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
580 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
581 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
582 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
583 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
584 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
585 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
586 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
587 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
588 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
589 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
590 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
591 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
595 pinctrl_pwm1: pwm1grp {
597 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
601 pinctrl_uart1: uart1grp {
603 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
604 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
608 pinctrl_uart5_1: uart5grp-1 {
610 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
611 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
612 MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x1b0b1
613 MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x1b0b1
617 pinctrl_uart5dte_1: uart5dtegrp-1 {
619 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
620 MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
621 MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x1b0b1
622 MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x1b0b1
626 pinctrl_usbotg: usbotggrp {
628 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
632 pinctrl_usdhc2: usdhc2grp {
634 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
635 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
636 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
637 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
638 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
639 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
640 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
641 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
642 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
643 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
647 pinctrl_usdhc3: usdhc3grp {
649 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
650 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
651 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
652 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
653 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
654 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
655 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
656 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
657 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
658 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
666 dcic_mux = "dcic-hdmi";
672 dcic_mux = "dcic-lvds1";
677 /* use ldo-bypass, u-boot will check it and configure */
678 fsl,ldo-bypass = <1>;
686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_hdmi_cec>;
698 fsl,phy_reg_vlev = <0x0294>;
699 fsl,phy_reg_cksymtx = <0x800d>;
707 fsl,data-mapping = "spwg";
708 fsl,data-width = <18>;
712 native-mode = <&timing0>;
713 timing0: hsd100pxn1 {
714 clock-frequency = <65000000>;
728 fsl,data-mapping = "spwg";
729 fsl,data-width = <18>;
734 native-mode = <&timing1>;
735 timing1: hsd100pxn1 {
736 clock-frequency = <65000000>;
751 pinctrl-names = "default";
752 pinctrl-0 = <&pinctrl_pwm1>;
757 fsl,mode = "i2s-slave";
762 pinctrl-names = "default";
763 pinctrl-0 = <&pinctrl_uart1>;
768 vbus-supply = <®_usb_h1_vbus>;
773 vbus-supply = <®_usb_otg_vbus>;
774 pinctrl-names = "default";
775 pinctrl-0 = <&pinctrl_usbotg>;
776 disable-over-current;
781 pinctrl-names = "default";
782 pinctrl-0 = <&pinctrl_usdhc2>;
784 cd-gpios = <&gpio2 2 0>;
785 wp-gpios = <&gpio2 3 0>;
790 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_usdhc3>;
793 cd-gpios = <&gpio2 0 0>;
794 wp-gpios = <&gpio2 1 0>;