arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         aliases {
  17                 mxcfb0 = &mxcfb1;
  18                 mxcfb1 = &mxcfb2;
  19                 mxcfb2 = &mxcfb3;
  20                 mxcfb3 = &mxcfb4;
  21         };
  22
  23         battery: max8903@0 {
  24                 compatible = "fsl,max8903-charger";
  25                 pinctrl-names = "default";
  26                 dok_input = <&gpio2 24 1>;
  27                 uok_input = <&gpio1 27 1>;
  28                 chg_input = <&gpio3 23 1>;
  29                 flt_input = <&gpio5 2 1>;
  30                 fsl,dcm_always_high;
  31                 fsl,dc_valid;
  32                 fsl,usb_valid;
  33                 status = "okay";
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 charger-led {
  40                         gpios = <&gpio1 2 0>;
  41                         linux,default-trigger = "max8903-charger-charging";
  42                         retain-state-suspended;
  43                 };
  44         };
  45
  46         memory {
  47                 reg = <0x10000000 0x40000000>;
  48         };
  49
  50         regulators {
  51                 compatible = "simple-bus";
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54
  55                 reg_usb_otg_vbus: regulator@0 {
  56                         compatible = "regulator-fixed";
  57                         reg = <0>;
  58                         regulator-name = "usb_otg_vbus";
  59                         regulator-min-microvolt = <5000000>;
  60                         regulator-max-microvolt = <5000000>;
  61                         gpio = <&gpio3 22 0>;
  62                         enable-active-high;
  63                 };
  64
  65                 reg_usb_h1_vbus: regulator@1 {
  66                         compatible = "regulator-fixed";
  67                         reg = <1>;
  68                         regulator-name = "usb_h1_vbus";
  69                         regulator-min-microvolt = <5000000>;
  70                         regulator-max-microvolt = <5000000>;
  71                         gpio = <&gpio1 29 0>;
  72                         enable-active-high;
  73                 };
  74
  75                 reg_audio: regulator@2 {
  76                         compatible = "regulator-fixed";
  77                         reg = <2>;
  78                         regulator-name = "wm8962-supply";
  79                         gpio = <&gpio4 10 0>;
  80                         enable-active-high;
  81                 };
  82
  83                 reg_sensor: regulator@3 {
  84                         compatible = "regulator-fixed";
  85                         reg = <3>;
  86                         regulator-name = "sensor-supply";
  87                         regulator-min-microvolt = <3300000>;
  88                         regulator-max-microvolt = <3300000>;
  89                         gpio = <&gpio2 31 0>;
  90                         startup-delay-us = <500>;
  91                         enable-active-high;
  92                 };
  93         };
  94
  95         gpio-keys {
  96                 compatible = "gpio-keys";
  97                 pinctrl-names = "default";
  98                 pinctrl-0 = <&pinctrl_gpio_keys>;
  99
 100                 power {
 101                         label = "Power Button";
 102                         gpios = <&gpio3 29 0>;
 103                         gpio-key,wakeup;
 104                         linux,code = <KEY_POWER>;
 105                 };
 106
 107                 volume-up {
 108                         label = "Volume Up";
 109                         gpios = <&gpio1 4 0>;
 110                         gpio-key,wakeup;
 111                         linux,code = <KEY_VOLUMEUP>;
 112                 };
 113
 114                 volume-down {
 115                         label = "Volume Down";
 116                         gpios = <&gpio1 5 0>;
 117                         gpio-key,wakeup;
 118                         linux,code = <KEY_VOLUMEDOWN>;
 119                 };
 120         };
 121
 122         sound {
 123                 compatible = "fsl,imx6q-sabresd-wm8962",
 124                            "fsl,imx-audio-wm8962";
 125                 model = "wm8962-audio";
 126                 cpu-dai = <&ssi2>;
 127                 audio-codec = <&codec>;
 128                 audio-routing =
 129                         "Headphone Jack", "HPOUTL",
 130                         "Headphone Jack", "HPOUTR",
 131                         "Ext Spk", "SPKOUTL",
 132                         "Ext Spk", "SPKOUTR",
 133                         "MICBIAS", "AMIC",
 134                         "IN3R", "MICBIAS",
 135                         "DMIC", "MICBIAS",
 136                         "DMICDAT", "DMIC";
 137                 mux-int-port = <2>;
 138                 mux-ext-port = <3>;
 139                 hp-det-gpios = <&gpio7 8 1>;
 140                 mic-det-gpios = <&gpio1 9 1>;
 141         };
 142
 143         sound-hdmi {
 144                 compatible = "fsl,imx6q-audio-hdmi",
 145                              "fsl,imx-audio-hdmi";
 146                 model = "imx-audio-hdmi";
 147                 hdmi-controller = <&hdmi_audio>;
 148         };
 149
 150         mxcfb1: fb@0 {
 151                 compatible = "fsl,mxc_sdc_fb";
 152                 disp_dev = "ldb";
 153                 interface_pix_fmt = "RGB666";
 154                 default_bpp = <16>;
 155                 int_clk = <0>;
 156                 late_init = <0>;
 157                 status = "disabled";
 158         };
 159
 160         mxcfb2: fb@1 {
 161                 compatible = "fsl,mxc_sdc_fb";
 162                 disp_dev = "hdmi";
 163                 interface_pix_fmt = "RGB24";
 164                 mode_str ="1920x1080M@60";
 165                 default_bpp = <24>;
 166                 int_clk = <0>;
 167                 late_init = <0>;
 168                 status = "disabled";
 169         };
 170
 171         mxcfb3: fb@2 {
 172                 compatible = "fsl,mxc_sdc_fb";
 173                 disp_dev = "lcd";
 174                 interface_pix_fmt = "RGB565";
 175                 mode_str ="CLAA-WVGA";
 176                 default_bpp = <16>;
 177                 int_clk = <0>;
 178                 late_init = <0>;
 179                 status = "disabled";
 180         };
 181
 182         mxcfb4: fb@3 {
 183                 compatible = "fsl,mxc_sdc_fb";
 184                 disp_dev = "ldb";
 185                 interface_pix_fmt = "RGB666";
 186                 default_bpp = <16>;
 187                 int_clk = <0>;
 188                 late_init = <0>;
 189                 status = "disabled";
 190         };
 191
 192         lcd@0 {
 193                 compatible = "fsl,lcd";
 194                 ipu_id = <0>;
 195                 disp_id = <0>;
 196                 default_ifmt = "RGB565";
 197                 pinctrl-names = "default";
 198                 pinctrl-0 = <&pinctrl_ipu1>;
 199                 status = "okay";
 200         };
 201
 202         backlight {
 203                 compatible = "pwm-backlight";
 204                 pwms = <&pwm1 0 5000000>;
 205                 brightness-levels = <0 4 8 16 32 64 128 255>;
 206                 default-brightness-level = <7>;
 207                 status = "okay";
 208         };
 209
 210         v4l2_out {
 211                 compatible = "fsl,mxc_v4l2_output";
 212                 status = "okay";
 213         };
 214 };
 215
 216 &audmux {
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&pinctrl_audmux>;
 219         status = "okay";
 220 };
 221
 222 &cpu0 {
 223         arm-supply = <&sw1a_reg>;
 224         soc-supply = <&sw1c_reg>;
 225 };
 226
 227 &ecspi1 {
 228         fsl,spi-num-chipselects = <1>;
 229         cs-gpios = <&gpio4 9 0>;
 230         pinctrl-names = "default";
 231         pinctrl-0 = <&pinctrl_ecspi1>;
 232         status = "okay";
 233
 234         flash: m25p80@0 {
 235                 #address-cells = <1>;
 236                 #size-cells = <1>;
 237                 compatible = "st,m25p32";
 238                 spi-max-frequency = <20000000>;
 239                 reg = <0>;
 240         };
 241 };
 242
 243 &fec {
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&pinctrl_enet>;
 246         phy-mode = "rgmii";
 247         phy-reset-gpios = <&gpio1 25 0>;
 248         status = "okay";
 249 };
 250
 251 &i2c1 {
 252         clock-frequency = <100000>;
 253         pinctrl-names = "default";
 254         pinctrl-0 = <&pinctrl_i2c1>;
 255         status = "okay";
 256
 257         codec: wm8962@1a {
 258                 compatible = "wlf,wm8962";
 259                 reg = <0x1a>;
 260                 clocks = <&clks 201>;
 261                 DCVDD-supply = <&reg_audio>;
 262                 DBVDD-supply = <&reg_audio>;
 263                 AVDD-supply = <&reg_audio>;
 264                 CPVDD-supply = <&reg_audio>;
 265                 MICVDD-supply = <&reg_audio>;
 266                 PLLVDD-supply = <&reg_audio>;
 267                 SPKVDD1-supply = <&reg_audio>;
 268                 SPKVDD2-supply = <&reg_audio>;
 269                 amic-mono;
 270                 gpio-cfg = <
 271                         0x0000 /* 0:Default */
 272                         0x0000 /* 1:Default */
 273                         0x0013 /* 2:FN_DMICCLK */
 274                         0x0000 /* 3:Default */
 275                         0x8014 /* 4:FN_DMICCDAT */
 276                         0x0000 /* 5:Default */
 277                 >;
 278        };
 279
 280         mma8451@1c {
 281                 compatible = "fsl,mma8451";
 282                 reg = <0x1c>;
 283                 position = <0>;
 284                 vdd-supply = <&reg_sensor>;
 285                 vddio-supply = <&reg_sensor>;
 286                 interrupt-parent = <&gpio1>;
 287                 interrupts = <18 8>;
 288                 interrupt-route = <1>;
 289         };
 290 };
 291
 292 &i2c2 {
 293         clock-frequency = <100000>;
 294         pinctrl-names = "default";
 295         pinctrl-0 = <&pinctrl_i2c2>;
 296         status = "okay";
 297
 298         hdmi: edid@50 {
 299                 compatible = "fsl,imx6-hdmi-i2c";
 300                 reg = <0x50>;
 301         };
 302
 303         max11801@48 {
 304                 compatible = "maxim,max11801";
 305                 reg = <0x48>;
 306                 interrupt-parent = <&gpio3>;
 307                 interrupts = <26 2>;
 308                 work-mode = <1>;/*DCM mode*/
 309         };
 310
 311         pmic: pfuze100@08 {
 312                 compatible = "fsl,pfuze100";
 313                 reg = <0x08>;
 314
 315                 regulators {
 316                         sw1a_reg: sw1ab {
 317                                 regulator-min-microvolt = <300000>;
 318                                 regulator-max-microvolt = <1875000>;
 319                                 regulator-boot-on;
 320                                 regulator-always-on;
 321                                 regulator-ramp-delay = <6250>;
 322                         };
 323
 324                         sw1c_reg: sw1c {
 325                                 regulator-min-microvolt = <300000>;
 326                                 regulator-max-microvolt = <1875000>;
 327                                 regulator-boot-on;
 328                                 regulator-always-on;
 329                                 regulator-ramp-delay = <6250>;
 330                         };
 331
 332                         sw2_reg: sw2 {
 333                                 regulator-min-microvolt = <800000>;
 334                                 regulator-max-microvolt = <3300000>;
 335                                 regulator-boot-on;
 336                                 regulator-always-on;
 337                         };
 338
 339                         sw3a_reg: sw3a {
 340                                 regulator-min-microvolt = <400000>;
 341                                 regulator-max-microvolt = <1975000>;
 342                                 regulator-boot-on;
 343                                 regulator-always-on;
 344                         };
 345
 346                         sw3b_reg: sw3b {
 347                                 regulator-min-microvolt = <400000>;
 348                                 regulator-max-microvolt = <1975000>;
 349                                 regulator-boot-on;
 350                                 regulator-always-on;
 351                         };
 352
 353                         sw4_reg: sw4 {
 354                                 regulator-min-microvolt = <800000>;
 355                                 regulator-max-microvolt = <3300000>;
 356                         };
 357
 358                         swbst_reg: swbst {
 359                                 regulator-min-microvolt = <5000000>;
 360                                 regulator-max-microvolt = <5150000>;
 361                         };
 362
 363                         snvs_reg: vsnvs {
 364                                 regulator-min-microvolt = <1000000>;
 365                                 regulator-max-microvolt = <3000000>;
 366                                 regulator-boot-on;
 367                                 regulator-always-on;
 368                         };
 369
 370                         vref_reg: vrefddr {
 371                                 regulator-boot-on;
 372                                 regulator-always-on;
 373                         };
 374
 375                         vgen1_reg: vgen1 {
 376                                 regulator-min-microvolt = <800000>;
 377                                 regulator-max-microvolt = <1550000>;
 378                         };
 379
 380                         vgen2_reg: vgen2 {
 381                                 regulator-min-microvolt = <800000>;
 382                                 regulator-max-microvolt = <1550000>;
 383                         };
 384
 385                         vgen3_reg: vgen3 {
 386                                 regulator-min-microvolt = <1800000>;
 387                                 regulator-max-microvolt = <3300000>;
 388                         };
 389
 390                         vgen4_reg: vgen4 {
 391                                 regulator-min-microvolt = <1800000>;
 392                                 regulator-max-microvolt = <3300000>;
 393                                 regulator-always-on;
 394                         };
 395
 396                         vgen5_reg: vgen5 {
 397                                 regulator-min-microvolt = <1800000>;
 398                                 regulator-max-microvolt = <3300000>;
 399                                 regulator-always-on;
 400                         };
 401
 402                         vgen6_reg: vgen6 {
 403                                 regulator-min-microvolt = <1800000>;
 404                                 regulator-max-microvolt = <3300000>;
 405                                 regulator-always-on;
 406                         };
 407                 };
 408         };
 409 };
 410
 411 &i2c3 {
 412         clock-frequency = <100000>;
 413         pinctrl-names = "default";
 414         pinctrl-0 = <&pinctrl_i2c3>;
 415         status = "okay";
 416
 417         egalax_ts@04 {
 418                 compatible = "eeti,egalax_ts";
 419                 reg = <0x04>;
 420                 interrupt-parent = <&gpio6>;
 421                 interrupts = <7 2>;
 422                 wakeup-gpios = <&gpio6 7 0>;
 423         };
 424
 425         mag3110@0e {
 426                 compatible = "fsl,mag3110";
 427                 reg = <0x0e>;
 428                 position = <2>;
 429                 vdd-supply = <&reg_sensor>;
 430                 vddio-supply = <&reg_sensor>;
 431                 interrupt-parent = <&gpio3>;
 432                 interrupts = <16 1>;
 433         };
 434
 435         isl29023@44 {
 436                 compatible = "fsl,isl29023";
 437                 reg = <0x44>;
 438                 rext = <499>;
 439                 vdd-supply = <&reg_sensor>;
 440                 interrupt-parent = <&gpio3>;
 441                 interrupts = <9 2>;
 442         };
 443 };
 444
 445 &iomuxc {
 446         pinctrl-names = "default";
 447         pinctrl-0 = <&pinctrl_hog>;
 448
 449         imx6qdl-sabresd {
 450                 pinctrl_hog: hoggrp {
 451                         fsl,pins = <
 452                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 453                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 454                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 455                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 456                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 457                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 458                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 459                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 460                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
 461                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000
 462                                 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
 463                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
 464                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
 465                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
 466                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
 467                                 MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
 468                                 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
 469                                 MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x80000000
 470                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x80000000
 471                                 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
 472                                 MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
 473                         >;
 474                 };
 475
 476                 pinctrl_audmux: audmuxgrp {
 477                         fsl,pins = <
 478                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 479                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 480                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 481                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 482                         >;
 483                 };
 484
 485                 pinctrl_ecspi1: ecspi1grp {
 486                         fsl,pins = <
 487                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 488                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 489                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 490                         >;
 491                 };
 492
 493                 pinctrl_enet: enetgrp {
 494                         fsl,pins = <
 495                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 496                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 497                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 498                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 499                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 500                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 501                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 502                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 503                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 504                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 505                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 506                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 507                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 508                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 509                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 510                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 511                         >;
 512                 };
 513
 514                 pinctrl_enet_irq: enetirqgrp {
 515                         fsl,pins = <
 516                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 517                         >;
 518                 };
 519
 520                 pinctrl_gpio_keys: gpio_keysgrp {
 521                         fsl,pins = <
 522                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
 523                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x80000000
 524                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x80000000
 525                         >;
 526                 };
 527
 528                 pinctrl_hdmi_cec: hdmicecgrp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
 531                         >;
 532                 };
 533
 534                 pinctrl_hdmi_hdcp: hdmihdcpgrp {
 535                         fsl,pins = <
 536                                 MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
 537                                 MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
 538                         >;
 539                 };
 540
 541                 pinctrl_i2c1: i2c1grp {
 542                         fsl,pins = <
 543                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 544                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 545                         >;
 546                 };
 547
 548                 pinctrl_i2c2: i2c2grp {
 549                         fsl,pins = <
 550                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 551                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 552                          >;
 553                 };
 554
 555                 pinctrl_i2c3: i2c3grp {
 556                         fsl,pins = <
 557                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 558                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 559                         >;
 560                 };
 561
 562                 pinctrl_ipu1: ipu1grp {
 563                         fsl,pins = <
 564                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 565                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 566                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 567                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 568                                 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
 569                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 570                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 571                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 572                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 573                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 574                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 575                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 576                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 577                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 578                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 579                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 580                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 581                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 582                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 583                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 584                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 585                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 586                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 587                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 588                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 589                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 590                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 591                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 592                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 593                         >;
 594                 };
 595
 596                 pinctrl_pwm1: pwm1grp {
 597                         fsl,pins = <
 598                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 599                         >;
 600                 };
 601
 602                 pinctrl_uart1: uart1grp {
 603                         fsl,pins = <
 604                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 605                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 606                         >;
 607                 };
 608
 609                 pinctrl_uart5_1: uart5grp-1 {
 610                         fsl,pins = <
 611                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 612                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 613                                 MX6QDL_PAD_KEY_COL4__UART5_RTS_B        0x1b0b1
 614                                 MX6QDL_PAD_KEY_ROW4__UART5_CTS_B        0x1b0b1
 615                         >;
 616                 };
 617
 618                 pinctrl_uart5dte_1: uart5dtegrp-1 {
 619                         fsl,pins = <
 620                                 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA      0x1b0b1
 621                                 MX6QDL_PAD_KEY_COL1__UART5_RX_DATA      0x1b0b1
 622                                 MX6QDL_PAD_KEY_ROW4__UART5_RTS_B        0x1b0b1
 623                                 MX6QDL_PAD_KEY_COL4__UART5_CTS_B        0x1b0b1
 624                         >;
 625                 };
 626
 627                 pinctrl_usbotg: usbotggrp {
 628                         fsl,pins = <
 629                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 630                         >;
 631                 };
 632
 633                 pinctrl_usdhc2: usdhc2grp {
 634                         fsl,pins = <
 635                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 636                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 637                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 638                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 639                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 640                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 641                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 642                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 643                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 644                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 645                         >;
 646                 };
 647
 648                 pinctrl_usdhc3: usdhc3grp {
 649                         fsl,pins = <
 650                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 651                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 652                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 653                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 654                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 655                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 656                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 657                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 658                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 659                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 660                         >;
 661                 };
 662
 663                 pinctrl_usdhc4: usdhc4grp {
 664                         fsl,pins = <
 665                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 666                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 667                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 668                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 669                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 670                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 671                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 672                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 673                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 674                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 675                         >;
 676                 };
 677
 678         };
 679 };
 680
 681 &dcic1 {
 682         dcic_id = <0>;
 683         dcic_mux = "dcic-hdmi";
 684         status = "okay";
 685 };
 686
 687 &dcic2 {
 688         dcic_id = <1>;
 689         dcic_mux = "dcic-lvds1";
 690         status = "okay";
 691 };
 692
 693 &gpc {
 694         /* use ldo-bypass, u-boot will check it and configure */
 695         fsl,ldo-bypass = <1>;
 696         fsl,wdog-reset = <2>;
 697 };
 698
 699 &hdmi_audio {
 700         status = "okay";
 701 };
 702
 703 &hdmi_cec {
 704         pinctrl-names = "default";
 705         pinctrl-0 = <&pinctrl_hdmi_cec>;
 706         status = "okay";
 707 };
 708
 709 &hdmi_core {
 710         ipu_id = <0>;
 711         disp_id = <0>;
 712         status = "okay";
 713 };
 714
 715 &hdmi_video {
 716         fsl,phy_reg_vlev = <0x0294>;
 717         fsl,phy_reg_cksymtx = <0x800d>;
 718         status = "okay";
 719 };
 720
 721 &ldb {
 722         status = "okay";
 723
 724         lvds-channel@0 {
 725                 fsl,data-mapping = "spwg";
 726                 fsl,data-width = <18>;
 727                 status = "okay";
 728
 729                 display-timings {
 730                         native-mode = <&timing0>;
 731                         timing0: hsd100pxn1 {
 732                                 clock-frequency = <65000000>;
 733                                 hactive = <1024>;
 734                                 vactive = <768>;
 735                                 hback-porch = <220>;
 736                                 hfront-porch = <40>;
 737                                 vback-porch = <21>;
 738                                 vfront-porch = <7>;
 739                                 hsync-len = <60>;
 740                                 vsync-len = <10>;
 741                         };
 742                 };
 743         };
 744
 745         lvds-channel@1 {
 746                 fsl,data-mapping = "spwg";
 747                 fsl,data-width = <18>;
 748                 primary;
 749                 status = "okay";
 750
 751                 display-timings {
 752                         native-mode = <&timing1>;
 753                         timing1: hsd100pxn1 {
 754                                 clock-frequency = <65000000>;
 755                                 hactive = <1024>;
 756                                 vactive = <768>;
 757                                 hback-porch = <220>;
 758                                 hfront-porch = <40>;
 759                                 vback-porch = <21>;
 760                                 vfront-porch = <7>;
 761                                 hsync-len = <60>;
 762                                 vsync-len = <10>;
 763                         };
 764                 };
 765         };
 766 };
 767
 768 &pwm1 {
 769         pinctrl-names = "default";
 770         pinctrl-0 = <&pinctrl_pwm1>;
 771         status = "okay";
 772 };
 773
 774 &ssi2 {
 775         fsl,mode = "i2s-slave";
 776         status = "okay";
 777 };
 778
 779 &uart1 {
 780         pinctrl-names = "default";
 781         pinctrl-0 = <&pinctrl_uart1>;
 782         status = "okay";
 783 };
 784
 785 &usbh1 {
 786         vbus-supply = <&reg_usb_h1_vbus>;
 787         status = "okay";
 788 };
 789
 790 &usbotg {
 791         vbus-supply = <&reg_usb_otg_vbus>;
 792         pinctrl-names = "default";
 793         pinctrl-0 = <&pinctrl_usbotg>;
 794         disable-over-current;
 795         status = "okay";
 796 };
 797
 798 &usdhc2 {
 799         pinctrl-names = "default";
 800         pinctrl-0 = <&pinctrl_usdhc2>;
 801         bus-width = <8>;
 802         cd-gpios = <&gpio2 2 0>;
 803         wp-gpios = <&gpio2 3 0>;
 804         no-1-8-v;
 805         keep-power-in-suspend;
 806         status = "okay";
 807 };
 808
 809 &usdhc3 {
 810         pinctrl-names = "default";
 811         pinctrl-0 = <&pinctrl_usdhc3>;
 812         bus-width = <8>;
 813         cd-gpios = <&gpio2 0 0>;
 814         wp-gpios = <&gpio2 1 0>;
 815         no-1-8-v;
 816         keep-power-in-suspend;
 817         status = "okay";
 818 };
 819
 820 &usdhc4 {
 821         pinctrl-names = "default";
 822         pinctrl-0 = <&pinctrl_usdhc4>;
 823         bus-width = <8>;
 824         non-removable;
 825         no-1-8-v;
 826         keep-power-in-suspend;
 827         status = "okay";
 828 };
 829
 830 &wdog1 {
 831         status = "disabled";
 832 };
 833
 834 &wdog2 {
 835         status = "okay";
 836 };