arch/arm/mach-omap2/io.c

   1 /*
   2  * linux/arch/arm/mach-omap2/io.c
   3  *
   4  * OMAP2 I/O mapping code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Copyright (C) 2007-2009 Texas Instruments
   8  *
   9  * Author:
  10  *      Juha Yrjola <juha.yrjola@nokia.com>
  11  *      Syed Khasim <x0khasim@ti.com>
  12  *
  13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/clk.h>
  24
  25 #include <asm/tlb.h>
  26 #include <asm/mach/map.h>
  27
  28 #include <linux/omap-dma.h>
  29
  30 #include "omap_hwmod.h"
  31 #include "soc.h"
  32 #include "iomap.h"
  33 #include "voltage.h"
  34 #include "powerdomain.h"
  35 #include "clockdomain.h"
  36 #include "common.h"
  37 #include "clock.h"
  38 #include "clock2xxx.h"
  39 #include "clock3xxx.h"
  40 #include "clock44xx.h"
  41 #include "omap-pm.h"
  42 #include "sdrc.h"
  43 #include "control.h"
  44 #include "serial.h"
  45 #include "sram.h"
  46 #include "cm2xxx.h"
  47 #include "cm3xxx.h"
  48 #include "prm.h"
  49 #include "cm.h"
  50 #include "prcm_mpu44xx.h"
  51 #include "prminst44xx.h"
  52 #include "cminst44xx.h"
  53 #include "prm2xxx.h"
  54 #include "prm3xxx.h"
  55 #include "prm44xx.h"
  56
  57 /*
  58  * The machine specific code may provide the extra mapping besides the
  59  * default mapping provided here.
  60  */
  61
  62 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
  63 static struct map_desc omap24xx_io_desc[] __initdata = {
  64         {
  65                 .virtual        = L3_24XX_VIRT,
  66                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
  67                 .length         = L3_24XX_SIZE,
  68                 .type           = MT_DEVICE
  69         },
  70         {
  71                 .virtual        = L4_24XX_VIRT,
  72                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
  73                 .length         = L4_24XX_SIZE,
  74                 .type           = MT_DEVICE
  75         },
  76 };
  77
  78 #ifdef CONFIG_SOC_OMAP2420
  79 static struct map_desc omap242x_io_desc[] __initdata = {
  80         {
  81                 .virtual        = DSP_MEM_2420_VIRT,
  82                 .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
  83                 .length         = DSP_MEM_2420_SIZE,
  84                 .type           = MT_DEVICE
  85         },
  86         {
  87                 .virtual        = DSP_IPI_2420_VIRT,
  88                 .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
  89                 .length         = DSP_IPI_2420_SIZE,
  90                 .type           = MT_DEVICE
  91         },
  92         {
  93                 .virtual        = DSP_MMU_2420_VIRT,
  94                 .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
  95                 .length         = DSP_MMU_2420_SIZE,
  96                 .type           = MT_DEVICE
  97         },
  98 };
  99
 100 #endif
 101
 102 #ifdef CONFIG_SOC_OMAP2430
 103 static struct map_desc omap243x_io_desc[] __initdata = {
 104         {
 105                 .virtual        = L4_WK_243X_VIRT,
 106                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
 107                 .length         = L4_WK_243X_SIZE,
 108                 .type           = MT_DEVICE
 109         },
 110         {
 111                 .virtual        = OMAP243X_GPMC_VIRT,
 112                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
 113                 .length         = OMAP243X_GPMC_SIZE,
 114                 .type           = MT_DEVICE
 115         },
 116         {
 117                 .virtual        = OMAP243X_SDRC_VIRT,
 118                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
 119                 .length         = OMAP243X_SDRC_SIZE,
 120                 .type           = MT_DEVICE
 121         },
 122         {
 123                 .virtual        = OMAP243X_SMS_VIRT,
 124                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
 125                 .length         = OMAP243X_SMS_SIZE,
 126                 .type           = MT_DEVICE
 127         },
 128 };
 129 #endif
 130 #endif
 131
 132 #ifdef  CONFIG_ARCH_OMAP3
 133 static struct map_desc omap34xx_io_desc[] __initdata = {
 134         {
 135                 .virtual        = L3_34XX_VIRT,
 136                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
 137                 .length         = L3_34XX_SIZE,
 138                 .type           = MT_DEVICE
 139         },
 140         {
 141                 .virtual        = L4_34XX_VIRT,
 142                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 143                 .length         = L4_34XX_SIZE,
 144                 .type           = MT_DEVICE
 145         },
 146         {
 147                 .virtual        = OMAP34XX_GPMC_VIRT,
 148                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
 149                 .length         = OMAP34XX_GPMC_SIZE,
 150                 .type           = MT_DEVICE
 151         },
 152         {
 153                 .virtual        = OMAP343X_SMS_VIRT,
 154                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
 155                 .length         = OMAP343X_SMS_SIZE,
 156                 .type           = MT_DEVICE
 157         },
 158         {
 159                 .virtual        = OMAP343X_SDRC_VIRT,
 160                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
 161                 .length         = OMAP343X_SDRC_SIZE,
 162                 .type           = MT_DEVICE
 163         },
 164         {
 165                 .virtual        = L4_PER_34XX_VIRT,
 166                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
 167                 .length         = L4_PER_34XX_SIZE,
 168                 .type           = MT_DEVICE
 169         },
 170         {
 171                 .virtual        = L4_EMU_34XX_VIRT,
 172                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
 173                 .length         = L4_EMU_34XX_SIZE,
 174                 .type           = MT_DEVICE
 175         },
 176 #if defined(CONFIG_DEBUG_LL) &&                                                 \
 177         (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
 178         {
 179                 .virtual        = ZOOM_UART_VIRT,
 180                 .pfn            = __phys_to_pfn(ZOOM_UART_BASE),
 181                 .length         = SZ_1M,
 182                 .type           = MT_DEVICE
 183         },
 184 #endif
 185 };
 186 #endif
 187
 188 #ifdef CONFIG_SOC_TI81XX
 189 static struct map_desc omapti81xx_io_desc[] __initdata = {
 190         {
 191                 .virtual        = L4_34XX_VIRT,
 192                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 193                 .length         = L4_34XX_SIZE,
 194                 .type           = MT_DEVICE
 195         }
 196 };
 197 #endif
 198
 199 #ifdef CONFIG_SOC_AM33XX
 200 static struct map_desc omapam33xx_io_desc[] __initdata = {
 201         {
 202                 .virtual        = L4_34XX_VIRT,
 203                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 204                 .length         = L4_34XX_SIZE,
 205                 .type           = MT_DEVICE
 206         },
 207         {
 208                 .virtual        = L4_WK_AM33XX_VIRT,
 209                 .pfn            = __phys_to_pfn(L4_WK_AM33XX_PHYS),
 210                 .length         = L4_WK_AM33XX_SIZE,
 211                 .type           = MT_DEVICE
 212         }
 213 };
 214 #endif
 215
 216 #ifdef  CONFIG_ARCH_OMAP4
 217 static struct map_desc omap44xx_io_desc[] __initdata = {
 218         {
 219                 .virtual        = L3_44XX_VIRT,
 220                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
 221                 .length         = L3_44XX_SIZE,
 222                 .type           = MT_DEVICE,
 223         },
 224         {
 225                 .virtual        = L4_44XX_VIRT,
 226                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
 227                 .length         = L4_44XX_SIZE,
 228                 .type           = MT_DEVICE,
 229         },
 230         {
 231                 .virtual        = L4_PER_44XX_VIRT,
 232                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
 233                 .length         = L4_PER_44XX_SIZE,
 234                 .type           = MT_DEVICE,
 235         },
 236 #ifdef CONFIG_OMAP4_ERRATA_I688
 237         {
 238                 .virtual        = OMAP4_SRAM_VA,
 239                 .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
 240                 .length         = PAGE_SIZE,
 241                 .type           = MT_MEMORY_SO,
 242         },
 243 #endif
 244
 245 };
 246 #endif
 247
 248 #ifdef  CONFIG_SOC_OMAP5
 249 static struct map_desc omap54xx_io_desc[] __initdata = {
 250         {
 251                 .virtual        = L3_54XX_VIRT,
 252                 .pfn            = __phys_to_pfn(L3_54XX_PHYS),
 253                 .length         = L3_54XX_SIZE,
 254                 .type           = MT_DEVICE,
 255         },
 256         {
 257                 .virtual        = L4_54XX_VIRT,
 258                 .pfn            = __phys_to_pfn(L4_54XX_PHYS),
 259                 .length         = L4_54XX_SIZE,
 260                 .type           = MT_DEVICE,
 261         },
 262         {
 263                 .virtual        = L4_WK_54XX_VIRT,
 264                 .pfn            = __phys_to_pfn(L4_WK_54XX_PHYS),
 265                 .length         = L4_WK_54XX_SIZE,
 266                 .type           = MT_DEVICE,
 267         },
 268         {
 269                 .virtual        = L4_PER_54XX_VIRT,
 270                 .pfn            = __phys_to_pfn(L4_PER_54XX_PHYS),
 271                 .length         = L4_PER_54XX_SIZE,
 272                 .type           = MT_DEVICE,
 273         },
 274 #ifdef CONFIG_OMAP4_ERRATA_I688
 275         {
 276                 .virtual        = OMAP4_SRAM_VA,
 277                 .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
 278                 .length         = PAGE_SIZE,
 279                 .type           = MT_MEMORY_SO,
 280         },
 281 #endif
 282 };
 283 #endif
 284
 285 #ifdef CONFIG_SOC_OMAP2420
 286 void __init omap242x_map_io(void)
 287 {
 288         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 289         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
 290 }
 291 #endif
 292
 293 #ifdef CONFIG_SOC_OMAP2430
 294 void __init omap243x_map_io(void)
 295 {
 296         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 297         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
 298 }
 299 #endif
 300
 301 #ifdef CONFIG_ARCH_OMAP3
 302 void __init omap3_map_io(void)
 303 {
 304         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
 305 }
 306 #endif
 307
 308 #ifdef CONFIG_SOC_TI81XX
 309 void __init ti81xx_map_io(void)
 310 {
 311         iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 312 }
 313 #endif
 314
 315 #ifdef CONFIG_SOC_AM33XX
 316 void __init am33xx_map_io(void)
 317 {
 318         iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
 319 }
 320 #endif
 321
 322 #ifdef CONFIG_ARCH_OMAP4
 323 void __init omap4_map_io(void)
 324 {
 325         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
 326         omap_barriers_init();
 327 }
 328 #endif
 329
 330 #ifdef CONFIG_SOC_OMAP5
 331 void __init omap5_map_io(void)
 332 {
 333         iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
 334         omap_barriers_init();
 335 }
 336 #endif
 337 /*
 338  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
 339  *
 340  * Sets the CORE DPLL3 M2 divider to the same value that it's at
 341  * currently.  This has the effect of setting the SDRC SDRAM AC timing
 342  * registers to the values currently defined by the kernel.  Currently
 343  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
 344  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
 345  * or passes along the return value of clk_set_rate().
 346  */
 347 static int __init _omap2_init_reprogram_sdrc(void)
 348 {
 349         struct clk *dpll3_m2_ck;
 350         int v = -EINVAL;
 351         long rate;
 352
 353         if (!cpu_is_omap34xx())
 354                 return 0;
 355
 356         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
 357         if (IS_ERR(dpll3_m2_ck))
 358                 return -EINVAL;
 359
 360         rate = clk_get_rate(dpll3_m2_ck);
 361         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
 362         v = clk_set_rate(dpll3_m2_ck, rate);
 363         if (v)
 364                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
 365
 366         clk_put(dpll3_m2_ck);
 367
 368         return v;
 369 }
 370
 371 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
 372 {
 373         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 374 }
 375
 376 static void __init omap_hwmod_init_postsetup(void)
 377 {
 378         u8 postsetup_state;
 379
 380         /* Set the default postsetup state for all hwmods */
 381 #ifdef CONFIG_PM_RUNTIME
 382         postsetup_state = _HWMOD_STATE_IDLE;
 383 #else
 384         postsetup_state = _HWMOD_STATE_ENABLED;
 385 #endif
 386         omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
 387
 388         omap_pm_if_early_init();
 389 }
 390
 391 #ifdef CONFIG_SOC_OMAP2420
 392 void __init omap2420_init_early(void)
 393 {
 394         omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
 395         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
 396                                OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
 397         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
 398                                   NULL);
 399         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
 400         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
 401         omap2xxx_check_revision();
 402         omap2xxx_prm_init();
 403         omap2xxx_cm_init();
 404         omap2xxx_voltagedomains_init();
 405         omap242x_powerdomains_init();
 406         omap242x_clockdomains_init();
 407         omap2420_hwmod_init();
 408         omap_hwmod_init_postsetup();
 409         omap2420_clk_init();
 410 }
 411
 412 void __init omap2420_init_late(void)
 413 {
 414         omap_mux_late_init();
 415         omap2_common_pm_late_init();
 416         omap2_pm_init();
 417         omap2_clk_enable_autoidle_all();
 418 }
 419 #endif
 420
 421 #ifdef CONFIG_SOC_OMAP2430
 422 void __init omap2430_init_early(void)
 423 {
 424         omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
 425         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
 426                                OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
 427         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
 428                                   NULL);
 429         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
 430         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
 431         omap2xxx_check_revision();
 432         omap2xxx_prm_init();
 433         omap2xxx_cm_init();
 434         omap2xxx_voltagedomains_init();
 435         omap243x_powerdomains_init();
 436         omap243x_clockdomains_init();
 437         omap2430_hwmod_init();
 438         omap_hwmod_init_postsetup();
 439         omap2430_clk_init();
 440 }
 441
 442 void __init omap2430_init_late(void)
 443 {
 444         omap_mux_late_init();
 445         omap2_common_pm_late_init();
 446         omap2_pm_init();
 447         omap2_clk_enable_autoidle_all();
 448 }
 449 #endif
 450
 451 /*
 452  * Currently only board-omap3beagle.c should call this because of the
 453  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
 454  */
 455 #ifdef CONFIG_ARCH_OMAP3
 456 void __init omap3_init_early(void)
 457 {
 458         omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
 459         omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
 460                                OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
 461         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
 462                                   NULL);
 463         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
 464         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
 465         omap3xxx_check_revision();
 466         omap3xxx_check_features();
 467         omap3xxx_prm_init();
 468         omap3xxx_cm_init();
 469         omap3xxx_voltagedomains_init();
 470         omap3xxx_powerdomains_init();
 471         omap3xxx_clockdomains_init();
 472         omap3xxx_hwmod_init();
 473         omap_hwmod_init_postsetup();
 474         omap3xxx_clk_init();
 475 }
 476
 477 void __init omap3430_init_early(void)
 478 {
 479         omap3_init_early();
 480 }
 481
 482 void __init omap35xx_init_early(void)
 483 {
 484         omap3_init_early();
 485 }
 486
 487 void __init omap3630_init_early(void)
 488 {
 489         omap3_init_early();
 490 }
 491
 492 void __init am35xx_init_early(void)
 493 {
 494         omap3_init_early();
 495 }
 496
 497 void __init ti81xx_init_early(void)
 498 {
 499         omap2_set_globals_tap(OMAP343X_CLASS,
 500                               OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
 501         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
 502                                   NULL);
 503         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
 504         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
 505         omap3xxx_check_revision();
 506         ti81xx_check_features();
 507         omap3xxx_voltagedomains_init();
 508         omap3xxx_powerdomains_init();
 509         omap3xxx_clockdomains_init();
 510         omap3xxx_hwmod_init();
 511         omap_hwmod_init_postsetup();
 512         omap3xxx_clk_init();
 513 }
 514
 515 void __init omap3_init_late(void)
 516 {
 517         omap_mux_late_init();
 518         omap2_common_pm_late_init();
 519         omap3_pm_init();
 520         omap2_clk_enable_autoidle_all();
 521 }
 522
 523 void __init omap3430_init_late(void)
 524 {
 525         omap_mux_late_init();
 526         omap2_common_pm_late_init();
 527         omap3_pm_init();
 528         omap2_clk_enable_autoidle_all();
 529 }
 530
 531 void __init omap35xx_init_late(void)
 532 {
 533         omap_mux_late_init();
 534         omap2_common_pm_late_init();
 535         omap3_pm_init();
 536         omap2_clk_enable_autoidle_all();
 537 }
 538
 539 void __init omap3630_init_late(void)
 540 {
 541         omap_mux_late_init();
 542         omap2_common_pm_late_init();
 543         omap3_pm_init();
 544         omap2_clk_enable_autoidle_all();
 545 }
 546
 547 void __init am35xx_init_late(void)
 548 {
 549         omap_mux_late_init();
 550         omap2_common_pm_late_init();
 551         omap3_pm_init();
 552         omap2_clk_enable_autoidle_all();
 553 }
 554
 555 void __init ti81xx_init_late(void)
 556 {
 557         omap_mux_late_init();
 558         omap2_common_pm_late_init();
 559         omap3_pm_init();
 560         omap2_clk_enable_autoidle_all();
 561 }
 562 #endif
 563
 564 #ifdef CONFIG_SOC_AM33XX
 565 void __init am33xx_init_early(void)
 566 {
 567         omap2_set_globals_tap(AM335X_CLASS,
 568                               AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
 569         omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
 570                                   NULL);
 571         omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
 572         omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 573         omap3xxx_check_revision();
 574         ti81xx_check_features();
 575         am33xx_voltagedomains_init();
 576         am33xx_powerdomains_init();
 577         am33xx_clockdomains_init();
 578         am33xx_hwmod_init();
 579         omap_hwmod_init_postsetup();
 580         am33xx_clk_init();
 581 }
 582 #endif
 583
 584 #ifdef CONFIG_ARCH_OMAP4
 585 void __init omap4430_init_early(void)
 586 {
 587         omap2_set_globals_tap(OMAP443X_CLASS,
 588                               OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
 589         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
 590                                   OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
 591         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
 592         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 593                              OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
 594         omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
 595         omap_prm_base_init();
 596         omap_cm_base_init();
 597         omap4xxx_check_revision();
 598         omap4xxx_check_features();
 599         omap44xx_prm_init();
 600         omap44xx_voltagedomains_init();
 601         omap44xx_powerdomains_init();
 602         omap44xx_clockdomains_init();
 603         omap44xx_hwmod_init();
 604         omap_hwmod_init_postsetup();
 605         omap4xxx_clk_init();
 606 }
 607
 608 void __init omap4430_init_late(void)
 609 {
 610         omap_mux_late_init();
 611         omap2_common_pm_late_init();
 612         omap4_pm_init();
 613         omap2_clk_enable_autoidle_all();
 614 }
 615 #endif
 616
 617 #ifdef CONFIG_SOC_OMAP5
 618 void __init omap5_init_early(void)
 619 {
 620         omap2_set_globals_tap(OMAP54XX_CLASS,
 621                               OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
 622         omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
 623                                   OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
 624         omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
 625         omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
 626                              OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
 627         omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 628         omap_prm_base_init();
 629         omap_cm_base_init();
 630         omap5xxx_check_revision();
 631 }
 632 #endif
 633
 634 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 635                                       struct omap_sdrc_params *sdrc_cs1)
 636 {
 637         omap_sram_init();
 638
 639         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
 640                 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
 641                 _omap2_init_reprogram_sdrc();
 642         }
 643 }