5 * TLB flushing on s390 is complicated. The following requirement
6 * from the principles of operation is the most arduous:
8 * "A valid table entry must not be changed while it is attached
9 * to any CPU and may be used for translation by that CPU except to
10 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
11 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
12 * table entry, or (3) make a change by means of a COMPARE AND SWAP
13 * AND PURGE instruction that purges the TLB."
15 * The modification of a pte of an active mm struct therefore is
16 * a two step process: i) invalidate the pte, ii) store the new pte.
17 * This is true for the page protection bit as well.
18 * The only possible optimization is to flush at the beginning of
19 * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
21 * Pages used for the page tables is a different story. FIXME: more
25 #include <linux/pagemap.h>
26 #include <linux/swap.h>
27 #include <asm/processor.h>
28 #include <asm/pgalloc.h>
29 #include <asm/tlbflush.h>
33 struct mmu_table_batch *batch;
35 unsigned long start, end;
38 struct mmu_table_batch {
44 #define MAX_TABLE_BATCH \
45 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
47 extern void tlb_table_flush(struct mmu_gather *tlb);
48 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
50 static inline void tlb_gather_mmu(struct mmu_gather *tlb,
58 tlb->fullmm = !(start | (end+1));
62 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
64 __tlb_flush_mm_lazy(tlb->mm);
67 static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
73 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
75 tlb_flush_mmu_tlbonly(tlb);
76 tlb_flush_mmu_free(tlb);
79 static inline void tlb_finish_mmu(struct mmu_gather *tlb,
80 unsigned long start, unsigned long end)
86 * Release the page cache reference for a pte removed by
87 * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
88 * has already been freed, so just do free_page_and_swap_cache.
90 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
92 free_page_and_swap_cache(page);
93 return false; /* avoid calling tlb_flush_mmu */
96 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
98 free_page_and_swap_cache(page);
101 static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
102 struct page *page, int page_size)
104 return __tlb_remove_page(tlb, page);
107 static inline void tlb_remove_page_size(struct mmu_gather *tlb,
108 struct page *page, int page_size)
110 return tlb_remove_page(tlb, page);
114 * pte_free_tlb frees a pte table and clears the CRSTE for the
115 * page table from the tlb.
117 static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
118 unsigned long address)
120 page_table_free_rcu(tlb, (unsigned long *) pte, address);
124 * pmd_free_tlb frees a pmd table and clears the CRSTE for the
125 * segment table entry from the tlb.
126 * If the mm uses a two level page table the single pmd is freed
127 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
128 * to avoid the double free of the pmd in this case.
130 static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
131 unsigned long address)
133 if (tlb->mm->context.asce_limit <= (1UL << 31))
135 pgtable_pmd_page_dtor(virt_to_page(pmd));
136 tlb_remove_table(tlb, pmd);
140 * p4d_free_tlb frees a pud table and clears the CRSTE for the
141 * region second table entry from the tlb.
142 * If the mm uses a four level page table the single p4d is freed
143 * as the pgd. p4d_free_tlb checks the asce_limit against 8PB
144 * to avoid the double free of the p4d in this case.
146 static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
147 unsigned long address)
149 if (tlb->mm->context.asce_limit <= (1UL << 53))
151 tlb_remove_table(tlb, p4d);
155 * pud_free_tlb frees a pud table and clears the CRSTE for the
156 * region third table entry from the tlb.
157 * If the mm uses a three level page table the single pud is freed
158 * as the pgd. pud_free_tlb checks the asce_limit against 4TB
159 * to avoid the double free of the pud in this case.
161 static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
162 unsigned long address)
164 if (tlb->mm->context.asce_limit <= (1UL << 42))
166 tlb_remove_table(tlb, pud);
169 #define tlb_start_vma(tlb, vma) do { } while (0)
170 #define tlb_end_vma(tlb, vma) do { } while (0)
171 #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
172 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, addr) do { } while (0)
173 #define tlb_migrate_finish(mm) do { } while (0)
174 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
175 tlb_remove_tlb_entry(tlb, ptep, address)
177 #define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
178 static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
179 unsigned int page_size)
183 #endif /* _S390_TLB_H */