2 * S390 low-level entry points.
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/processor.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
23 #include <asm/vx-insn.h>
24 #include <asm/setup.h>
26 #include <asm/export.h>
29 __PT_R1 = __PT_GPRS + 8
30 __PT_R2 = __PT_GPRS + 16
31 __PT_R3 = __PT_GPRS + 24
32 __PT_R4 = __PT_GPRS + 32
33 __PT_R5 = __PT_GPRS + 40
34 __PT_R6 = __PT_GPRS + 48
35 __PT_R7 = __PT_GPRS + 56
36 __PT_R8 = __PT_GPRS + 64
37 __PT_R9 = __PT_GPRS + 72
38 __PT_R10 = __PT_GPRS + 80
39 __PT_R11 = __PT_GPRS + 88
40 __PT_R12 = __PT_GPRS + 96
41 __PT_R13 = __PT_GPRS + 104
42 __PT_R14 = __PT_GPRS + 112
43 __PT_R15 = __PT_GPRS + 120
45 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
46 STACK_SIZE = 1 << STACK_SHIFT
47 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
49 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
50 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
51 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
52 _TIF_SYSCALL_TRACEPOINT)
53 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
54 _CIF_ASCE_SECONDARY | _CIF_FPU)
55 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
57 #define BASED(name) name-cleanup_critical(%r13)
60 #ifdef CONFIG_TRACE_IRQFLAGS
62 brasl %r14,trace_hardirqs_on_caller
67 #ifdef CONFIG_TRACE_IRQFLAGS
69 brasl %r14,trace_hardirqs_off_caller
73 .macro LOCKDEP_SYS_EXIT
75 tm __PT_PSW+1(%r11),0x01 # returning to user ?
77 brasl %r14,lockdep_sys_exit
81 .macro CHECK_STACK stacksize,savearea
82 #ifdef CONFIG_CHECK_STACK
83 tml %r15,\stacksize - CONFIG_STACK_GUARD
89 .macro SWITCH_ASYNC savearea,timer
90 tmhh %r8,0x0001 # interrupting from user ?
93 slg %r14,BASED(.Lcritical_start)
94 clg %r14,BASED(.Lcritical_length)
96 lghi %r11,\savearea # inside critical section, do cleanup
97 brasl %r14,cleanup_critical
98 tmhh %r8,0x0001 # retest problem state after cleanup
100 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
102 srag %r14,%r14,STACK_SHIFT
104 CHECK_STACK 1<<STACK_SHIFT,\savearea
105 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
107 1: UPDATE_VTIME %r14,%r15,\timer
108 2: lg %r15,__LC_ASYNC_STACK # load async stack
109 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
112 .macro UPDATE_VTIME w1,w2,enter_timer
113 lg \w1,__LC_EXIT_TIMER
114 lg \w2,__LC_LAST_UPDATE_TIMER
116 slg \w2,__LC_EXIT_TIMER
117 alg \w1,__LC_USER_TIMER
118 alg \w2,__LC_SYSTEM_TIMER
119 stg \w1,__LC_USER_TIMER
120 stg \w2,__LC_SYSTEM_TIMER
121 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
125 stg %r8,__LC_RETURN_PSW
126 ni __LC_RETURN_PSW,0xbf
131 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
132 .insn s,0xb27c0000,\savearea # store clock fast
134 .insn s,0xb2050000,\savearea # store clock
139 * The TSTMSK macro generates a test-under-mask instruction by
140 * calculating the memory offset for the specified mask value.
141 * Mask value can be any constant. The macro shifts the mask
142 * value to calculate the memory offset for the test-under-mask
145 .macro TSTMSK addr, mask, size=8, bytepos=0
146 .if (\bytepos < \size) && (\mask >> 8)
148 .error "Mask exceeds byte boundary"
150 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
154 .error "Mask must not be zero"
156 off = \size - \bytepos - 1
160 .section .kprobes.text, "ax"
163 * This nop exists only in order to avoid that __switch_to starts at
164 * the beginning of the kprobes text section. In that case we would
165 * have several symbols at the same address. E.g. objdump would take
166 * an arbitrary symbol name when disassembling this code.
167 * With the added nop in between the __switch_to symbol is unique
173 * Scheduler resume function, called by switch_to
174 * gpr2 = (task_struct *) prev
175 * gpr3 = (task_struct *) next
180 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
182 aghi %r1,__TASK_thread # thread_struct of prev task
183 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
184 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
186 aghi %r1,__TASK_thread # thread_struct of next task
188 aghi %r15,STACK_INIT # end of kernel stack of next
189 stg %r3,__LC_CURRENT # store task struct of next
190 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
191 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
192 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
194 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
196 .insn s,0xb2800000,__LC_LPP # set program parameter
201 #if IS_ENABLED(CONFIG_KVM)
203 * sie64a calling convention:
204 * %r2 pointer to sie control block
205 * %r3 guest register save area
208 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
209 stg %r2,__SF_EMPTY(%r15) # save control block pointer
210 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
211 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
212 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
213 jno .Lsie_load_guest_gprs
214 brasl %r14,load_fpu_regs # load guest fp/vx regs
215 .Lsie_load_guest_gprs:
216 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
217 lg %r14,__LC_GMAP # get gmap pointer
220 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
222 lg %r14,__SF_EMPTY(%r15) # get control block pointer
223 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
224 tm __SIE_PROG20+3(%r14),3 # last exit...
226 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
227 jo .Lsie_skip # exit if fp/vx regs changed
231 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
232 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
234 # some program checks are suppressing. C code (e.g. do_protection_exception)
235 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
236 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
237 # Other instructions between sie64a and .Lsie_done should not cause program
238 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
239 # See also .Lcleanup_sie
248 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
249 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
250 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
251 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
255 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
258 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
259 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
260 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
261 EX_TABLE(sie_exit,.Lsie_fault)
262 EXPORT_SYMBOL(sie64a)
263 EXPORT_SYMBOL(sie_exit)
267 * SVC interrupt handler routine. System calls are synchronous events and
268 * are executed with interrupts enabled.
272 stpt __LC_SYNC_ENTER_TIMER
274 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
276 lghi %r13,__TASK_thread
277 lghi %r14,_PIF_SYSCALL
279 lg %r15,__LC_KERNEL_STACK
280 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
282 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
283 stmg %r0,%r7,__PT_R0(%r11)
284 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
285 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
286 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
287 stg %r14,__PT_FLAGS(%r11)
289 # load address of system call table
290 lg %r10,__THREAD_sysc_table(%r13,%r12)
291 llgh %r8,__PT_INT_CODE+2(%r11)
292 slag %r8,%r8,2 # shift and test for svc 0
294 # svc 0: system call number in %r1
295 llgfr %r1,%r1 # clear high word in r1
298 sth %r1,__PT_INT_CODE+2(%r11)
301 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
302 stg %r2,__PT_ORIG_GPR2(%r11)
303 stg %r7,STACK_FRAME_OVERHEAD(%r15)
304 lgf %r9,0(%r8,%r10) # get system call add.
305 TSTMSK __TI_flags(%r12),_TIF_TRACE
307 basr %r14,%r9 # call sys_xxxx
308 stg %r2,__PT_R2(%r11) # store return value
313 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
315 TSTMSK __TI_flags(%r12),_TIF_WORK
316 jnz .Lsysc_work # check for work
317 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
320 lg %r14,__LC_VDSO_PER_CPU
321 lmg %r0,%r10,__PT_R0(%r11)
322 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
325 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
326 lmg %r11,%r15,__PT_R11(%r11)
327 lpswe __LC_RETURN_PSW
331 # One of the work bits is on. Find out which one.
334 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
335 jo .Lsysc_mcck_pending
336 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
338 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
339 jo .Lsysc_syscall_restart
340 #ifdef CONFIG_UPROBES
341 TSTMSK __TI_flags(%r12),_TIF_UPROBE
342 jo .Lsysc_uprobe_notify
344 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
345 jo .Lsysc_guarded_storage
346 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
348 #ifdef CONFIG_LIVEPATCH
349 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
350 jo .Lsysc_patch_pending # handle live patching just before
351 # signals and possible syscall restart
353 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
354 jo .Lsysc_syscall_restart
355 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
357 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
358 jo .Lsysc_notify_resume
359 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
361 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
363 j .Lsysc_return # beware of critical section cleanup
366 # _TIF_NEED_RESCHED is set, call schedule
369 larl %r14,.Lsysc_return
373 # _CIF_MCCK_PENDING is set, call handler
376 larl %r14,.Lsysc_return
377 jg s390_handle_mcck # TIF bit will be cleared by handler
380 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
383 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
384 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
385 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
387 larl %r14,.Lsysc_return
391 # CIF_FPU is set, restore floating-point controls and floating-point registers.
394 larl %r14,.Lsysc_return
398 # _TIF_SIGPENDING is set, call do_signal
401 lgr %r2,%r11 # pass pointer to pt_regs
403 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
406 lghi %r13,__TASK_thread
407 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
408 lghi %r1,0 # svc 0 returns -ENOSYS
412 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
414 .Lsysc_notify_resume:
415 lgr %r2,%r11 # pass pointer to pt_regs
416 larl %r14,.Lsysc_return
420 # _TIF_UPROBE is set, call uprobe_notify_resume
422 #ifdef CONFIG_UPROBES
423 .Lsysc_uprobe_notify:
424 lgr %r2,%r11 # pass pointer to pt_regs
425 larl %r14,.Lsysc_return
426 jg uprobe_notify_resume
430 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
432 .Lsysc_guarded_storage:
433 lgr %r2,%r11 # pass pointer to pt_regs
434 larl %r14,.Lsysc_return
437 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
439 #ifdef CONFIG_LIVEPATCH
440 .Lsysc_patch_pending:
441 lg %r2,__LC_CURRENT # pass pointer to task struct
442 larl %r14,.Lsysc_return
443 jg klp_update_patch_state
447 # _PIF_PER_TRAP is set, call do_per_trap
450 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
451 lgr %r2,%r11 # pass pointer to pt_regs
452 larl %r14,.Lsysc_return
456 # _PIF_SYSCALL_RESTART is set, repeat the current system call
458 .Lsysc_syscall_restart:
459 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
460 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
461 lg %r2,__PT_ORIG_GPR2(%r11)
465 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
466 # and after the system call
469 lgr %r2,%r11 # pass pointer to pt_regs
471 llgh %r0,__PT_INT_CODE+2(%r11)
472 stg %r0,__PT_R2(%r11)
473 brasl %r14,do_syscall_trace_enter
480 lmg %r3,%r7,__PT_R3(%r11)
481 stg %r7,STACK_FRAME_OVERHEAD(%r15)
482 lg %r2,__PT_ORIG_GPR2(%r11)
483 basr %r14,%r9 # call sys_xxx
484 stg %r2,__PT_R2(%r11) # store return value
486 TSTMSK __TI_flags(%r12),_TIF_TRACE
488 lgr %r2,%r11 # pass pointer to pt_regs
489 larl %r14,.Lsysc_return
490 jg do_syscall_trace_exit
493 # a new process exits the kernel with ret_from_fork
496 la %r11,STACK_FRAME_OVERHEAD(%r15)
498 brasl %r14,schedule_tail
500 ssm __LC_SVC_NEW_PSW # reenable interrupts
501 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
503 # it's a kernel thread
504 lmg %r9,%r10,__PT_R9(%r11) # load gprs
505 ENTRY(kernel_thread_starter)
511 * Program check handler routine
514 ENTRY(pgm_check_handler)
515 stpt __LC_SYNC_ENTER_TIMER
516 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
517 lg %r10,__LC_LAST_BREAK
519 larl %r13,cleanup_critical
520 lmg %r8,%r9,__LC_PGM_OLD_PSW
521 tmhh %r8,0x0001 # test problem state bit
522 jnz 2f # -> fault in user space
523 #if IS_ENABLED(CONFIG_KVM)
524 # cleanup critical section for sie64a
526 slg %r14,BASED(.Lsie_critical_start)
527 clg %r14,BASED(.Lsie_critical_length)
529 brasl %r14,.Lcleanup_sie
531 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
532 jnz 1f # -> enabled, can't be a double fault
533 tm __LC_PGM_ILC+3,0x80 # check for per exception
534 jnz .Lpgm_svcper # -> single stepped svc
535 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
536 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
538 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
539 lg %r15,__LC_KERNEL_STACK
541 aghi %r14,__TASK_thread # pointer to thread_struct
542 lghi %r13,__LC_PGM_TDB
543 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
545 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
546 3: stg %r10,__THREAD_last_break(%r14)
547 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
548 stmg %r0,%r7,__PT_R0(%r11)
549 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
550 stmg %r8,%r9,__PT_PSW(%r11)
551 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
552 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
553 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
554 stg %r10,__PT_ARGS(%r11)
555 tm __LC_PGM_ILC+3,0x80 # check for per exception
557 tmhh %r8,0x0001 # kernel per event ?
559 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
560 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
561 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
562 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
564 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
565 larl %r1,pgm_check_table
566 llgh %r10,__PT_INT_CODE+2(%r11)
570 lgf %r1,0(%r10,%r1) # load address of handler routine
571 lgr %r2,%r11 # pass pointer to pt_regs
572 basr %r14,%r1 # branch to interrupt-handler
575 tm __PT_PSW+1(%r11),0x01 # returning to user ?
577 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
582 # PER event in supervisor state, must be kprobes
586 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
587 lgr %r2,%r11 # pass pointer to pt_regs
588 brasl %r14,do_per_trap
592 # single stepped system call
595 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
596 lghi %r13,__TASK_thread
598 stg %r14,__LC_RETURN_PSW+8
599 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
600 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
603 * IO interrupt handler routine
605 ENTRY(io_int_handler)
607 stpt __LC_ASYNC_ENTER_TIMER
608 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
610 larl %r13,cleanup_critical
611 lmg %r8,%r9,__LC_IO_OLD_PSW
612 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
613 stmg %r0,%r7,__PT_R0(%r11)
614 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
615 stmg %r8,%r9,__PT_PSW(%r11)
616 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
617 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
618 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
621 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
623 lgr %r2,%r11 # pass pointer to pt_regs
624 lghi %r3,IO_INTERRUPT
625 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
627 lghi %r3,THIN_INTERRUPT
630 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
634 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
640 TSTMSK __TI_flags(%r12),_TIF_WORK
641 jnz .Lio_work # there is work to do (signals etc.)
642 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
645 lg %r14,__LC_VDSO_PER_CPU
646 lmg %r0,%r10,__PT_R0(%r11)
647 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
650 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
651 lmg %r11,%r15,__PT_R11(%r11)
652 lpswe __LC_RETURN_PSW
656 # There is work todo, find out in which context we have been interrupted:
657 # 1) if we return to user space we can do all _TIF_WORK work
658 # 2) if we return to kernel code and kvm is enabled check if we need to
659 # modify the psw to leave SIE
660 # 3) if we return to kernel code and preemptive scheduling is enabled check
661 # the preemption counter and if it is zero call preempt_schedule_irq
662 # Before any work can be done, a switch to the kernel stack is required.
665 tm __PT_PSW+1(%r11),0x01 # returning to user ?
666 jo .Lio_work_user # yes -> do resched & signal
667 #ifdef CONFIG_PREEMPT
668 # check for preemptive scheduling
669 icm %r0,15,__LC_PREEMPT_COUNT
670 jnz .Lio_restore # preemption is disabled
671 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
673 # switch to kernel stack
674 lg %r1,__PT_R15(%r11)
675 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
676 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
677 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
678 la %r11,STACK_FRAME_OVERHEAD(%r1)
680 # TRACE_IRQS_ON already done at .Lio_return, call
681 # TRACE_IRQS_OFF to keep things symmetrical
683 brasl %r14,preempt_schedule_irq
690 # Need to do work before returning to userspace, switch to kernel stack
693 lg %r1,__LC_KERNEL_STACK
694 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
695 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
696 la %r11,STACK_FRAME_OVERHEAD(%r1)
700 # One of the work bits is on. Find out which one.
703 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
705 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
707 #ifdef CONFIG_LIVEPATCH
708 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
709 jo .Lio_patch_pending
711 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
713 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
714 jo .Lio_notify_resume
715 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
716 jo .Lio_guarded_storage
717 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
719 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
721 j .Lio_return # beware of critical section cleanup
724 # _CIF_MCCK_PENDING is set, call handler
727 # TRACE_IRQS_ON already done at .Lio_return
728 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
733 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
736 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
737 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
738 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
740 larl %r14,.Lio_return
744 # CIF_FPU is set, restore floating-point controls and floating-point registers.
747 larl %r14,.Lio_return
751 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
753 .Lio_guarded_storage:
754 # TRACE_IRQS_ON already done at .Lio_return
755 ssm __LC_SVC_NEW_PSW # reenable interrupts
756 lgr %r2,%r11 # pass pointer to pt_regs
757 brasl %r14,gs_load_bc_cb
758 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
763 # _TIF_NEED_RESCHED is set, call schedule
766 # TRACE_IRQS_ON already done at .Lio_return
767 ssm __LC_SVC_NEW_PSW # reenable interrupts
768 brasl %r14,schedule # call scheduler
769 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
774 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
776 #ifdef CONFIG_LIVEPATCH
778 lg %r2,__LC_CURRENT # pass pointer to task struct
779 larl %r14,.Lio_return
780 jg klp_update_patch_state
784 # _TIF_SIGPENDING or is set, call do_signal
787 # TRACE_IRQS_ON already done at .Lio_return
788 ssm __LC_SVC_NEW_PSW # reenable interrupts
789 lgr %r2,%r11 # pass pointer to pt_regs
791 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
796 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
799 # TRACE_IRQS_ON already done at .Lio_return
800 ssm __LC_SVC_NEW_PSW # reenable interrupts
801 lgr %r2,%r11 # pass pointer to pt_regs
802 brasl %r14,do_notify_resume
803 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
808 * External interrupt handler routine
810 ENTRY(ext_int_handler)
812 stpt __LC_ASYNC_ENTER_TIMER
813 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
815 larl %r13,cleanup_critical
816 lmg %r8,%r9,__LC_EXT_OLD_PSW
817 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
818 stmg %r0,%r7,__PT_R0(%r11)
819 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
820 stmg %r8,%r9,__PT_PSW(%r11)
821 lghi %r1,__LC_EXT_PARAMS2
822 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
823 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
824 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
825 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
826 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
829 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
830 lgr %r2,%r11 # pass pointer to pt_regs
831 lghi %r3,EXT_INTERRUPT
836 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
839 stg %r3,__SF_EMPTY(%r15)
840 larl %r1,.Lpsw_idle_lpsw+4
841 stg %r1,__SF_EMPTY+8(%r15)
843 larl %r1,smp_cpu_mtid
847 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
850 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
851 STCK __CLOCK_IDLE_ENTER(%r2)
852 stpt __TIMER_IDLE_ENTER(%r2)
854 lpswe __SF_EMPTY(%r15)
859 * Store floating-point controls and floating-point or vector register
860 * depending whether the vector facility is available. A critical section
861 * cleanup assures that the registers are stored even if interrupted for
862 * some other work. The CIF_FPU flag is set to trigger a lazy restore
863 * of the register contents at return from io or a system call.
867 aghi %r2,__TASK_thread
868 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
870 stfpc __THREAD_FPU_fpc(%r2)
871 lg %r3,__THREAD_FPU_regs(%r2)
872 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
873 jz .Lsave_fpu_regs_fp # no -> store FP regs
874 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
875 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
876 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
894 .Lsave_fpu_regs_done:
895 oi __LC_CPU_FLAGS+7,_CIF_FPU
898 EXPORT_SYMBOL(save_fpu_regs)
901 * Load floating-point controls and floating-point or vector registers.
902 * A critical section cleanup assures that the register contents are
903 * loaded even if interrupted for some other work.
905 * There are special calling conventions to fit into sysc and io return work:
906 * %r15: <kernel stack>
907 * The function requires:
912 aghi %r4,__TASK_thread
913 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
915 lfpc __THREAD_FPU_fpc(%r4)
916 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
917 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
918 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
920 VLM %v16,%v31,256,%r4
921 j .Lload_fpu_regs_done
939 .Lload_fpu_regs_done:
940 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
947 * Machine check handler routines
949 ENTRY(mcck_int_handler)
951 la %r1,4095 # revalidate r1
952 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
953 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
955 larl %r13,cleanup_critical
956 lmg %r8,%r9,__LC_MCK_OLD_PSW
957 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
958 jo .Lmcck_panic # yes -> rest of mcck code invalid
959 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
960 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
961 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
963 la %r14,__LC_SYNC_ENTER_TIMER
964 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
966 la %r14,__LC_ASYNC_ENTER_TIMER
967 0: clc 0(8,%r14),__LC_EXIT_TIMER
969 la %r14,__LC_EXIT_TIMER
970 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
972 la %r14,__LC_LAST_UPDATE_TIMER
974 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
975 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
976 jno .Lmcck_panic # no -> skip cleanup critical
977 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
979 lghi %r14,__LC_GPREGS_SAVE_AREA+64
980 stmg %r0,%r7,__PT_R0(%r11)
981 mvc __PT_R8(64,%r11),0(%r14)
982 stmg %r8,%r9,__PT_PSW(%r11)
983 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
984 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
985 lgr %r2,%r11 # pass pointer to pt_regs
986 brasl %r14,s390_do_machine_check
987 tm __PT_PSW+1(%r11),0x01 # returning to user ?
989 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
990 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
991 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
992 la %r11,STACK_FRAME_OVERHEAD(%r1)
994 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
995 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
998 brasl %r14,s390_handle_mcck
1001 lg %r14,__LC_VDSO_PER_CPU
1002 lmg %r0,%r10,__PT_R0(%r11)
1003 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1004 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1006 stpt __LC_EXIT_TIMER
1007 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1008 0: lmg %r11,%r15,__PT_R11(%r11)
1009 lpswe __LC_RETURN_MCCK_PSW
1012 lg %r15,__LC_PANIC_STACK
1013 la %r11,STACK_FRAME_OVERHEAD(%r15)
1017 # PSW restart interrupt handler
1019 ENTRY(restart_int_handler)
1020 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1022 .insn s,0xb2800000,__LC_LPP
1023 0: stg %r15,__LC_SAVE_AREA_RESTART
1024 lg %r15,__LC_RESTART_STACK
1025 aghi %r15,-__PT_SIZE # create pt_regs on stack
1026 xc 0(__PT_SIZE,%r15),0(%r15)
1027 stmg %r0,%r14,__PT_R0(%r15)
1028 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1029 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1030 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1031 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1032 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1033 lg %r2,__LC_RESTART_DATA
1034 lg %r3,__LC_RESTART_SOURCE
1035 ltgr %r3,%r3 # test source cpu address
1036 jm 1f # negative -> skip source stop
1037 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1038 brc 10,0b # wait for status stored
1039 1: basr %r14,%r1 # call function
1040 stap __SF_EMPTY(%r15) # store cpu address
1041 llgh %r3,__SF_EMPTY(%r15)
1042 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1046 .section .kprobes.text, "ax"
1048 #ifdef CONFIG_CHECK_STACK
1050 * The synchronous or the asynchronous stack overflowed. We are dead.
1051 * No need to properly save the registers, we are going to panic anyway.
1052 * Setup a pt_regs so that show_trace can provide a good call trace.
1055 lg %r15,__LC_PANIC_STACK # change to panic stack
1056 la %r11,STACK_FRAME_OVERHEAD(%r15)
1057 stmg %r0,%r7,__PT_R0(%r11)
1058 stmg %r8,%r9,__PT_PSW(%r11)
1059 mvc __PT_R8(64,%r11),0(%r14)
1060 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1061 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1062 lgr %r2,%r11 # pass pointer to pt_regs
1063 jg kernel_stack_overflow
1067 #if IS_ENABLED(CONFIG_KVM)
1068 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1070 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1073 clg %r9,BASED(.Lcleanup_table) # system_call
1075 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1076 jl .Lcleanup_system_call
1077 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1079 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1080 jl .Lcleanup_sysc_tif
1081 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1082 jl .Lcleanup_sysc_restore
1083 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1085 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1087 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1088 jl .Lcleanup_io_restore
1089 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1091 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1093 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1095 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1096 jl .Lcleanup_save_fpu_regs
1097 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1099 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1100 jl .Lcleanup_load_fpu_regs
1108 .quad .Lsysc_restore
1114 .quad .Lpsw_idle_end
1116 .quad .Lsave_fpu_regs_end
1118 .quad .Lload_fpu_regs_end
1120 #if IS_ENABLED(CONFIG_KVM)
1121 .Lcleanup_table_sie:
1126 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1128 slg %r9,BASED(.Lsie_crit_mcck_start)
1129 clg %r9,BASED(.Lsie_crit_mcck_length)
1131 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1132 1: lg %r9,__SF_EMPTY(%r15) # get control block pointer
1133 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1134 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1135 larl %r9,sie_exit # skip forward to sie_exit
1139 .Lcleanup_system_call:
1140 # check if stpt has been executed
1141 clg %r9,BASED(.Lcleanup_system_call_insn)
1143 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1144 cghi %r11,__LC_SAVE_AREA_ASYNC
1146 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1147 0: # check if stmg has been executed
1148 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1150 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1151 0: # check if base register setup + TIF bit load has been done
1152 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1154 # set up saved register r12 task struct pointer
1156 # set up saved register r13 __TASK_thread offset
1157 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1158 0: # check if the user time update has been done
1159 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1161 lg %r15,__LC_EXIT_TIMER
1162 slg %r15,__LC_SYNC_ENTER_TIMER
1163 alg %r15,__LC_USER_TIMER
1164 stg %r15,__LC_USER_TIMER
1165 0: # check if the system time update has been done
1166 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1168 lg %r15,__LC_LAST_UPDATE_TIMER
1169 slg %r15,__LC_EXIT_TIMER
1170 alg %r15,__LC_SYSTEM_TIMER
1171 stg %r15,__LC_SYSTEM_TIMER
1172 0: # update accounting time stamp
1173 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1174 # set up saved register r11
1175 lg %r15,__LC_KERNEL_STACK
1176 la %r9,STACK_FRAME_OVERHEAD(%r15)
1177 stg %r9,24(%r11) # r11 pt_regs pointer
1179 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1180 stmg %r0,%r7,__PT_R0(%r9)
1181 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1182 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1183 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1184 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1185 # setup saved register r15
1186 stg %r15,56(%r11) # r15 stack pointer
1187 # set new psw address and exit
1188 larl %r9,.Lsysc_do_svc
1190 .Lcleanup_system_call_insn:
1194 .quad .Lsysc_vtime+36
1195 .quad .Lsysc_vtime+42
1196 .Lcleanup_system_call_const:
1203 .Lcleanup_sysc_restore:
1204 # check if stpt has been executed
1205 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1207 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1208 cghi %r11,__LC_SAVE_AREA_ASYNC
1210 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1211 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1213 lg %r9,24(%r11) # get saved pointer to pt_regs
1214 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1215 mvc 0(64,%r11),__PT_R8(%r9)
1216 lmg %r0,%r7,__PT_R0(%r9)
1217 1: lmg %r8,%r9,__LC_RETURN_PSW
1219 .Lcleanup_sysc_restore_insn:
1220 .quad .Lsysc_exit_timer
1221 .quad .Lsysc_done - 4
1227 .Lcleanup_io_restore:
1228 # check if stpt has been executed
1229 clg %r9,BASED(.Lcleanup_io_restore_insn)
1231 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1232 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1234 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1235 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1236 mvc 0(64,%r11),__PT_R8(%r9)
1237 lmg %r0,%r7,__PT_R0(%r9)
1238 1: lmg %r8,%r9,__LC_RETURN_PSW
1240 .Lcleanup_io_restore_insn:
1241 .quad .Lio_exit_timer
1245 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1246 # copy interrupt clock & cpu timer
1247 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1248 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1249 cghi %r11,__LC_SAVE_AREA_ASYNC
1251 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1252 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1253 0: # check if stck & stpt have been executed
1254 clg %r9,BASED(.Lcleanup_idle_insn)
1256 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1257 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1258 1: # calculate idle cycles
1260 clg %r9,BASED(.Lcleanup_idle_insn)
1262 larl %r1,smp_cpu_mtid
1266 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1268 ag %r3,__LC_PERCPU_OFFSET
1269 la %r4,__SF_EMPTY+16(%r15)
1278 3: # account system time going idle
1279 lg %r9,__LC_STEAL_TIMER
1280 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1281 slg %r9,__LC_LAST_UPDATE_CLOCK
1282 stg %r9,__LC_STEAL_TIMER
1283 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1284 lg %r9,__LC_SYSTEM_TIMER
1285 alg %r9,__LC_LAST_UPDATE_TIMER
1286 slg %r9,__TIMER_IDLE_ENTER(%r2)
1287 stg %r9,__LC_SYSTEM_TIMER
1288 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1289 # prepare return psw
1290 nihh %r8,0xfcfd # clear irq & wait state bits
1291 lg %r9,48(%r11) # return from psw_idle
1293 .Lcleanup_idle_insn:
1294 .quad .Lpsw_idle_lpsw
1296 .Lcleanup_save_fpu_regs:
1297 larl %r9,save_fpu_regs
1300 .Lcleanup_load_fpu_regs:
1301 larl %r9,load_fpu_regs
1309 .quad .L__critical_start
1311 .quad .L__critical_end - .L__critical_start
1312 #if IS_ENABLED(CONFIG_KVM)
1313 .Lsie_critical_start:
1315 .Lsie_critical_length:
1316 .quad .Lsie_done - .Lsie_gmap
1317 .Lsie_crit_mcck_start:
1319 .Lsie_crit_mcck_length:
1320 .quad .Lsie_skip - .Lsie_entry
1323 .section .rodata, "a"
1324 #define SYSCALL(esame,emu) .long esame
1325 .globl sys_call_table
1327 #include "syscalls.S"
1330 #ifdef CONFIG_COMPAT
1332 #define SYSCALL(esame,emu) .long emu
1333 .globl sys_call_table_emu
1335 #include "syscalls.S"