2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <linux/err.h>
42 .section .entry.text, "ax"
44 #ifdef CONFIG_PARAVIRT
45 ENTRY(native_usergs_sysret64)
48 ENDPROC(native_usergs_sysret64)
49 #endif /* CONFIG_PARAVIRT */
51 .macro TRACE_IRQS_IRETQ
52 #ifdef CONFIG_TRACE_IRQFLAGS
53 bt $9, EFLAGS(%rsp) /* interrupts off? */
61 * When dynamic function tracer is enabled it will add a breakpoint
62 * to all locations that it is about to modify, sync CPUs, update
63 * all the code, sync CPUs, then remove the breakpoints. In this time
64 * if lockdep is enabled, it might jump back into the debug handler
65 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
67 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
68 * make sure the stack pointer does not get reset back to the top
69 * of the debug stack, and instead just reuses the current stack.
71 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
73 .macro TRACE_IRQS_OFF_DEBUG
74 call debug_stack_set_zero
76 call debug_stack_reset
79 .macro TRACE_IRQS_ON_DEBUG
80 call debug_stack_set_zero
82 call debug_stack_reset
85 .macro TRACE_IRQS_IRETQ_DEBUG
86 bt $9, EFLAGS(%rsp) /* interrupts off? */
93 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
94 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
95 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
99 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
101 * This is the only entry point used for 64-bit system calls. The
102 * hardware interface is reasonably well designed and the register to
103 * argument mapping Linux uses fits well with the registers that are
104 * available when SYSCALL is used.
106 * SYSCALL instructions can be found inlined in libc implementations as
107 * well as some other programs and libraries. There are also a handful
108 * of SYSCALL instructions in the vDSO used, for example, as a
109 * clock_gettimeofday fallback.
111 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
112 * then loads new ss, cs, and rip from previously programmed MSRs.
113 * rflags gets masked by a value from another MSR (so CLD and CLAC
114 * are not needed). SYSCALL does not save anything on the stack
115 * and does not change rsp.
117 * Registers on entry:
118 * rax system call number
120 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
124 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
127 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
129 * Only called from user space.
131 * When user can change pt_regs->foo always force IRET. That is because
132 * it deals with uncanonical addresses better. SYSRET has trouble
133 * with them due to bugs in both AMD and Intel CPUs.
136 ENTRY(entry_SYSCALL_64)
138 * Interrupts are off on entry.
139 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
140 * it is too small to ever cause noticeable irq latency.
144 * A hypervisor implementation might want to use a label
145 * after the swapgs, so that it can do the swapgs
146 * for the guest and jump here on syscall.
148 GLOBAL(entry_SYSCALL_64_after_swapgs)
150 movq %rsp, PER_CPU_VAR(rsp_scratch)
151 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
155 /* Construct struct pt_regs on stack */
156 pushq $__USER_DS /* pt_regs->ss */
157 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
158 pushq %r11 /* pt_regs->flags */
159 pushq $__USER_CS /* pt_regs->cs */
160 pushq %rcx /* pt_regs->ip */
161 pushq %rax /* pt_regs->orig_ax */
162 pushq %rdi /* pt_regs->di */
163 pushq %rsi /* pt_regs->si */
164 pushq %rdx /* pt_regs->dx */
165 pushq %rcx /* pt_regs->cx */
166 pushq $-ENOSYS /* pt_regs->ax */
167 pushq %r8 /* pt_regs->r8 */
168 pushq %r9 /* pt_regs->r9 */
169 pushq %r10 /* pt_regs->r10 */
170 pushq %r11 /* pt_regs->r11 */
171 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
174 * If we need to do entry work or if we guess we'll need to do
175 * exit work, go straight to the slow path.
177 movq PER_CPU_VAR(current_task), %r11
178 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
179 jnz entry_SYSCALL64_slow_path
181 entry_SYSCALL_64_fastpath:
183 * Easy case: enable interrupts and issue the syscall. If the syscall
184 * needs pt_regs, we'll call a stub that disables interrupts again
185 * and jumps to the slow path.
188 ENABLE_INTERRUPTS(CLBR_NONE)
189 #if __SYSCALL_MASK == ~0
190 cmpq $__NR_syscall_max, %rax
192 andl $__SYSCALL_MASK, %eax
193 cmpl $__NR_syscall_max, %eax
195 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
199 * This call instruction is handled specially in stub_ptregs_64.
200 * It might end up jumping to the slow path. If it jumps, RAX
201 * and all argument registers are clobbered.
203 call *sys_call_table(, %rax, 8)
204 .Lentry_SYSCALL_64_after_fastpath_call:
210 * If we get here, then we know that pt_regs is clean for SYSRET64.
211 * If we see that no exit work is required (which we are required
212 * to check with IRQs off), then we can go straight to SYSRET64.
214 DISABLE_INTERRUPTS(CLBR_ANY)
216 movq PER_CPU_VAR(current_task), %r11
217 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
221 TRACE_IRQS_ON /* user mode is traced as IRQs on */
223 movq EFLAGS(%rsp), %r11
224 RESTORE_C_REGS_EXCEPT_RCX_R11
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
235 ENABLE_INTERRUPTS(CLBR_ANY)
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
249 TRACE_IRQS_IRETQ /* we're about to change IF */
252 * Try to use SYSRET instead of IRET if we're returning to
253 * a completely clean 64-bit userspace context.
257 cmpq %rcx, %r11 /* RCX == RIP */
258 jne opportunistic_sysret_failed
261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
262 * in kernel space. This essentially lets the user take over
263 * the kernel, since userspace controls RSP.
265 * If width of "canonical tail" ever becomes variable, this will need
266 * to be updated to remain correct on both old and new CPUs.
268 * Change top 16 bits to be the sign-extension of 47th bit
270 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
271 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
273 /* If this changed %rcx, it was not canonical */
275 jne opportunistic_sysret_failed
277 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
278 jne opportunistic_sysret_failed
281 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
282 jne opportunistic_sysret_failed
285 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
286 * restore RF properly. If the slowpath sets it for whatever reason, we
287 * need to restore it correctly.
289 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
290 * trap from userspace immediately after SYSRET. This would cause an
291 * infinite loop whenever #DB happens with register state that satisfies
292 * the opportunistic SYSRET conditions. For example, single-stepping
295 * movq $stuck_here, %rcx
300 * would never get past 'stuck_here'.
302 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
303 jnz opportunistic_sysret_failed
305 /* nothing to check for RSP */
307 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
308 jne opportunistic_sysret_failed
311 * We win! This label is here just for ease of understanding
312 * perf profiles. Nothing jumps here.
314 syscall_return_via_sysret:
315 /* rcx and r11 are already restored (see code above) */
316 RESTORE_C_REGS_EXCEPT_RCX_R11
320 opportunistic_sysret_failed:
322 jmp restore_c_regs_and_iret
323 END(entry_SYSCALL_64)
325 ENTRY(stub_ptregs_64)
327 * Syscalls marked as needing ptregs land here.
328 * If we are on the fast path, we need to save the extra regs,
329 * which we achieve by trying again on the slow path. If we are on
330 * the slow path, the extra regs are already saved.
332 * RAX stores a pointer to the C function implementing the syscall.
335 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
339 * Called from fast path -- disable IRQs again, pop return address
340 * and jump to slow path
342 DISABLE_INTERRUPTS(CLBR_ANY)
345 jmp entry_SYSCALL64_slow_path
348 jmp *%rax /* Called from C */
351 .macro ptregs_stub func
353 leaq \func(%rip), %rax
358 /* Instantiate ptregs_stub for each ptregs-using syscall */
359 #define __SYSCALL_64_QUAL_(sym)
360 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
361 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
362 #include <asm/syscalls_64.h>
368 ENTRY(__switch_to_asm)
370 * Save callee-saved registers
371 * This must match the order in inactive_task_frame
381 movq %rsp, TASK_threadsp(%rdi)
382 movq TASK_threadsp(%rsi), %rsp
384 #ifdef CONFIG_CC_STACKPROTECTOR
385 movq TASK_stack_canary(%rsi), %rbx
386 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
389 /* restore callee-saved registers */
401 * A newly forked process directly context switches into this address.
403 * rax: prev task we switched from
404 * rbx: kernel thread func (NULL for user thread)
405 * r12: kernel thread arg
409 call schedule_tail /* rdi: 'prev' task parameter */
411 testq %rbx, %rbx /* from kernel_thread? */
412 jnz 1f /* kernel threads are uncommon */
416 call syscall_return_slowpath /* returns with IRQs disabled */
417 TRACE_IRQS_ON /* user mode is traced as IRQS on */
419 jmp restore_regs_and_iret
426 * A kernel thread is allowed to return here after successfully
427 * calling do_execve(). Exit to userspace to complete the execve()
435 * Build the entry stubs with some assembler magic.
436 * We pack 1 stub into every 8-byte block.
439 ENTRY(irq_entries_start)
440 vector=FIRST_EXTERNAL_VECTOR
441 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
442 pushq $(~vector+0x80) /* Note: always in signed byte range */
447 END(irq_entries_start)
450 * Interrupt entry/exit.
452 * Interrupt entry points save only callee clobbered registers in fast path.
454 * Entry runs with interrupts off.
457 /* 0(%rsp): ~(interrupt number) */
458 .macro interrupt func
460 ALLOC_PT_GPREGS_ON_STACK
469 * IRQ from user mode. Switch to kernel gsbase and inform context
470 * tracking that we're in kernel mode.
475 * We need to tell lockdep that IRQs are off. We can't do this until
476 * we fix gsbase, and we should do it before enter_from_user_mode
477 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
478 * the simplest way to handle it is to just call it twice if
479 * we enter from user mode. There's no reason to optimize this since
480 * TRACE_IRQS_OFF is a no-op if lockdep is off.
484 CALL_enter_from_user_mode
488 * Save previous stack pointer, optionally switch to interrupt stack.
489 * irq_count is used to check if a CPU is already on an interrupt stack
490 * or not. While this is essentially redundant with preempt_count it is
491 * a little cheaper to use a separate counter in the PDA (short of
492 * moving irq_enter into assembly, which would be too much work)
495 incl PER_CPU_VAR(irq_count)
496 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
498 /* We entered an interrupt context - irqs are off: */
501 call \func /* rdi points to pt_regs */
505 * The interrupt stubs push (~vector+0x80) onto the stack and
506 * then jump to common_interrupt.
508 .p2align CONFIG_X86_L1_CACHE_SHIFT
511 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
513 /* 0(%rsp): old RSP */
515 DISABLE_INTERRUPTS(CLBR_ANY)
517 decl PER_CPU_VAR(irq_count)
519 /* Restore saved previous stack */
525 /* Interrupt came from user space */
528 call prepare_exit_to_usermode
531 jmp restore_regs_and_iret
533 /* Returning to kernel space */
535 #ifdef CONFIG_PREEMPT
536 /* Interrupts are off */
537 /* Check if we need preemption */
538 bt $9, EFLAGS(%rsp) /* were interrupts off? */
540 0: cmpl $0, PER_CPU_VAR(__preempt_count)
542 call preempt_schedule_irq
547 * The iretq could re-enable interrupts:
552 * At this label, code paths which return to kernel and to user,
553 * which come from interrupts/exception and from syscalls, merge.
555 GLOBAL(restore_regs_and_iret)
557 restore_c_regs_and_iret:
559 REMOVE_PT_GPREGS_FROM_STACK 8
564 * Are we returning to a stack segment from the LDT? Note: in
565 * 64-bit mode SS:RSP on the exception stack is always valid.
567 #ifdef CONFIG_X86_ESPFIX64
568 testb $4, (SS-RIP)(%rsp)
569 jnz native_irq_return_ldt
572 .global native_irq_return_iret
573 native_irq_return_iret:
575 * This may fault. Non-paranoid faults on return to userspace are
576 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
577 * Double-faults due to espfix64 are handled in do_double_fault.
578 * Other faults here are fatal.
582 #ifdef CONFIG_X86_ESPFIX64
583 native_irq_return_ldt:
585 * We are running with user GSBASE. All GPRs contain their user
586 * values. We have a percpu ESPFIX stack that is eight slots
587 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
588 * of the ESPFIX stack.
590 * We clobber RAX and RDI in this code. We stash RDI on the
591 * normal stack and RAX on the ESPFIX stack.
593 * The ESPFIX stack layout we set up looks like this:
595 * --- top of ESPFIX stack ---
600 * RIP <-- RSP points here when we're done
601 * RAX <-- espfix_waddr points here
602 * --- bottom of ESPFIX stack ---
605 pushq %rdi /* Stash user RDI */
607 movq PER_CPU_VAR(espfix_waddr), %rdi
608 movq %rax, (0*8)(%rdi) /* user RAX */
609 movq (1*8)(%rsp), %rax /* user RIP */
610 movq %rax, (1*8)(%rdi)
611 movq (2*8)(%rsp), %rax /* user CS */
612 movq %rax, (2*8)(%rdi)
613 movq (3*8)(%rsp), %rax /* user RFLAGS */
614 movq %rax, (3*8)(%rdi)
615 movq (5*8)(%rsp), %rax /* user SS */
616 movq %rax, (5*8)(%rdi)
617 movq (4*8)(%rsp), %rax /* user RSP */
618 movq %rax, (4*8)(%rdi)
619 /* Now RAX == RSP. */
621 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
622 popq %rdi /* Restore user RDI */
625 * espfix_stack[31:16] == 0. The page tables are set up such that
626 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
627 * espfix_waddr for any X. That is, there are 65536 RO aliases of
628 * the same page. Set up RSP so that RSP[31:16] contains the
629 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
630 * still points to an RO alias of the ESPFIX stack.
632 orq PER_CPU_VAR(espfix_stack), %rax
637 * At this point, we cannot write to the stack any more, but we can
640 popq %rax /* Restore user RAX */
643 * RSP now points to an ordinary IRET frame, except that the page
644 * is read-only and RSP[31:16] are preloaded with the userspace
645 * values. We can now IRET back to userspace.
647 jmp native_irq_return_iret
649 END(common_interrupt)
654 .macro apicinterrupt3 num sym do_sym
664 #ifdef CONFIG_TRACING
665 #define trace(sym) trace_##sym
666 #define smp_trace(sym) smp_trace_##sym
668 .macro trace_apicinterrupt num sym
669 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
672 .macro trace_apicinterrupt num sym do_sym
676 /* Make sure APIC interrupt handlers end up in the irqentry section: */
677 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
678 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
679 # define POP_SECTION_IRQENTRY .popsection
681 # define PUSH_SECTION_IRQENTRY
682 # define POP_SECTION_IRQENTRY
685 .macro apicinterrupt num sym do_sym
686 PUSH_SECTION_IRQENTRY
687 apicinterrupt3 \num \sym \do_sym
688 trace_apicinterrupt \num \sym
693 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
694 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
698 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
701 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
702 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
704 #ifdef CONFIG_HAVE_KVM
705 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
706 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
709 #ifdef CONFIG_X86_MCE_THRESHOLD
710 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
713 #ifdef CONFIG_X86_MCE_AMD
714 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
717 #ifdef CONFIG_X86_THERMAL_VECTOR
718 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
722 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
723 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
724 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
727 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
728 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
730 #ifdef CONFIG_IRQ_WORK
731 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
735 * Exception entry points.
737 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
739 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
742 .if \shift_ist != -1 && \paranoid == 0
743 .error "using shift_ist requires paranoid=1"
747 PARAVIRT_ADJUST_EXCEPTION_FRAME
749 .ifeq \has_error_code
750 pushq $-1 /* ORIG_RAX: no syscall to restart */
753 ALLOC_PT_GPREGS_ON_STACK
757 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
764 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
768 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
774 movq %rsp, %rdi /* pt_regs pointer */
777 movq ORIG_RAX(%rsp), %rsi /* get error code */
778 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
780 xorl %esi, %esi /* no error code */
784 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
790 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
793 /* these procedures expect "no swapgs" flag in ebx */
802 * Paranoid entry from userspace. Switch stacks and treat it
803 * as a normal entry. This means that paranoid handlers
804 * run in real process context if user_mode(regs).
810 movq %rsp, %rdi /* pt_regs pointer */
812 movq %rax, %rsp /* switch stack */
814 movq %rsp, %rdi /* pt_regs pointer */
817 movq ORIG_RAX(%rsp), %rsi /* get error code */
818 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
820 xorl %esi, %esi /* no error code */
825 jmp error_exit /* %ebx: no swapgs flag */
830 #ifdef CONFIG_TRACING
831 .macro trace_idtentry sym do_sym has_error_code:req
832 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
833 idtentry \sym \do_sym has_error_code=\has_error_code
836 .macro trace_idtentry sym do_sym has_error_code:req
837 idtentry \sym \do_sym has_error_code=\has_error_code
841 idtentry divide_error do_divide_error has_error_code=0
842 idtentry overflow do_overflow has_error_code=0
843 idtentry bounds do_bounds has_error_code=0
844 idtentry invalid_op do_invalid_op has_error_code=0
845 idtentry device_not_available do_device_not_available has_error_code=0
846 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
847 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
848 idtentry invalid_TSS do_invalid_TSS has_error_code=1
849 idtentry segment_not_present do_segment_not_present has_error_code=1
850 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
851 idtentry coprocessor_error do_coprocessor_error has_error_code=0
852 idtentry alignment_check do_alignment_check has_error_code=1
853 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
857 * Reload gs selector with exception handling
860 ENTRY(native_load_gs_index)
862 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
866 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
870 END(native_load_gs_index)
871 EXPORT_SYMBOL(native_load_gs_index)
873 _ASM_EXTABLE(.Lgs_change, bad_gs)
874 .section .fixup, "ax"
875 /* running with kernelgs */
877 SWAPGS /* switch back to user gs */
879 /* This can't be a string because the preprocessor needs to see it. */
880 movl $__USER_DS, %eax
883 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
889 /* Call softirq on interrupt stack. Interrupts are off. */
890 ENTRY(do_softirq_own_stack)
893 incl PER_CPU_VAR(irq_count)
894 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
895 push %rbp /* frame pointer backlink */
898 decl PER_CPU_VAR(irq_count)
900 END(do_softirq_own_stack)
903 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
906 * A note on the "critical region" in our callback handler.
907 * We want to avoid stacking callback handlers due to events occurring
908 * during handling of the last event. To do this, we keep events disabled
909 * until we've done all processing. HOWEVER, we must enable events before
910 * popping the stack frame (can't be done atomically) and so it would still
911 * be possible to get enough handler activations to overflow the stack.
912 * Although unlikely, bugs of that kind are hard to track down, so we'd
913 * like to avoid the possibility.
914 * So, on entry to the handler we detect whether we interrupted an
915 * existing activation in its critical region -- if so, we pop the current
916 * activation and restart the handler using the previous one.
918 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
921 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
922 * see the correct pointer to the pt_regs
924 movq %rdi, %rsp /* we don't return, adjust the stack frame */
925 11: incl PER_CPU_VAR(irq_count)
927 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
928 pushq %rbp /* frame pointer backlink */
929 call xen_evtchn_do_upcall
931 decl PER_CPU_VAR(irq_count)
932 #ifndef CONFIG_PREEMPT
933 call xen_maybe_preempt_hcall
936 END(xen_do_hypervisor_callback)
939 * Hypervisor uses this for application faults while it executes.
940 * We get here for two reasons:
941 * 1. Fault while reloading DS, ES, FS or GS
942 * 2. Fault while executing IRET
943 * Category 1 we do not need to fix up as Xen has already reloaded all segment
944 * registers that could be reloaded and zeroed the others.
945 * Category 2 we fix up by killing the current process. We cannot use the
946 * normal Linux return path in this case because if we use the IRET hypercall
947 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
948 * We distinguish between categories by comparing each saved segment register
949 * with its current contents: any discrepancy means we in category 1.
951 ENTRY(xen_failsafe_callback)
964 /* All segments match their saved values => Category 2 (Bad IRET). */
971 jmp general_protection
972 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
976 pushq $-1 /* orig_ax = -1 => not a system call */
977 ALLOC_PT_GPREGS_ON_STACK
982 END(xen_failsafe_callback)
984 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
985 xen_hvm_callback_vector xen_evtchn_do_upcall
987 #endif /* CONFIG_XEN */
989 #if IS_ENABLED(CONFIG_HYPERV)
990 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
991 hyperv_callback_vector hyperv_vector_handler
992 #endif /* CONFIG_HYPERV */
994 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
995 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
996 idtentry stack_segment do_stack_segment has_error_code=1
999 idtentry xen_debug do_debug has_error_code=0
1000 idtentry xen_int3 do_int3 has_error_code=0
1001 idtentry xen_stack_segment do_stack_segment has_error_code=1
1004 idtentry general_protection do_general_protection has_error_code=1
1005 trace_idtentry page_fault do_page_fault has_error_code=1
1007 #ifdef CONFIG_KVM_GUEST
1008 idtentry async_page_fault do_async_page_fault has_error_code=1
1011 #ifdef CONFIG_X86_MCE
1012 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1016 * Save all registers in pt_regs, and switch gs if needed.
1017 * Use slow, but surefire "are we in kernel?" check.
1018 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1020 ENTRY(paranoid_entry)
1024 ENCODE_FRAME_POINTER 8
1026 movl $MSR_GS_BASE, %ecx
1029 js 1f /* negative -> in kernel */
1036 * "Paranoid" exit path from exception stack. This is invoked
1037 * only on return from non-NMI IST interrupts that came
1038 * from kernel space.
1040 * We may be returning to very strange contexts (e.g. very early
1041 * in syscall entry), so checking for preemption here would
1042 * be complicated. Fortunately, we there's no good reason
1043 * to try to handle preemption here.
1045 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1047 ENTRY(paranoid_exit)
1048 DISABLE_INTERRUPTS(CLBR_ANY)
1049 TRACE_IRQS_OFF_DEBUG
1050 testl %ebx, %ebx /* swapgs needed? */
1051 jnz paranoid_exit_no_swapgs
1054 jmp paranoid_exit_restore
1055 paranoid_exit_no_swapgs:
1056 TRACE_IRQS_IRETQ_DEBUG
1057 paranoid_exit_restore:
1060 REMOVE_PT_GPREGS_FROM_STACK 8
1065 * Save all registers in pt_regs, and switch gs if needed.
1066 * Return: EBX=0: came from user mode; EBX=1: otherwise
1072 ENCODE_FRAME_POINTER 8
1074 testb $3, CS+8(%rsp)
1075 jz .Lerror_kernelspace
1078 * We entered from user mode or we're pretending to have entered
1079 * from user mode due to an IRET fault.
1083 .Lerror_entry_from_usermode_after_swapgs:
1085 * We need to tell lockdep that IRQs are off. We can't do this until
1086 * we fix gsbase, and we should do it before enter_from_user_mode
1087 * (which can take locks).
1090 CALL_enter_from_user_mode
1098 * There are two places in the kernel that can potentially fault with
1099 * usergs. Handle them here. B stepping K8s sometimes report a
1100 * truncated RIP for IRET exceptions returning to compat mode. Check
1101 * for these here too.
1103 .Lerror_kernelspace:
1105 leaq native_irq_return_iret(%rip), %rcx
1106 cmpq %rcx, RIP+8(%rsp)
1108 movl %ecx, %eax /* zero extend */
1109 cmpq %rax, RIP+8(%rsp)
1111 cmpq $.Lgs_change, RIP+8(%rsp)
1112 jne .Lerror_entry_done
1115 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1116 * gsbase and proceed. We'll fix up the exception and land in
1117 * .Lgs_change's error handler with kernel gsbase.
1120 jmp .Lerror_entry_done
1123 /* Fix truncated RIP */
1124 movq %rcx, RIP+8(%rsp)
1129 * We came from an IRET to user mode, so we have user gsbase.
1130 * Switch to kernel gsbase:
1135 * Pretend that the exception came from user mode: set up pt_regs
1136 * as if we faulted immediately after IRET and clear EBX so that
1137 * error_exit knows that we will be returning to user mode.
1143 jmp .Lerror_entry_from_usermode_after_swapgs
1148 * On entry, EBX is a "return to kernel mode" flag:
1149 * 1: already in kernel mode, don't need SWAPGS
1150 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1153 DISABLE_INTERRUPTS(CLBR_ANY)
1160 /* Runs on exception stack */
1163 * Fix up the exception frame if we're on Xen.
1164 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1165 * one value to the stack on native, so it may clobber the rdx
1166 * scratch slot, but it won't clobber any of the important
1169 * Xen is a different story, because the Xen frame itself overlaps
1170 * the "NMI executing" variable.
1172 PARAVIRT_ADJUST_EXCEPTION_FRAME
1175 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1176 * the iretq it performs will take us out of NMI context.
1177 * This means that we can have nested NMIs where the next
1178 * NMI is using the top of the stack of the previous NMI. We
1179 * can't let it execute because the nested NMI will corrupt the
1180 * stack of the previous NMI. NMI handlers are not re-entrant
1183 * To handle this case we do the following:
1184 * Check the a special location on the stack that contains
1185 * a variable that is set when NMIs are executing.
1186 * The interrupted task's stack is also checked to see if it
1188 * If the variable is not set and the stack is not the NMI
1190 * o Set the special variable on the stack
1191 * o Copy the interrupt frame into an "outermost" location on the
1193 * o Copy the interrupt frame into an "iret" location on the stack
1194 * o Continue processing the NMI
1195 * If the variable is set or the previous stack is the NMI stack:
1196 * o Modify the "iret" location to jump to the repeat_nmi
1197 * o return back to the first NMI
1199 * Now on exit of the first NMI, we first clear the stack variable
1200 * The NMI stack will tell any nested NMIs at that point that it is
1201 * nested. Then we pop the stack normally with iret, and if there was
1202 * a nested NMI that updated the copy interrupt stack frame, a
1203 * jump will be made to the repeat_nmi code that will handle the second
1206 * However, espfix prevents us from directly returning to userspace
1207 * with a single IRET instruction. Similarly, IRET to user mode
1208 * can fault. We therefore handle NMIs from user space like
1209 * other IST entries.
1212 /* Use %rdx as our temp variable throughout */
1215 testb $3, CS-RIP+8(%rsp)
1216 jz .Lnmi_from_kernel
1219 * NMI from user mode. We need to run on the thread stack, but we
1220 * can't go through the normal entry paths: NMIs are masked, and
1221 * we don't want to enable interrupts, because then we'll end
1222 * up in an awkward situation in which IRQs are on but NMIs
1225 * We also must not push anything to the stack before switching
1226 * stacks lest we corrupt the "NMI executing" variable.
1232 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1233 pushq 5*8(%rdx) /* pt_regs->ss */
1234 pushq 4*8(%rdx) /* pt_regs->rsp */
1235 pushq 3*8(%rdx) /* pt_regs->flags */
1236 pushq 2*8(%rdx) /* pt_regs->cs */
1237 pushq 1*8(%rdx) /* pt_regs->rip */
1238 pushq $-1 /* pt_regs->orig_ax */
1239 pushq %rdi /* pt_regs->di */
1240 pushq %rsi /* pt_regs->si */
1241 pushq (%rdx) /* pt_regs->dx */
1242 pushq %rcx /* pt_regs->cx */
1243 pushq %rax /* pt_regs->ax */
1244 pushq %r8 /* pt_regs->r8 */
1245 pushq %r9 /* pt_regs->r9 */
1246 pushq %r10 /* pt_regs->r10 */
1247 pushq %r11 /* pt_regs->r11 */
1248 pushq %rbx /* pt_regs->rbx */
1249 pushq %rbp /* pt_regs->rbp */
1250 pushq %r12 /* pt_regs->r12 */
1251 pushq %r13 /* pt_regs->r13 */
1252 pushq %r14 /* pt_regs->r14 */
1253 pushq %r15 /* pt_regs->r15 */
1254 ENCODE_FRAME_POINTER
1257 * At this point we no longer need to worry about stack damage
1258 * due to nesting -- we're on the normal thread stack and we're
1259 * done with the NMI stack.
1267 * Return back to user mode. We must *not* do the normal exit
1268 * work, because we don't want to enable interrupts.
1271 jmp restore_regs_and_iret
1275 * Here's what our stack frame will look like:
1276 * +---------------------------------------------------------+
1278 * | original Return RSP |
1279 * | original RFLAGS |
1282 * +---------------------------------------------------------+
1283 * | temp storage for rdx |
1284 * +---------------------------------------------------------+
1285 * | "NMI executing" variable |
1286 * +---------------------------------------------------------+
1287 * | iret SS } Copied from "outermost" frame |
1288 * | iret Return RSP } on each loop iteration; overwritten |
1289 * | iret RFLAGS } by a nested NMI to force another |
1290 * | iret CS } iteration if needed. |
1292 * +---------------------------------------------------------+
1293 * | outermost SS } initialized in first_nmi; |
1294 * | outermost Return RSP } will not be changed before |
1295 * | outermost RFLAGS } NMI processing is done. |
1296 * | outermost CS } Copied to "iret" frame on each |
1297 * | outermost RIP } iteration. |
1298 * +---------------------------------------------------------+
1300 * +---------------------------------------------------------+
1302 * The "original" frame is used by hardware. Before re-enabling
1303 * NMIs, we need to be done with it, and we need to leave enough
1304 * space for the asm code here.
1306 * We return by executing IRET while RSP points to the "iret" frame.
1307 * That will either return for real or it will loop back into NMI
1310 * The "outermost" frame is copied to the "iret" frame on each
1311 * iteration of the loop, so each iteration starts with the "iret"
1312 * frame pointing to the final return target.
1316 * Determine whether we're a nested NMI.
1318 * If we interrupted kernel code between repeat_nmi and
1319 * end_repeat_nmi, then we are a nested NMI. We must not
1320 * modify the "iret" frame because it's being written by
1321 * the outer NMI. That's okay; the outer NMI handler is
1322 * about to about to call do_nmi anyway, so we can just
1323 * resume the outer NMI.
1326 movq $repeat_nmi, %rdx
1329 movq $end_repeat_nmi, %rdx
1335 * Now check "NMI executing". If it's set, then we're nested.
1336 * This will not detect if we interrupted an outer NMI just
1343 * Now test if the previous stack was an NMI stack. This covers
1344 * the case where we interrupt an outer NMI after it clears
1345 * "NMI executing" but before IRET. We need to be careful, though:
1346 * there is one case in which RSP could point to the NMI stack
1347 * despite there being no NMI active: naughty userspace controls
1348 * RSP at the very beginning of the SYSCALL targets. We can
1349 * pull a fast one on naughty userspace, though: we program
1350 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1351 * if it controls the kernel's RSP. We set DF before we clear
1355 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1356 cmpq %rdx, 4*8(%rsp)
1357 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1360 subq $EXCEPTION_STKSZ, %rdx
1361 cmpq %rdx, 4*8(%rsp)
1362 /* If it is below the NMI stack, it is a normal NMI */
1365 /* Ah, it is within the NMI stack. */
1367 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1368 jz first_nmi /* RSP was user controlled. */
1370 /* This is a nested NMI. */
1374 * Modify the "iret" frame to point to repeat_nmi, forcing another
1375 * iteration of NMI handling.
1378 leaq -10*8(%rsp), %rdx
1385 /* Put stack back */
1391 /* We are returning to kernel mode, so this cannot result in a fault. */
1398 /* Make room for "NMI executing". */
1401 /* Leave room for the "iret" frame */
1404 /* Copy the "original" frame to the "outermost" frame */
1409 /* Everything up to here is safe from nested NMIs */
1411 #ifdef CONFIG_DEBUG_ENTRY
1413 * For ease of testing, unmask NMIs right away. Disabled by
1414 * default because IRET is very expensive.
1417 pushq %rsp /* RSP (minus 8 because of the previous push) */
1418 addq $8, (%rsp) /* Fix up RSP */
1420 pushq $__KERNEL_CS /* CS */
1422 INTERRUPT_RETURN /* continues at repeat_nmi below */
1428 * If there was a nested NMI, the first NMI's iret will return
1429 * here. But NMIs are still enabled and we can take another
1430 * nested NMI. The nested NMI checks the interrupted RIP to see
1431 * if it is between repeat_nmi and end_repeat_nmi, and if so
1432 * it will just return, as we are about to repeat an NMI anyway.
1433 * This makes it safe to copy to the stack frame that a nested
1436 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1437 * we're repeating an NMI, gsbase has the same value that it had on
1438 * the first iteration. paranoid_entry will load the kernel
1439 * gsbase if needed before we call do_nmi. "NMI executing"
1442 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1445 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1446 * here must not modify the "iret" frame while we're writing to
1447 * it or it will end up containing garbage.
1457 * Everything below this point can be preempted by a nested NMI.
1458 * If this happens, then the inner NMI will change the "iret"
1459 * frame to point back to repeat_nmi.
1461 pushq $-1 /* ORIG_RAX: no syscall to restart */
1462 ALLOC_PT_GPREGS_ON_STACK
1465 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1466 * as we should not be calling schedule in NMI context.
1467 * Even with normal interrupts enabled. An NMI should not be
1468 * setting NEED_RESCHED or anything that normal interrupts and
1469 * exceptions might do.
1473 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1478 testl %ebx, %ebx /* swapgs needed? */
1486 /* Point RSP at the "iret" frame. */
1487 REMOVE_PT_GPREGS_FROM_STACK 6*8
1490 * Clear "NMI executing". Set DF first so that we can easily
1491 * distinguish the remaining code between here and IRET from
1492 * the SYSCALL entry and exit paths. On a native kernel, we
1493 * could just inspect RIP, but, on paravirt kernels,
1494 * INTERRUPT_RETURN can translate into a jump into a
1498 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1501 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1502 * stack in a single instruction. We are returning to kernel
1503 * mode, so this cannot result in a fault.
1508 ENTRY(ignore_sysret)
1513 ENTRY(rewind_stack_do_exit)
1514 /* Prevent any naive code from trying to unwind to our caller. */
1517 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1518 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1522 END(rewind_stack_do_exit)