2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <linux/err.h>
40 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
41 #include <linux/elf-em.h>
42 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
43 #define __AUDIT_ARCH_64BIT 0x80000000
44 #define __AUDIT_ARCH_LE 0x40000000
47 .section .entry.text, "ax"
49 #ifdef CONFIG_PARAVIRT
50 ENTRY(native_usergs_sysret64)
53 ENDPROC(native_usergs_sysret64)
54 #endif /* CONFIG_PARAVIRT */
56 .macro TRACE_IRQS_IRETQ
57 #ifdef CONFIG_TRACE_IRQFLAGS
58 bt $9, EFLAGS(%rsp) /* interrupts off? */
66 * When dynamic function tracer is enabled it will add a breakpoint
67 * to all locations that it is about to modify, sync CPUs, update
68 * all the code, sync CPUs, then remove the breakpoints. In this time
69 * if lockdep is enabled, it might jump back into the debug handler
70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
73 * make sure the stack pointer does not get reset back to the top
74 * of the debug stack, and instead just reuses the current stack.
76 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
78 .macro TRACE_IRQS_OFF_DEBUG
79 call debug_stack_set_zero
81 call debug_stack_reset
84 .macro TRACE_IRQS_ON_DEBUG
85 call debug_stack_set_zero
87 call debug_stack_reset
90 .macro TRACE_IRQS_IRETQ_DEBUG
91 bt $9, EFLAGS(%rsp) /* interrupts off? */
98 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
99 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
100 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
106 * This is the only entry point used for 64-bit system calls. The
107 * hardware interface is reasonably well designed and the register to
108 * argument mapping Linux uses fits well with the registers that are
109 * available when SYSCALL is used.
111 * SYSCALL instructions can be found inlined in libc implementations as
112 * well as some other programs and libraries. There are also a handful
113 * of SYSCALL instructions in the vDSO used, for example, as a
114 * clock_gettimeofday fallback.
116 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
117 * then loads new ss, cs, and rip from previously programmed MSRs.
118 * rflags gets masked by a value from another MSR (so CLD and CLAC
119 * are not needed). SYSCALL does not save anything on the stack
120 * and does not change rsp.
122 * Registers on entry:
123 * rax system call number
125 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
129 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
132 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
134 * Only called from user space.
136 * When user can change pt_regs->foo always force IRET. That is because
137 * it deals with uncanonical addresses better. SYSRET has trouble
138 * with them due to bugs in both AMD and Intel CPUs.
141 ENTRY(entry_SYSCALL_64)
143 * Interrupts are off on entry.
144 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
145 * it is too small to ever cause noticeable irq latency.
149 * A hypervisor implementation might want to use a label
150 * after the swapgs, so that it can do the swapgs
151 * for the guest and jump here on syscall.
153 GLOBAL(entry_SYSCALL_64_after_swapgs)
155 movq %rsp, PER_CPU_VAR(rsp_scratch)
156 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
160 /* Construct struct pt_regs on stack */
161 pushq $__USER_DS /* pt_regs->ss */
162 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
163 pushq %r11 /* pt_regs->flags */
164 pushq $__USER_CS /* pt_regs->cs */
165 pushq %rcx /* pt_regs->ip */
166 pushq %rax /* pt_regs->orig_ax */
167 pushq %rdi /* pt_regs->di */
168 pushq %rsi /* pt_regs->si */
169 pushq %rdx /* pt_regs->dx */
170 pushq %rcx /* pt_regs->cx */
171 pushq $-ENOSYS /* pt_regs->ax */
172 pushq %r8 /* pt_regs->r8 */
173 pushq %r9 /* pt_regs->r9 */
174 pushq %r10 /* pt_regs->r10 */
175 pushq %r11 /* pt_regs->r11 */
176 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
179 * If we need to do entry work or if we guess we'll need to do
180 * exit work, go straight to the slow path.
182 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
183 jnz entry_SYSCALL64_slow_path
185 entry_SYSCALL_64_fastpath:
187 * Easy case: enable interrupts and issue the syscall. If the syscall
188 * needs pt_regs, we'll call a stub that disables interrupts again
189 * and jumps to the slow path.
192 ENABLE_INTERRUPTS(CLBR_NONE)
193 #if __SYSCALL_MASK == ~0
194 cmpq $__NR_syscall_max, %rax
196 andl $__SYSCALL_MASK, %eax
197 cmpl $__NR_syscall_max, %eax
199 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
203 * This call instruction is handled specially in stub_ptregs_64.
204 * It might end up jumping to the slow path. If it jumps, RAX
205 * and all argument registers are clobbered.
207 call *sys_call_table(, %rax, 8)
208 .Lentry_SYSCALL_64_after_fastpath_call:
214 * If we get here, then we know that pt_regs is clean for SYSRET64.
215 * If we see that no exit work is required (which we are required
216 * to check with IRQs off), then we can go straight to SYSRET64.
218 DISABLE_INTERRUPTS(CLBR_NONE)
220 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
224 TRACE_IRQS_ON /* user mode is traced as IRQs on */
226 movq EFLAGS(%rsp), %r11
227 RESTORE_C_REGS_EXCEPT_RCX_R11
233 * The fast path looked good when we started, but something changed
234 * along the way and we need to switch to the slow path. Calling
235 * raise(3) will trigger this, for example. IRQs are off.
238 ENABLE_INTERRUPTS(CLBR_NONE)
241 call syscall_return_slowpath /* returns with IRQs disabled */
242 jmp return_from_SYSCALL_64
244 entry_SYSCALL64_slow_path:
248 call do_syscall_64 /* returns with IRQs disabled */
250 return_from_SYSCALL_64:
252 TRACE_IRQS_IRETQ /* we're about to change IF */
255 * Try to use SYSRET instead of IRET if we're returning to
256 * a completely clean 64-bit userspace context.
260 cmpq %rcx, %r11 /* RCX == RIP */
261 jne opportunistic_sysret_failed
264 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
265 * in kernel space. This essentially lets the user take over
266 * the kernel, since userspace controls RSP.
268 * If width of "canonical tail" ever becomes variable, this will need
269 * to be updated to remain correct on both old and new CPUs.
271 .ifne __VIRTUAL_MASK_SHIFT - 47
272 .error "virtual address width changed -- SYSRET checks need update"
275 /* Change top 16 bits to be the sign-extension of 47th bit */
276 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
277 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
279 /* If this changed %rcx, it was not canonical */
281 jne opportunistic_sysret_failed
283 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
284 jne opportunistic_sysret_failed
287 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
288 jne opportunistic_sysret_failed
291 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
292 * restore RF properly. If the slowpath sets it for whatever reason, we
293 * need to restore it correctly.
295 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
296 * trap from userspace immediately after SYSRET. This would cause an
297 * infinite loop whenever #DB happens with register state that satisfies
298 * the opportunistic SYSRET conditions. For example, single-stepping
301 * movq $stuck_here, %rcx
306 * would never get past 'stuck_here'.
308 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
309 jnz opportunistic_sysret_failed
311 /* nothing to check for RSP */
313 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
314 jne opportunistic_sysret_failed
317 * We win! This label is here just for ease of understanding
318 * perf profiles. Nothing jumps here.
320 syscall_return_via_sysret:
321 /* rcx and r11 are already restored (see code above) */
322 RESTORE_C_REGS_EXCEPT_RCX_R11
326 opportunistic_sysret_failed:
328 jmp restore_c_regs_and_iret
329 END(entry_SYSCALL_64)
331 ENTRY(stub_ptregs_64)
333 * Syscalls marked as needing ptregs land here.
334 * If we are on the fast path, we need to save the extra regs,
335 * which we achieve by trying again on the slow path. If we are on
336 * the slow path, the extra regs are already saved.
338 * RAX stores a pointer to the C function implementing the syscall.
341 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
345 * Called from fast path -- disable IRQs again, pop return address
346 * and jump to slow path
348 DISABLE_INTERRUPTS(CLBR_NONE)
351 jmp entry_SYSCALL64_slow_path
354 jmp *%rax /* Called from C */
357 .macro ptregs_stub func
359 leaq \func(%rip), %rax
364 /* Instantiate ptregs_stub for each ptregs-using syscall */
365 #define __SYSCALL_64_QUAL_(sym)
366 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
367 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
368 #include <asm/syscalls_64.h>
374 ENTRY(__switch_to_asm)
376 * Save callee-saved registers
377 * This must match the order in inactive_task_frame
387 movq %rsp, TASK_threadsp(%rdi)
388 movq TASK_threadsp(%rsi), %rsp
390 #ifdef CONFIG_CC_STACKPROTECTOR
391 movq TASK_stack_canary(%rsi), %rbx
392 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
395 /* restore callee-saved registers */
407 * A newly forked process directly context switches into this address.
409 * rax: prev task we switched from
410 * rbx: kernel thread func (NULL for user thread)
411 * r12: kernel thread arg
415 call schedule_tail /* rdi: 'prev' task parameter */
417 testq %rbx, %rbx /* from kernel_thread? */
418 jnz 1f /* kernel threads are uncommon */
422 call syscall_return_slowpath /* returns with IRQs disabled */
423 TRACE_IRQS_ON /* user mode is traced as IRQS on */
425 jmp restore_regs_and_iret
432 * A kernel thread is allowed to return here after successfully
433 * calling do_execve(). Exit to userspace to complete the execve()
441 * Build the entry stubs with some assembler magic.
442 * We pack 1 stub into every 8-byte block.
445 ENTRY(irq_entries_start)
446 vector=FIRST_EXTERNAL_VECTOR
447 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
448 pushq $(~vector+0x80) /* Note: always in signed byte range */
453 END(irq_entries_start)
456 * Interrupt entry/exit.
458 * Interrupt entry points save only callee clobbered registers in fast path.
460 * Entry runs with interrupts off.
463 /* 0(%rsp): ~(interrupt number) */
464 .macro interrupt func
466 ALLOC_PT_GPREGS_ON_STACK
474 * IRQ from user mode. Switch to kernel gsbase and inform context
475 * tracking that we're in kernel mode.
480 * We need to tell lockdep that IRQs are off. We can't do this until
481 * we fix gsbase, and we should do it before enter_from_user_mode
482 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
483 * the simplest way to handle it is to just call it twice if
484 * we enter from user mode. There's no reason to optimize this since
485 * TRACE_IRQS_OFF is a no-op if lockdep is off.
489 CALL_enter_from_user_mode
493 * Save previous stack pointer, optionally switch to interrupt stack.
494 * irq_count is used to check if a CPU is already on an interrupt stack
495 * or not. While this is essentially redundant with preempt_count it is
496 * a little cheaper to use a separate counter in the PDA (short of
497 * moving irq_enter into assembly, which would be too much work)
500 incl PER_CPU_VAR(irq_count)
501 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
503 /* We entered an interrupt context - irqs are off: */
506 call \func /* rdi points to pt_regs */
510 * The interrupt stubs push (~vector+0x80) onto the stack and
511 * then jump to common_interrupt.
513 .p2align CONFIG_X86_L1_CACHE_SHIFT
516 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
518 /* 0(%rsp): old RSP */
520 DISABLE_INTERRUPTS(CLBR_NONE)
522 decl PER_CPU_VAR(irq_count)
524 /* Restore saved previous stack */
530 /* Interrupt came from user space */
533 call prepare_exit_to_usermode
536 jmp restore_regs_and_iret
538 /* Returning to kernel space */
540 #ifdef CONFIG_PREEMPT
541 /* Interrupts are off */
542 /* Check if we need preemption */
543 bt $9, EFLAGS(%rsp) /* were interrupts off? */
545 0: cmpl $0, PER_CPU_VAR(__preempt_count)
547 call preempt_schedule_irq
552 * The iretq could re-enable interrupts:
557 * At this label, code paths which return to kernel and to user,
558 * which come from interrupts/exception and from syscalls, merge.
560 GLOBAL(restore_regs_and_iret)
562 restore_c_regs_and_iret:
564 REMOVE_PT_GPREGS_FROM_STACK 8
569 * Are we returning to a stack segment from the LDT? Note: in
570 * 64-bit mode SS:RSP on the exception stack is always valid.
572 #ifdef CONFIG_X86_ESPFIX64
573 testb $4, (SS-RIP)(%rsp)
574 jnz native_irq_return_ldt
577 .global native_irq_return_iret
578 native_irq_return_iret:
580 * This may fault. Non-paranoid faults on return to userspace are
581 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
582 * Double-faults due to espfix64 are handled in do_double_fault.
583 * Other faults here are fatal.
587 #ifdef CONFIG_X86_ESPFIX64
588 native_irq_return_ldt:
592 movq PER_CPU_VAR(espfix_waddr), %rdi
593 movq %rax, (0*8)(%rdi) /* RAX */
594 movq (2*8)(%rsp), %rax /* RIP */
595 movq %rax, (1*8)(%rdi)
596 movq (3*8)(%rsp), %rax /* CS */
597 movq %rax, (2*8)(%rdi)
598 movq (4*8)(%rsp), %rax /* RFLAGS */
599 movq %rax, (3*8)(%rdi)
600 movq (6*8)(%rsp), %rax /* SS */
601 movq %rax, (5*8)(%rdi)
602 movq (5*8)(%rsp), %rax /* RSP */
603 movq %rax, (4*8)(%rdi)
604 andl $0xffff0000, %eax
606 orq PER_CPU_VAR(espfix_stack), %rax
610 jmp native_irq_return_iret
612 END(common_interrupt)
617 .macro apicinterrupt3 num sym do_sym
627 #ifdef CONFIG_TRACING
628 #define trace(sym) trace_##sym
629 #define smp_trace(sym) smp_trace_##sym
631 .macro trace_apicinterrupt num sym
632 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
635 .macro trace_apicinterrupt num sym do_sym
639 /* Make sure APIC interrupt handlers end up in the irqentry section: */
640 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
641 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
642 # define POP_SECTION_IRQENTRY .popsection
644 # define PUSH_SECTION_IRQENTRY
645 # define POP_SECTION_IRQENTRY
648 .macro apicinterrupt num sym do_sym
649 PUSH_SECTION_IRQENTRY
650 apicinterrupt3 \num \sym \do_sym
651 trace_apicinterrupt \num \sym
656 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
657 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
661 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
664 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
665 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
667 #ifdef CONFIG_HAVE_KVM
668 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
669 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
672 #ifdef CONFIG_X86_MCE_THRESHOLD
673 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
676 #ifdef CONFIG_X86_MCE_AMD
677 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
680 #ifdef CONFIG_X86_THERMAL_VECTOR
681 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
685 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
686 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
687 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
690 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
691 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
693 #ifdef CONFIG_IRQ_WORK
694 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
698 * Exception entry points.
700 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
702 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
705 .if \shift_ist != -1 && \paranoid == 0
706 .error "using shift_ist requires paranoid=1"
710 PARAVIRT_ADJUST_EXCEPTION_FRAME
712 .ifeq \has_error_code
713 pushq $-1 /* ORIG_RAX: no syscall to restart */
716 ALLOC_PT_GPREGS_ON_STACK
720 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
727 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
731 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
737 movq %rsp, %rdi /* pt_regs pointer */
740 movq ORIG_RAX(%rsp), %rsi /* get error code */
741 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
743 xorl %esi, %esi /* no error code */
747 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
753 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
756 /* these procedures expect "no swapgs" flag in ebx */
765 * Paranoid entry from userspace. Switch stacks and treat it
766 * as a normal entry. This means that paranoid handlers
767 * run in real process context if user_mode(regs).
773 movq %rsp, %rdi /* pt_regs pointer */
775 movq %rax, %rsp /* switch stack */
777 movq %rsp, %rdi /* pt_regs pointer */
780 movq ORIG_RAX(%rsp), %rsi /* get error code */
781 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
783 xorl %esi, %esi /* no error code */
788 jmp error_exit /* %ebx: no swapgs flag */
793 #ifdef CONFIG_TRACING
794 .macro trace_idtentry sym do_sym has_error_code:req
795 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
796 idtentry \sym \do_sym has_error_code=\has_error_code
799 .macro trace_idtentry sym do_sym has_error_code:req
800 idtentry \sym \do_sym has_error_code=\has_error_code
804 idtentry divide_error do_divide_error has_error_code=0
805 idtentry overflow do_overflow has_error_code=0
806 idtentry bounds do_bounds has_error_code=0
807 idtentry invalid_op do_invalid_op has_error_code=0
808 idtentry device_not_available do_device_not_available has_error_code=0
809 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
810 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
811 idtentry invalid_TSS do_invalid_TSS has_error_code=1
812 idtentry segment_not_present do_segment_not_present has_error_code=1
813 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
814 idtentry coprocessor_error do_coprocessor_error has_error_code=0
815 idtentry alignment_check do_alignment_check has_error_code=1
816 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
820 * Reload gs selector with exception handling
823 ENTRY(native_load_gs_index)
825 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
829 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
833 END(native_load_gs_index)
835 _ASM_EXTABLE(.Lgs_change, bad_gs)
836 .section .fixup, "ax"
837 /* running with kernelgs */
839 SWAPGS /* switch back to user gs */
841 /* This can't be a string because the preprocessor needs to see it. */
842 movl $__USER_DS, %eax
845 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
851 /* Call softirq on interrupt stack. Interrupts are off. */
852 ENTRY(do_softirq_own_stack)
855 incl PER_CPU_VAR(irq_count)
856 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
857 push %rbp /* frame pointer backlink */
860 decl PER_CPU_VAR(irq_count)
862 END(do_softirq_own_stack)
865 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
868 * A note on the "critical region" in our callback handler.
869 * We want to avoid stacking callback handlers due to events occurring
870 * during handling of the last event. To do this, we keep events disabled
871 * until we've done all processing. HOWEVER, we must enable events before
872 * popping the stack frame (can't be done atomically) and so it would still
873 * be possible to get enough handler activations to overflow the stack.
874 * Although unlikely, bugs of that kind are hard to track down, so we'd
875 * like to avoid the possibility.
876 * So, on entry to the handler we detect whether we interrupted an
877 * existing activation in its critical region -- if so, we pop the current
878 * activation and restart the handler using the previous one.
880 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
883 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
884 * see the correct pointer to the pt_regs
886 movq %rdi, %rsp /* we don't return, adjust the stack frame */
887 11: incl PER_CPU_VAR(irq_count)
889 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
890 pushq %rbp /* frame pointer backlink */
891 call xen_evtchn_do_upcall
893 decl PER_CPU_VAR(irq_count)
894 #ifndef CONFIG_PREEMPT
895 call xen_maybe_preempt_hcall
898 END(xen_do_hypervisor_callback)
901 * Hypervisor uses this for application faults while it executes.
902 * We get here for two reasons:
903 * 1. Fault while reloading DS, ES, FS or GS
904 * 2. Fault while executing IRET
905 * Category 1 we do not need to fix up as Xen has already reloaded all segment
906 * registers that could be reloaded and zeroed the others.
907 * Category 2 we fix up by killing the current process. We cannot use the
908 * normal Linux return path in this case because if we use the IRET hypercall
909 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
910 * We distinguish between categories by comparing each saved segment register
911 * with its current contents: any discrepancy means we in category 1.
913 ENTRY(xen_failsafe_callback)
926 /* All segments match their saved values => Category 2 (Bad IRET). */
933 jmp general_protection
934 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
938 pushq $-1 /* orig_ax = -1 => not a system call */
939 ALLOC_PT_GPREGS_ON_STACK
943 END(xen_failsafe_callback)
945 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
946 xen_hvm_callback_vector xen_evtchn_do_upcall
948 #endif /* CONFIG_XEN */
950 #if IS_ENABLED(CONFIG_HYPERV)
951 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
952 hyperv_callback_vector hyperv_vector_handler
953 #endif /* CONFIG_HYPERV */
955 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
956 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
957 idtentry stack_segment do_stack_segment has_error_code=1
960 idtentry xen_debug do_debug has_error_code=0
961 idtentry xen_int3 do_int3 has_error_code=0
962 idtentry xen_stack_segment do_stack_segment has_error_code=1
965 idtentry general_protection do_general_protection has_error_code=1
966 trace_idtentry page_fault do_page_fault has_error_code=1
968 #ifdef CONFIG_KVM_GUEST
969 idtentry async_page_fault do_async_page_fault has_error_code=1
972 #ifdef CONFIG_X86_MCE
973 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
977 * Save all registers in pt_regs, and switch gs if needed.
978 * Use slow, but surefire "are we in kernel?" check.
979 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
981 ENTRY(paranoid_entry)
986 movl $MSR_GS_BASE, %ecx
989 js 1f /* negative -> in kernel */
996 * "Paranoid" exit path from exception stack. This is invoked
997 * only on return from non-NMI IST interrupts that came
1000 * We may be returning to very strange contexts (e.g. very early
1001 * in syscall entry), so checking for preemption here would
1002 * be complicated. Fortunately, we there's no good reason
1003 * to try to handle preemption here.
1005 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1007 ENTRY(paranoid_exit)
1008 DISABLE_INTERRUPTS(CLBR_NONE)
1009 TRACE_IRQS_OFF_DEBUG
1010 testl %ebx, %ebx /* swapgs needed? */
1011 jnz paranoid_exit_no_swapgs
1014 jmp paranoid_exit_restore
1015 paranoid_exit_no_swapgs:
1016 TRACE_IRQS_IRETQ_DEBUG
1017 paranoid_exit_restore:
1020 REMOVE_PT_GPREGS_FROM_STACK 8
1025 * Save all registers in pt_regs, and switch gs if needed.
1026 * Return: EBX=0: came from user mode; EBX=1: otherwise
1033 testb $3, CS+8(%rsp)
1034 jz .Lerror_kernelspace
1036 .Lerror_entry_from_usermode_swapgs:
1038 * We entered from user mode or we're pretending to have entered
1039 * from user mode due to an IRET fault.
1043 .Lerror_entry_from_usermode_after_swapgs:
1045 * We need to tell lockdep that IRQs are off. We can't do this until
1046 * we fix gsbase, and we should do it before enter_from_user_mode
1047 * (which can take locks).
1050 CALL_enter_from_user_mode
1058 * There are two places in the kernel that can potentially fault with
1059 * usergs. Handle them here. B stepping K8s sometimes report a
1060 * truncated RIP for IRET exceptions returning to compat mode. Check
1061 * for these here too.
1063 .Lerror_kernelspace:
1065 leaq native_irq_return_iret(%rip), %rcx
1066 cmpq %rcx, RIP+8(%rsp)
1068 movl %ecx, %eax /* zero extend */
1069 cmpq %rax, RIP+8(%rsp)
1071 cmpq $.Lgs_change, RIP+8(%rsp)
1072 jne .Lerror_entry_done
1075 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1076 * gsbase and proceed. We'll fix up the exception and land in
1077 * .Lgs_change's error handler with kernel gsbase.
1079 jmp .Lerror_entry_from_usermode_swapgs
1082 /* Fix truncated RIP */
1083 movq %rcx, RIP+8(%rsp)
1088 * We came from an IRET to user mode, so we have user gsbase.
1089 * Switch to kernel gsbase:
1094 * Pretend that the exception came from user mode: set up pt_regs
1095 * as if we faulted immediately after IRET and clear EBX so that
1096 * error_exit knows that we will be returning to user mode.
1102 jmp .Lerror_entry_from_usermode_after_swapgs
1107 * On entry, EBS is a "return to kernel mode" flag:
1108 * 1: already in kernel mode, don't need SWAPGS
1109 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1113 DISABLE_INTERRUPTS(CLBR_NONE)
1120 /* Runs on exception stack */
1123 * Fix up the exception frame if we're on Xen.
1124 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1125 * one value to the stack on native, so it may clobber the rdx
1126 * scratch slot, but it won't clobber any of the important
1129 * Xen is a different story, because the Xen frame itself overlaps
1130 * the "NMI executing" variable.
1132 PARAVIRT_ADJUST_EXCEPTION_FRAME
1135 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1136 * the iretq it performs will take us out of NMI context.
1137 * This means that we can have nested NMIs where the next
1138 * NMI is using the top of the stack of the previous NMI. We
1139 * can't let it execute because the nested NMI will corrupt the
1140 * stack of the previous NMI. NMI handlers are not re-entrant
1143 * To handle this case we do the following:
1144 * Check the a special location on the stack that contains
1145 * a variable that is set when NMIs are executing.
1146 * The interrupted task's stack is also checked to see if it
1148 * If the variable is not set and the stack is not the NMI
1150 * o Set the special variable on the stack
1151 * o Copy the interrupt frame into an "outermost" location on the
1153 * o Copy the interrupt frame into an "iret" location on the stack
1154 * o Continue processing the NMI
1155 * If the variable is set or the previous stack is the NMI stack:
1156 * o Modify the "iret" location to jump to the repeat_nmi
1157 * o return back to the first NMI
1159 * Now on exit of the first NMI, we first clear the stack variable
1160 * The NMI stack will tell any nested NMIs at that point that it is
1161 * nested. Then we pop the stack normally with iret, and if there was
1162 * a nested NMI that updated the copy interrupt stack frame, a
1163 * jump will be made to the repeat_nmi code that will handle the second
1166 * However, espfix prevents us from directly returning to userspace
1167 * with a single IRET instruction. Similarly, IRET to user mode
1168 * can fault. We therefore handle NMIs from user space like
1169 * other IST entries.
1172 /* Use %rdx as our temp variable throughout */
1175 testb $3, CS-RIP+8(%rsp)
1176 jz .Lnmi_from_kernel
1179 * NMI from user mode. We need to run on the thread stack, but we
1180 * can't go through the normal entry paths: NMIs are masked, and
1181 * we don't want to enable interrupts, because then we'll end
1182 * up in an awkward situation in which IRQs are on but NMIs
1185 * We also must not push anything to the stack before switching
1186 * stacks lest we corrupt the "NMI executing" variable.
1192 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1193 pushq 5*8(%rdx) /* pt_regs->ss */
1194 pushq 4*8(%rdx) /* pt_regs->rsp */
1195 pushq 3*8(%rdx) /* pt_regs->flags */
1196 pushq 2*8(%rdx) /* pt_regs->cs */
1197 pushq 1*8(%rdx) /* pt_regs->rip */
1198 pushq $-1 /* pt_regs->orig_ax */
1199 pushq %rdi /* pt_regs->di */
1200 pushq %rsi /* pt_regs->si */
1201 pushq (%rdx) /* pt_regs->dx */
1202 pushq %rcx /* pt_regs->cx */
1203 pushq %rax /* pt_regs->ax */
1204 pushq %r8 /* pt_regs->r8 */
1205 pushq %r9 /* pt_regs->r9 */
1206 pushq %r10 /* pt_regs->r10 */
1207 pushq %r11 /* pt_regs->r11 */
1208 pushq %rbx /* pt_regs->rbx */
1209 pushq %rbp /* pt_regs->rbp */
1210 pushq %r12 /* pt_regs->r12 */
1211 pushq %r13 /* pt_regs->r13 */
1212 pushq %r14 /* pt_regs->r14 */
1213 pushq %r15 /* pt_regs->r15 */
1216 * At this point we no longer need to worry about stack damage
1217 * due to nesting -- we're on the normal thread stack and we're
1218 * done with the NMI stack.
1226 * Return back to user mode. We must *not* do the normal exit
1227 * work, because we don't want to enable interrupts. Fortunately,
1228 * do_nmi doesn't modify pt_regs.
1231 jmp restore_c_regs_and_iret
1235 * Here's what our stack frame will look like:
1236 * +---------------------------------------------------------+
1238 * | original Return RSP |
1239 * | original RFLAGS |
1242 * +---------------------------------------------------------+
1243 * | temp storage for rdx |
1244 * +---------------------------------------------------------+
1245 * | "NMI executing" variable |
1246 * +---------------------------------------------------------+
1247 * | iret SS } Copied from "outermost" frame |
1248 * | iret Return RSP } on each loop iteration; overwritten |
1249 * | iret RFLAGS } by a nested NMI to force another |
1250 * | iret CS } iteration if needed. |
1252 * +---------------------------------------------------------+
1253 * | outermost SS } initialized in first_nmi; |
1254 * | outermost Return RSP } will not be changed before |
1255 * | outermost RFLAGS } NMI processing is done. |
1256 * | outermost CS } Copied to "iret" frame on each |
1257 * | outermost RIP } iteration. |
1258 * +---------------------------------------------------------+
1260 * +---------------------------------------------------------+
1262 * The "original" frame is used by hardware. Before re-enabling
1263 * NMIs, we need to be done with it, and we need to leave enough
1264 * space for the asm code here.
1266 * We return by executing IRET while RSP points to the "iret" frame.
1267 * That will either return for real or it will loop back into NMI
1270 * The "outermost" frame is copied to the "iret" frame on each
1271 * iteration of the loop, so each iteration starts with the "iret"
1272 * frame pointing to the final return target.
1276 * Determine whether we're a nested NMI.
1278 * If we interrupted kernel code between repeat_nmi and
1279 * end_repeat_nmi, then we are a nested NMI. We must not
1280 * modify the "iret" frame because it's being written by
1281 * the outer NMI. That's okay; the outer NMI handler is
1282 * about to about to call do_nmi anyway, so we can just
1283 * resume the outer NMI.
1286 movq $repeat_nmi, %rdx
1289 movq $end_repeat_nmi, %rdx
1295 * Now check "NMI executing". If it's set, then we're nested.
1296 * This will not detect if we interrupted an outer NMI just
1303 * Now test if the previous stack was an NMI stack. This covers
1304 * the case where we interrupt an outer NMI after it clears
1305 * "NMI executing" but before IRET. We need to be careful, though:
1306 * there is one case in which RSP could point to the NMI stack
1307 * despite there being no NMI active: naughty userspace controls
1308 * RSP at the very beginning of the SYSCALL targets. We can
1309 * pull a fast one on naughty userspace, though: we program
1310 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1311 * if it controls the kernel's RSP. We set DF before we clear
1315 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1316 cmpq %rdx, 4*8(%rsp)
1317 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1320 subq $EXCEPTION_STKSZ, %rdx
1321 cmpq %rdx, 4*8(%rsp)
1322 /* If it is below the NMI stack, it is a normal NMI */
1325 /* Ah, it is within the NMI stack. */
1327 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1328 jz first_nmi /* RSP was user controlled. */
1330 /* This is a nested NMI. */
1334 * Modify the "iret" frame to point to repeat_nmi, forcing another
1335 * iteration of NMI handling.
1338 leaq -10*8(%rsp), %rdx
1345 /* Put stack back */
1351 /* We are returning to kernel mode, so this cannot result in a fault. */
1358 /* Make room for "NMI executing". */
1361 /* Leave room for the "iret" frame */
1364 /* Copy the "original" frame to the "outermost" frame */
1369 /* Everything up to here is safe from nested NMIs */
1371 #ifdef CONFIG_DEBUG_ENTRY
1373 * For ease of testing, unmask NMIs right away. Disabled by
1374 * default because IRET is very expensive.
1377 pushq %rsp /* RSP (minus 8 because of the previous push) */
1378 addq $8, (%rsp) /* Fix up RSP */
1380 pushq $__KERNEL_CS /* CS */
1382 INTERRUPT_RETURN /* continues at repeat_nmi below */
1388 * If there was a nested NMI, the first NMI's iret will return
1389 * here. But NMIs are still enabled and we can take another
1390 * nested NMI. The nested NMI checks the interrupted RIP to see
1391 * if it is between repeat_nmi and end_repeat_nmi, and if so
1392 * it will just return, as we are about to repeat an NMI anyway.
1393 * This makes it safe to copy to the stack frame that a nested
1396 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1397 * we're repeating an NMI, gsbase has the same value that it had on
1398 * the first iteration. paranoid_entry will load the kernel
1399 * gsbase if needed before we call do_nmi. "NMI executing"
1402 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1405 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1406 * here must not modify the "iret" frame while we're writing to
1407 * it or it will end up containing garbage.
1417 * Everything below this point can be preempted by a nested NMI.
1418 * If this happens, then the inner NMI will change the "iret"
1419 * frame to point back to repeat_nmi.
1421 pushq $-1 /* ORIG_RAX: no syscall to restart */
1422 ALLOC_PT_GPREGS_ON_STACK
1425 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1426 * as we should not be calling schedule in NMI context.
1427 * Even with normal interrupts enabled. An NMI should not be
1428 * setting NEED_RESCHED or anything that normal interrupts and
1429 * exceptions might do.
1433 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1438 testl %ebx, %ebx /* swapgs needed? */
1446 /* Point RSP at the "iret" frame. */
1447 REMOVE_PT_GPREGS_FROM_STACK 6*8
1450 * Clear "NMI executing". Set DF first so that we can easily
1451 * distinguish the remaining code between here and IRET from
1452 * the SYSCALL entry and exit paths. On a native kernel, we
1453 * could just inspect RIP, but, on paravirt kernels,
1454 * INTERRUPT_RETURN can translate into a jump into a
1458 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1461 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1462 * stack in a single instruction. We are returning to kernel
1463 * mode, so this cannot result in a fault.
1468 ENTRY(ignore_sysret)
1473 ENTRY(rewind_stack_do_exit)
1474 /* Prevent any naive code from trying to unwind to our caller. */
1477 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1478 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1482 END(rewind_stack_do_exit)