arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/fpu-internal.h>
  20 #include <asm/user.h>
  21
  22 static DEFINE_PER_CPU(bool, in_kernel_fpu);
  23
  24 void kernel_fpu_disable(void)
  25 {
  26         WARN_ON(this_cpu_read(in_kernel_fpu));
  27         this_cpu_write(in_kernel_fpu, true);
  28 }
  29
  30 void kernel_fpu_enable(void)
  31 {
  32         this_cpu_write(in_kernel_fpu, false);
  33 }
  34
  35 /*
  36  * Were we in an interrupt that interrupted kernel mode?
  37  *
  38  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  39  * pair does nothing at all: the thread must not have fpu (so
  40  * that we don't try to save the FPU state), and TS must
  41  * be set (so that the clts/stts pair does nothing that is
  42  * visible in the interrupted kernel thread).
  43  *
  44  * Except for the eagerfpu case when we return true; in the likely case
  45  * the thread has FPU but we are not going to set/clear TS.
  46  */
  47 static inline bool interrupted_kernel_fpu_idle(void)
  48 {
  49         if (this_cpu_read(in_kernel_fpu))
  50                 return false;
  51
  52         if (use_eager_fpu())
  53                 return true;
  54
  55         return !__thread_has_fpu(current) &&
  56                 (read_cr0() & X86_CR0_TS);
  57 }
  58
  59 /*
  60  * Were we in user mode (or vm86 mode) when we were
  61  * interrupted?
  62  *
  63  * Doing kernel_fpu_begin/end() is ok if we are running
  64  * in an interrupt context from user mode - we'll just
  65  * save the FPU state as required.
  66  */
  67 static inline bool interrupted_user_mode(void)
  68 {
  69         struct pt_regs *regs = get_irq_regs();
  70         return regs && user_mode_vm(regs);
  71 }
  72
  73 /*
  74  * Can we use the FPU in kernel mode with the
  75  * whole "kernel_fpu_begin/end()" sequence?
  76  *
  77  * It's always ok in process context (ie "not interrupt")
  78  * but it is sometimes ok even from an irq.
  79  */
  80 bool irq_fpu_usable(void)
  81 {
  82         return !in_interrupt() ||
  83                 interrupted_user_mode() ||
  84                 interrupted_kernel_fpu_idle();
  85 }
  86 EXPORT_SYMBOL(irq_fpu_usable);
  87
  88 void __kernel_fpu_begin(void)
  89 {
  90         struct task_struct *me = current;
  91
  92         this_cpu_write(in_kernel_fpu, true);
  93
  94         if (__thread_has_fpu(me)) {
  95                 __save_init_fpu(me);
  96         } else {
  97                 this_cpu_write(fpu_owner_task, NULL);
  98                 if (!use_eager_fpu())
  99                         clts();
 100         }
 101 }
 102 EXPORT_SYMBOL(__kernel_fpu_begin);
 103
 104 void __kernel_fpu_end(void)
 105 {
 106         struct task_struct *me = current;
 107
 108         if (__thread_has_fpu(me)) {
 109                 if (WARN_ON(restore_fpu_checking(me)))
 110                         drop_init_fpu(me);
 111         } else if (!use_eager_fpu()) {
 112                 stts();
 113         }
 114
 115         this_cpu_write(in_kernel_fpu, false);
 116 }
 117 EXPORT_SYMBOL(__kernel_fpu_end);
 118
 119 void unlazy_fpu(struct task_struct *tsk)
 120 {
 121         preempt_disable();
 122         if (__thread_has_fpu(tsk)) {
 123                 if (use_eager_fpu()) {
 124                         __save_fpu(tsk);
 125                 } else {
 126                         __save_init_fpu(tsk);
 127                         __thread_fpu_end(tsk);
 128                 }
 129         }
 130         preempt_enable();
 131 }
 132 EXPORT_SYMBOL(unlazy_fpu);
 133
 134 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 135 unsigned int xstate_size;
 136 EXPORT_SYMBOL_GPL(xstate_size);
 137 static struct i387_fxsave_struct fx_scratch;
 138
 139 static void mxcsr_feature_mask_init(void)
 140 {
 141         unsigned long mask = 0;
 142
 143         if (cpu_has_fxsr) {
 144                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
 145                 asm volatile("fxsave %0" : "+m" (fx_scratch));
 146                 mask = fx_scratch.mxcsr_mask;
 147                 if (mask == 0)
 148                         mask = 0x0000ffbf;
 149         }
 150         mxcsr_feature_mask &= mask;
 151 }
 152
 153 static void init_thread_xstate(void)
 154 {
 155         /*
 156          * Note that xstate_size might be overwriten later during
 157          * xsave_init().
 158          */
 159
 160         if (!cpu_has_fpu) {
 161                 /*
 162                  * Disable xsave as we do not support it if i387
 163                  * emulation is enabled.
 164                  */
 165                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
 166                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
 167                 xstate_size = sizeof(struct i387_soft_struct);
 168                 return;
 169         }
 170
 171         if (cpu_has_fxsr)
 172                 xstate_size = sizeof(struct i387_fxsave_struct);
 173         else
 174                 xstate_size = sizeof(struct i387_fsave_struct);
 175 }
 176
 177 /*
 178  * Called at bootup to set up the initial FPU state that is later cloned
 179  * into all processes.
 180  */
 181
 182 void fpu_init(void)
 183 {
 184         unsigned long cr0;
 185         unsigned long cr4_mask = 0;
 186
 187 #ifndef CONFIG_MATH_EMULATION
 188         if (!cpu_has_fpu) {
 189                 pr_emerg("No FPU found and no math emulation present\n");
 190                 pr_emerg("Giving up\n");
 191                 for (;;)
 192                         asm volatile("hlt");
 193         }
 194 #endif
 195         if (cpu_has_fxsr)
 196                 cr4_mask |= X86_CR4_OSFXSR;
 197         if (cpu_has_xmm)
 198                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 199         if (cr4_mask)
 200                 set_in_cr4(cr4_mask);
 201
 202         cr0 = read_cr0();
 203         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 204         if (!cpu_has_fpu)
 205                 cr0 |= X86_CR0_EM;
 206         write_cr0(cr0);
 207
 208         /*
 209          * init_thread_xstate is only called once to avoid overriding
 210          * xstate_size during boot time or during CPU hotplug.
 211          */
 212         if (xstate_size == 0)
 213                 init_thread_xstate();
 214
 215         mxcsr_feature_mask_init();
 216         xsave_init();
 217         eager_fpu_init();
 218 }
 219
 220 void fpu_finit(struct fpu *fpu)
 221 {
 222         if (!cpu_has_fpu) {
 223                 finit_soft_fpu(&fpu->state->soft);
 224                 return;
 225         }
 226
 227         if (cpu_has_fxsr) {
 228                 fx_finit(&fpu->state->fxsave);
 229         } else {
 230                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 231                 memset(fp, 0, xstate_size);
 232                 fp->cwd = 0xffff037fu;
 233                 fp->swd = 0xffff0000u;
 234                 fp->twd = 0xffffffffu;
 235                 fp->fos = 0xffff0000u;
 236         }
 237 }
 238 EXPORT_SYMBOL_GPL(fpu_finit);
 239
 240 /*
 241  * The _current_ task is using the FPU for the first time
 242  * so initialize it and set the mxcsr to its default
 243  * value at reset if we support XMM instructions and then
 244  * remember the current task has used the FPU.
 245  */
 246 int init_fpu(struct task_struct *tsk)
 247 {
 248         int ret;
 249
 250         if (tsk_used_math(tsk)) {
 251                 if (cpu_has_fpu && tsk == current)
 252                         unlazy_fpu(tsk);
 253                 task_disable_lazy_fpu_restore(tsk);
 254                 return 0;
 255         }
 256
 257         /*
 258          * Memory allocation at the first usage of the FPU and other state.
 259          */
 260         ret = fpu_alloc(&tsk->thread.fpu);
 261         if (ret)
 262                 return ret;
 263
 264         fpu_finit(&tsk->thread.fpu);
 265
 266         set_stopped_child_used_math(tsk);
 267         return 0;
 268 }
 269 EXPORT_SYMBOL_GPL(init_fpu);
 270
 271 /*
 272  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 273  * as the "regset->n" for the xstate regset will be updated based on the feature
 274  * capabilites supported by the xsave.
 275  */
 276 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 277 {
 278         return tsk_used_math(target) ? regset->n : 0;
 279 }
 280
 281 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 282 {
 283         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 284 }
 285
 286 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 287                 unsigned int pos, unsigned int count,
 288                 void *kbuf, void __user *ubuf)
 289 {
 290         int ret;
 291
 292         if (!cpu_has_fxsr)
 293                 return -ENODEV;
 294
 295         ret = init_fpu(target);
 296         if (ret)
 297                 return ret;
 298
 299         sanitize_i387_state(target);
 300
 301         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 302                                    &target->thread.fpu.state->fxsave, 0, -1);
 303 }
 304
 305 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 306                 unsigned int pos, unsigned int count,
 307                 const void *kbuf, const void __user *ubuf)
 308 {
 309         int ret;
 310
 311         if (!cpu_has_fxsr)
 312                 return -ENODEV;
 313
 314         ret = init_fpu(target);
 315         if (ret)
 316                 return ret;
 317
 318         sanitize_i387_state(target);
 319
 320         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 321                                  &target->thread.fpu.state->fxsave, 0, -1);
 322
 323         /*
 324          * mxcsr reserved bits must be masked to zero for security reasons.
 325          */
 326         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 327
 328         /*
 329          * update the header bits in the xsave header, indicating the
 330          * presence of FP and SSE state.
 331          */
 332         if (cpu_has_xsave)
 333                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 334
 335         return ret;
 336 }
 337
 338 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 339                 unsigned int pos, unsigned int count,
 340                 void *kbuf, void __user *ubuf)
 341 {
 342         struct xsave_struct *xsave = &target->thread.fpu.state->xsave;
 343         int ret;
 344
 345         if (!cpu_has_xsave)
 346                 return -ENODEV;
 347
 348         ret = init_fpu(target);
 349         if (ret)
 350                 return ret;
 351
 352         /*
 353          * Copy the 48bytes defined by the software first into the xstate
 354          * memory layout in the thread struct, so that we can copy the entire
 355          * xstateregs to the user using one user_regset_copyout().
 356          */
 357         memcpy(&xsave->i387.sw_reserved,
 358                 xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 359         /*
 360          * Copy the xstate memory layout.
 361          */
 362         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 363         return ret;
 364 }
 365
 366 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 367                   unsigned int pos, unsigned int count,
 368                   const void *kbuf, const void __user *ubuf)
 369 {
 370         struct xsave_struct *xsave = &target->thread.fpu.state->xsave;
 371         int ret;
 372
 373         if (!cpu_has_xsave)
 374                 return -ENODEV;
 375
 376         ret = init_fpu(target);
 377         if (ret)
 378                 return ret;
 379
 380         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, xsave, 0, -1);
 381         /*
 382          * mxcsr reserved bits must be masked to zero for security reasons.
 383          */
 384         xsave->i387.mxcsr &= mxcsr_feature_mask;
 385         xsave->xsave_hdr.xstate_bv &= pcntxt_mask;
 386         /*
 387          * These bits must be zero.
 388          */
 389         memset(&xsave->xsave_hdr.reserved, 0, 48);
 390         return ret;
 391 }
 392
 393 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 394
 395 /*
 396  * FPU tag word conversions.
 397  */
 398
 399 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 400 {
 401         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 402
 403         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 404         tmp = ~twd;
 405         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 406         /* and move the valid bits to the lower byte. */
 407         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 408         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 409         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 410
 411         return tmp;
 412 }
 413
 414 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 415 #define FP_EXP_TAG_VALID        0
 416 #define FP_EXP_TAG_ZERO         1
 417 #define FP_EXP_TAG_SPECIAL      2
 418 #define FP_EXP_TAG_EMPTY        3
 419
 420 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 421 {
 422         struct _fpxreg *st;
 423         u32 tos = (fxsave->swd >> 11) & 7;
 424         u32 twd = (unsigned long) fxsave->twd;
 425         u32 tag;
 426         u32 ret = 0xffff0000u;
 427         int i;
 428
 429         for (i = 0; i < 8; i++, twd >>= 1) {
 430                 if (twd & 0x1) {
 431                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 432
 433                         switch (st->exponent & 0x7fff) {
 434                         case 0x7fff:
 435                                 tag = FP_EXP_TAG_SPECIAL;
 436                                 break;
 437                         case 0x0000:
 438                                 if (!st->significand[0] &&
 439                                     !st->significand[1] &&
 440                                     !st->significand[2] &&
 441                                     !st->significand[3])
 442                                         tag = FP_EXP_TAG_ZERO;
 443                                 else
 444                                         tag = FP_EXP_TAG_SPECIAL;
 445                                 break;
 446                         default:
 447                                 if (st->significand[3] & 0x8000)
 448                                         tag = FP_EXP_TAG_VALID;
 449                                 else
 450                                         tag = FP_EXP_TAG_SPECIAL;
 451                                 break;
 452                         }
 453                 } else {
 454                         tag = FP_EXP_TAG_EMPTY;
 455                 }
 456                 ret |= tag << (2 * i);
 457         }
 458         return ret;
 459 }
 460
 461 /*
 462  * FXSR floating point environment conversions.
 463  */
 464
 465 void
 466 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 467 {
 468         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 469         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 470         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 471         int i;
 472
 473         env->cwd = fxsave->cwd | 0xffff0000u;
 474         env->swd = fxsave->swd | 0xffff0000u;
 475         env->twd = twd_fxsr_to_i387(fxsave);
 476
 477 #ifdef CONFIG_X86_64
 478         env->fip = fxsave->rip;
 479         env->foo = fxsave->rdp;
 480         /*
 481          * should be actually ds/cs at fpu exception time, but
 482          * that information is not available in 64bit mode.
 483          */
 484         env->fcs = task_pt_regs(tsk)->cs;
 485         if (tsk == current) {
 486                 savesegment(ds, env->fos);
 487         } else {
 488                 env->fos = tsk->thread.ds;
 489         }
 490         env->fos |= 0xffff0000;
 491 #else
 492         env->fip = fxsave->fip;
 493         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 494         env->foo = fxsave->foo;
 495         env->fos = fxsave->fos;
 496 #endif
 497
 498         for (i = 0; i < 8; ++i)
 499                 memcpy(&to[i], &from[i], sizeof(to[0]));
 500 }
 501
 502 void convert_to_fxsr(struct task_struct *tsk,
 503                      const struct user_i387_ia32_struct *env)
 504
 505 {
 506         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 507         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 508         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 509         int i;
 510
 511         fxsave->cwd = env->cwd;
 512         fxsave->swd = env->swd;
 513         fxsave->twd = twd_i387_to_fxsr(env->twd);
 514         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 515 #ifdef CONFIG_X86_64
 516         fxsave->rip = env->fip;
 517         fxsave->rdp = env->foo;
 518         /* cs and ds ignored */
 519 #else
 520         fxsave->fip = env->fip;
 521         fxsave->fcs = (env->fcs & 0xffff);
 522         fxsave->foo = env->foo;
 523         fxsave->fos = env->fos;
 524 #endif
 525
 526         for (i = 0; i < 8; ++i)
 527                 memcpy(&to[i], &from[i], sizeof(from[0]));
 528 }
 529
 530 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 531                unsigned int pos, unsigned int count,
 532                void *kbuf, void __user *ubuf)
 533 {
 534         struct user_i387_ia32_struct env;
 535         int ret;
 536
 537         ret = init_fpu(target);
 538         if (ret)
 539                 return ret;
 540
 541         if (!static_cpu_has(X86_FEATURE_FPU))
 542                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 543
 544         if (!cpu_has_fxsr)
 545                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 546                                            &target->thread.fpu.state->fsave, 0,
 547                                            -1);
 548
 549         sanitize_i387_state(target);
 550
 551         if (kbuf && pos == 0 && count == sizeof(env)) {
 552                 convert_from_fxsr(kbuf, target);
 553                 return 0;
 554         }
 555
 556         convert_from_fxsr(&env, target);
 557
 558         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 559 }
 560
 561 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 562                unsigned int pos, unsigned int count,
 563                const void *kbuf, const void __user *ubuf)
 564 {
 565         struct user_i387_ia32_struct env;
 566         int ret;
 567
 568         ret = init_fpu(target);
 569         if (ret)
 570                 return ret;
 571
 572         sanitize_i387_state(target);
 573
 574         if (!static_cpu_has(X86_FEATURE_FPU))
 575                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 576
 577         if (!cpu_has_fxsr)
 578                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 579                                           &target->thread.fpu.state->fsave, 0,
 580                                           -1);
 581
 582         if (pos > 0 || count < sizeof(env))
 583                 convert_from_fxsr(&env, target);
 584
 585         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 586         if (!ret)
 587                 convert_to_fxsr(target, &env);
 588
 589         /*
 590          * update the header bit in the xsave header, indicating the
 591          * presence of FP.
 592          */
 593         if (cpu_has_xsave)
 594                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 595         return ret;
 596 }
 597
 598 /*
 599  * FPU state for core dumps.
 600  * This is only used for a.out dumps now.
 601  * It is declared generically using elf_fpregset_t (which is
 602  * struct user_i387_struct) but is in fact only used for 32-bit
 603  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 604  */
 605 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 606 {
 607         struct task_struct *tsk = current;
 608         int fpvalid;
 609
 610         fpvalid = !!used_math();
 611         if (fpvalid)
 612                 fpvalid = !fpregs_get(tsk, NULL,
 613                                       0, sizeof(struct user_i387_ia32_struct),
 614                                       fpu, NULL);
 615
 616         return fpvalid;
 617 }
 618 EXPORT_SYMBOL(dump_fpu);
 619
 620 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
 621
 622 static int __init no_387(char *s)
 623 {
 624         setup_clear_cpu_cap(X86_FEATURE_FPU);
 625         return 1;
 626 }
 627
 628 __setup("no387", no_387);
 629
 630 void fpu_detect(struct cpuinfo_x86 *c)
 631 {
 632         unsigned long cr0;
 633         u16 fsw, fcw;
 634
 635         fsw = fcw = 0xffff;
 636
 637         cr0 = read_cr0();
 638         cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
 639         write_cr0(cr0);
 640
 641         asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
 642                      : "+m" (fsw), "+m" (fcw));
 643
 644         if (fsw == 0 && (fcw & 0x103f) == 0x003f)
 645                 set_cpu_cap(c, X86_FEATURE_FPU);
 646         else
 647                 clear_cpu_cap(c, X86_FEATURE_FPU);
 648
 649         /* The final cr0 value is set in fpu_init() */
 650 }