3 # Note only one of these may be selected at a time! But hidden choices are
4 # not supported by Kconfig
8 Select this for sunxi SoCs which have resets and clocks set up
9 as the original A10 (mach-sun4i).
11 config SUNXI_GEN_SUN6I
14 Select this for sunxi SoCs which have sun6i like periphery, like
15 separate ahb reset control registers, custom pmic bus, new style
20 prompt "Sunxi SoC Variant"
24 bool "sun4i (Allwinner A10)"
26 select SUNXI_GEN_SUN4I
30 bool "sun5i (Allwinner A13)"
32 select SUNXI_GEN_SUN4I
36 bool "sun6i (Allwinner A31)"
38 select SUNXI_GEN_SUN6I
42 bool "sun7i (Allwinner A20)"
44 select CPU_V7_HAS_NONSEC
45 select CPU_V7_HAS_VIRT
46 select SUNXI_GEN_SUN4I
48 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
51 bool "sun8i (Allwinner A23)"
53 select SUNXI_GEN_SUN6I
57 bool "sun8i (Allwinner A33)"
59 select SUNXI_GEN_SUN6I
64 # The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
67 default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
71 int "sunxi dram clock speed"
72 default 312 if MACH_SUN6I || MACH_SUN8I
73 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
75 Set the dram clock speed, valid range 240 - 480, must be a multiple
78 if MACH_SUN5I || MACH_SUN7I
80 int "sunxi mbus clock speed"
83 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
88 int "sunxi dram zq value"
89 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
90 default 127 if MACH_SUN7I
92 Set the dram zq value.
95 bool "sunxi dram odt enable"
96 default n if !MACH_SUN8I_A23
97 default y if MACH_SUN8I_A23
99 Select this to enable dram odt (on die termination).
101 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
103 int "sunxi dram emr1 value"
104 default 0 if MACH_SUN4I
105 default 4 if MACH_SUN5I || MACH_SUN7I
107 Set the dram controller emr1 value.
110 hex "sunxi dram tpr3 value"
113 Set the dram controller tpr3 parameter. This parameter configures
114 the delay on the command lane and also phase shifts, which are
115 applied for sampling incoming read data. The default value 0
116 means that no phase/delay adjustments are necessary. Properly
117 configuring this parameter increases reliability at high DRAM
120 config DRAM_DQS_GATING_DELAY
121 hex "sunxi dram dqs_gating_delay value"
124 Set the dram controller dqs_gating_delay parmeter. Each byte
125 encodes the DQS gating delay for each byte lane. The delay
126 granularity is 1/4 cycle. For example, the value 0x05060606
127 means that the delay is 5 quarter-cycles for one lane (1.25
128 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
129 The default value 0 means autodetection. The results of hardware
130 autodetection are not very reliable and depend on the chip
131 temperature (sometimes producing different results on cold start
132 and warm reboot). But the accuracy of hardware autodetection
133 is usually good enough, unless running at really high DRAM
134 clocks speeds (up to 600MHz). If unsure, keep as 0.
137 prompt "sunxi dram timings"
138 default DRAM_TIMINGS_VENDOR_MAGIC
140 Select the timings of the DDR3 chips.
142 config DRAM_TIMINGS_VENDOR_MAGIC
143 bool "Magic vendor timings from Android"
145 The same DRAM timings as in the Allwinner boot0 bootloader.
147 config DRAM_TIMINGS_DDR3_1066F_1333H
148 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
150 Use the timings of the standard JEDEC DDR3-1066F speed bin for
151 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
152 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
153 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
154 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
155 that down binning to DDR3-1066F is supported (because DDR3-1066F
156 uses a bit faster timings than DDR3-1333H).
158 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
159 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
161 Use the timings of the slowest possible JEDEC speed bin for the
162 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
163 DDR3-800E, DDR3-1066G or DDR3-1333J.
170 config DRAM_ODT_CORRECTION
171 int "sunxi dram odt correction value"
174 Set the dram odt correction value (range -255 - 255). In allwinner
175 fex files, this option is found in bits 8-15 of the u32 odt_en variable
176 in the [dram] section. When bit 31 of the odt_en variable is set
177 then the correction is negative. Usually the value for this is 0.
181 default 912000000 if MACH_SUN7I
182 default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
184 config SYS_CONFIG_NAME
185 default "sun4i" if MACH_SUN4I
186 default "sun5i" if MACH_SUN5I
187 default "sun6i" if MACH_SUN6I
188 default "sun7i" if MACH_SUN7I
189 default "sun8i" if MACH_SUN8I
198 bool "UART0 on MicroSD breakout board"
201 Repurpose the SD card slot for getting access to the UART0 serial
202 console. Primarily useful only for low level u-boot debugging on
203 tablets, where normal UART0 is difficult to access and requires
204 device disassembly and/or soldering. As the SD card can't be used
205 at the same time, the system can be only booted in the FEL mode.
206 Only enable this if you really know what you are doing.
208 config OLD_SUNXI_KERNEL_COMPAT
209 boolean "Enable workarounds for booting old kernels"
212 Set this to enable various workarounds for old kernels, this results in
213 sub-optimal settings for newer kernels, only enable if needed.
216 string "Card detect pin for mmc0"
219 Set the card detect pin for mmc0, leave empty to not use cd. This
220 takes a string in the format understood by sunxi_name_to_gpio, e.g.
221 PH1 for pin 1 of port H.
224 string "Card detect pin for mmc1"
227 See MMC0_CD_PIN help text.
230 string "Card detect pin for mmc2"
233 See MMC0_CD_PIN help text.
236 string "Card detect pin for mmc3"
239 See MMC0_CD_PIN help text.
242 string "Pins for mmc1"
245 Set the pins used for mmc1, when applicable. This takes a string in the
246 format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
249 string "Pins for mmc2"
252 See MMC1_PINS help text.
255 string "Pins for mmc3"
258 See MMC1_PINS help text.
260 config MMC_SUNXI_SLOT_EXTRA
261 int "mmc extra slot number"
264 sunxi builds always enable mmc0, some boards also have a second sdcard
265 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
269 string "Vbus enable pin for usb0 (otg)"
272 Set the Vbus enable pin for usb0 (otg). This takes a string in the
273 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
276 string "Vbus detect pin for usb0 (otg)"
279 Set the Vbus detect pin for usb0 (otg). This takes a string in the
280 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
283 string "Vbus enable pin for usb1 (ehci0)"
284 default "PH6" if MACH_SUN4I || MACH_SUN7I
285 default "PH27" if MACH_SUN6I
287 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
288 a string in the format understood by sunxi_name_to_gpio, e.g.
289 PH1 for pin 1 of port H.
292 string "Vbus enable pin for usb2 (ehci1)"
293 default "PH3" if MACH_SUN4I || MACH_SUN7I
294 default "PH24" if MACH_SUN6I
296 See USB1_VBUS_PIN help text.
299 bool "Enable I2C/TWI controller 0"
300 default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
301 default n if MACH_SUN6I || MACH_SUN8I
303 This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
304 its clock and setting up the bus. This is especially useful on devices
305 with slaves connected to the bus or with pins exposed through e.g. an
306 expansion port/header.
309 bool "Enable I2C/TWI controller 1"
312 See I2C0_ENABLE help text.
315 bool "Enable I2C/TWI controller 2"
318 See I2C0_ENABLE help text.
320 if MACH_SUN6I || MACH_SUN7I
322 bool "Enable I2C/TWI controller 3"
325 See I2C0_ENABLE help text.
330 bool "Enable I2C/TWI controller 4"
333 See I2C0_ENABLE help text.
337 boolean "Enable support for gpio-s on axp PMICs"
340 Say Y here to enable support for the gpio pins of the axp PMIC ICs.
343 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
346 Say Y here to add support for using a cfb console on the HDMI, LCD
347 or VGA output found on most sunxi devices. See doc/README.video for
348 info on how to select the video output and mode.
351 boolean "HDMI output support"
352 depends on VIDEO && !MACH_SUN8I
355 Say Y here to add support for outputting video over HDMI.
358 boolean "VGA output support"
359 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
362 Say Y here to add support for outputting video over VGA.
364 config VIDEO_VGA_VIA_LCD
365 boolean "VGA via LCD controller support"
366 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
369 Say Y here to add support for external DACs connected to the parallel
370 LCD interface driving a VGA connector, such as found on the
373 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
374 boolean "Force sync active high for VGA via LCD controller support"
375 depends on VIDEO_VGA_VIA_LCD
378 Say Y here if you've a board which uses opendrain drivers for the vga
379 hsync and vsync signals. Opendrain drivers cannot generate steep enough
380 positive edges for a stable video output, so on boards with opendrain
381 drivers the sync signals must always be active high.
383 config VIDEO_VGA_EXTERNAL_DAC_EN
384 string "LCD panel power enable pin"
385 depends on VIDEO_VGA_VIA_LCD
388 Set the enable pin for the external VGA DAC. This takes a string in the
389 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
391 config VIDEO_LCD_MODE
392 string "LCD panel timing details"
396 LCD panel timing details string, leave empty if there is no LCD panel.
397 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
398 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
400 config VIDEO_LCD_DCLK_PHASE
401 int "LCD panel display clock phase"
405 Select LCD panel display clock phase shift, range 0-3.
407 config VIDEO_LCD_POWER
408 string "LCD panel power enable pin"
412 Set the power enable pin for the LCD panel. This takes a string in the
413 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
415 config VIDEO_LCD_RESET
416 string "LCD panel reset pin"
420 Set the reset pin for the LCD panel. This takes a string in the format
421 understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
423 config VIDEO_LCD_BL_EN
424 string "LCD panel backlight enable pin"
428 Set the backlight enable pin for the LCD panel. This takes a string in the
429 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
432 config VIDEO_LCD_BL_PWM
433 string "LCD panel backlight pwm pin"
437 Set the backlight pwm pin for the LCD panel. This takes a string in the
438 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
440 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
441 bool "LCD panel backlight pwm is inverted"
445 Set this if the backlight pwm output is active low.
447 config VIDEO_LCD_PANEL_I2C
448 bool "LCD panel needs to be configured via i2c"
452 Say y here if the LCD panel needs to be configured via i2c. This
453 will add a bitbang i2c controller using gpios to talk to the LCD.
455 config VIDEO_LCD_PANEL_I2C_SDA
456 string "LCD panel i2c interface SDA pin"
457 depends on VIDEO_LCD_PANEL_I2C
460 Set the SDA pin for the LCD i2c interface. This takes a string in the
461 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
463 config VIDEO_LCD_PANEL_I2C_SCL
464 string "LCD panel i2c interface SCL pin"
465 depends on VIDEO_LCD_PANEL_I2C
468 Set the SCL pin for the LCD i2c interface. This takes a string in the
469 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
472 # Note only one of these may be selected at a time! But hidden choices are
473 # not supported by Kconfig
474 config VIDEO_LCD_IF_PARALLEL
477 config VIDEO_LCD_IF_LVDS
482 prompt "LCD panel support"
485 Select which type of LCD panel to support.
487 config VIDEO_LCD_PANEL_PARALLEL
488 bool "Generic parallel interface LCD panel"
489 select VIDEO_LCD_IF_PARALLEL
491 config VIDEO_LCD_PANEL_LVDS
492 bool "Generic lvds interface LCD panel"
493 select VIDEO_LCD_IF_LVDS
495 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
496 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
497 select VIDEO_LCD_SSD2828
498 select VIDEO_LCD_IF_PARALLEL
500 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
502 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
503 bool "Hitachi tx18d42vm LCD panel"
504 select VIDEO_LCD_HITACHI_TX18D42VM
505 select VIDEO_LCD_IF_LVDS
507 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
509 config VIDEO_LCD_TL059WV5C0
510 bool "tl059wv5c0 LCD panel"
511 select VIDEO_LCD_PANEL_I2C
512 select VIDEO_LCD_IF_PARALLEL
514 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
515 Aigo M60/M608/M606 tablets.
520 config USB_MUSB_SUNXI
521 bool "Enable sunxi OTG / DRC USB controller in host mode"
524 Say y here to enable support for the sunxi OTG / DRC USB controller
525 used on almost all sunxi boards. Note currently u-boot can only have
526 one usb host controller enabled at a time, so enabling this on boards
527 which also use the ehci host controller will result in build errors.
530 boolean "Enable USB keyboard support"
533 Say Y here to add support for using a USB keyboard (typically used
534 in combination with a graphical console).
537 int "GMAC Transmit Clock Delay Chain"
540 Set the GMAC Transmit Clock Delay Chain value.
542 config SYS_MALLOC_CLEAR_ON_INIT
558 default y if !USB_MUSB_SUNXI