drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38 #include <asm/processor.h>
  39 #include <asm/byteorder.h>
  40 #include <environment.h>
  41 #ifdef  CFG_FLASH_CFI_DRIVER
  42
  43 #if defined(CONFIG_SOLIDCARD3)
  44 #define __LITTLE_ENDIAN
  45 #endif
  46
  47 /*
  48  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  49  * The width of the port and the width of the chips are determined at initialization.
  50  * These widths are used to calculate the address for access CFI data structures.
  51  *
  52  * References
  53  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  54  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  55  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  56  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  57  * AMD CFI Specification, Release 2.0 December 1, 2001
  58  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  59  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  60  *
  61  */
  62
  63 #ifndef CFG_FLASH_BANKS_LIST
  64 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  65 #endif
  66
  67 #define FLASH_CMD_CFI                   0x98
  68 #define FLASH_CMD_READ_ID               0x90
  69 #define FLASH_CMD_RESET                 0xff
  70 #define FLASH_CMD_BLOCK_ERASE           0x20
  71 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  72 #define FLASH_CMD_WRITE                 0x40
  73 #define FLASH_CMD_PROTECT               0x60
  74 #define FLASH_CMD_PROTECT_SET           0x01
  75 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  76 #define FLASH_CMD_CLEAR_STATUS          0x50
  77 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  78 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  79
  80 #define FLASH_STATUS_DONE               0x80
  81 #define FLASH_STATUS_ESS                0x40
  82 #define FLASH_STATUS_ECLBS              0x20
  83 #define FLASH_STATUS_PSLBS              0x10
  84 #define FLASH_STATUS_VPENS              0x08
  85 #define FLASH_STATUS_PSS                0x04
  86 #define FLASH_STATUS_DPS                0x02
  87 #define FLASH_STATUS_R                  0x01
  88 #define FLASH_STATUS_PROTECT            0x01
  89
  90 #define AMD_CMD_RESET                   0xF0
  91 #define AMD_CMD_WRITE                   0xA0
  92 #define AMD_CMD_ERASE_START             0x80
  93 #define AMD_CMD_ERASE_SECTOR            0x30
  94 #define AMD_CMD_UNLOCK_START            0xAA
  95 #define AMD_CMD_UNLOCK_ACK              0x55
  96 #define AMD_CMD_WRITE_TO_BUFFER         0x25
  97 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
  98
  99 #define AMD_STATUS_TOGGLE               0x40
 100 #define AMD_STATUS_ERROR                0x20
 101
 102 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 103 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 104 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 105
 106 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 107 #define FLASH_OFFSET_DEVICE_ID          0x01
 108 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 109 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 110 #define FLASH_OFFSET_CFI                0x55
 111 #define FLASH_OFFSET_CFI_ALT            0x555
 112 #define FLASH_OFFSET_CFI_RESP           0x10
 113 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 114 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 115 #define FLASH_OFFSET_WTOUT              0x1F
 116 #define FLASH_OFFSET_WBTOUT             0x20
 117 #define FLASH_OFFSET_ETOUT              0x21
 118 #define FLASH_OFFSET_CETOUT             0x22
 119 #define FLASH_OFFSET_WMAX_TOUT          0x23
 120 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 121 #define FLASH_OFFSET_EMAX_TOUT          0x25
 122 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 123 #define FLASH_OFFSET_SIZE               0x27
 124 #define FLASH_OFFSET_INTERFACE          0x28
 125 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 126 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 127 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 128 #define FLASH_OFFSET_PROTECT            0x02
 129 #define FLASH_OFFSET_USER_PROTECTION    0x85
 130 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 131
 132 #define CFI_CMDSET_NONE                 0
 133 #define CFI_CMDSET_INTEL_EXTENDED       1
 134 #define CFI_CMDSET_AMD_STANDARD         2
 135 #define CFI_CMDSET_INTEL_STANDARD       3
 136 #define CFI_CMDSET_AMD_EXTENDED         4
 137 #define CFI_CMDSET_MITSU_STANDARD       256
 138 #define CFI_CMDSET_MITSU_EXTENDED       257
 139 #define CFI_CMDSET_SST                  258
 140
 141 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 142 # undef  FLASH_CMD_RESET
 143 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 144 #endif
 145
 146 typedef union {
 147         unsigned char c;
 148         unsigned short w;
 149         unsigned long l;
 150         unsigned long long ll;
 151 } cfiword_t;
 152
 153 typedef union {
 154         volatile unsigned char *cp;
 155         volatile unsigned short *wp;
 156         volatile unsigned long *lp;
 157         volatile unsigned long long *llp;
 158 } cfiptr_t;
 159
 160 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 161
 162 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
 163
 164 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 165 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 166 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 167 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 168 #else
 169 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 170 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 171 #endif
 172
 173 /*
 174  * Check if chip width is defined. If not, start detecting with 8bit.
 175  */
 176 #ifndef CFG_FLASH_CFI_WIDTH
 177 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 178 #endif
 179
 180
 181 /*-----------------------------------------------------------------------
 182  * Functions
 183  */
 184
 185 typedef unsigned long flash_sect_t;
 186
 187 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 188 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 189 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 190 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 191 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 192 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 193 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 194 static void flash_read_jedec_ids (flash_info_t * info);
 195 static int flash_detect_cfi (flash_info_t * info);
 196 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 197 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 198                                     ulong tout, char *prompt);
 199 ulong flash_get_size (ulong base, int banknum);
 200 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 201 static flash_info_t *flash_get_info(ulong base);
 202 #endif
 203 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 204 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 205 #endif
 206
 207 /*-----------------------------------------------------------------------
 208  * create an address based on the offset and the port width
 209  */
 210 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 211 {
 212         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 213 }
 214
 215 #ifdef DEBUG
 216 /*-----------------------------------------------------------------------
 217  * Debug support
 218  */
 219 void print_longlong (char *str, unsigned long long data)
 220 {
 221         int i;
 222         char *cp;
 223
 224         cp = (unsigned char *) &data;
 225         for (i = 0; i < 8; i++)
 226                 sprintf (&str[i * 2], "%2.2x", *cp++);
 227 }
 228 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 229 {
 230         cfiptr_t cptr;
 231         int x, y;
 232
 233         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 234                 cptr.cp =
 235                         flash_make_addr (info, sect,
 236                                          x + FLASH_OFFSET_CFI_RESP);
 237                 debug ("%p : ", cptr.cp);
 238                 for (y = 0; y < 16; y++) {
 239                         debug ("%2.2x ", cptr.cp[y]);
 240                 }
 241                 debug (" ");
 242                 for (y = 0; y < 16; y++) {
 243                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 244                                 debug ("%c", cptr.cp[y]);
 245                         } else {
 246                                 debug (".");
 247                         }
 248                 }
 249                 debug ("\n");
 250         }
 251 }
 252 #endif
 253
 254
 255 /*-----------------------------------------------------------------------
 256  * read a character at a port width address
 257  */
 258 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 259 {
 260         uchar *cp;
 261
 262         cp = flash_make_addr (info, 0, offset);
 263 #if defined(__LITTLE_ENDIAN)
 264         return (cp[0]);
 265 #else
 266         return (cp[info->portwidth - 1]);
 267 #endif
 268 }
 269
 270 /*-----------------------------------------------------------------------
 271  * read a short word by swapping for ppc format.
 272  */
 273 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 274 {
 275         uchar *addr;
 276         ushort retval;
 277
 278 #ifdef DEBUG
 279         int x;
 280 #endif
 281         addr = flash_make_addr (info, sect, offset);
 282
 283 #ifdef DEBUG
 284         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 285                info->portwidth);
 286         for (x = 0; x < 2 * info->portwidth; x++) {
 287                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 288         }
 289 #endif
 290 #if defined(__LITTLE_ENDIAN)
 291         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 292 #else
 293         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 294                   addr[info->portwidth - 1]);
 295 #endif
 296
 297         debug ("retval = 0x%x\n", retval);
 298         return retval;
 299 }
 300
 301 /*-----------------------------------------------------------------------
 302  * read a long word by picking the least significant byte of each maximum
 303  * port size word. Swap for ppc format.
 304  */
 305 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 306 {
 307         uchar *addr;
 308         ulong retval;
 309
 310 #ifdef DEBUG
 311         int x;
 312 #endif
 313         addr = flash_make_addr (info, sect, offset);
 314
 315 #ifdef DEBUG
 316         debug ("long addr is at %p info->portwidth = %d\n", addr,
 317                info->portwidth);
 318         for (x = 0; x < 4 * info->portwidth; x++) {
 319                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 320         }
 321 #endif
 322 #if defined(__LITTLE_ENDIAN)
 323         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 324                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 325 #else
 326         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 327                 (addr[(info->portwidth) - 1] << 16) |
 328                 (addr[(4 * info->portwidth) - 1] << 8) |
 329                 addr[(3 * info->portwidth) - 1];
 330 #endif
 331         return retval;
 332 }
 333
 334
 335 /*-----------------------------------------------------------------------
 336  */
 337 unsigned long flash_init (void)
 338 {
 339         unsigned long size = 0;
 340         int i;
 341
 342 #ifdef CFG_FLASH_PROTECTION
 343         char *s = getenv("unlock");
 344 #endif
 345
 346         /* Init: no FLASHes known */
 347         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 348                 flash_info[i].flash_id = FLASH_UNKNOWN;
 349                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 350                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 351 #ifndef CFG_FLASH_QUIET_TEST
 352                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 353                                 i+1, flash_info[i].size, flash_info[i].size << 20);
 354 #endif /* CFG_FLASH_QUIET_TEST */
 355                 }
 356 #ifdef CFG_FLASH_PROTECTION
 357                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 358                         /*
 359                          * Only the U-Boot image and it's environment is protected,
 360                          * all other sectors are unprotected (unlocked) if flash
 361                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 362                          * the environment variable "unlock" is set to "yes".
 363                          */
 364                         if (flash_info[i].legacy_unlock) {
 365                                 int k;
 366
 367                                 /*
 368                                  * Disable legacy_unlock temporarily, since
 369                                  * flash_real_protect would relock all other sectors
 370                                  * again otherwise.
 371                                  */
 372                                 flash_info[i].legacy_unlock = 0;
 373
 374                                 /*
 375                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 376                                  * sector. This will unlock all sectors.
 377                                  */
 378                                 flash_real_protect (&flash_info[i], 0, 0);
 379
 380                                 flash_info[i].legacy_unlock = 1;
 381
 382                                 /*
 383                                  * Manually mark other sectors as unlocked (unprotected)
 384                                  */
 385                                 for (k = 1; k < flash_info[i].sector_count; k++)
 386                                         flash_info[i].protect[k] = 0;
 387                         } else {
 388                                 /*
 389                                  * No legancy unlocking -> unlock all sectors
 390                                  */
 391                                 flash_protect (FLAG_PROTECT_CLEAR,
 392                                                flash_info[i].start[0],
 393                                                flash_info[i].start[0] + flash_info[i].size - 1,
 394                                                &flash_info[i]);
 395                         }
 396                 }
 397 #endif /* CFG_FLASH_PROTECTION */
 398         }
 399
 400         /* Monitor protection ON by default */
 401 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 402         flash_protect (FLAG_PROTECT_SET,
 403                        CFG_MONITOR_BASE,
 404                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 405                        flash_get_info(CFG_MONITOR_BASE));
 406 #endif
 407
 408         /* Environment protection ON by default */
 409 #ifdef CFG_ENV_IS_IN_FLASH
 410         flash_protect (FLAG_PROTECT_SET,
 411                        CFG_ENV_ADDR,
 412                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 413                        flash_get_info(CFG_ENV_ADDR));
 414 #endif
 415
 416         /* Redundant environment protection ON by default */
 417 #ifdef CFG_ENV_ADDR_REDUND
 418         flash_protect (FLAG_PROTECT_SET,
 419                        CFG_ENV_ADDR_REDUND,
 420                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 421                        flash_get_info(CFG_ENV_ADDR_REDUND));
 422 #endif
 423         return (size);
 424 }
 425
 426 /*-----------------------------------------------------------------------
 427  */
 428 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 429 static flash_info_t *flash_get_info(ulong base)
 430 {
 431         int i;
 432         flash_info_t * info = 0;
 433
 434         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 435                 info = & flash_info[i];
 436                 if (info->size && info->start[0] <= base &&
 437                     base <= info->start[0] + info->size - 1)
 438                         break;
 439         }
 440
 441         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 442 }
 443 #endif
 444
 445 /*-----------------------------------------------------------------------
 446  */
 447 int flash_erase (flash_info_t * info, int s_first, int s_last)
 448 {
 449         int rcode = 0;
 450         int prot;
 451         flash_sect_t sect;
 452
 453         if (info->flash_id != FLASH_MAN_CFI) {
 454                 puts ("Can't erase unknown flash type - aborted\n");
 455                 return 1;
 456         }
 457         if ((s_first < 0) || (s_first > s_last)) {
 458                 puts ("- no sectors to erase\n");
 459                 return 1;
 460         }
 461
 462         prot = 0;
 463         for (sect = s_first; sect <= s_last; ++sect) {
 464                 if (info->protect[sect]) {
 465                         prot++;
 466                 }
 467         }
 468         if (prot) {
 469                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 470         } else {
 471                 putc ('\n');
 472         }
 473
 474
 475         for (sect = s_first; sect <= s_last; sect++) {
 476                 if (info->protect[sect] == 0) { /* not protected */
 477                         switch (info->vendor) {
 478                         case CFI_CMDSET_INTEL_STANDARD:
 479                         case CFI_CMDSET_INTEL_EXTENDED:
 480                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 481                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 482                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 483                                 break;
 484                         case CFI_CMDSET_AMD_STANDARD:
 485                         case CFI_CMDSET_AMD_EXTENDED:
 486                                 flash_unlock_seq (info, sect);
 487                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 488                                                         AMD_CMD_ERASE_START);
 489                                 flash_unlock_seq (info, sect);
 490                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 491                                 break;
 492                         default:
 493                                 debug ("Unkown flash vendor %d\n",
 494                                        info->vendor);
 495                                 break;
 496                         }
 497
 498                         if (flash_full_status_check
 499                             (info, sect, info->erase_blk_tout, "erase")) {
 500                                 rcode = 1;
 501                         } else
 502                                 putc ('.');
 503                 }
 504         }
 505         puts (" done\n");
 506         return rcode;
 507 }
 508
 509 /*-----------------------------------------------------------------------
 510  */
 511 void flash_print_info (flash_info_t * info)
 512 {
 513         int i;
 514
 515         if (info->flash_id != FLASH_MAN_CFI) {
 516                 puts ("missing or unknown FLASH type\n");
 517                 return;
 518         }
 519
 520         printf ("CFI conformant FLASH (%d x %d)",
 521                 (info->portwidth << 3), (info->chipwidth << 3));
 522         printf ("  Size: %ld MB in %d Sectors\n",
 523                 info->size >> 20, info->sector_count);
 524         printf ("  ");
 525         switch (info->vendor) {
 526                 case CFI_CMDSET_INTEL_STANDARD:
 527                         printf ("Intel Standard");
 528                         break;
 529                 case CFI_CMDSET_INTEL_EXTENDED:
 530                         printf ("Intel Extended");
 531                         break;
 532                 case CFI_CMDSET_AMD_STANDARD:
 533                         printf ("AMD Standard");
 534                         break;
 535                 case CFI_CMDSET_AMD_EXTENDED:
 536                         printf ("AMD Extended");
 537                         break;
 538                 default:
 539                         printf ("Unknown (%d)", info->vendor);
 540                         break;
 541         }
 542         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
 543                 info->manufacturer_id, info->device_id);
 544         if (info->device_id == 0x7E) {
 545                 printf("%04X", info->device_id2);
 546         }
 547         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 548                 info->erase_blk_tout,
 549                 info->write_tout);
 550         if (info->buffer_size > 1) {
 551                 printf ("  Buffer write timeout: %ld ms, buffer size: %d bytes\n",
 552                 info->buffer_write_tout,
 553                 info->buffer_size);
 554         }
 555
 556         puts ("\n  Sector Start Addresses:");
 557         for (i = 0; i < info->sector_count; ++i) {
 558                 if ((i % 5) == 0)
 559                         printf ("\n");
 560 #ifdef CFG_FLASH_EMPTY_INFO
 561                 int k;
 562                 int size;
 563                 int erased;
 564                 volatile unsigned long *flash;
 565
 566                 /*
 567                  * Check if whole sector is erased
 568                  */
 569                 if (i != (info->sector_count - 1))
 570                         size = info->start[i + 1] - info->start[i];
 571                 else
 572                         size = info->start[0] + info->size - info->start[i];
 573                 erased = 1;
 574                 flash = (volatile unsigned long *) info->start[i];
 575                 size = size >> 2;       /* divide by 4 for longword access */
 576                 for (k = 0; k < size; k++) {
 577                         if (*flash++ != 0xffffffff) {
 578                                 erased = 0;
 579                                 break;
 580                         }
 581                 }
 582
 583                 /* print empty and read-only info */
 584                 printf ("  %08lX %c %s ",
 585                         info->start[i],
 586                         erased ? 'E' : ' ',
 587                         info->protect[i] ? "RO" : "  ");
 588 #else   /* ! CFG_FLASH_EMPTY_INFO */
 589                 printf ("  %08lX   %s ",
 590                         info->start[i],
 591                         info->protect[i] ? "RO" : "  ");
 592 #endif
 593         }
 594         putc ('\n');
 595         return;
 596 }
 597
 598 /*-----------------------------------------------------------------------
 599  * Copy memory to flash, returns:
 600  * 0 - OK
 601  * 1 - write timeout
 602  * 2 - Flash not erased
 603  */
 604 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 605 {
 606         ulong wp;
 607         ulong cp;
 608         int aln;
 609         cfiword_t cword;
 610         int i, rc;
 611
 612 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 613         int buffered_size;
 614 #endif
 615         /* get lower aligned address */
 616         /* get lower aligned address */
 617         wp = (addr & ~(info->portwidth - 1));
 618
 619         /* handle unaligned start */
 620         if ((aln = addr - wp) != 0) {
 621                 cword.l = 0;
 622                 cp = wp;
 623                 for (i = 0; i < aln; ++i, ++cp)
 624                         flash_add_byte (info, &cword, (*(uchar *) cp));
 625
 626                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 627                         flash_add_byte (info, &cword, *src++);
 628                         cnt--;
 629                         cp++;
 630                 }
 631                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 632                         flash_add_byte (info, &cword, (*(uchar *) cp));
 633                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 634                         return rc;
 635                 wp = cp;
 636         }
 637
 638         /* handle the aligned part */
 639 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 640         buffered_size = (info->portwidth / info->chipwidth);
 641         buffered_size *= info->buffer_size;
 642         while (cnt >= info->portwidth) {
 643                 /* prohibit buffer write when buffer_size is 1 */
 644                 if (info->buffer_size == 1) {
 645                         cword.l = 0;
 646                         for (i = 0; i < info->portwidth; i++)
 647                                 flash_add_byte (info, &cword, *src++);
 648                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 649                                 return rc;
 650                         wp += info->portwidth;
 651                         cnt -= info->portwidth;
 652                         continue;
 653                 }
 654
 655                 /* write buffer until next buffered_size aligned boundary */
 656                 i = buffered_size - (wp % buffered_size);
 657                 if (i > cnt)
 658                         i = cnt;
 659                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 660                         return rc;
 661                 i -= i & (info->portwidth - 1);
 662                 wp += i;
 663                 src += i;
 664                 cnt -= i;
 665         }
 666 #else
 667         while (cnt >= info->portwidth) {
 668                 cword.l = 0;
 669                 for (i = 0; i < info->portwidth; i++) {
 670                         flash_add_byte (info, &cword, *src++);
 671                 }
 672                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 673                         return rc;
 674                 wp += info->portwidth;
 675                 cnt -= info->portwidth;
 676         }
 677 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 678         if (cnt == 0) {
 679                 return (0);
 680         }
 681
 682         /*
 683          * handle unaligned tail bytes
 684          */
 685         cword.l = 0;
 686         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 687                 flash_add_byte (info, &cword, *src++);
 688                 --cnt;
 689         }
 690         for (; i < info->portwidth; ++i, ++cp) {
 691                 flash_add_byte (info, &cword, (*(uchar *) cp));
 692         }
 693
 694         return flash_write_cfiword (info, wp, cword);
 695 }
 696
 697 /*-----------------------------------------------------------------------
 698  */
 699 #ifdef CFG_FLASH_PROTECTION
 700
 701 int flash_real_protect (flash_info_t * info, long sector, int prot)
 702 {
 703         int retcode = 0;
 704
 705         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 706         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 707         if (prot)
 708                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 709         else
 710                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 711
 712         if ((retcode =
 713              flash_full_status_check (info, sector, info->erase_blk_tout,
 714                                       prot ? "protect" : "unprotect")) == 0) {
 715
 716                 info->protect[sector] = prot;
 717
 718                 /*
 719                  * On some of Intel's flash chips (marked via legacy_unlock)
 720                  * unprotect unprotects all locking.
 721                  */
 722                 if ((prot == 0) && (info->legacy_unlock)) {
 723                         flash_sect_t i;
 724
 725                         for (i = 0; i < info->sector_count; i++) {
 726                                 if (info->protect[i])
 727                                         flash_real_protect (info, i, 1);
 728                         }
 729                 }
 730         }
 731         return retcode;
 732 }
 733
 734 /*-----------------------------------------------------------------------
 735  * flash_read_user_serial - read the OneTimeProgramming cells
 736  */
 737 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 738                              int len)
 739 {
 740         uchar *src;
 741         uchar *dst;
 742
 743         dst = buffer;
 744         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 745         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 746         memcpy (dst, src + offset, len);
 747         flash_write_cmd (info, 0, 0, info->cmd_reset);
 748 }
 749
 750 /*
 751  * flash_read_factory_serial - read the device Id from the protection area
 752  */
 753 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 754                                 int len)
 755 {
 756         uchar *src;
 757
 758         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 759         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 760         memcpy (buffer, src + offset, len);
 761         flash_write_cmd (info, 0, 0, info->cmd_reset);
 762 }
 763
 764 #endif /* CFG_FLASH_PROTECTION */
 765
 766 /*
 767  * flash_is_busy - check to see if the flash is busy
 768  * This routine checks the status of the chip and returns true if the chip is busy
 769  */
 770 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 771 {
 772         int retval;
 773
 774         switch (info->vendor) {
 775         case CFI_CMDSET_INTEL_STANDARD:
 776         case CFI_CMDSET_INTEL_EXTENDED:
 777                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 778                 break;
 779         case CFI_CMDSET_AMD_STANDARD:
 780         case CFI_CMDSET_AMD_EXTENDED:
 781                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 782                 break;
 783         default:
 784                 retval = 0;
 785         }
 786         debug ("flash_is_busy: %d\n", retval);
 787         return retval;
 788 }
 789
 790 /*-----------------------------------------------------------------------
 791  *  wait for XSR.7 to be set. Time out with an error if it does not.
 792  *  This routine does not set the flash to read-array mode.
 793  */
 794 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 795                                ulong tout, char *prompt)
 796 {
 797         ulong start;
 798
 799 #if CFG_HZ != 1000
 800         tout *= CFG_HZ/1000;
 801 #endif
 802
 803         /* Wait for command completion */
 804         start = get_timer (0);
 805         while (flash_is_busy (info, sector)) {
 806                 if (get_timer (start) > tout) {
 807                         printf ("Flash %s timeout at address %lx data %lx\n",
 808                                 prompt, info->start[sector],
 809                                 flash_read_long (info, sector, 0));
 810                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 811                         return ERR_TIMOUT;
 812                 }
 813                 udelay (1);             /* also triggers watchdog */
 814         }
 815         return ERR_OK;
 816 }
 817
 818 /*-----------------------------------------------------------------------
 819  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 820  * This routine sets the flash to read-array mode.
 821  */
 822 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 823                                     ulong tout, char *prompt)
 824 {
 825         int retcode;
 826
 827         retcode = flash_status_check (info, sector, tout, prompt);
 828         switch (info->vendor) {
 829         case CFI_CMDSET_INTEL_EXTENDED:
 830         case CFI_CMDSET_INTEL_STANDARD:
 831                 if ((retcode == ERR_OK)
 832                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 833                         retcode = ERR_INVAL;
 834                         printf ("Flash %s error at address %lx\n", prompt,
 835                                 info->start[sector]);
 836                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 837                                 puts ("Command Sequence Error.\n");
 838                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 839                                 puts ("Block Erase Error.\n");
 840                                 retcode = ERR_NOT_ERASED;
 841                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 842                                 puts ("Locking Error\n");
 843                         }
 844                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 845                                 puts ("Block locked.\n");
 846                                 retcode = ERR_PROTECTED;
 847                         }
 848                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 849                                 puts ("Vpp Low Error.\n");
 850                 }
 851                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 852                 break;
 853         default:
 854                 break;
 855         }
 856         return retcode;
 857 }
 858
 859 /*-----------------------------------------------------------------------
 860  */
 861 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 862 {
 863 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
 864         unsigned short  w;
 865         unsigned int    l;
 866         unsigned long long ll;
 867 #endif
 868
 869         switch (info->portwidth) {
 870         case FLASH_CFI_8BIT:
 871                 cword->c = c;
 872                 break;
 873         case FLASH_CFI_16BIT:
 874 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
 875                 w = c;
 876                 w <<= 8;
 877                 cword->w = (cword->w >> 8) | w;
 878 #else
 879                 cword->w = (cword->w << 8) | c;
 880 #endif
 881                 break;
 882         case FLASH_CFI_32BIT:
 883 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
 884                 l = c;
 885                 l <<= 24;
 886                 cword->l = (cword->l >> 8) | l;
 887 #else
 888                 cword->l = (cword->l << 8) | c;
 889 #endif
 890                 break;
 891         case FLASH_CFI_64BIT:
 892 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SOLIDCARD3)
 893                 ll = c;
 894                 ll <<= 56;
 895                 cword->ll = (cword->ll >> 8) | ll;
 896 #else
 897                 cword->ll = (cword->ll << 8) | c;
 898 #endif
 899                 break;
 900         }
 901 }
 902
 903
 904 /*-----------------------------------------------------------------------
 905  * make a proper sized command based on the port and chip widths
 906  */
 907 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 908 {
 909         int i;
 910         uchar *cp = (uchar *) cmdbuf;
 911
 912 #if defined(__LITTLE_ENDIAN)
 913         for (i = info->portwidth; i > 0; i--)
 914 #else
 915         for (i = 1; i <= info->portwidth; i++)
 916 #endif
 917                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 918 }
 919
 920 /*
 921  * Write a proper sized command to the correct address
 922  */
 923 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 924 {
 925
 926         volatile cfiptr_t addr;
 927         cfiword_t cword;
 928
 929         addr.cp = flash_make_addr (info, sect, offset);
 930         flash_make_cmd (info, cmd, &cword);
 931         switch (info->portwidth) {
 932         case FLASH_CFI_8BIT:
 933                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 934                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 935                 *addr.cp = cword.c;
 936 #ifdef CONFIG_BLACKFIN
 937                 asm("ssync;");
 938 #endif
 939                 break;
 940         case FLASH_CFI_16BIT:
 941                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 942                        cmd, cword.w,
 943                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 944                 *addr.wp = cword.w;
 945 #ifdef CONFIG_BLACKFIN
 946                 asm("ssync;");
 947 #endif
 948                 break;
 949         case FLASH_CFI_32BIT:
 950                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 951                        cmd, cword.l,
 952                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 953                 *addr.lp = cword.l;
 954 #ifdef CONFIG_BLACKFIN
 955                 asm("ssync;");
 956 #endif
 957                 break;
 958         case FLASH_CFI_64BIT:
 959 #ifdef DEBUG
 960                 {
 961                         char str[20];
 962
 963                         print_longlong (str, cword.ll);
 964
 965                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 966                                addr.llp, cmd, str,
 967                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 968                 }
 969 #endif
 970                 *addr.llp = cword.ll;
 971 #ifdef CONFIG_BLACKFIN
 972                 asm("ssync;");
 973 #endif
 974                 break;
 975         }
 976 }
 977
 978 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 979 {
 980         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 981         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 982 }
 983
 984 /*-----------------------------------------------------------------------
 985  */
 986 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 987 {
 988         cfiptr_t cptr;
 989         cfiword_t cword;
 990         int retval;
 991
 992         cptr.cp = flash_make_addr (info, sect, offset);
 993         flash_make_cmd (info, cmd, &cword);
 994
 995         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 996         switch (info->portwidth) {
 997         case FLASH_CFI_8BIT:
 998                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 999                 retval = (cptr.cp[0] == cword.c);
1000                 break;
1001         case FLASH_CFI_16BIT:
1002                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1003                 retval = (cptr.wp[0] == cword.w);
1004                 break;
1005         case FLASH_CFI_32BIT:
1006                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1007                 retval = (cptr.lp[0] == cword.l);
1008                 break;
1009         case FLASH_CFI_64BIT:
1010 #ifdef DEBUG
1011                 {
1012                         char str1[20];
1013                         char str2[20];
1014
1015                         print_longlong (str1, cptr.llp[0]);
1016                         print_longlong (str2, cword.ll);
1017                         debug ("is= %s %s\n", str1, str2);
1018                 }
1019 #endif
1020                 retval = (cptr.llp[0] == cword.ll);
1021                 break;
1022         default:
1023                 retval = 0;
1024                 break;
1025         }
1026         return retval;
1027 }
1028
1029 /*-----------------------------------------------------------------------
1030  */
1031 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1032 {
1033         cfiptr_t cptr;
1034         cfiword_t cword;
1035         int retval;
1036
1037         cptr.cp = flash_make_addr (info, sect, offset);
1038         flash_make_cmd (info, cmd, &cword);
1039         switch (info->portwidth) {
1040         case FLASH_CFI_8BIT:
1041                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1042                 break;
1043         case FLASH_CFI_16BIT:
1044                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1045                 break;
1046         case FLASH_CFI_32BIT:
1047                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1048                 break;
1049         case FLASH_CFI_64BIT:
1050                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1051                 break;
1052         default:
1053                 retval = 0;
1054                 break;
1055         }
1056         return retval;
1057 }
1058
1059 /*-----------------------------------------------------------------------
1060  */
1061 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1062 {
1063         cfiptr_t cptr;
1064         cfiword_t cword;
1065         int retval;
1066
1067         cptr.cp = flash_make_addr (info, sect, offset);
1068         flash_make_cmd (info, cmd, &cword);
1069         switch (info->portwidth) {
1070         case FLASH_CFI_8BIT:
1071                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1072                 break;
1073         case FLASH_CFI_16BIT:
1074                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1075                 break;
1076         case FLASH_CFI_32BIT:
1077                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1078                 break;
1079         case FLASH_CFI_64BIT:
1080                 retval = ((cptr.llp[0] & cword.ll) !=
1081                           (cptr.llp[0] & cword.ll));
1082                 break;
1083         default:
1084                 retval = 0;
1085                 break;
1086         }
1087         return retval;
1088 }
1089
1090 /*-----------------------------------------------------------------------
1091  * read jedec ids from device and set corresponding fields in info struct
1092  *
1093  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1094  *
1095 */
1096 static void flash_read_jedec_ids (flash_info_t * info)
1097 {
1098         info->manufacturer_id = 0;
1099         info->device_id       = 0;
1100         info->device_id2      = 0;
1101
1102         switch (info->vendor) {
1103         case CFI_CMDSET_INTEL_STANDARD:
1104         case CFI_CMDSET_INTEL_EXTENDED:
1105                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1106                 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1107                 udelay(1000); /* some flash are slow to respond */
1108                 info->manufacturer_id = flash_read_uchar (info,
1109                                                 FLASH_OFFSET_MANUFACTURER_ID);
1110                 info->device_id = flash_read_uchar (info,
1111                                                 FLASH_OFFSET_DEVICE_ID);
1112                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1113                 break;
1114         case CFI_CMDSET_AMD_STANDARD:
1115         case CFI_CMDSET_AMD_EXTENDED:
1116                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1117                 flash_unlock_seq(info, 0);
1118                 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1119                 udelay(1000); /* some flash are slow to respond */
1120                 info->manufacturer_id = flash_read_uchar (info,
1121                                                 FLASH_OFFSET_MANUFACTURER_ID);
1122                 info->device_id = flash_read_uchar (info,
1123                                                 FLASH_OFFSET_DEVICE_ID);
1124                 if (info->device_id == 0x7E) {
1125                         /* AMD 3-byte (expanded) device ids */
1126                         info->device_id2 = flash_read_uchar (info,
1127                                                 FLASH_OFFSET_DEVICE_ID2);
1128                         info->device_id2 <<= 8;
1129                         info->device_id2 |= flash_read_uchar (info,
1130                                                 FLASH_OFFSET_DEVICE_ID3);
1131                 }
1132                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1133                 break;
1134         default:
1135                 break;
1136         }
1137 }
1138
1139 /*-----------------------------------------------------------------------
1140  * detect if flash is compatible with the Common Flash Interface (CFI)
1141  * http://www.jedec.org/download/search/jesd68.pdf
1142  *
1143 */
1144 static int flash_detect_cfi (flash_info_t * info)
1145 {
1146         int cfi_offset;
1147         debug ("flash detect cfi\n");
1148
1149         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1150              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1151                 for (info->chipwidth = FLASH_CFI_BY8;
1152                      info->chipwidth <= info->portwidth;
1153                      info->chipwidth <<= 1) {
1154                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1155                         for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1156                                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1157                                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1158                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1159                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1160                                         info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1161                                         info->cfi_offset=flash_offset_cfi[cfi_offset];
1162                                         debug ("device interface is %d\n",
1163                                                 info->interface);
1164                                         debug ("found port %d chip %d ",
1165                                                 info->portwidth, info->chipwidth);
1166                                         debug ("port %d bits chip %d bits\n",
1167                                                 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1168                                                 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1169                                         return 1;
1170                                 }
1171                         }
1172                 }
1173         }
1174         debug ("not found\n");
1175         return 0;
1176 }
1177
1178 /*
1179  * The following code cannot be run from FLASH!
1180  *
1181  */
1182 ulong flash_get_size (ulong base, int banknum)
1183 {
1184         flash_info_t *info = &flash_info[banknum];
1185         int i, j;
1186         flash_sect_t sect_cnt;
1187         unsigned long sector;
1188         unsigned long tmp;
1189         int size_ratio;
1190         uchar num_erase_regions;
1191         int erase_region_size;
1192         int erase_region_count;
1193         int geometry_reversed = 0;
1194
1195         info->ext_addr = 0;
1196         info->cfi_version = 0;
1197 #ifdef CFG_FLASH_PROTECTION
1198         info->legacy_unlock = 0;
1199 #endif
1200
1201         info->start[0] = base;
1202
1203         if (flash_detect_cfi (info)) {
1204                 info->vendor = flash_read_ushort (info, 0,
1205                                         FLASH_OFFSET_PRIMARY_VENDOR);
1206                 flash_read_jedec_ids (info);
1207                 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1208                 num_erase_regions = flash_read_uchar (info,
1209                                         FLASH_OFFSET_NUM_ERASE_REGIONS);
1210                 info->ext_addr = flash_read_ushort (info, 0,
1211                                         FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1212                 if (info->ext_addr) {
1213                         info->cfi_version = (ushort) flash_read_uchar (info,
1214                                                 info->ext_addr + 3) << 8;
1215                         info->cfi_version |= (ushort) flash_read_uchar (info,
1216                                                 info->ext_addr + 4);
1217                 }
1218 #ifdef DEBUG
1219                 flash_printqry (info, 0);
1220 #endif
1221                 switch (info->vendor) {
1222                 case CFI_CMDSET_INTEL_STANDARD:
1223                 case CFI_CMDSET_INTEL_EXTENDED:
1224                 default:
1225                         info->cmd_reset = FLASH_CMD_RESET;
1226 #ifdef CFG_FLASH_PROTECTION
1227                         /* read legacy lock/unlock bit from intel flash */
1228                         if (info->ext_addr) {
1229                                 info->legacy_unlock = flash_read_uchar (info,
1230                                                 info->ext_addr + 5) & 0x08;
1231                         }
1232 #endif
1233                         break;
1234                 case CFI_CMDSET_AMD_STANDARD:
1235                 case CFI_CMDSET_AMD_EXTENDED:
1236                         info->cmd_reset = AMD_CMD_RESET;
1237                         /* check if flash geometry needs reversal */
1238                         if (num_erase_regions <= 1)
1239                                 break;
1240                         /* reverse geometry if top boot part */
1241                         if (info->cfi_version < 0x3131) {
1242                                 /* CFI < 1.1, try to guess from device id */
1243                                 if ((info->device_id & 0x80) != 0) {
1244                                         geometry_reversed = 1;
1245                                 }
1246                                 break;
1247                         }
1248                         /* CFI >= 1.1, deduct from top/bottom flag */
1249                         /* note: ext_addr is valid since cfi_version > 0 */
1250                         if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1251                                 geometry_reversed = 1;
1252                         }
1253                         break;
1254                 }
1255
1256                 debug ("manufacturer is %d\n", info->vendor);
1257                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1258                 debug ("device id is 0x%x\n", info->device_id);
1259                 debug ("device id2 is 0x%x\n", info->device_id2);
1260                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1261
1262                 size_ratio = info->portwidth / info->chipwidth;
1263                 /* if the chip is x8/x16 reduce the ratio by half */
1264                 if ((info->interface == FLASH_CFI_X8X16)
1265                     && (info->chipwidth == FLASH_CFI_BY8)) {
1266                         size_ratio >>= 1;
1267                 }
1268                 debug ("size_ratio %d port %d bits chip %d bits\n",
1269                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1270                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1271                 debug ("found %d erase regions\n", num_erase_regions);
1272                 sect_cnt = 0;
1273                 sector = base;
1274                 for (i = 0; i < num_erase_regions; i++) {
1275                         if (i > NUM_ERASE_REGIONS) {
1276                                 printf ("%d erase regions found, only %d used\n",
1277                                         num_erase_regions, NUM_ERASE_REGIONS);
1278                                 break;
1279                         }
1280                         if (geometry_reversed)
1281                                 tmp = flash_read_long (info, 0,
1282                                                FLASH_OFFSET_ERASE_REGIONS +
1283                                                (num_erase_regions - 1 - i) * 4);
1284                         else
1285                                 tmp = flash_read_long (info, 0,
1286                                                FLASH_OFFSET_ERASE_REGIONS +
1287                                                i * 4);
1288                         erase_region_size =
1289                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1290                         tmp >>= 16;
1291                         erase_region_count = (tmp & 0xffff) + 1;
1292                         debug ("erase_region_count = %d erase_region_size = %d\n",
1293                                 erase_region_count, erase_region_size);
1294                         for (j = 0; j < erase_region_count; j++) {
1295                                 info->start[sect_cnt] = sector;
1296                                 sector += (erase_region_size * size_ratio);
1297
1298                                 /*
1299                                  * Only read protection status from supported devices (intel...)
1300                                  */
1301                                 switch (info->vendor) {
1302                                 case CFI_CMDSET_INTEL_EXTENDED:
1303                                 case CFI_CMDSET_INTEL_STANDARD:
1304                                         info->protect[sect_cnt] =
1305                                                 flash_isset (info, sect_cnt,
1306                                                              FLASH_OFFSET_PROTECT,
1307                                                              FLASH_STATUS_PROTECT);
1308                                         break;
1309                                 default:
1310                                         info->protect[sect_cnt] = 0; /* default: not protected */
1311                                 }
1312
1313                                 sect_cnt++;
1314                         }
1315                 }
1316
1317                 info->sector_count = sect_cnt;
1318                 /* multiply the size by the number of chips */
1319                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1320                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1321                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1322                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1323                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1324                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1325                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1326                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1327                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1328                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1329                 info->flash_id = FLASH_MAN_CFI;
1330                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1331                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1332                 }
1333         }
1334
1335         flash_write_cmd (info, 0, 0, info->cmd_reset);
1336         return (info->size);
1337 }
1338
1339 /* loop through the sectors from the highest address
1340  * when the passed address is greater or equal to the sector address
1341  * we have a match
1342  */
1343 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1344 {
1345         flash_sect_t sector;
1346
1347         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1348                 if (addr >= info->start[sector])
1349                         break;
1350         }
1351         return sector;
1352 }
1353
1354 /*-----------------------------------------------------------------------
1355  */
1356 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1357                                 cfiword_t cword)
1358 {
1359         cfiptr_t ctladdr;
1360         cfiptr_t cptr;
1361         int flag;
1362
1363         ctladdr.cp = flash_make_addr (info, 0, 0);
1364         cptr.cp = (uchar *) dest;
1365
1366         /* Check if Flash is (sufficiently) erased */
1367         switch (info->portwidth) {
1368         case FLASH_CFI_8BIT:
1369                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1370                 break;
1371         case FLASH_CFI_16BIT:
1372                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1373                 break;
1374         case FLASH_CFI_32BIT:
1375                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1376                 break;
1377         case FLASH_CFI_64BIT:
1378                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1379                 break;
1380         default:
1381                 return 2;
1382         }
1383         if (!flag)
1384                 return 2;
1385
1386         /* Disable interrupts which might cause a timeout here */
1387         flag = disable_interrupts ();
1388
1389         switch (info->vendor) {
1390         case CFI_CMDSET_INTEL_EXTENDED:
1391         case CFI_CMDSET_INTEL_STANDARD:
1392                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1393                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1394                 break;
1395         case CFI_CMDSET_AMD_EXTENDED:
1396         case CFI_CMDSET_AMD_STANDARD:
1397                 flash_unlock_seq (info, 0);
1398                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1399                 break;
1400         }
1401
1402         switch (info->portwidth) {
1403         case FLASH_CFI_8BIT:
1404                 cptr.cp[0] = cword.c;
1405                 break;
1406         case FLASH_CFI_16BIT:
1407                 cptr.wp[0] = cword.w;
1408                 break;
1409         case FLASH_CFI_32BIT:
1410                 cptr.lp[0] = cword.l;
1411                 break;
1412         case FLASH_CFI_64BIT:
1413                 cptr.llp[0] = cword.ll;
1414                 break;
1415         }
1416
1417         /* re-enable interrupts if necessary */
1418         if (flag)
1419                 enable_interrupts ();
1420
1421         return flash_full_status_check (info, find_sector (info, dest),
1422                                         info->write_tout, "write");
1423 }
1424
1425 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1426
1427 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1428                                   int len)
1429 {
1430         flash_sect_t sector;
1431         int cnt;
1432         int retcode;
1433         volatile cfiptr_t src;
1434         volatile cfiptr_t dst;
1435
1436         switch (info->vendor) {
1437         case CFI_CMDSET_INTEL_STANDARD:
1438         case CFI_CMDSET_INTEL_EXTENDED:
1439                 src.cp = cp;
1440                 dst.cp = (uchar *) dest;
1441                 sector = find_sector (info, dest);
1442                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1443                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1444                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1445                                                    "write to buffer")) == ERR_OK) {
1446                         /* reduce the number of loops by the width of the port  */
1447                         switch (info->portwidth) {
1448                         case FLASH_CFI_8BIT:
1449                                 cnt = len;
1450                                 break;
1451                         case FLASH_CFI_16BIT:
1452                                 cnt = len >> 1;
1453                                 break;
1454                         case FLASH_CFI_32BIT:
1455                                 cnt = len >> 2;
1456                                 break;
1457                         case FLASH_CFI_64BIT:
1458                                 cnt = len >> 3;
1459                                 break;
1460                         default:
1461                                 return ERR_INVAL;
1462                                 break;
1463                         }
1464                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1465                         while (cnt-- > 0) {
1466                                 switch (info->portwidth) {
1467                                 case FLASH_CFI_8BIT:
1468                                         *dst.cp++ = *src.cp++;
1469                                         break;
1470                                 case FLASH_CFI_16BIT:
1471                                         *dst.wp++ = *src.wp++;
1472                                         break;
1473                                 case FLASH_CFI_32BIT:
1474                                         *dst.lp++ = *src.lp++;
1475                                         break;
1476                                 case FLASH_CFI_64BIT:
1477                                         *dst.llp++ = *src.llp++;
1478                                         break;
1479                                 default:
1480                                         return ERR_INVAL;
1481                                         break;
1482                                 }
1483                         }
1484                         flash_write_cmd (info, sector, 0,
1485                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1486                         retcode = flash_full_status_check (info, sector,
1487                                                            info->buffer_write_tout,
1488                                                            "buffer write");
1489                 }
1490                 return retcode;
1491
1492         case CFI_CMDSET_AMD_STANDARD:
1493         case CFI_CMDSET_AMD_EXTENDED:
1494                 src.cp = cp;
1495                 dst.cp = (uchar *) dest;
1496                 sector = find_sector (info, dest);
1497
1498                 flash_unlock_seq(info,0);
1499                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1500
1501                 switch (info->portwidth) {
1502                 case FLASH_CFI_8BIT:
1503                         cnt = len;
1504                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1505                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1506                         break;
1507                 case FLASH_CFI_16BIT:
1508                         cnt = len >> 1;
1509                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1510                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1511                         break;
1512                 case FLASH_CFI_32BIT:
1513                         cnt = len >> 2;
1514                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1515                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1516                         break;
1517                 case FLASH_CFI_64BIT:
1518                         cnt = len >> 3;
1519                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1520                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1521                         break;
1522                 default:
1523                         return ERR_INVAL;
1524                 }
1525
1526                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1527                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1528                                                    "buffer write");
1529                 return retcode;
1530
1531         default:
1532                 debug ("Unknown Command Set\n");
1533                 return ERR_INVAL;
1534         }
1535 }
1536 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1537
1538 #if defined(CONFIG_SOLIDCARD3)
1539 #undef __LITTLE_ENDIAN
1540 #endif
1541
1542 #endif /* CFG_FLASH_CFI */