2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define SAMPLE_COUNT 3
37 #define BYT_RATIOS 0x66a
38 #define BYT_VIDS 0x66b
39 #define BYT_TURBO_RATIOS 0x66c
40 #define BYT_TURBO_VIDS 0x66d
44 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
45 #define fp_toint(X) ((X) >> FRAC_BITS)
46 #define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS)
48 static inline int32_t mul_fp(int32_t x, int32_t y)
50 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
53 static inline int32_t div_fp(int32_t x, int32_t y)
55 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
59 int32_t core_pct_busy;
62 unsigned long long tsc;
95 struct timer_list timer;
97 struct pstate_data pstate;
103 unsigned long long prev_tsc;
104 struct sample sample;
107 static struct cpudata **all_cpu_data;
108 struct pstate_adjust_policy {
117 struct pstate_funcs {
118 int (*get_max)(void);
119 int (*get_min)(void);
120 int (*get_turbo)(void);
121 void (*set)(struct cpudata*, int pstate);
122 void (*get_vid)(struct cpudata *);
125 struct cpu_defaults {
126 struct pstate_adjust_policy pid_policy;
127 struct pstate_funcs funcs;
130 static struct pstate_adjust_policy pid_params;
131 static struct pstate_funcs pstate_funcs;
143 static struct perf_limits limits = {
146 .max_perf = int_tofp(1),
149 .max_policy_pct = 100,
150 .max_sysfs_pct = 100,
153 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
154 int deadband, int integral) {
155 pid->setpoint = setpoint;
156 pid->deadband = deadband;
157 pid->integral = int_tofp(integral);
158 pid->last_err = int_tofp(setpoint) - int_tofp(busy);
161 static inline void pid_p_gain_set(struct _pid *pid, int percent)
163 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
166 static inline void pid_i_gain_set(struct _pid *pid, int percent)
168 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
171 static inline void pid_d_gain_set(struct _pid *pid, int percent)
174 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
177 static signed int pid_calc(struct _pid *pid, int32_t busy)
180 int32_t pterm, dterm, fp_error;
181 int32_t integral_limit;
183 fp_error = int_tofp(pid->setpoint) - busy;
185 if (abs(fp_error) <= int_tofp(pid->deadband))
188 pterm = mul_fp(pid->p_gain, fp_error);
190 pid->integral += fp_error;
192 /* limit the integral term */
193 integral_limit = int_tofp(30);
194 if (pid->integral > integral_limit)
195 pid->integral = integral_limit;
196 if (pid->integral < -integral_limit)
197 pid->integral = -integral_limit;
199 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
200 pid->last_err = fp_error;
202 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
204 return (signed int)fp_toint(result);
207 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
209 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
210 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
211 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
220 static inline void intel_pstate_reset_all_pid(void)
223 for_each_online_cpu(cpu) {
224 if (all_cpu_data[cpu])
225 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
229 /************************** debugfs begin ************************/
230 static int pid_param_set(void *data, u64 val)
233 intel_pstate_reset_all_pid();
236 static int pid_param_get(void *data, u64 *val)
241 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
242 pid_param_set, "%llu\n");
249 static struct pid_param pid_files[] = {
250 {"sample_rate_ms", &pid_params.sample_rate_ms},
251 {"d_gain_pct", &pid_params.d_gain_pct},
252 {"i_gain_pct", &pid_params.i_gain_pct},
253 {"deadband", &pid_params.deadband},
254 {"setpoint", &pid_params.setpoint},
255 {"p_gain_pct", &pid_params.p_gain_pct},
259 static struct dentry *debugfs_parent;
260 static void intel_pstate_debug_expose_params(void)
264 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
265 if (IS_ERR_OR_NULL(debugfs_parent))
267 while (pid_files[i].name) {
268 debugfs_create_file(pid_files[i].name, 0660,
269 debugfs_parent, pid_files[i].value,
275 /************************** debugfs end ************************/
277 /************************** sysfs begin ************************/
278 #define show_one(file_name, object) \
279 static ssize_t show_##file_name \
280 (struct kobject *kobj, struct attribute *attr, char *buf) \
282 return sprintf(buf, "%u\n", limits.object); \
285 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
286 const char *buf, size_t count)
290 ret = sscanf(buf, "%u", &input);
293 limits.no_turbo = clamp_t(int, input, 0 , 1);
298 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
299 const char *buf, size_t count)
303 ret = sscanf(buf, "%u", &input);
307 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
308 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
309 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
313 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
314 const char *buf, size_t count)
318 ret = sscanf(buf, "%u", &input);
321 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
322 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
327 show_one(no_turbo, no_turbo);
328 show_one(max_perf_pct, max_perf_pct);
329 show_one(min_perf_pct, min_perf_pct);
331 define_one_global_rw(no_turbo);
332 define_one_global_rw(max_perf_pct);
333 define_one_global_rw(min_perf_pct);
335 static struct attribute *intel_pstate_attributes[] = {
342 static struct attribute_group intel_pstate_attr_group = {
343 .attrs = intel_pstate_attributes,
345 static struct kobject *intel_pstate_kobject;
347 static void intel_pstate_sysfs_expose_params(void)
351 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
352 &cpu_subsys.dev_root->kobj);
353 BUG_ON(!intel_pstate_kobject);
354 rc = sysfs_create_group(intel_pstate_kobject,
355 &intel_pstate_attr_group);
359 /************************** sysfs end ************************/
360 static int byt_get_min_pstate(void)
363 rdmsrl(BYT_RATIOS, value);
364 return (value >> 8) & 0x3F;
367 static int byt_get_max_pstate(void)
370 rdmsrl(BYT_RATIOS, value);
371 return (value >> 16) & 0x3F;
374 static int byt_get_turbo_pstate(void)
377 rdmsrl(BYT_TURBO_RATIOS, value);
381 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
391 vid_fp = cpudata->vid.min + mul_fp(
392 int_tofp(pstate - cpudata->pstate.min_pstate),
395 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
396 vid = fp_toint(vid_fp);
398 if (pstate > cpudata->pstate.max_pstate)
399 vid = cpudata->vid.turbo;
403 wrmsrl(MSR_IA32_PERF_CTL, val);
406 static void byt_get_vid(struct cpudata *cpudata)
411 rdmsrl(BYT_VIDS, value);
412 cpudata->vid.min = int_tofp((value >> 8) & 0x3f);
413 cpudata->vid.max = int_tofp((value >> 16) & 0x3f);
414 cpudata->vid.ratio = div_fp(
415 cpudata->vid.max - cpudata->vid.min,
416 int_tofp(cpudata->pstate.max_pstate -
417 cpudata->pstate.min_pstate));
419 rdmsrl(BYT_TURBO_VIDS, value);
420 cpudata->vid.turbo = value & 0x7f;
424 static int core_get_min_pstate(void)
427 rdmsrl(MSR_PLATFORM_INFO, value);
428 return (value >> 40) & 0xFF;
431 static int core_get_max_pstate(void)
434 rdmsrl(MSR_PLATFORM_INFO, value);
435 return (value >> 8) & 0xFF;
438 static int core_get_turbo_pstate(void)
442 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
443 nont = core_get_max_pstate();
444 ret = ((value) & 255);
450 static void core_set_pstate(struct cpudata *cpudata, int pstate)
458 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
461 static struct cpu_defaults core_params = {
463 .sample_rate_ms = 10,
471 .get_max = core_get_max_pstate,
472 .get_min = core_get_min_pstate,
473 .get_turbo = core_get_turbo_pstate,
474 .set = core_set_pstate,
478 static struct cpu_defaults byt_params = {
480 .sample_rate_ms = 10,
488 .get_max = byt_get_max_pstate,
489 .get_min = byt_get_min_pstate,
490 .get_turbo = byt_get_turbo_pstate,
491 .set = byt_set_pstate,
492 .get_vid = byt_get_vid,
497 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
499 int max_perf = cpu->pstate.turbo_pstate;
503 max_perf = cpu->pstate.max_pstate;
505 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
506 *max = clamp_t(int, max_perf_adj,
507 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
509 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
510 *min = clamp_t(int, min_perf,
511 cpu->pstate.min_pstate, max_perf);
514 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
516 int max_perf, min_perf;
518 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
520 pstate = clamp_t(int, pstate, min_perf, max_perf);
522 if (pstate == cpu->pstate.current_pstate)
525 trace_cpu_frequency(pstate * 100000, cpu->cpu);
527 cpu->pstate.current_pstate = pstate;
529 pstate_funcs.set(cpu, pstate);
532 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
535 target = cpu->pstate.current_pstate + steps;
537 intel_pstate_set_pstate(cpu, target);
540 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
543 target = cpu->pstate.current_pstate - steps;
544 intel_pstate_set_pstate(cpu, target);
547 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
549 sprintf(cpu->name, "Intel 2nd generation core");
551 cpu->pstate.min_pstate = pstate_funcs.get_min();
552 cpu->pstate.max_pstate = pstate_funcs.get_max();
553 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
555 if (pstate_funcs.get_vid)
556 pstate_funcs.get_vid(cpu);
557 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
560 static inline void intel_pstate_calc_busy(struct cpudata *cpu,
561 struct sample *sample)
566 core_pct = div_fp(int_tofp((sample->aperf)),
567 int_tofp((sample->mperf)));
568 core_pct = mul_fp(core_pct, int_tofp(100));
569 FP_ROUNDUP(core_pct);
571 c0_pct = div_fp(int_tofp(sample->mperf), int_tofp(sample->tsc));
573 sample->freq = fp_toint(
574 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
576 sample->core_pct_busy = mul_fp(core_pct, c0_pct);
579 static inline void intel_pstate_sample(struct cpudata *cpu)
582 unsigned long long tsc;
584 rdmsrl(MSR_IA32_APERF, aperf);
585 rdmsrl(MSR_IA32_MPERF, mperf);
586 tsc = native_read_tsc();
588 aperf = aperf >> FRAC_BITS;
589 mperf = mperf >> FRAC_BITS;
590 tsc = tsc >> FRAC_BITS;
592 cpu->sample.aperf = aperf;
593 cpu->sample.mperf = mperf;
594 cpu->sample.tsc = tsc;
595 cpu->sample.aperf -= cpu->prev_aperf;
596 cpu->sample.mperf -= cpu->prev_mperf;
597 cpu->sample.tsc -= cpu->prev_tsc;
599 intel_pstate_calc_busy(cpu, &cpu->sample);
601 cpu->prev_aperf = aperf;
602 cpu->prev_mperf = mperf;
606 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
608 int sample_time, delay;
610 sample_time = pid_params.sample_rate_ms;
611 delay = msecs_to_jiffies(sample_time);
612 mod_timer_pinned(&cpu->timer, jiffies + delay);
615 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
617 int32_t core_busy, max_pstate, current_pstate;
619 core_busy = cpu->sample.core_pct_busy;
620 max_pstate = int_tofp(cpu->pstate.max_pstate);
621 current_pstate = int_tofp(cpu->pstate.current_pstate);
622 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
623 return FP_ROUNDUP(core_busy);
626 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
634 busy_scaled = intel_pstate_get_scaled_busy(cpu);
636 ctl = pid_calc(pid, busy_scaled);
641 intel_pstate_pstate_increase(cpu, steps);
643 intel_pstate_pstate_decrease(cpu, steps);
646 static void intel_pstate_timer_func(unsigned long __data)
648 struct cpudata *cpu = (struct cpudata *) __data;
649 struct sample *sample;
651 intel_pstate_sample(cpu);
653 sample = &cpu->sample;
655 intel_pstate_adjust_busy_pstate(cpu);
657 trace_pstate_sample(fp_toint(sample->core_pct_busy),
658 fp_toint(intel_pstate_get_scaled_busy(cpu)),
659 cpu->pstate.current_pstate,
664 intel_pstate_set_sample_time(cpu);
667 #define ICPU(model, policy) \
668 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
669 (unsigned long)&policy }
671 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
672 ICPU(0x2a, core_params),
673 ICPU(0x2d, core_params),
674 ICPU(0x37, byt_params),
675 ICPU(0x3a, core_params),
676 ICPU(0x3c, core_params),
677 ICPU(0x3e, core_params),
678 ICPU(0x3f, core_params),
679 ICPU(0x45, core_params),
680 ICPU(0x46, core_params),
683 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
685 static int intel_pstate_init_cpu(unsigned int cpunum)
688 const struct x86_cpu_id *id;
691 id = x86_match_cpu(intel_pstate_cpu_ids);
695 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
696 if (!all_cpu_data[cpunum])
699 cpu = all_cpu_data[cpunum];
701 intel_pstate_get_cpu_pstates(cpu);
705 init_timer_deferrable(&cpu->timer);
706 cpu->timer.function = intel_pstate_timer_func;
709 cpu->timer.expires = jiffies + HZ/100;
710 intel_pstate_busy_pid_reset(cpu);
711 intel_pstate_sample(cpu);
713 add_timer_on(&cpu->timer, cpunum);
715 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
720 static unsigned int intel_pstate_get(unsigned int cpu_num)
722 struct sample *sample;
725 cpu = all_cpu_data[cpu_num];
728 sample = &cpu->sample;
732 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
736 cpu = all_cpu_data[policy->cpu];
738 if (!policy->cpuinfo.max_freq)
741 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
742 limits.min_perf_pct = 100;
743 limits.min_perf = int_tofp(1);
744 limits.max_perf_pct = 100;
745 limits.max_perf = int_tofp(1);
749 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
750 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
751 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
753 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
754 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
755 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
756 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
761 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
763 cpufreq_verify_within_cpu_limits(policy);
765 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
766 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
772 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
774 int cpu_num = policy->cpu;
775 struct cpudata *cpu = all_cpu_data[cpu_num];
777 pr_info("intel_pstate CPU %d exiting\n", cpu_num);
779 del_timer_sync(&all_cpu_data[cpu_num]->timer);
780 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
781 kfree(all_cpu_data[cpu_num]);
782 all_cpu_data[cpu_num] = NULL;
785 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
790 rc = intel_pstate_init_cpu(policy->cpu);
794 cpu = all_cpu_data[policy->cpu];
796 if (!limits.no_turbo &&
797 limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
798 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
800 policy->policy = CPUFREQ_POLICY_POWERSAVE;
802 policy->min = cpu->pstate.min_pstate * 100000;
803 policy->max = cpu->pstate.turbo_pstate * 100000;
805 /* cpuinfo and default policy values */
806 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
807 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
808 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
809 cpumask_set_cpu(policy->cpu, policy->cpus);
814 static struct cpufreq_driver intel_pstate_driver = {
815 .flags = CPUFREQ_CONST_LOOPS,
816 .verify = intel_pstate_verify_policy,
817 .setpolicy = intel_pstate_set_policy,
818 .get = intel_pstate_get,
819 .init = intel_pstate_cpu_init,
820 .stop_cpu = intel_pstate_stop_cpu,
821 .name = "intel_pstate",
824 static int __initdata no_load;
826 static int intel_pstate_msrs_not_valid(void)
828 /* Check that all the msr's we are using are valid. */
829 u64 aperf, mperf, tmp;
831 rdmsrl(MSR_IA32_APERF, aperf);
832 rdmsrl(MSR_IA32_MPERF, mperf);
834 if (!pstate_funcs.get_max() ||
835 !pstate_funcs.get_min() ||
836 !pstate_funcs.get_turbo())
839 rdmsrl(MSR_IA32_APERF, tmp);
843 rdmsrl(MSR_IA32_MPERF, tmp);
850 static void copy_pid_params(struct pstate_adjust_policy *policy)
852 pid_params.sample_rate_ms = policy->sample_rate_ms;
853 pid_params.p_gain_pct = policy->p_gain_pct;
854 pid_params.i_gain_pct = policy->i_gain_pct;
855 pid_params.d_gain_pct = policy->d_gain_pct;
856 pid_params.deadband = policy->deadband;
857 pid_params.setpoint = policy->setpoint;
860 static void copy_cpu_funcs(struct pstate_funcs *funcs)
862 pstate_funcs.get_max = funcs->get_max;
863 pstate_funcs.get_min = funcs->get_min;
864 pstate_funcs.get_turbo = funcs->get_turbo;
865 pstate_funcs.set = funcs->set;
866 pstate_funcs.get_vid = funcs->get_vid;
869 #if IS_ENABLED(CONFIG_ACPI)
870 #include <acpi/processor.h>
872 static bool intel_pstate_no_acpi_pss(void)
876 for_each_possible_cpu(i) {
878 union acpi_object *pss;
879 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
880 struct acpi_processor *pr = per_cpu(processors, i);
885 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
886 if (ACPI_FAILURE(status))
889 pss = buffer.pointer;
890 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
901 struct hw_vendor_info {
903 char oem_id[ACPI_OEM_ID_SIZE];
904 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
907 /* Hardware vendor-specific info that has its own power management modes */
908 static struct hw_vendor_info vendor_info[] = {
909 {1, "HP ", "ProLiant"},
913 static bool intel_pstate_platform_pwr_mgmt_exists(void)
915 struct acpi_table_header hdr;
916 struct hw_vendor_info *v_info;
919 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
922 for (v_info = vendor_info; v_info->valid; v_info++) {
923 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
924 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
925 && intel_pstate_no_acpi_pss())
931 #else /* CONFIG_ACPI not enabled */
932 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
933 #endif /* CONFIG_ACPI */
935 static int __init intel_pstate_init(void)
938 const struct x86_cpu_id *id;
939 struct cpu_defaults *cpu_info;
944 id = x86_match_cpu(intel_pstate_cpu_ids);
949 * The Intel pstate driver will be ignored if the platform
950 * firmware has its own power management modes.
952 if (intel_pstate_platform_pwr_mgmt_exists())
955 cpu_info = (struct cpu_defaults *)id->driver_data;
957 copy_pid_params(&cpu_info->pid_policy);
958 copy_cpu_funcs(&cpu_info->funcs);
960 if (intel_pstate_msrs_not_valid())
963 pr_info("Intel P-state driver initializing.\n");
965 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
969 rc = cpufreq_register_driver(&intel_pstate_driver);
973 intel_pstate_debug_expose_params();
974 intel_pstate_sysfs_expose_params();
979 for_each_online_cpu(cpu) {
980 if (all_cpu_data[cpu]) {
981 del_timer_sync(&all_cpu_data[cpu]->timer);
982 kfree(all_cpu_data[cpu]);
990 device_initcall(intel_pstate_init);
992 static int __init intel_pstate_setup(char *str)
997 if (!strcmp(str, "disable"))
1001 early_param("intel_pstate", intel_pstate_setup);
1003 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1004 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1005 MODULE_LICENSE("GPL");