2 * i2c.c - driver for Blackfin on-chip TWI/I2C
4 * Copyright (c) 2006-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
12 #include <asm/blackfin.h>
13 #include <asm/mach-common/bits/twi.h>
16 # define dmemset(s, c, n) memset(s, c, n)
18 # define dmemset(s, c, n)
20 #define debugi(fmt, args...) \
22 "MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t" \
23 "%-20s:%-3i: " fmt "\n", \
24 bfin_read_TWI_MASTER_STAT(), bfin_read_TWI_FIFO_STAT(), bfin_read_TWI_INT_STAT(), \
25 __func__, __LINE__, ## args)
28 #define bfin_write_TWI_CLKDIV(val) bfin_write_TWI0_CLKDIV(val)
29 #define bfin_write_TWI_CONTROL(val) bfin_write_TWI0_CONTROL(val)
30 #define bfin_read_TWI_CONTROL(val) bfin_read_TWI0_CONTROL(val)
31 #define bfin_write_TWI_MASTER_ADDR(val) bfin_write_TWI0_MASTER_ADDR(val)
32 #define bfin_write_TWI_XMT_DATA8(val) bfin_write_TWI0_XMT_DATA8(val)
33 #define bfin_read_TWI_RCV_DATA8() bfin_read_TWI0_RCV_DATA8()
34 #define bfin_read_TWI_INT_STAT() bfin_read_TWI0_INT_STAT()
35 #define bfin_write_TWI_INT_STAT(val) bfin_write_TWI0_INT_STAT(val)
36 #define bfin_read_TWI_MASTER_STAT() bfin_read_TWI0_MASTER_STAT()
37 #define bfin_write_TWI_MASTER_STAT(val) bfin_write_TWI0_MASTER_STAT(val)
38 #define bfin_read_TWI_MASTER_CTL() bfin_read_TWI0_MASTER_CTL()
39 #define bfin_write_TWI_MASTER_CTL(val) bfin_write_TWI0_MASTER_CTL(val)
40 #define bfin_write_TWI_INT_MASK(val) bfin_write_TWI0_INT_MASK(val)
41 #define bfin_write_TWI_FIFO_CTL(val) bfin_write_TWI0_FIFO_CTL(val)
44 #ifdef CONFIG_TWICLK_KHZ
45 # error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
47 #if CONFIG_SYS_I2C_SPEED > 400000
48 # error The Blackfin I2C hardware can only operate at 400KHz max
51 /* All transfers are described by this data structure */
54 #define I2C_M_COMBO 0x4
55 #define I2C_M_STOP 0x2
56 #define I2C_M_READ 0x1
57 int len; /* msg length */
58 u8 *buf; /* pointer to msg data */
59 int alen; /* addr length */
60 u8 *abuf; /* addr buffer */
64 * wait_for_completion - manage the actual i2c transfer
67 static int wait_for_completion(struct i2c_msg *msg)
72 int_stat = bfin_read_TWI_INT_STAT();
74 if (int_stat & XMTSERV) {
75 debugi("processing XMTSERV");
76 bfin_write_TWI_INT_STAT(XMTSERV);
79 bfin_write_TWI_XMT_DATA8(*(msg->abuf++));
81 } else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
82 bfin_write_TWI_XMT_DATA8(*(msg->buf++));
85 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() |
86 (msg->flags & I2C_M_COMBO ? RSTART | MDIR : STOP));
90 if (int_stat & RCVSERV) {
91 debugi("processing RCVSERV");
92 bfin_write_TWI_INT_STAT(RCVSERV);
95 *(msg->buf++) = bfin_read_TWI_RCV_DATA8();
97 } else if (msg->flags & I2C_M_STOP) {
98 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | STOP);
102 if (int_stat & MERR) {
103 debugi("processing MERR");
104 bfin_write_TWI_INT_STAT(MERR);
108 if (int_stat & MCOMP) {
109 debugi("processing MCOMP");
110 bfin_write_TWI_INT_STAT(MCOMP);
112 if (msg->flags & I2C_M_COMBO && msg->len) {
113 bfin_write_TWI_MASTER_CTL((bfin_read_TWI_MASTER_CTL() & ~RSTART) |
114 (min(msg->len, 0xff) << 6) | MEN | MDIR);
125 * i2c_transfer - setup an i2c transfer
126 * @return: 0 if things worked, non-0 if things failed
128 * Here we just get the i2c stuff all prepped and ready, and then tail off
129 * into wait_for_completion() for all the bits to go.
131 static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len, u8 flags)
133 uchar addr_buffer[] = {
138 struct i2c_msg msg = {
139 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0),
147 dmemset(buffer, 0xff, len);
148 debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i flags=0x%02x[%s] ",
149 chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
151 /* wait for things to settle */
152 while (bfin_read_TWI_MASTER_STAT() & BUSBUSY)
156 /* Set Transmit device address */
157 bfin_write_TWI_MASTER_ADDR(chip);
159 /* Clear the FIFO before starting things */
160 bfin_write_TWI_FIFO_CTL(XMTFLUSH | RCVFLUSH);
162 bfin_write_TWI_FIFO_CTL(0);
167 len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
168 debugi("first byte=0x%02x", *msg.abuf);
169 bfin_write_TWI_XMT_DATA8(*(msg.abuf++));
171 } else if (!(msg.flags & I2C_M_READ) && msg.len) {
172 debugi("first byte=0x%02x", *msg.buf);
173 bfin_write_TWI_XMT_DATA8(*(msg.buf++));
178 bfin_write_TWI_MASTER_STAT(-1);
179 bfin_write_TWI_INT_STAT(-1);
180 bfin_write_TWI_INT_MASK(0);
184 bfin_write_TWI_MASTER_CTL(
185 (bfin_read_TWI_MASTER_CTL() & FAST) |
186 (min(len, 0xff) << 6) | MEN |
187 ((msg.flags & I2C_M_READ) ? MDIR : 0)
190 debugi("CTL=0x%04x", bfin_read_TWI_MASTER_CTL());
192 /* process the rest */
193 ret = wait_for_completion(&msg);
194 debugi("ret=%d", ret);
197 bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & ~MEN);
198 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA);
200 bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
208 * i2c_init - initialize the i2c bus
209 * @speed: bus speed (in HZ)
210 * @slaveaddr: address of device in slave mode (0 - not slave)
212 * Slave mode isn't actually implemented. It'll stay that way until
213 * we get a real request for it.
215 void i2c_init(int speed, int slaveaddr)
217 uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
219 /* Set TWI internal clock as 10MHz */
220 bfin_write_TWI_CONTROL(prescale);
222 /* Set TWI interface clock as specified */
223 bfin_write_TWI_CLKDIV(
224 ((5 * 1024 / (speed / 1000)) << 8) |
225 ((5 * 1024 / (speed / 1000)) & 0xFF)
228 /* Don't turn it on */
229 bfin_write_TWI_MASTER_CTL(speed > 100000 ? FAST : 0);
232 bfin_write_TWI_CONTROL(TWI_ENA | prescale);
235 debugi("CONTROL:0x%04x CLKDIV:0x%04x",
236 bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
238 #if CONFIG_SYS_I2C_SLAVE
239 # error I2C slave support not tested/supported
240 /* If they want us as a slave, do it */
242 bfin_write_TWI_SLAVE_ADDR(slaveaddr);
243 bfin_write_TWI_SLAVE_CTL(SEN);
249 * i2c_probe - test if a chip exists at a given i2c address
250 * @chip: i2c chip addr to search for
251 * @return: 0 if found, non-0 if not found
253 int i2c_probe(uchar chip)
256 return i2c_read(chip, 0, 0, &byte, 1);
260 * i2c_read - read data from an i2c device
261 * @chip: i2c chip addr
262 * @addr: memory (register) address in the chip
263 * @alen: byte size of address
264 * @buffer: buffer to store data read from chip
265 * @len: how many bytes to read
266 * @return: 0 on success, non-0 on failure
268 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
270 return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
274 * i2c_write - write data to an i2c device
275 * @chip: i2c chip addr
276 * @addr: memory (register) address in the chip
277 * @alen: byte size of address
278 * @buffer: buffer holding data to write to chip
279 * @len: how many bytes to write
280 * @return: 0 on success, non-0 on failure
282 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
284 return i2c_transfer(chip, addr, alen, buffer, len, 0);