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mmc: sdhci.c: Add config option to use a fixed buffer for transfers
[karo-tx-uboot.git] / drivers / mmc / sdhci.c
1 /*
2  * Copyright 2011, Marvell Semiconductor Inc.
3  * Lei Wen <leiwen@marvell.com>
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  *
7  * Back ported to the 8xx platform (from the 8260 platform) by
8  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
9  */
10
11 #include <common.h>
12 #include <malloc.h>
13 #include <mmc.h>
14 #include <sdhci.h>
15
16 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
17 void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;
18 #else
19 void *aligned_buffer;
20 #endif
21
22 static void sdhci_reset(struct sdhci_host *host, u8 mask)
23 {
24         unsigned long timeout;
25
26         /* Wait max 100 ms */
27         timeout = 100;
28         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
29         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
30                 if (timeout == 0) {
31                         printf("%s: Reset 0x%x never completed.\n",
32                                __func__, (int)mask);
33                         return;
34                 }
35                 timeout--;
36                 udelay(1000);
37         }
38 }
39
40 static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd)
41 {
42         int i;
43         if (cmd->resp_type & MMC_RSP_136) {
44                 /* CRC is stripped so we need to do some shifting. */
45                 for (i = 0; i < 4; i++) {
46                         cmd->response[i] = sdhci_readl(host,
47                                         SDHCI_RESPONSE + (3-i)*4) << 8;
48                         if (i != 3)
49                                 cmd->response[i] |= sdhci_readb(host,
50                                                 SDHCI_RESPONSE + (3-i)*4-1);
51                 }
52         } else {
53                 cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE);
54         }
55 }
56
57 static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
58 {
59         int i;
60         char *offs;
61         for (i = 0; i < data->blocksize; i += 4) {
62                 offs = data->dest + i;
63                 if (data->flags == MMC_DATA_READ)
64                         *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER);
65                 else
66                         sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER);
67         }
68 }
69
70 static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
71                                 unsigned int start_addr)
72 {
73         unsigned int stat, rdy, mask, timeout, block = 0;
74 #ifdef CONFIG_MMC_SDMA
75         unsigned char ctrl;
76         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
77         ctrl &= ~SDHCI_CTRL_DMA_MASK;
78         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
79 #endif
80
81         timeout = 1000000;
82         rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
83         mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
84         do {
85                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
86                 if (stat & SDHCI_INT_ERROR) {
87                         printf("%s: Error detected in status(0x%X)!\n",
88                                __func__, stat);
89                         return -1;
90                 }
91                 if (stat & rdy) {
92                         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask))
93                                 continue;
94                         sdhci_writel(host, rdy, SDHCI_INT_STATUS);
95                         sdhci_transfer_pio(host, data);
96                         data->dest += data->blocksize;
97                         if (++block >= data->blocks)
98                                 break;
99                 }
100 #ifdef CONFIG_MMC_SDMA
101                 if (stat & SDHCI_INT_DMA_END) {
102                         sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
103                         start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
104                         start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
105                         sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
106                 }
107 #endif
108                 if (timeout-- > 0)
109                         udelay(10);
110                 else {
111                         printf("%s: Transfer data timeout\n", __func__);
112                         return -1;
113                 }
114         } while (!(stat & SDHCI_INT_DATA_END));
115         return 0;
116 }
117
118 /*
119  * No command will be sent by driver if card is busy, so driver must wait
120  * for card ready state.
121  * Every time when card is busy after timeout then (last) timeout value will be
122  * increased twice but only if it doesn't exceed global defined maximum.
123  * Each function call will use last timeout value. Max timeout can be redefined
124  * in board config file.
125  */
126 #ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT
127 #define CONFIG_SDHCI_CMD_MAX_TIMEOUT            3200
128 #endif
129 #define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT        100
130
131 static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
132                        struct mmc_data *data)
133 {
134         struct sdhci_host *host = mmc->priv;
135         unsigned int stat = 0;
136         int ret = 0;
137         int trans_bytes = 0, is_aligned = 1;
138         u32 mask, flags, mode;
139         unsigned int time = 0, start_addr = 0;
140         int mmc_dev = mmc->block_dev.dev;
141         unsigned start = get_timer(0);
142
143         /* Timeout unit - ms */
144         static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT;
145
146         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
147         mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
148
149         /* We shouldn't wait for data inihibit for stop commands, even
150            though they might use busy signaling */
151         if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
152                 mask &= ~SDHCI_DATA_INHIBIT;
153
154         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
155                 if (time >= cmd_timeout) {
156                         printf("%s: MMC: %d busy ", __func__, mmc_dev);
157                         if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
158                                 cmd_timeout += cmd_timeout;
159                                 printf("timeout increasing to: %u ms.\n",
160                                        cmd_timeout);
161                         } else {
162                                 puts("timeout.\n");
163                                 return COMM_ERR;
164                         }
165                 }
166                 time++;
167                 udelay(1000);
168         }
169
170         mask = SDHCI_INT_RESPONSE;
171         if (!(cmd->resp_type & MMC_RSP_PRESENT))
172                 flags = SDHCI_CMD_RESP_NONE;
173         else if (cmd->resp_type & MMC_RSP_136)
174                 flags = SDHCI_CMD_RESP_LONG;
175         else if (cmd->resp_type & MMC_RSP_BUSY) {
176                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
177                 mask |= SDHCI_INT_DATA_END;
178         } else
179                 flags = SDHCI_CMD_RESP_SHORT;
180
181         if (cmd->resp_type & MMC_RSP_CRC)
182                 flags |= SDHCI_CMD_CRC;
183         if (cmd->resp_type & MMC_RSP_OPCODE)
184                 flags |= SDHCI_CMD_INDEX;
185         if (data)
186                 flags |= SDHCI_CMD_DATA;
187
188         /* Set Transfer mode regarding to data flag */
189         if (data != 0) {
190                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
191                 mode = SDHCI_TRNS_BLK_CNT_EN;
192                 trans_bytes = data->blocks * data->blocksize;
193                 if (data->blocks > 1)
194                         mode |= SDHCI_TRNS_MULTI;
195
196                 if (data->flags == MMC_DATA_READ)
197                         mode |= SDHCI_TRNS_READ;
198
199 #ifdef CONFIG_MMC_SDMA
200                 if (data->flags == MMC_DATA_READ)
201                         start_addr = (unsigned long)data->dest;
202                 else
203                         start_addr = (unsigned long)data->src;
204                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
205                                 (start_addr & 0x7) != 0x0) {
206                         is_aligned = 0;
207                         start_addr = (unsigned long)aligned_buffer;
208                         if (data->flags != MMC_DATA_READ)
209                                 memcpy(aligned_buffer, data->src, trans_bytes);
210                 }
211
212 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
213                 /*
214                  * Always use this bounce-buffer when
215                  * CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is defined
216                  */
217                 is_aligned = 0;
218                 start_addr = (unsigned long)aligned_buffer;
219                 if (data->flags != MMC_DATA_READ)
220                         memcpy(aligned_buffer, data->src, trans_bytes);
221 #endif
222
223                 sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
224                 mode |= SDHCI_TRNS_DMA;
225 #endif
226                 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
227                                 data->blocksize),
228                                 SDHCI_BLOCK_SIZE);
229                 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
230                 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
231         } else if (cmd->resp_type & MMC_RSP_BUSY) {
232                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
233         }
234
235         sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
236 #ifdef CONFIG_MMC_SDMA
237         flush_cache(start_addr, trans_bytes);
238 #endif
239         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
240         start = get_timer(0);
241         do {
242                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
243                 if (stat & SDHCI_INT_ERROR)
244                         break;
245         } while (((stat & mask) != mask) &&
246                  (get_timer(start) < CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT));
247
248         if (get_timer(start) >= CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT) {
249                 if (host->quirks & SDHCI_QUIRK_BROKEN_R1B)
250                         return 0;
251                 else {
252                         printf("%s: Timeout for status update!\n", __func__);
253                         return TIMEOUT;
254                 }
255         }
256
257         if ((stat & (SDHCI_INT_ERROR | mask)) == mask) {
258                 sdhci_cmd_done(host, cmd);
259                 sdhci_writel(host, mask, SDHCI_INT_STATUS);
260         } else
261                 ret = -1;
262
263         if (!ret && data)
264                 ret = sdhci_transfer_data(host, data, start_addr);
265
266         if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
267                 udelay(1000);
268
269         stat = sdhci_readl(host, SDHCI_INT_STATUS);
270         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
271         if (!ret) {
272                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
273                                 !is_aligned && (data->flags == MMC_DATA_READ))
274                         memcpy(data->dest, aligned_buffer, trans_bytes);
275                 return 0;
276         }
277
278         sdhci_reset(host, SDHCI_RESET_CMD);
279         sdhci_reset(host, SDHCI_RESET_DATA);
280         if (stat & SDHCI_INT_TIMEOUT)
281                 return TIMEOUT;
282         else
283                 return COMM_ERR;
284 }
285
286 static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
287 {
288         struct sdhci_host *host = mmc->priv;
289         unsigned int div, clk, timeout;
290
291         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
292
293         if (clock == 0)
294                 return 0;
295
296         if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
297                 /* Version 3.00 divisors must be a multiple of 2. */
298                 if (mmc->cfg->f_max <= clock)
299                         div = 1;
300                 else {
301                         for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
302                                 if ((mmc->cfg->f_max / div) <= clock)
303                                         break;
304                         }
305                 }
306         } else {
307                 /* Version 2.00 divisors must be a power of 2. */
308                 for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
309                         if ((mmc->cfg->f_max / div) <= clock)
310                                 break;
311                 }
312         }
313         div >>= 1;
314
315         if (host->set_clock)
316                 host->set_clock(host->index, div);
317
318         clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
319         clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
320                 << SDHCI_DIVIDER_HI_SHIFT;
321         clk |= SDHCI_CLOCK_INT_EN;
322         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
323
324         /* Wait max 20 ms */
325         timeout = 20;
326         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
327                 & SDHCI_CLOCK_INT_STABLE)) {
328                 if (timeout == 0) {
329                         printf("%s: Internal clock never stabilised.\n",
330                                __func__);
331                         return -1;
332                 }
333                 timeout--;
334                 udelay(1000);
335         }
336
337         clk |= SDHCI_CLOCK_CARD_EN;
338         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
339         return 0;
340 }
341
342 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
343 {
344         u8 pwr = 0;
345
346         if (power != (unsigned short)-1) {
347                 switch (1 << power) {
348                 case MMC_VDD_165_195:
349                         pwr = SDHCI_POWER_180;
350                         break;
351                 case MMC_VDD_29_30:
352                 case MMC_VDD_30_31:
353                         pwr = SDHCI_POWER_300;
354                         break;
355                 case MMC_VDD_32_33:
356                 case MMC_VDD_33_34:
357                         pwr = SDHCI_POWER_330;
358                         break;
359                 }
360         }
361
362         if (pwr == 0) {
363                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
364                 return;
365         }
366
367         if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
368                 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
369
370         pwr |= SDHCI_POWER_ON;
371
372         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
373 }
374
375 static void sdhci_set_ios(struct mmc *mmc)
376 {
377         u32 ctrl;
378         struct sdhci_host *host = mmc->priv;
379
380         if (host->set_control_reg)
381                 host->set_control_reg(host);
382
383         if (mmc->clock != host->clock)
384                 sdhci_set_clock(mmc, mmc->clock);
385
386         /* Set bus width */
387         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
388         if (mmc->bus_width == 8) {
389                 ctrl &= ~SDHCI_CTRL_4BITBUS;
390                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
391                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
392                         ctrl |= SDHCI_CTRL_8BITBUS;
393         } else {
394                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
395                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
396                         ctrl &= ~SDHCI_CTRL_8BITBUS;
397                 if (mmc->bus_width == 4)
398                         ctrl |= SDHCI_CTRL_4BITBUS;
399                 else
400                         ctrl &= ~SDHCI_CTRL_4BITBUS;
401         }
402
403         if (mmc->clock > 26000000)
404                 ctrl |= SDHCI_CTRL_HISPD;
405         else
406                 ctrl &= ~SDHCI_CTRL_HISPD;
407
408         if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
409                 ctrl &= ~SDHCI_CTRL_HISPD;
410
411         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
412 }
413
414 static int sdhci_init(struct mmc *mmc)
415 {
416         struct sdhci_host *host = mmc->priv;
417
418         if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
419                 aligned_buffer = memalign(8, 512*1024);
420                 if (!aligned_buffer) {
421                         printf("%s: Aligned buffer alloc failed!!!\n",
422                                __func__);
423                         return -1;
424                 }
425         }
426
427         sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
428
429         if (host->quirks & SDHCI_QUIRK_NO_CD) {
430                 unsigned int status;
431
432                 sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST,
433                         SDHCI_HOST_CONTROL);
434
435                 status = sdhci_readl(host, SDHCI_PRESENT_STATE);
436                 while ((!(status & SDHCI_CARD_PRESENT)) ||
437                     (!(status & SDHCI_CARD_STATE_STABLE)) ||
438                     (!(status & SDHCI_CARD_DETECT_PIN_LEVEL)))
439                         status = sdhci_readl(host, SDHCI_PRESENT_STATE);
440         }
441
442         /* Enable only interrupts served by the SD controller */
443         sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
444                      SDHCI_INT_ENABLE);
445         /* Mask all sdhci interrupt sources */
446         sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
447
448         return 0;
449 }
450
451
452 static const struct mmc_ops sdhci_ops = {
453         .send_cmd       = sdhci_send_command,
454         .set_ios        = sdhci_set_ios,
455         .init           = sdhci_init,
456 };
457
458 int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
459 {
460         unsigned int caps;
461
462         host->cfg.name = host->name;
463         host->cfg.ops = &sdhci_ops;
464
465         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
466 #ifdef CONFIG_MMC_SDMA
467         if (!(caps & SDHCI_CAN_DO_SDMA)) {
468                 printf("%s: Your controller doesn't support SDMA!!\n",
469                        __func__);
470                 return -1;
471         }
472 #endif
473
474         if (max_clk)
475                 host->cfg.f_max = max_clk;
476         else {
477                 if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
478                         host->cfg.f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK)
479                                 >> SDHCI_CLOCK_BASE_SHIFT;
480                 else
481                         host->cfg.f_max = (caps & SDHCI_CLOCK_BASE_MASK)
482                                 >> SDHCI_CLOCK_BASE_SHIFT;
483                 host->cfg.f_max *= 1000000;
484         }
485         if (host->cfg.f_max == 0) {
486                 printf("%s: Hardware doesn't specify base clock frequency\n",
487                        __func__);
488                 return -1;
489         }
490         if (min_clk)
491                 host->cfg.f_min = min_clk;
492         else {
493                 if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
494                         host->cfg.f_min = host->cfg.f_max /
495                                 SDHCI_MAX_DIV_SPEC_300;
496                 else
497                         host->cfg.f_min = host->cfg.f_max /
498                                 SDHCI_MAX_DIV_SPEC_200;
499         }
500
501         host->cfg.voltages = 0;
502         if (caps & SDHCI_CAN_VDD_330)
503                 host->cfg.voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
504         if (caps & SDHCI_CAN_VDD_300)
505                 host->cfg.voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
506         if (caps & SDHCI_CAN_VDD_180)
507                 host->cfg.voltages |= MMC_VDD_165_195;
508
509         if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
510                 host->cfg.voltages |= host->voltages;
511
512         host->cfg.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
513         if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
514                 if (caps & SDHCI_CAN_DO_8BIT)
515                         host->cfg.host_caps |= MMC_MODE_8BIT;
516         }
517         if (host->host_caps)
518                 host->cfg.host_caps |= host->host_caps;
519
520         host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
521
522         sdhci_reset(host, SDHCI_RESET_ALL);
523
524         host->mmc = mmc_create(&host->cfg, host);
525         if (host->mmc == NULL) {
526                 printf("%s: mmc create fail!\n", __func__);
527                 return -1;
528         }
529
530         return 0;
531 }