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[karo-tx-linux.git] / drivers / net / ethernet / broadcom / cnic.c
1 /* cnic.c: Broadcom CNIC core network driver.
2  *
3  * Copyright (c) 2006-2012 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10  * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11  */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/module.h>
16
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
25 #include <linux/in.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #include <linux/prefetch.h>
31 #include <linux/random.h>
32 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
33 #define BCM_VLAN 1
34 #endif
35 #include <net/ip.h>
36 #include <net/tcp.h>
37 #include <net/route.h>
38 #include <net/ipv6.h>
39 #include <net/ip6_route.h>
40 #include <net/ip6_checksum.h>
41 #include <scsi/iscsi_if.h>
42
43 #define BCM_CNIC        1
44 #include "cnic_if.h"
45 #include "bnx2.h"
46 #include "bnx2x/bnx2x.h"
47 #include "bnx2x/bnx2x_reg.h"
48 #include "bnx2x/bnx2x_fw_defs.h"
49 #include "bnx2x/bnx2x_hsi.h"
50 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
51 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
52 #include "../../../scsi/bnx2fc/bnx2fc_constants.h"
53 #include "cnic.h"
54 #include "cnic_defs.h"
55
56 #define CNIC_MODULE_NAME        "cnic"
57
58 static char version[] =
59         "Broadcom NetXtreme II CNIC Driver " CNIC_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
60
61 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
62               "Chen (zongxi@broadcom.com");
63 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
64 MODULE_LICENSE("GPL");
65 MODULE_VERSION(CNIC_MODULE_VERSION);
66
67 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
68 static LIST_HEAD(cnic_dev_list);
69 static LIST_HEAD(cnic_udev_list);
70 static DEFINE_RWLOCK(cnic_dev_lock);
71 static DEFINE_MUTEX(cnic_lock);
72
73 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
74
75 /* helper function, assuming cnic_lock is held */
76 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
77 {
78         return rcu_dereference_protected(cnic_ulp_tbl[type],
79                                          lockdep_is_held(&cnic_lock));
80 }
81
82 static int cnic_service_bnx2(void *, void *);
83 static int cnic_service_bnx2x(void *, void *);
84 static int cnic_ctl(void *, struct cnic_ctl_info *);
85
86 static struct cnic_ops cnic_bnx2_ops = {
87         .cnic_owner     = THIS_MODULE,
88         .cnic_handler   = cnic_service_bnx2,
89         .cnic_ctl       = cnic_ctl,
90 };
91
92 static struct cnic_ops cnic_bnx2x_ops = {
93         .cnic_owner     = THIS_MODULE,
94         .cnic_handler   = cnic_service_bnx2x,
95         .cnic_ctl       = cnic_ctl,
96 };
97
98 static struct workqueue_struct *cnic_wq;
99
100 static void cnic_shutdown_rings(struct cnic_dev *);
101 static void cnic_init_rings(struct cnic_dev *);
102 static int cnic_cm_set_pg(struct cnic_sock *);
103
104 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
105 {
106         struct cnic_uio_dev *udev = uinfo->priv;
107         struct cnic_dev *dev;
108
109         if (!capable(CAP_NET_ADMIN))
110                 return -EPERM;
111
112         if (udev->uio_dev != -1)
113                 return -EBUSY;
114
115         rtnl_lock();
116         dev = udev->dev;
117
118         if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
119                 rtnl_unlock();
120                 return -ENODEV;
121         }
122
123         udev->uio_dev = iminor(inode);
124
125         cnic_shutdown_rings(dev);
126         cnic_init_rings(dev);
127         rtnl_unlock();
128
129         return 0;
130 }
131
132 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
133 {
134         struct cnic_uio_dev *udev = uinfo->priv;
135
136         udev->uio_dev = -1;
137         return 0;
138 }
139
140 static inline void cnic_hold(struct cnic_dev *dev)
141 {
142         atomic_inc(&dev->ref_count);
143 }
144
145 static inline void cnic_put(struct cnic_dev *dev)
146 {
147         atomic_dec(&dev->ref_count);
148 }
149
150 static inline void csk_hold(struct cnic_sock *csk)
151 {
152         atomic_inc(&csk->ref_count);
153 }
154
155 static inline void csk_put(struct cnic_sock *csk)
156 {
157         atomic_dec(&csk->ref_count);
158 }
159
160 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
161 {
162         struct cnic_dev *cdev;
163
164         read_lock(&cnic_dev_lock);
165         list_for_each_entry(cdev, &cnic_dev_list, list) {
166                 if (netdev == cdev->netdev) {
167                         cnic_hold(cdev);
168                         read_unlock(&cnic_dev_lock);
169                         return cdev;
170                 }
171         }
172         read_unlock(&cnic_dev_lock);
173         return NULL;
174 }
175
176 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
177 {
178         atomic_inc(&ulp_ops->ref_count);
179 }
180
181 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
182 {
183         atomic_dec(&ulp_ops->ref_count);
184 }
185
186 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
187 {
188         struct cnic_local *cp = dev->cnic_priv;
189         struct cnic_eth_dev *ethdev = cp->ethdev;
190         struct drv_ctl_info info;
191         struct drv_ctl_io *io = &info.data.io;
192
193         info.cmd = DRV_CTL_CTX_WR_CMD;
194         io->cid_addr = cid_addr;
195         io->offset = off;
196         io->data = val;
197         ethdev->drv_ctl(dev->netdev, &info);
198 }
199
200 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
201 {
202         struct cnic_local *cp = dev->cnic_priv;
203         struct cnic_eth_dev *ethdev = cp->ethdev;
204         struct drv_ctl_info info;
205         struct drv_ctl_io *io = &info.data.io;
206
207         info.cmd = DRV_CTL_CTXTBL_WR_CMD;
208         io->offset = off;
209         io->dma_addr = addr;
210         ethdev->drv_ctl(dev->netdev, &info);
211 }
212
213 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
214 {
215         struct cnic_local *cp = dev->cnic_priv;
216         struct cnic_eth_dev *ethdev = cp->ethdev;
217         struct drv_ctl_info info;
218         struct drv_ctl_l2_ring *ring = &info.data.ring;
219
220         if (start)
221                 info.cmd = DRV_CTL_START_L2_CMD;
222         else
223                 info.cmd = DRV_CTL_STOP_L2_CMD;
224
225         ring->cid = cid;
226         ring->client_id = cl_id;
227         ethdev->drv_ctl(dev->netdev, &info);
228 }
229
230 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
231 {
232         struct cnic_local *cp = dev->cnic_priv;
233         struct cnic_eth_dev *ethdev = cp->ethdev;
234         struct drv_ctl_info info;
235         struct drv_ctl_io *io = &info.data.io;
236
237         info.cmd = DRV_CTL_IO_WR_CMD;
238         io->offset = off;
239         io->data = val;
240         ethdev->drv_ctl(dev->netdev, &info);
241 }
242
243 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
244 {
245         struct cnic_local *cp = dev->cnic_priv;
246         struct cnic_eth_dev *ethdev = cp->ethdev;
247         struct drv_ctl_info info;
248         struct drv_ctl_io *io = &info.data.io;
249
250         info.cmd = DRV_CTL_IO_RD_CMD;
251         io->offset = off;
252         ethdev->drv_ctl(dev->netdev, &info);
253         return io->data;
254 }
255
256 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
257 {
258         struct cnic_local *cp = dev->cnic_priv;
259         struct cnic_eth_dev *ethdev = cp->ethdev;
260         struct drv_ctl_info info;
261         struct fcoe_capabilities *fcoe_cap =
262                 &info.data.register_data.fcoe_features;
263
264         if (reg) {
265                 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
266                 if (ulp_type == CNIC_ULP_FCOE && dev->fcoe_cap)
267                         memcpy(fcoe_cap, dev->fcoe_cap, sizeof(*fcoe_cap));
268         } else {
269                 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
270         }
271
272         info.data.ulp_type = ulp_type;
273         ethdev->drv_ctl(dev->netdev, &info);
274 }
275
276 static int cnic_in_use(struct cnic_sock *csk)
277 {
278         return test_bit(SK_F_INUSE, &csk->flags);
279 }
280
281 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
282 {
283         struct cnic_local *cp = dev->cnic_priv;
284         struct cnic_eth_dev *ethdev = cp->ethdev;
285         struct drv_ctl_info info;
286
287         info.cmd = cmd;
288         info.data.credit.credit_count = count;
289         ethdev->drv_ctl(dev->netdev, &info);
290 }
291
292 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
293 {
294         u32 i;
295
296         if (!cp->ctx_tbl)
297                 return -EINVAL;
298
299         for (i = 0; i < cp->max_cid_space; i++) {
300                 if (cp->ctx_tbl[i].cid == cid) {
301                         *l5_cid = i;
302                         return 0;
303                 }
304         }
305         return -EINVAL;
306 }
307
308 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
309                            struct cnic_sock *csk)
310 {
311         struct iscsi_path path_req;
312         char *buf = NULL;
313         u16 len = 0;
314         u32 msg_type = ISCSI_KEVENT_IF_DOWN;
315         struct cnic_ulp_ops *ulp_ops;
316         struct cnic_uio_dev *udev = cp->udev;
317         int rc = 0, retry = 0;
318
319         if (!udev || udev->uio_dev == -1)
320                 return -ENODEV;
321
322         if (csk) {
323                 len = sizeof(path_req);
324                 buf = (char *) &path_req;
325                 memset(&path_req, 0, len);
326
327                 msg_type = ISCSI_KEVENT_PATH_REQ;
328                 path_req.handle = (u64) csk->l5_cid;
329                 if (test_bit(SK_F_IPV6, &csk->flags)) {
330                         memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
331                                sizeof(struct in6_addr));
332                         path_req.ip_addr_len = 16;
333                 } else {
334                         memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
335                                sizeof(struct in_addr));
336                         path_req.ip_addr_len = 4;
337                 }
338                 path_req.vlan_id = csk->vlan_id;
339                 path_req.pmtu = csk->mtu;
340         }
341
342         while (retry < 3) {
343                 rc = 0;
344                 rcu_read_lock();
345                 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
346                 if (ulp_ops)
347                         rc = ulp_ops->iscsi_nl_send_msg(
348                                 cp->ulp_handle[CNIC_ULP_ISCSI],
349                                 msg_type, buf, len);
350                 rcu_read_unlock();
351                 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
352                         break;
353
354                 msleep(100);
355                 retry++;
356         }
357         return rc;
358 }
359
360 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
361
362 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
363                                   char *buf, u16 len)
364 {
365         int rc = -EINVAL;
366
367         switch (msg_type) {
368         case ISCSI_UEVENT_PATH_UPDATE: {
369                 struct cnic_local *cp;
370                 u32 l5_cid;
371                 struct cnic_sock *csk;
372                 struct iscsi_path *path_resp;
373
374                 if (len < sizeof(*path_resp))
375                         break;
376
377                 path_resp = (struct iscsi_path *) buf;
378                 cp = dev->cnic_priv;
379                 l5_cid = (u32) path_resp->handle;
380                 if (l5_cid >= MAX_CM_SK_TBL_SZ)
381                         break;
382
383                 rcu_read_lock();
384                 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
385                         rc = -ENODEV;
386                         rcu_read_unlock();
387                         break;
388                 }
389                 csk = &cp->csk_tbl[l5_cid];
390                 csk_hold(csk);
391                 if (cnic_in_use(csk) &&
392                     test_bit(SK_F_CONNECT_START, &csk->flags)) {
393
394                         csk->vlan_id = path_resp->vlan_id;
395
396                         memcpy(csk->ha, path_resp->mac_addr, 6);
397                         if (test_bit(SK_F_IPV6, &csk->flags))
398                                 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
399                                        sizeof(struct in6_addr));
400                         else
401                                 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
402                                        sizeof(struct in_addr));
403
404                         if (is_valid_ether_addr(csk->ha)) {
405                                 cnic_cm_set_pg(csk);
406                         } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
407                                 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
408
409                                 cnic_cm_upcall(cp, csk,
410                                         L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
411                                 clear_bit(SK_F_CONNECT_START, &csk->flags);
412                         }
413                 }
414                 csk_put(csk);
415                 rcu_read_unlock();
416                 rc = 0;
417         }
418         }
419
420         return rc;
421 }
422
423 static int cnic_offld_prep(struct cnic_sock *csk)
424 {
425         if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
426                 return 0;
427
428         if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
429                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
430                 return 0;
431         }
432
433         return 1;
434 }
435
436 static int cnic_close_prep(struct cnic_sock *csk)
437 {
438         clear_bit(SK_F_CONNECT_START, &csk->flags);
439         smp_mb__after_clear_bit();
440
441         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
442                 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
443                         msleep(1);
444
445                 return 1;
446         }
447         return 0;
448 }
449
450 static int cnic_abort_prep(struct cnic_sock *csk)
451 {
452         clear_bit(SK_F_CONNECT_START, &csk->flags);
453         smp_mb__after_clear_bit();
454
455         while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
456                 msleep(1);
457
458         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
459                 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
460                 return 1;
461         }
462
463         return 0;
464 }
465
466 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
467 {
468         struct cnic_dev *dev;
469
470         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
471                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
472                 return -EINVAL;
473         }
474         mutex_lock(&cnic_lock);
475         if (cnic_ulp_tbl_prot(ulp_type)) {
476                 pr_err("%s: Type %d has already been registered\n",
477                        __func__, ulp_type);
478                 mutex_unlock(&cnic_lock);
479                 return -EBUSY;
480         }
481
482         read_lock(&cnic_dev_lock);
483         list_for_each_entry(dev, &cnic_dev_list, list) {
484                 struct cnic_local *cp = dev->cnic_priv;
485
486                 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
487         }
488         read_unlock(&cnic_dev_lock);
489
490         atomic_set(&ulp_ops->ref_count, 0);
491         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
492         mutex_unlock(&cnic_lock);
493
494         /* Prevent race conditions with netdev_event */
495         rtnl_lock();
496         list_for_each_entry(dev, &cnic_dev_list, list) {
497                 struct cnic_local *cp = dev->cnic_priv;
498
499                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
500                         ulp_ops->cnic_init(dev);
501         }
502         rtnl_unlock();
503
504         return 0;
505 }
506
507 int cnic_unregister_driver(int ulp_type)
508 {
509         struct cnic_dev *dev;
510         struct cnic_ulp_ops *ulp_ops;
511         int i = 0;
512
513         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
514                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
515                 return -EINVAL;
516         }
517         mutex_lock(&cnic_lock);
518         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
519         if (!ulp_ops) {
520                 pr_err("%s: Type %d has not been registered\n",
521                        __func__, ulp_type);
522                 goto out_unlock;
523         }
524         read_lock(&cnic_dev_lock);
525         list_for_each_entry(dev, &cnic_dev_list, list) {
526                 struct cnic_local *cp = dev->cnic_priv;
527
528                 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
529                         pr_err("%s: Type %d still has devices registered\n",
530                                __func__, ulp_type);
531                         read_unlock(&cnic_dev_lock);
532                         goto out_unlock;
533                 }
534         }
535         read_unlock(&cnic_dev_lock);
536
537         RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
538
539         mutex_unlock(&cnic_lock);
540         synchronize_rcu();
541         while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
542                 msleep(100);
543                 i++;
544         }
545
546         if (atomic_read(&ulp_ops->ref_count) != 0)
547                 pr_warn("%s: Failed waiting for ref count to go to zero\n",
548                         __func__);
549         return 0;
550
551 out_unlock:
552         mutex_unlock(&cnic_lock);
553         return -EINVAL;
554 }
555
556 static int cnic_start_hw(struct cnic_dev *);
557 static void cnic_stop_hw(struct cnic_dev *);
558
559 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
560                                 void *ulp_ctx)
561 {
562         struct cnic_local *cp = dev->cnic_priv;
563         struct cnic_ulp_ops *ulp_ops;
564
565         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
566                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
567                 return -EINVAL;
568         }
569         mutex_lock(&cnic_lock);
570         if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
571                 pr_err("%s: Driver with type %d has not been registered\n",
572                        __func__, ulp_type);
573                 mutex_unlock(&cnic_lock);
574                 return -EAGAIN;
575         }
576         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
577                 pr_err("%s: Type %d has already been registered to this device\n",
578                        __func__, ulp_type);
579                 mutex_unlock(&cnic_lock);
580                 return -EBUSY;
581         }
582
583         clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
584         cp->ulp_handle[ulp_type] = ulp_ctx;
585         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
586         rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
587         cnic_hold(dev);
588
589         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
590                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
591                         ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
592
593         mutex_unlock(&cnic_lock);
594
595         cnic_ulp_ctl(dev, ulp_type, true);
596
597         return 0;
598
599 }
600 EXPORT_SYMBOL(cnic_register_driver);
601
602 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
603 {
604         struct cnic_local *cp = dev->cnic_priv;
605         int i = 0;
606
607         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
608                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
609                 return -EINVAL;
610         }
611         mutex_lock(&cnic_lock);
612         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
613                 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
614                 cnic_put(dev);
615         } else {
616                 pr_err("%s: device not registered to this ulp type %d\n",
617                        __func__, ulp_type);
618                 mutex_unlock(&cnic_lock);
619                 return -EINVAL;
620         }
621         mutex_unlock(&cnic_lock);
622
623         if (ulp_type == CNIC_ULP_ISCSI)
624                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
625         else if (ulp_type == CNIC_ULP_FCOE)
626                 dev->fcoe_cap = NULL;
627
628         synchronize_rcu();
629
630         while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
631                i < 20) {
632                 msleep(100);
633                 i++;
634         }
635         if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
636                 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
637
638         cnic_ulp_ctl(dev, ulp_type, false);
639
640         return 0;
641 }
642 EXPORT_SYMBOL(cnic_unregister_driver);
643
644 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
645                             u32 next)
646 {
647         id_tbl->start = start_id;
648         id_tbl->max = size;
649         id_tbl->next = next;
650         spin_lock_init(&id_tbl->lock);
651         id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
652         if (!id_tbl->table)
653                 return -ENOMEM;
654
655         return 0;
656 }
657
658 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
659 {
660         kfree(id_tbl->table);
661         id_tbl->table = NULL;
662 }
663
664 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
665 {
666         int ret = -1;
667
668         id -= id_tbl->start;
669         if (id >= id_tbl->max)
670                 return ret;
671
672         spin_lock(&id_tbl->lock);
673         if (!test_bit(id, id_tbl->table)) {
674                 set_bit(id, id_tbl->table);
675                 ret = 0;
676         }
677         spin_unlock(&id_tbl->lock);
678         return ret;
679 }
680
681 /* Returns -1 if not successful */
682 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
683 {
684         u32 id;
685
686         spin_lock(&id_tbl->lock);
687         id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
688         if (id >= id_tbl->max) {
689                 id = -1;
690                 if (id_tbl->next != 0) {
691                         id = find_first_zero_bit(id_tbl->table, id_tbl->next);
692                         if (id >= id_tbl->next)
693                                 id = -1;
694                 }
695         }
696
697         if (id < id_tbl->max) {
698                 set_bit(id, id_tbl->table);
699                 id_tbl->next = (id + 1) & (id_tbl->max - 1);
700                 id += id_tbl->start;
701         }
702
703         spin_unlock(&id_tbl->lock);
704
705         return id;
706 }
707
708 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
709 {
710         if (id == -1)
711                 return;
712
713         id -= id_tbl->start;
714         if (id >= id_tbl->max)
715                 return;
716
717         clear_bit(id, id_tbl->table);
718 }
719
720 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
721 {
722         int i;
723
724         if (!dma->pg_arr)
725                 return;
726
727         for (i = 0; i < dma->num_pages; i++) {
728                 if (dma->pg_arr[i]) {
729                         dma_free_coherent(&dev->pcidev->dev, BNX2_PAGE_SIZE,
730                                           dma->pg_arr[i], dma->pg_map_arr[i]);
731                         dma->pg_arr[i] = NULL;
732                 }
733         }
734         if (dma->pgtbl) {
735                 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
736                                   dma->pgtbl, dma->pgtbl_map);
737                 dma->pgtbl = NULL;
738         }
739         kfree(dma->pg_arr);
740         dma->pg_arr = NULL;
741         dma->num_pages = 0;
742 }
743
744 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
745 {
746         int i;
747         __le32 *page_table = (__le32 *) dma->pgtbl;
748
749         for (i = 0; i < dma->num_pages; i++) {
750                 /* Each entry needs to be in big endian format. */
751                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
752                 page_table++;
753                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
754                 page_table++;
755         }
756 }
757
758 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
759 {
760         int i;
761         __le32 *page_table = (__le32 *) dma->pgtbl;
762
763         for (i = 0; i < dma->num_pages; i++) {
764                 /* Each entry needs to be in little endian format. */
765                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
766                 page_table++;
767                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
768                 page_table++;
769         }
770 }
771
772 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
773                           int pages, int use_pg_tbl)
774 {
775         int i, size;
776         struct cnic_local *cp = dev->cnic_priv;
777
778         size = pages * (sizeof(void *) + sizeof(dma_addr_t));
779         dma->pg_arr = kzalloc(size, GFP_ATOMIC);
780         if (dma->pg_arr == NULL)
781                 return -ENOMEM;
782
783         dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
784         dma->num_pages = pages;
785
786         for (i = 0; i < pages; i++) {
787                 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
788                                                     BNX2_PAGE_SIZE,
789                                                     &dma->pg_map_arr[i],
790                                                     GFP_ATOMIC);
791                 if (dma->pg_arr[i] == NULL)
792                         goto error;
793         }
794         if (!use_pg_tbl)
795                 return 0;
796
797         dma->pgtbl_size = ((pages * 8) + BNX2_PAGE_SIZE - 1) &
798                           ~(BNX2_PAGE_SIZE - 1);
799         dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
800                                         &dma->pgtbl_map, GFP_ATOMIC);
801         if (dma->pgtbl == NULL)
802                 goto error;
803
804         cp->setup_pgtbl(dev, dma);
805
806         return 0;
807
808 error:
809         cnic_free_dma(dev, dma);
810         return -ENOMEM;
811 }
812
813 static void cnic_free_context(struct cnic_dev *dev)
814 {
815         struct cnic_local *cp = dev->cnic_priv;
816         int i;
817
818         for (i = 0; i < cp->ctx_blks; i++) {
819                 if (cp->ctx_arr[i].ctx) {
820                         dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
821                                           cp->ctx_arr[i].ctx,
822                                           cp->ctx_arr[i].mapping);
823                         cp->ctx_arr[i].ctx = NULL;
824                 }
825         }
826 }
827
828 static void __cnic_free_uio_rings(struct cnic_uio_dev *udev)
829 {
830         if (udev->l2_buf) {
831                 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
832                                   udev->l2_buf, udev->l2_buf_map);
833                 udev->l2_buf = NULL;
834         }
835
836         if (udev->l2_ring) {
837                 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
838                                   udev->l2_ring, udev->l2_ring_map);
839                 udev->l2_ring = NULL;
840         }
841
842 }
843
844 static void __cnic_free_uio(struct cnic_uio_dev *udev)
845 {
846         uio_unregister_device(&udev->cnic_uinfo);
847
848         __cnic_free_uio_rings(udev);
849
850         pci_dev_put(udev->pdev);
851         kfree(udev);
852 }
853
854 static void cnic_free_uio(struct cnic_uio_dev *udev)
855 {
856         if (!udev)
857                 return;
858
859         write_lock(&cnic_dev_lock);
860         list_del_init(&udev->list);
861         write_unlock(&cnic_dev_lock);
862         __cnic_free_uio(udev);
863 }
864
865 static void cnic_free_resc(struct cnic_dev *dev)
866 {
867         struct cnic_local *cp = dev->cnic_priv;
868         struct cnic_uio_dev *udev = cp->udev;
869
870         if (udev) {
871                 udev->dev = NULL;
872                 cp->udev = NULL;
873                 if (udev->uio_dev == -1)
874                         __cnic_free_uio_rings(udev);
875         }
876
877         cnic_free_context(dev);
878         kfree(cp->ctx_arr);
879         cp->ctx_arr = NULL;
880         cp->ctx_blks = 0;
881
882         cnic_free_dma(dev, &cp->gbl_buf_info);
883         cnic_free_dma(dev, &cp->kwq_info);
884         cnic_free_dma(dev, &cp->kwq_16_data_info);
885         cnic_free_dma(dev, &cp->kcq2.dma);
886         cnic_free_dma(dev, &cp->kcq1.dma);
887         kfree(cp->iscsi_tbl);
888         cp->iscsi_tbl = NULL;
889         kfree(cp->ctx_tbl);
890         cp->ctx_tbl = NULL;
891
892         cnic_free_id_tbl(&cp->fcoe_cid_tbl);
893         cnic_free_id_tbl(&cp->cid_tbl);
894 }
895
896 static int cnic_alloc_context(struct cnic_dev *dev)
897 {
898         struct cnic_local *cp = dev->cnic_priv;
899
900         if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
901                 int i, k, arr_size;
902
903                 cp->ctx_blk_size = BNX2_PAGE_SIZE;
904                 cp->cids_per_blk = BNX2_PAGE_SIZE / 128;
905                 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
906                            sizeof(struct cnic_ctx);
907                 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
908                 if (cp->ctx_arr == NULL)
909                         return -ENOMEM;
910
911                 k = 0;
912                 for (i = 0; i < 2; i++) {
913                         u32 j, reg, off, lo, hi;
914
915                         if (i == 0)
916                                 off = BNX2_PG_CTX_MAP;
917                         else
918                                 off = BNX2_ISCSI_CTX_MAP;
919
920                         reg = cnic_reg_rd_ind(dev, off);
921                         lo = reg >> 16;
922                         hi = reg & 0xffff;
923                         for (j = lo; j < hi; j += cp->cids_per_blk, k++)
924                                 cp->ctx_arr[k].cid = j;
925                 }
926
927                 cp->ctx_blks = k;
928                 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
929                         cp->ctx_blks = 0;
930                         return -ENOMEM;
931                 }
932
933                 for (i = 0; i < cp->ctx_blks; i++) {
934                         cp->ctx_arr[i].ctx =
935                                 dma_alloc_coherent(&dev->pcidev->dev,
936                                                    BNX2_PAGE_SIZE,
937                                                    &cp->ctx_arr[i].mapping,
938                                                    GFP_KERNEL);
939                         if (cp->ctx_arr[i].ctx == NULL)
940                                 return -ENOMEM;
941                 }
942         }
943         return 0;
944 }
945
946 static u16 cnic_bnx2_next_idx(u16 idx)
947 {
948         return idx + 1;
949 }
950
951 static u16 cnic_bnx2_hw_idx(u16 idx)
952 {
953         return idx;
954 }
955
956 static u16 cnic_bnx2x_next_idx(u16 idx)
957 {
958         idx++;
959         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
960                 idx++;
961
962         return idx;
963 }
964
965 static u16 cnic_bnx2x_hw_idx(u16 idx)
966 {
967         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
968                 idx++;
969         return idx;
970 }
971
972 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
973                           bool use_pg_tbl)
974 {
975         int err, i, use_page_tbl = 0;
976         struct kcqe **kcq;
977
978         if (use_pg_tbl)
979                 use_page_tbl = 1;
980
981         err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
982         if (err)
983                 return err;
984
985         kcq = (struct kcqe **) info->dma.pg_arr;
986         info->kcq = kcq;
987
988         info->next_idx = cnic_bnx2_next_idx;
989         info->hw_idx = cnic_bnx2_hw_idx;
990         if (use_pg_tbl)
991                 return 0;
992
993         info->next_idx = cnic_bnx2x_next_idx;
994         info->hw_idx = cnic_bnx2x_hw_idx;
995
996         for (i = 0; i < KCQ_PAGE_CNT; i++) {
997                 struct bnx2x_bd_chain_next *next =
998                         (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
999                 int j = i + 1;
1000
1001                 if (j >= KCQ_PAGE_CNT)
1002                         j = 0;
1003                 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
1004                 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
1005         }
1006         return 0;
1007 }
1008
1009 static int __cnic_alloc_uio_rings(struct cnic_uio_dev *udev, int pages)
1010 {
1011         struct cnic_local *cp = udev->dev->cnic_priv;
1012
1013         if (udev->l2_ring)
1014                 return 0;
1015
1016         udev->l2_ring_size = pages * BNX2_PAGE_SIZE;
1017         udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1018                                            &udev->l2_ring_map,
1019                                            GFP_KERNEL | __GFP_COMP);
1020         if (!udev->l2_ring)
1021                 return -ENOMEM;
1022
1023         udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1024         udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1025         udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1026                                           &udev->l2_buf_map,
1027                                           GFP_KERNEL | __GFP_COMP);
1028         if (!udev->l2_buf) {
1029                 __cnic_free_uio_rings(udev);
1030                 return -ENOMEM;
1031         }
1032
1033         return 0;
1034
1035 }
1036
1037 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
1038 {
1039         struct cnic_local *cp = dev->cnic_priv;
1040         struct cnic_uio_dev *udev;
1041
1042         read_lock(&cnic_dev_lock);
1043         list_for_each_entry(udev, &cnic_udev_list, list) {
1044                 if (udev->pdev == dev->pcidev) {
1045                         udev->dev = dev;
1046                         if (__cnic_alloc_uio_rings(udev, pages)) {
1047                                 udev->dev = NULL;
1048                                 read_unlock(&cnic_dev_lock);
1049                                 return -ENOMEM;
1050                         }
1051                         cp->udev = udev;
1052                         read_unlock(&cnic_dev_lock);
1053                         return 0;
1054                 }
1055         }
1056         read_unlock(&cnic_dev_lock);
1057
1058         udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1059         if (!udev)
1060                 return -ENOMEM;
1061
1062         udev->uio_dev = -1;
1063
1064         udev->dev = dev;
1065         udev->pdev = dev->pcidev;
1066
1067         if (__cnic_alloc_uio_rings(udev, pages))
1068                 goto err_udev;
1069
1070         write_lock(&cnic_dev_lock);
1071         list_add(&udev->list, &cnic_udev_list);
1072         write_unlock(&cnic_dev_lock);
1073
1074         pci_dev_get(udev->pdev);
1075
1076         cp->udev = udev;
1077
1078         return 0;
1079
1080  err_udev:
1081         kfree(udev);
1082         return -ENOMEM;
1083 }
1084
1085 static int cnic_init_uio(struct cnic_dev *dev)
1086 {
1087         struct cnic_local *cp = dev->cnic_priv;
1088         struct cnic_uio_dev *udev = cp->udev;
1089         struct uio_info *uinfo;
1090         int ret = 0;
1091
1092         if (!udev)
1093                 return -ENOMEM;
1094
1095         uinfo = &udev->cnic_uinfo;
1096
1097         uinfo->mem[0].addr = pci_resource_start(dev->pcidev, 0);
1098         uinfo->mem[0].internal_addr = dev->regview;
1099         uinfo->mem[0].memtype = UIO_MEM_PHYS;
1100
1101         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1102                 uinfo->mem[0].size = MB_GET_CID_ADDR(TX_TSS_CID +
1103                                                      TX_MAX_TSS_RINGS + 1);
1104                 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1105                                         PAGE_MASK;
1106                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1107                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1108                 else
1109                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1110
1111                 uinfo->name = "bnx2_cnic";
1112         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1113                 uinfo->mem[0].size = pci_resource_len(dev->pcidev, 0);
1114
1115                 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1116                         PAGE_MASK;
1117                 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1118
1119                 uinfo->name = "bnx2x_cnic";
1120         }
1121
1122         uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1123
1124         uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1125         uinfo->mem[2].size = udev->l2_ring_size;
1126         uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1127
1128         uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1129         uinfo->mem[3].size = udev->l2_buf_size;
1130         uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1131
1132         uinfo->version = CNIC_MODULE_VERSION;
1133         uinfo->irq = UIO_IRQ_CUSTOM;
1134
1135         uinfo->open = cnic_uio_open;
1136         uinfo->release = cnic_uio_close;
1137
1138         if (udev->uio_dev == -1) {
1139                 if (!uinfo->priv) {
1140                         uinfo->priv = udev;
1141
1142                         ret = uio_register_device(&udev->pdev->dev, uinfo);
1143                 }
1144         } else {
1145                 cnic_init_rings(dev);
1146         }
1147
1148         return ret;
1149 }
1150
1151 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1152 {
1153         struct cnic_local *cp = dev->cnic_priv;
1154         int ret;
1155
1156         ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1157         if (ret)
1158                 goto error;
1159         cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1160
1161         ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1162         if (ret)
1163                 goto error;
1164
1165         ret = cnic_alloc_context(dev);
1166         if (ret)
1167                 goto error;
1168
1169         ret = cnic_alloc_uio_rings(dev, 2);
1170         if (ret)
1171                 goto error;
1172
1173         ret = cnic_init_uio(dev);
1174         if (ret)
1175                 goto error;
1176
1177         return 0;
1178
1179 error:
1180         cnic_free_resc(dev);
1181         return ret;
1182 }
1183
1184 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1185 {
1186         struct cnic_local *cp = dev->cnic_priv;
1187         int ctx_blk_size = cp->ethdev->ctx_blk_size;
1188         int total_mem, blks, i;
1189
1190         total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1191         blks = total_mem / ctx_blk_size;
1192         if (total_mem % ctx_blk_size)
1193                 blks++;
1194
1195         if (blks > cp->ethdev->ctx_tbl_len)
1196                 return -ENOMEM;
1197
1198         cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1199         if (cp->ctx_arr == NULL)
1200                 return -ENOMEM;
1201
1202         cp->ctx_blks = blks;
1203         cp->ctx_blk_size = ctx_blk_size;
1204         if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1205                 cp->ctx_align = 0;
1206         else
1207                 cp->ctx_align = ctx_blk_size;
1208
1209         cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1210
1211         for (i = 0; i < blks; i++) {
1212                 cp->ctx_arr[i].ctx =
1213                         dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1214                                            &cp->ctx_arr[i].mapping,
1215                                            GFP_KERNEL);
1216                 if (cp->ctx_arr[i].ctx == NULL)
1217                         return -ENOMEM;
1218
1219                 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1220                         if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1221                                 cnic_free_context(dev);
1222                                 cp->ctx_blk_size += cp->ctx_align;
1223                                 i = -1;
1224                                 continue;
1225                         }
1226                 }
1227         }
1228         return 0;
1229 }
1230
1231 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1232 {
1233         struct cnic_local *cp = dev->cnic_priv;
1234         struct cnic_eth_dev *ethdev = cp->ethdev;
1235         u32 start_cid = ethdev->starting_cid;
1236         int i, j, n, ret, pages;
1237         struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1238
1239         cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1240         cp->iscsi_start_cid = start_cid;
1241         cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1242
1243         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1244                 cp->max_cid_space += dev->max_fcoe_conn;
1245                 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1246                 if (!cp->fcoe_init_cid)
1247                         cp->fcoe_init_cid = 0x10;
1248         }
1249
1250         cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1251                                 GFP_KERNEL);
1252         if (!cp->iscsi_tbl)
1253                 goto error;
1254
1255         cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1256                                 cp->max_cid_space, GFP_KERNEL);
1257         if (!cp->ctx_tbl)
1258                 goto error;
1259
1260         for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1261                 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1262                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1263         }
1264
1265         for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1266                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1267
1268         pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1269                 PAGE_SIZE;
1270
1271         ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1272         if (ret)
1273                 return -ENOMEM;
1274
1275         n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1276         for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1277                 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1278
1279                 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1280                 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1281                                                    off;
1282
1283                 if ((i % n) == (n - 1))
1284                         j++;
1285         }
1286
1287         ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1288         if (ret)
1289                 goto error;
1290
1291         if (CNIC_SUPPORTS_FCOE(cp)) {
1292                 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1293                 if (ret)
1294                         goto error;
1295         }
1296
1297         pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1298         ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1299         if (ret)
1300                 goto error;
1301
1302         ret = cnic_alloc_bnx2x_context(dev);
1303         if (ret)
1304                 goto error;
1305
1306         if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
1307                 return 0;
1308
1309         cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1310
1311         cp->l2_rx_ring_size = 15;
1312
1313         ret = cnic_alloc_uio_rings(dev, 4);
1314         if (ret)
1315                 goto error;
1316
1317         ret = cnic_init_uio(dev);
1318         if (ret)
1319                 goto error;
1320
1321         return 0;
1322
1323 error:
1324         cnic_free_resc(dev);
1325         return -ENOMEM;
1326 }
1327
1328 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1329 {
1330         return cp->max_kwq_idx -
1331                 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1332 }
1333
1334 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1335                                   u32 num_wqes)
1336 {
1337         struct cnic_local *cp = dev->cnic_priv;
1338         struct kwqe *prod_qe;
1339         u16 prod, sw_prod, i;
1340
1341         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1342                 return -EAGAIN;         /* bnx2 is down */
1343
1344         spin_lock_bh(&cp->cnic_ulp_lock);
1345         if (num_wqes > cnic_kwq_avail(cp) &&
1346             !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1347                 spin_unlock_bh(&cp->cnic_ulp_lock);
1348                 return -EAGAIN;
1349         }
1350
1351         clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1352
1353         prod = cp->kwq_prod_idx;
1354         sw_prod = prod & MAX_KWQ_IDX;
1355         for (i = 0; i < num_wqes; i++) {
1356                 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1357                 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1358                 prod++;
1359                 sw_prod = prod & MAX_KWQ_IDX;
1360         }
1361         cp->kwq_prod_idx = prod;
1362
1363         CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1364
1365         spin_unlock_bh(&cp->cnic_ulp_lock);
1366         return 0;
1367 }
1368
1369 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1370                                    union l5cm_specific_data *l5_data)
1371 {
1372         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1373         dma_addr_t map;
1374
1375         map = ctx->kwqe_data_mapping;
1376         l5_data->phy_address.lo = (u64) map & 0xffffffff;
1377         l5_data->phy_address.hi = (u64) map >> 32;
1378         return ctx->kwqe_data;
1379 }
1380
1381 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1382                                 u32 type, union l5cm_specific_data *l5_data)
1383 {
1384         struct cnic_local *cp = dev->cnic_priv;
1385         struct l5cm_spe kwqe;
1386         struct kwqe_16 *kwq[1];
1387         u16 type_16;
1388         int ret;
1389
1390         kwqe.hdr.conn_and_cmd_data =
1391                 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1392                              BNX2X_HW_CID(cp, cid)));
1393
1394         type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1395         type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1396                    SPE_HDR_FUNCTION_ID;
1397
1398         kwqe.hdr.type = cpu_to_le16(type_16);
1399         kwqe.hdr.reserved1 = 0;
1400         kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1401         kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1402
1403         kwq[0] = (struct kwqe_16 *) &kwqe;
1404
1405         spin_lock_bh(&cp->cnic_ulp_lock);
1406         ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1407         spin_unlock_bh(&cp->cnic_ulp_lock);
1408
1409         if (ret == 1)
1410                 return 0;
1411
1412         return ret;
1413 }
1414
1415 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1416                                    struct kcqe *cqes[], u32 num_cqes)
1417 {
1418         struct cnic_local *cp = dev->cnic_priv;
1419         struct cnic_ulp_ops *ulp_ops;
1420
1421         rcu_read_lock();
1422         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1423         if (likely(ulp_ops)) {
1424                 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1425                                           cqes, num_cqes);
1426         }
1427         rcu_read_unlock();
1428 }
1429
1430 static void cnic_bnx2x_set_tcp_options(struct cnic_dev *dev, int time_stamps,
1431                                        int en_tcp_dack)
1432 {
1433         struct cnic_local *cp = dev->cnic_priv;
1434         struct bnx2x *bp = netdev_priv(dev->netdev);
1435         u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1436         u16 tstorm_flags = 0;
1437
1438         if (time_stamps) {
1439                 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1440                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1441         }
1442         if (en_tcp_dack)
1443                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_DELAYED_ACK_EN;
1444
1445         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1446                  XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1447
1448         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1449                   TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1450 }
1451
1452 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1453 {
1454         struct cnic_local *cp = dev->cnic_priv;
1455         struct bnx2x *bp = netdev_priv(dev->netdev);
1456         struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1457         int hq_bds, pages;
1458         u32 pfid = cp->pfid;
1459
1460         cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1461         cp->num_ccells = req1->num_ccells_per_conn;
1462         cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1463                               cp->num_iscsi_tasks;
1464         cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1465                         BNX2X_ISCSI_R2TQE_SIZE;
1466         cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1467         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1468         hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1469         cp->num_cqs = req1->num_cqs;
1470
1471         if (!dev->max_iscsi_conn)
1472                 return 0;
1473
1474         /* init Tstorm RAM */
1475         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1476                   req1->rq_num_wqes);
1477         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1478                   PAGE_SIZE);
1479         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1480                  TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1481         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1482                   TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1483                   req1->num_tasks_per_conn);
1484
1485         /* init Ustorm RAM */
1486         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1487                   USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1488                   req1->rq_buffer_size);
1489         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1490                   PAGE_SIZE);
1491         CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1492                  USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1493         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1494                   USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1495                   req1->num_tasks_per_conn);
1496         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1497                   req1->rq_num_wqes);
1498         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1499                   req1->cq_num_wqes);
1500         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1501                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1502
1503         /* init Xstorm RAM */
1504         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1505                   PAGE_SIZE);
1506         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1507                  XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1508         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1509                   XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1510                   req1->num_tasks_per_conn);
1511         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1512                   hq_bds);
1513         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1514                   req1->num_tasks_per_conn);
1515         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1516                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1517
1518         /* init Cstorm RAM */
1519         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1520                   PAGE_SIZE);
1521         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1522                  CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1523         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1524                   CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1525                   req1->num_tasks_per_conn);
1526         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1527                   req1->cq_num_wqes);
1528         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1529                   hq_bds);
1530
1531         cnic_bnx2x_set_tcp_options(dev,
1532                         req1->flags & ISCSI_KWQE_INIT1_TIME_STAMPS_ENABLE,
1533                         req1->flags & ISCSI_KWQE_INIT1_DELAYED_ACK_ENABLE);
1534
1535         return 0;
1536 }
1537
1538 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1539 {
1540         struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1541         struct cnic_local *cp = dev->cnic_priv;
1542         struct bnx2x *bp = netdev_priv(dev->netdev);
1543         u32 pfid = cp->pfid;
1544         struct iscsi_kcqe kcqe;
1545         struct kcqe *cqes[1];
1546
1547         memset(&kcqe, 0, sizeof(kcqe));
1548         if (!dev->max_iscsi_conn) {
1549                 kcqe.completion_status =
1550                         ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1551                 goto done;
1552         }
1553
1554         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1555                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1556         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1557                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1558                 req2->error_bit_map[1]);
1559
1560         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1561                   USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1562         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1563                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1564         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1565                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1566                 req2->error_bit_map[1]);
1567
1568         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1569                   CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1570
1571         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1572
1573 done:
1574         kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1575         cqes[0] = (struct kcqe *) &kcqe;
1576         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1577
1578         return 0;
1579 }
1580
1581 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1582 {
1583         struct cnic_local *cp = dev->cnic_priv;
1584         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1585
1586         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1587                 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1588
1589                 cnic_free_dma(dev, &iscsi->hq_info);
1590                 cnic_free_dma(dev, &iscsi->r2tq_info);
1591                 cnic_free_dma(dev, &iscsi->task_array_info);
1592                 cnic_free_id(&cp->cid_tbl, ctx->cid);
1593         } else {
1594                 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1595         }
1596
1597         ctx->cid = 0;
1598 }
1599
1600 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1601 {
1602         u32 cid;
1603         int ret, pages;
1604         struct cnic_local *cp = dev->cnic_priv;
1605         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1606         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1607
1608         if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1609                 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1610                 if (cid == -1) {
1611                         ret = -ENOMEM;
1612                         goto error;
1613                 }
1614                 ctx->cid = cid;
1615                 return 0;
1616         }
1617
1618         cid = cnic_alloc_new_id(&cp->cid_tbl);
1619         if (cid == -1) {
1620                 ret = -ENOMEM;
1621                 goto error;
1622         }
1623
1624         ctx->cid = cid;
1625         pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1626
1627         ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1628         if (ret)
1629                 goto error;
1630
1631         pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1632         ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1633         if (ret)
1634                 goto error;
1635
1636         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1637         ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1638         if (ret)
1639                 goto error;
1640
1641         return 0;
1642
1643 error:
1644         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1645         return ret;
1646 }
1647
1648 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1649                                 struct regpair *ctx_addr)
1650 {
1651         struct cnic_local *cp = dev->cnic_priv;
1652         struct cnic_eth_dev *ethdev = cp->ethdev;
1653         int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1654         int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1655         unsigned long align_off = 0;
1656         dma_addr_t ctx_map;
1657         void *ctx;
1658
1659         if (cp->ctx_align) {
1660                 unsigned long mask = cp->ctx_align - 1;
1661
1662                 if (cp->ctx_arr[blk].mapping & mask)
1663                         align_off = cp->ctx_align -
1664                                     (cp->ctx_arr[blk].mapping & mask);
1665         }
1666         ctx_map = cp->ctx_arr[blk].mapping + align_off +
1667                 (off * BNX2X_CONTEXT_MEM_SIZE);
1668         ctx = cp->ctx_arr[blk].ctx + align_off +
1669               (off * BNX2X_CONTEXT_MEM_SIZE);
1670         if (init)
1671                 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1672
1673         ctx_addr->lo = ctx_map & 0xffffffff;
1674         ctx_addr->hi = (u64) ctx_map >> 32;
1675         return ctx;
1676 }
1677
1678 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1679                                 u32 num)
1680 {
1681         struct cnic_local *cp = dev->cnic_priv;
1682         struct iscsi_kwqe_conn_offload1 *req1 =
1683                         (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1684         struct iscsi_kwqe_conn_offload2 *req2 =
1685                         (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1686         struct iscsi_kwqe_conn_offload3 *req3;
1687         struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1688         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1689         u32 cid = ctx->cid;
1690         u32 hw_cid = BNX2X_HW_CID(cp, cid);
1691         struct iscsi_context *ictx;
1692         struct regpair context_addr;
1693         int i, j, n = 2, n_max;
1694         u8 port = CNIC_PORT(cp);
1695
1696         ctx->ctx_flags = 0;
1697         if (!req2->num_additional_wqes)
1698                 return -EINVAL;
1699
1700         n_max = req2->num_additional_wqes + 2;
1701
1702         ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1703         if (ictx == NULL)
1704                 return -ENOMEM;
1705
1706         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1707
1708         ictx->xstorm_ag_context.hq_prod = 1;
1709
1710         ictx->xstorm_st_context.iscsi.first_burst_length =
1711                 ISCSI_DEF_FIRST_BURST_LEN;
1712         ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1713                 ISCSI_DEF_MAX_RECV_SEG_LEN;
1714         ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1715                 req1->sq_page_table_addr_lo;
1716         ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1717                 req1->sq_page_table_addr_hi;
1718         ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1719         ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1720         ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1721                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1722         ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1723                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1724         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1725                 iscsi->hq_info.pgtbl[0];
1726         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1727                 iscsi->hq_info.pgtbl[1];
1728         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1729                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1730         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1731                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1732         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1733                 iscsi->r2tq_info.pgtbl[0];
1734         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1735                 iscsi->r2tq_info.pgtbl[1];
1736         ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1737                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1738         ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1739                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1740         ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1741                 BNX2X_ISCSI_PBL_NOT_CACHED;
1742         ictx->xstorm_st_context.iscsi.flags.flags |=
1743                 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1744         ictx->xstorm_st_context.iscsi.flags.flags |=
1745                 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1746         ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1747                 ETH_P_8021Q;
1748         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
1749                 cp->port_mode == CHIP_2_PORT_MODE) {
1750
1751                 port = 0;
1752         }
1753         ictx->xstorm_st_context.common.flags =
1754                 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1755         ictx->xstorm_st_context.common.flags =
1756                 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1757
1758         ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1759         /* TSTORM requires the base address of RQ DB & not PTE */
1760         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1761                 req2->rq_page_table_addr_lo & PAGE_MASK;
1762         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1763                 req2->rq_page_table_addr_hi;
1764         ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1765         ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1766         ictx->tstorm_st_context.tcp.flags2 |=
1767                 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1768         ictx->tstorm_st_context.tcp.ooo_support_mode =
1769                 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1770
1771         ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1772
1773         ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1774                 req2->rq_page_table_addr_lo;
1775         ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1776                 req2->rq_page_table_addr_hi;
1777         ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1778         ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1779         ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1780                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1781         ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1782                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1783         ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1784                 iscsi->r2tq_info.pgtbl[0];
1785         ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1786                 iscsi->r2tq_info.pgtbl[1];
1787         ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1788                 req1->cq_page_table_addr_lo;
1789         ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1790                 req1->cq_page_table_addr_hi;
1791         ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1792         ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1793         ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1794         ictx->ustorm_st_context.task_pbe_cache_index =
1795                 BNX2X_ISCSI_PBL_NOT_CACHED;
1796         ictx->ustorm_st_context.task_pdu_cache_index =
1797                 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1798
1799         for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1800                 if (j == 3) {
1801                         if (n >= n_max)
1802                                 break;
1803                         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1804                         j = 0;
1805                 }
1806                 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1807                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1808                         req3->qp_first_pte[j].hi;
1809                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1810                         req3->qp_first_pte[j].lo;
1811         }
1812
1813         ictx->ustorm_st_context.task_pbl_base.lo =
1814                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1815         ictx->ustorm_st_context.task_pbl_base.hi =
1816                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1817         ictx->ustorm_st_context.tce_phy_addr.lo =
1818                 iscsi->task_array_info.pgtbl[0];
1819         ictx->ustorm_st_context.tce_phy_addr.hi =
1820                 iscsi->task_array_info.pgtbl[1];
1821         ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1822         ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1823         ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1824         ictx->ustorm_st_context.negotiated_rx_and_flags |=
1825                 ISCSI_DEF_MAX_BURST_LEN;
1826         ictx->ustorm_st_context.negotiated_rx |=
1827                 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1828                 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1829
1830         ictx->cstorm_st_context.hq_pbl_base.lo =
1831                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1832         ictx->cstorm_st_context.hq_pbl_base.hi =
1833                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1834         ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1835         ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1836         ictx->cstorm_st_context.task_pbl_base.lo =
1837                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1838         ictx->cstorm_st_context.task_pbl_base.hi =
1839                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1840         /* CSTORM and USTORM initialization is different, CSTORM requires
1841          * CQ DB base & not PTE addr */
1842         ictx->cstorm_st_context.cq_db_base.lo =
1843                 req1->cq_page_table_addr_lo & PAGE_MASK;
1844         ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1845         ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1846         ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1847         for (i = 0; i < cp->num_cqs; i++) {
1848                 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1849                         ISCSI_INITIAL_SN;
1850                 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1851                         ISCSI_INITIAL_SN;
1852         }
1853
1854         ictx->xstorm_ag_context.cdu_reserved =
1855                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1856                                        ISCSI_CONNECTION_TYPE);
1857         ictx->ustorm_ag_context.cdu_usage =
1858                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1859                                        ISCSI_CONNECTION_TYPE);
1860         return 0;
1861
1862 }
1863
1864 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1865                                    u32 num, int *work)
1866 {
1867         struct iscsi_kwqe_conn_offload1 *req1;
1868         struct iscsi_kwqe_conn_offload2 *req2;
1869         struct cnic_local *cp = dev->cnic_priv;
1870         struct cnic_context *ctx;
1871         struct iscsi_kcqe kcqe;
1872         struct kcqe *cqes[1];
1873         u32 l5_cid;
1874         int ret = 0;
1875
1876         if (num < 2) {
1877                 *work = num;
1878                 return -EINVAL;
1879         }
1880
1881         req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1882         req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1883         if ((num - 2) < req2->num_additional_wqes) {
1884                 *work = num;
1885                 return -EINVAL;
1886         }
1887         *work = 2 + req2->num_additional_wqes;
1888
1889         l5_cid = req1->iscsi_conn_id;
1890         if (l5_cid >= MAX_ISCSI_TBL_SZ)
1891                 return -EINVAL;
1892
1893         memset(&kcqe, 0, sizeof(kcqe));
1894         kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1895         kcqe.iscsi_conn_id = l5_cid;
1896         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1897
1898         ctx = &cp->ctx_tbl[l5_cid];
1899         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1900                 kcqe.completion_status =
1901                         ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1902                 goto done;
1903         }
1904
1905         if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1906                 atomic_dec(&cp->iscsi_conn);
1907                 goto done;
1908         }
1909         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1910         if (ret) {
1911                 atomic_dec(&cp->iscsi_conn);
1912                 ret = 0;
1913                 goto done;
1914         }
1915         ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1916         if (ret < 0) {
1917                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1918                 atomic_dec(&cp->iscsi_conn);
1919                 goto done;
1920         }
1921
1922         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1923         kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1924
1925 done:
1926         cqes[0] = (struct kcqe *) &kcqe;
1927         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1928         return 0;
1929 }
1930
1931
1932 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1933 {
1934         struct cnic_local *cp = dev->cnic_priv;
1935         struct iscsi_kwqe_conn_update *req =
1936                 (struct iscsi_kwqe_conn_update *) kwqe;
1937         void *data;
1938         union l5cm_specific_data l5_data;
1939         u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1940         int ret;
1941
1942         if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1943                 return -EINVAL;
1944
1945         data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1946         if (!data)
1947                 return -ENOMEM;
1948
1949         memcpy(data, kwqe, sizeof(struct kwqe));
1950
1951         ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1952                         req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1953         return ret;
1954 }
1955
1956 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1957 {
1958         struct cnic_local *cp = dev->cnic_priv;
1959         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1960         union l5cm_specific_data l5_data;
1961         int ret;
1962         u32 hw_cid;
1963
1964         init_waitqueue_head(&ctx->waitq);
1965         ctx->wait_cond = 0;
1966         memset(&l5_data, 0, sizeof(l5_data));
1967         hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1968
1969         ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1970                                   hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1971
1972         if (ret == 0) {
1973                 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1974                 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1975                         return -EBUSY;
1976         }
1977
1978         return 0;
1979 }
1980
1981 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1982 {
1983         struct cnic_local *cp = dev->cnic_priv;
1984         struct iscsi_kwqe_conn_destroy *req =
1985                 (struct iscsi_kwqe_conn_destroy *) kwqe;
1986         u32 l5_cid = req->reserved0;
1987         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1988         int ret = 0;
1989         struct iscsi_kcqe kcqe;
1990         struct kcqe *cqes[1];
1991
1992         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1993                 goto skip_cfc_delete;
1994
1995         if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1996                 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1997
1998                 if (delta > (2 * HZ))
1999                         delta = 0;
2000
2001                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2002                 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
2003                 goto destroy_reply;
2004         }
2005
2006         ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
2007
2008 skip_cfc_delete:
2009         cnic_free_bnx2x_conn_resc(dev, l5_cid);
2010
2011         if (!ret) {
2012                 atomic_dec(&cp->iscsi_conn);
2013                 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2014         }
2015
2016 destroy_reply:
2017         memset(&kcqe, 0, sizeof(kcqe));
2018         kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
2019         kcqe.iscsi_conn_id = l5_cid;
2020         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
2021         kcqe.iscsi_conn_context_id = req->context_id;
2022
2023         cqes[0] = (struct kcqe *) &kcqe;
2024         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
2025
2026         return 0;
2027 }
2028
2029 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
2030                                       struct l4_kwq_connect_req1 *kwqe1,
2031                                       struct l4_kwq_connect_req3 *kwqe3,
2032                                       struct l5cm_active_conn_buffer *conn_buf)
2033 {
2034         struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
2035         struct l5cm_xstorm_conn_buffer *xstorm_buf =
2036                 &conn_buf->xstorm_conn_buffer;
2037         struct l5cm_tstorm_conn_buffer *tstorm_buf =
2038                 &conn_buf->tstorm_conn_buffer;
2039         struct regpair context_addr;
2040         u32 cid = BNX2X_SW_CID(kwqe1->cid);
2041         struct in6_addr src_ip, dst_ip;
2042         int i;
2043         u32 *addrp;
2044
2045         addrp = (u32 *) &conn_addr->local_ip_addr;
2046         for (i = 0; i < 4; i++, addrp++)
2047                 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2048
2049         addrp = (u32 *) &conn_addr->remote_ip_addr;
2050         for (i = 0; i < 4; i++, addrp++)
2051                 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
2052
2053         cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
2054
2055         xstorm_buf->context_addr.hi = context_addr.hi;
2056         xstorm_buf->context_addr.lo = context_addr.lo;
2057         xstorm_buf->mss = 0xffff;
2058         xstorm_buf->rcv_buf = kwqe3->rcv_buf;
2059         if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
2060                 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
2061         xstorm_buf->pseudo_header_checksum =
2062                 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
2063
2064         if (kwqe3->ka_timeout) {
2065                 tstorm_buf->ka_enable = 1;
2066                 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
2067                 tstorm_buf->ka_interval = kwqe3->ka_interval;
2068                 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
2069         }
2070         tstorm_buf->max_rt_time = 0xffffffff;
2071 }
2072
2073 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2074 {
2075         struct cnic_local *cp = dev->cnic_priv;
2076         struct bnx2x *bp = netdev_priv(dev->netdev);
2077         u32 pfid = cp->pfid;
2078         u8 *mac = dev->mac_addr;
2079
2080         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2081                  XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2082         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2083                  XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2084         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2085                  XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2086         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2087                  XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2088         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2089                  XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2090         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2091                  XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2092
2093         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2094                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2095         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2096                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2097                  mac[4]);
2098         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2099                  TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2100         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2101                  TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2102                  mac[2]);
2103         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2104                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2105         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2106                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2107                  mac[0]);
2108 }
2109
2110 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2111                               u32 num, int *work)
2112 {
2113         struct cnic_local *cp = dev->cnic_priv;
2114         struct bnx2x *bp = netdev_priv(dev->netdev);
2115         struct l4_kwq_connect_req1 *kwqe1 =
2116                 (struct l4_kwq_connect_req1 *) wqes[0];
2117         struct l4_kwq_connect_req3 *kwqe3;
2118         struct l5cm_active_conn_buffer *conn_buf;
2119         struct l5cm_conn_addr_params *conn_addr;
2120         union l5cm_specific_data l5_data;
2121         u32 l5_cid = kwqe1->pg_cid;
2122         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2123         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2124         int ret;
2125
2126         if (num < 2) {
2127                 *work = num;
2128                 return -EINVAL;
2129         }
2130
2131         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2132                 *work = 3;
2133         else
2134                 *work = 2;
2135
2136         if (num < *work) {
2137                 *work = num;
2138                 return -EINVAL;
2139         }
2140
2141         if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2142                 netdev_err(dev->netdev, "conn_buf size too big\n");
2143                 return -ENOMEM;
2144         }
2145         conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2146         if (!conn_buf)
2147                 return -ENOMEM;
2148
2149         memset(conn_buf, 0, sizeof(*conn_buf));
2150
2151         conn_addr = &conn_buf->conn_addr_buf;
2152         conn_addr->remote_addr_0 = csk->ha[0];
2153         conn_addr->remote_addr_1 = csk->ha[1];
2154         conn_addr->remote_addr_2 = csk->ha[2];
2155         conn_addr->remote_addr_3 = csk->ha[3];
2156         conn_addr->remote_addr_4 = csk->ha[4];
2157         conn_addr->remote_addr_5 = csk->ha[5];
2158
2159         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2160                 struct l4_kwq_connect_req2 *kwqe2 =
2161                         (struct l4_kwq_connect_req2 *) wqes[1];
2162
2163                 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2164                 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2165                 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2166
2167                 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2168                 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2169                 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2170                 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2171         }
2172         kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2173
2174         conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2175         conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2176         conn_addr->local_tcp_port = kwqe1->src_port;
2177         conn_addr->remote_tcp_port = kwqe1->dst_port;
2178
2179         conn_addr->pmtu = kwqe3->pmtu;
2180         cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2181
2182         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2183                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2184
2185         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2186                         kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2187         if (!ret)
2188                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2189
2190         return ret;
2191 }
2192
2193 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2194 {
2195         struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2196         union l5cm_specific_data l5_data;
2197         int ret;
2198
2199         memset(&l5_data, 0, sizeof(l5_data));
2200         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2201                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2202         return ret;
2203 }
2204
2205 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2206 {
2207         struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2208         union l5cm_specific_data l5_data;
2209         int ret;
2210
2211         memset(&l5_data, 0, sizeof(l5_data));
2212         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2213                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2214         return ret;
2215 }
2216 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2217 {
2218         struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2219         struct l4_kcq kcqe;
2220         struct kcqe *cqes[1];
2221
2222         memset(&kcqe, 0, sizeof(kcqe));
2223         kcqe.pg_host_opaque = req->host_opaque;
2224         kcqe.pg_cid = req->host_opaque;
2225         kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2226         cqes[0] = (struct kcqe *) &kcqe;
2227         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2228         return 0;
2229 }
2230
2231 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2232 {
2233         struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2234         struct l4_kcq kcqe;
2235         struct kcqe *cqes[1];
2236
2237         memset(&kcqe, 0, sizeof(kcqe));
2238         kcqe.pg_host_opaque = req->pg_host_opaque;
2239         kcqe.pg_cid = req->pg_cid;
2240         kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2241         cqes[0] = (struct kcqe *) &kcqe;
2242         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2243         return 0;
2244 }
2245
2246 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2247 {
2248         struct fcoe_kwqe_stat *req;
2249         struct fcoe_stat_ramrod_params *fcoe_stat;
2250         union l5cm_specific_data l5_data;
2251         struct cnic_local *cp = dev->cnic_priv;
2252         int ret;
2253         u32 cid;
2254
2255         req = (struct fcoe_kwqe_stat *) kwqe;
2256         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2257
2258         fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2259         if (!fcoe_stat)
2260                 return -ENOMEM;
2261
2262         memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2263         memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2264
2265         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2266                                   FCOE_CONNECTION_TYPE, &l5_data);
2267         return ret;
2268 }
2269
2270 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2271                                  u32 num, int *work)
2272 {
2273         int ret;
2274         struct cnic_local *cp = dev->cnic_priv;
2275         u32 cid;
2276         struct fcoe_init_ramrod_params *fcoe_init;
2277         struct fcoe_kwqe_init1 *req1;
2278         struct fcoe_kwqe_init2 *req2;
2279         struct fcoe_kwqe_init3 *req3;
2280         union l5cm_specific_data l5_data;
2281
2282         if (num < 3) {
2283                 *work = num;
2284                 return -EINVAL;
2285         }
2286         req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2287         req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2288         req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2289         if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2290                 *work = 1;
2291                 return -EINVAL;
2292         }
2293         if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2294                 *work = 2;
2295                 return -EINVAL;
2296         }
2297
2298         if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2299                 netdev_err(dev->netdev, "fcoe_init size too big\n");
2300                 return -ENOMEM;
2301         }
2302         fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2303         if (!fcoe_init)
2304                 return -ENOMEM;
2305
2306         memset(fcoe_init, 0, sizeof(*fcoe_init));
2307         memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2308         memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2309         memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2310         fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2311         fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2312         fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2313
2314         fcoe_init->sb_num = cp->status_blk_num;
2315         fcoe_init->eq_prod = MAX_KCQ_IDX;
2316         fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2317         cp->kcq2.sw_prod_idx = 0;
2318
2319         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2320         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2321                                   FCOE_CONNECTION_TYPE, &l5_data);
2322         *work = 3;
2323         return ret;
2324 }
2325
2326 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2327                                  u32 num, int *work)
2328 {
2329         int ret = 0;
2330         u32 cid = -1, l5_cid;
2331         struct cnic_local *cp = dev->cnic_priv;
2332         struct fcoe_kwqe_conn_offload1 *req1;
2333         struct fcoe_kwqe_conn_offload2 *req2;
2334         struct fcoe_kwqe_conn_offload3 *req3;
2335         struct fcoe_kwqe_conn_offload4 *req4;
2336         struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2337         struct cnic_context *ctx;
2338         struct fcoe_context *fctx;
2339         struct regpair ctx_addr;
2340         union l5cm_specific_data l5_data;
2341         struct fcoe_kcqe kcqe;
2342         struct kcqe *cqes[1];
2343
2344         if (num < 4) {
2345                 *work = num;
2346                 return -EINVAL;
2347         }
2348         req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2349         req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2350         req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2351         req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2352
2353         *work = 4;
2354
2355         l5_cid = req1->fcoe_conn_id;
2356         if (l5_cid >= dev->max_fcoe_conn)
2357                 goto err_reply;
2358
2359         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2360
2361         ctx = &cp->ctx_tbl[l5_cid];
2362         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2363                 goto err_reply;
2364
2365         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2366         if (ret) {
2367                 ret = 0;
2368                 goto err_reply;
2369         }
2370         cid = ctx->cid;
2371
2372         fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2373         if (fctx) {
2374                 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2375                 u32 val;
2376
2377                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2378                                              FCOE_CONNECTION_TYPE);
2379                 fctx->xstorm_ag_context.cdu_reserved = val;
2380                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2381                                              FCOE_CONNECTION_TYPE);
2382                 fctx->ustorm_ag_context.cdu_usage = val;
2383         }
2384         if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2385                 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2386                 goto err_reply;
2387         }
2388         fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2389         if (!fcoe_offload)
2390                 goto err_reply;
2391
2392         memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2393         memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2394         memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2395         memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2396         memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2397
2398         cid = BNX2X_HW_CID(cp, cid);
2399         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2400                                   FCOE_CONNECTION_TYPE, &l5_data);
2401         if (!ret)
2402                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2403
2404         return ret;
2405
2406 err_reply:
2407         if (cid != -1)
2408                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2409
2410         memset(&kcqe, 0, sizeof(kcqe));
2411         kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2412         kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2413         kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2414
2415         cqes[0] = (struct kcqe *) &kcqe;
2416         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2417         return ret;
2418 }
2419
2420 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2421 {
2422         struct fcoe_kwqe_conn_enable_disable *req;
2423         struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2424         union l5cm_specific_data l5_data;
2425         int ret;
2426         u32 cid, l5_cid;
2427         struct cnic_local *cp = dev->cnic_priv;
2428
2429         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2430         cid = req->context_id;
2431         l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2432
2433         if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2434                 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2435                 return -ENOMEM;
2436         }
2437         fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2438         if (!fcoe_enable)
2439                 return -ENOMEM;
2440
2441         memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2442         memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2443         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2444                                   FCOE_CONNECTION_TYPE, &l5_data);
2445         return ret;
2446 }
2447
2448 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2449 {
2450         struct fcoe_kwqe_conn_enable_disable *req;
2451         struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2452         union l5cm_specific_data l5_data;
2453         int ret;
2454         u32 cid, l5_cid;
2455         struct cnic_local *cp = dev->cnic_priv;
2456
2457         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2458         cid = req->context_id;
2459         l5_cid = req->conn_id;
2460         if (l5_cid >= dev->max_fcoe_conn)
2461                 return -EINVAL;
2462
2463         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2464
2465         if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2466                 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2467                 return -ENOMEM;
2468         }
2469         fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2470         if (!fcoe_disable)
2471                 return -ENOMEM;
2472
2473         memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2474         memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2475         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2476                                   FCOE_CONNECTION_TYPE, &l5_data);
2477         return ret;
2478 }
2479
2480 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2481 {
2482         struct fcoe_kwqe_conn_destroy *req;
2483         union l5cm_specific_data l5_data;
2484         int ret;
2485         u32 cid, l5_cid;
2486         struct cnic_local *cp = dev->cnic_priv;
2487         struct cnic_context *ctx;
2488         struct fcoe_kcqe kcqe;
2489         struct kcqe *cqes[1];
2490
2491         req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2492         cid = req->context_id;
2493         l5_cid = req->conn_id;
2494         if (l5_cid >= dev->max_fcoe_conn)
2495                 return -EINVAL;
2496
2497         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2498
2499         ctx = &cp->ctx_tbl[l5_cid];
2500
2501         init_waitqueue_head(&ctx->waitq);
2502         ctx->wait_cond = 0;
2503
2504         memset(&kcqe, 0, sizeof(kcqe));
2505         kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2506         memset(&l5_data, 0, sizeof(l5_data));
2507         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2508                                   FCOE_CONNECTION_TYPE, &l5_data);
2509         if (ret == 0) {
2510                 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2511                 if (ctx->wait_cond)
2512                         kcqe.completion_status = 0;
2513         }
2514
2515         set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2516         queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2517
2518         kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2519         kcqe.fcoe_conn_id = req->conn_id;
2520         kcqe.fcoe_conn_context_id = cid;
2521
2522         cqes[0] = (struct kcqe *) &kcqe;
2523         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2524         return ret;
2525 }
2526
2527 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2528 {
2529         struct cnic_local *cp = dev->cnic_priv;
2530         u32 i;
2531
2532         for (i = start_cid; i < cp->max_cid_space; i++) {
2533                 struct cnic_context *ctx = &cp->ctx_tbl[i];
2534                 int j;
2535
2536                 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2537                         msleep(10);
2538
2539                 for (j = 0; j < 5; j++) {
2540                         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2541                                 break;
2542                         msleep(20);
2543                 }
2544
2545                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2546                         netdev_warn(dev->netdev, "CID %x not deleted\n",
2547                                    ctx->cid);
2548         }
2549 }
2550
2551 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2552 {
2553         struct fcoe_kwqe_destroy *req;
2554         union l5cm_specific_data l5_data;
2555         struct cnic_local *cp = dev->cnic_priv;
2556         int ret;
2557         u32 cid;
2558
2559         cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2560
2561         req = (struct fcoe_kwqe_destroy *) kwqe;
2562         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2563
2564         memset(&l5_data, 0, sizeof(l5_data));
2565         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2566                                   FCOE_CONNECTION_TYPE, &l5_data);
2567         return ret;
2568 }
2569
2570 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2571 {
2572         struct cnic_local *cp = dev->cnic_priv;
2573         struct kcqe kcqe;
2574         struct kcqe *cqes[1];
2575         u32 cid;
2576         u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2577         u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2578         u32 kcqe_op;
2579         int ulp_type;
2580
2581         cid = kwqe->kwqe_info0;
2582         memset(&kcqe, 0, sizeof(kcqe));
2583
2584         if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2585                 u32 l5_cid = 0;
2586
2587                 ulp_type = CNIC_ULP_FCOE;
2588                 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2589                         struct fcoe_kwqe_conn_enable_disable *req;
2590
2591                         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2592                         kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2593                         cid = req->context_id;
2594                         l5_cid = req->conn_id;
2595                 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2596                         kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2597                 } else {
2598                         return;
2599                 }
2600                 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2601                 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2602                 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2603                 kcqe.kcqe_info2 = cid;
2604                 kcqe.kcqe_info0 = l5_cid;
2605
2606         } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2607                 ulp_type = CNIC_ULP_ISCSI;
2608                 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2609                         cid = kwqe->kwqe_info1;
2610
2611                 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2612                 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2613                 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_PARITY_ERR;
2614                 kcqe.kcqe_info2 = cid;
2615                 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2616
2617         } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2618                 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2619
2620                 ulp_type = CNIC_ULP_L4;
2621                 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2622                         kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2623                 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2624                         kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2625                 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2626                         kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2627                 else
2628                         return;
2629
2630                 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2631                                     KCQE_FLAGS_LAYER_MASK_L4;
2632                 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_PARITY_ERROR;
2633                 l4kcqe->cid = cid;
2634                 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2635         } else {
2636                 return;
2637         }
2638
2639         cqes[0] = &kcqe;
2640         cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2641 }
2642
2643 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2644                                          struct kwqe *wqes[], u32 num_wqes)
2645 {
2646         int i, work, ret;
2647         u32 opcode;
2648         struct kwqe *kwqe;
2649
2650         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2651                 return -EAGAIN;         /* bnx2 is down */
2652
2653         for (i = 0; i < num_wqes; ) {
2654                 kwqe = wqes[i];
2655                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2656                 work = 1;
2657
2658                 switch (opcode) {
2659                 case ISCSI_KWQE_OPCODE_INIT1:
2660                         ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2661                         break;
2662                 case ISCSI_KWQE_OPCODE_INIT2:
2663                         ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2664                         break;
2665                 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2666                         ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2667                                                      num_wqes - i, &work);
2668                         break;
2669                 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2670                         ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2671                         break;
2672                 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2673                         ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2674                         break;
2675                 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2676                         ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2677                                                  &work);
2678                         break;
2679                 case L4_KWQE_OPCODE_VALUE_CLOSE:
2680                         ret = cnic_bnx2x_close(dev, kwqe);
2681                         break;
2682                 case L4_KWQE_OPCODE_VALUE_RESET:
2683                         ret = cnic_bnx2x_reset(dev, kwqe);
2684                         break;
2685                 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2686                         ret = cnic_bnx2x_offload_pg(dev, kwqe);
2687                         break;
2688                 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2689                         ret = cnic_bnx2x_update_pg(dev, kwqe);
2690                         break;
2691                 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2692                         ret = 0;
2693                         break;
2694                 default:
2695                         ret = 0;
2696                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2697                                    opcode);
2698                         break;
2699                 }
2700                 if (ret < 0) {
2701                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2702                                    opcode);
2703
2704                         /* Possibly bnx2x parity error, send completion
2705                          * to ulp drivers with error code to speed up
2706                          * cleanup and reset recovery.
2707                          */
2708                         if (ret == -EIO || ret == -EAGAIN)
2709                                 cnic_bnx2x_kwqe_err(dev, kwqe);
2710                 }
2711                 i += work;
2712         }
2713         return 0;
2714 }
2715
2716 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2717                                         struct kwqe *wqes[], u32 num_wqes)
2718 {
2719         struct cnic_local *cp = dev->cnic_priv;
2720         int i, work, ret;
2721         u32 opcode;
2722         struct kwqe *kwqe;
2723
2724         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2725                 return -EAGAIN;         /* bnx2 is down */
2726
2727         if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
2728                 return -EINVAL;
2729
2730         for (i = 0; i < num_wqes; ) {
2731                 kwqe = wqes[i];
2732                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2733                 work = 1;
2734
2735                 switch (opcode) {
2736                 case FCOE_KWQE_OPCODE_INIT1:
2737                         ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2738                                                     num_wqes - i, &work);
2739                         break;
2740                 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2741                         ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2742                                                     num_wqes - i, &work);
2743                         break;
2744                 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2745                         ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2746                         break;
2747                 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2748                         ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2749                         break;
2750                 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2751                         ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2752                         break;
2753                 case FCOE_KWQE_OPCODE_DESTROY:
2754                         ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2755                         break;
2756                 case FCOE_KWQE_OPCODE_STAT:
2757                         ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2758                         break;
2759                 default:
2760                         ret = 0;
2761                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2762                                    opcode);
2763                         break;
2764                 }
2765                 if (ret < 0) {
2766                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2767                                    opcode);
2768
2769                         /* Possibly bnx2x parity error, send completion
2770                          * to ulp drivers with error code to speed up
2771                          * cleanup and reset recovery.
2772                          */
2773                         if (ret == -EIO || ret == -EAGAIN)
2774                                 cnic_bnx2x_kwqe_err(dev, kwqe);
2775                 }
2776                 i += work;
2777         }
2778         return 0;
2779 }
2780
2781 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2782                                    u32 num_wqes)
2783 {
2784         int ret = -EINVAL;
2785         u32 layer_code;
2786
2787         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2788                 return -EAGAIN;         /* bnx2x is down */
2789
2790         if (!num_wqes)
2791                 return 0;
2792
2793         layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2794         switch (layer_code) {
2795         case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2796         case KWQE_FLAGS_LAYER_MASK_L4:
2797         case KWQE_FLAGS_LAYER_MASK_L2:
2798                 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2799                 break;
2800
2801         case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2802                 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2803                 break;
2804         }
2805         return ret;
2806 }
2807
2808 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2809 {
2810         if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2811                 return KCQE_FLAGS_LAYER_MASK_L4;
2812
2813         return opflag & KCQE_FLAGS_LAYER_MASK;
2814 }
2815
2816 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2817 {
2818         struct cnic_local *cp = dev->cnic_priv;
2819         int i, j, comp = 0;
2820
2821         i = 0;
2822         j = 1;
2823         while (num_cqes) {
2824                 struct cnic_ulp_ops *ulp_ops;
2825                 int ulp_type;
2826                 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2827                 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2828
2829                 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2830                         comp++;
2831
2832                 while (j < num_cqes) {
2833                         u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2834
2835                         if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2836                                 break;
2837
2838                         if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2839                                 comp++;
2840                         j++;
2841                 }
2842
2843                 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2844                         ulp_type = CNIC_ULP_RDMA;
2845                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2846                         ulp_type = CNIC_ULP_ISCSI;
2847                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2848                         ulp_type = CNIC_ULP_FCOE;
2849                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2850                         ulp_type = CNIC_ULP_L4;
2851                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2852                         goto end;
2853                 else {
2854                         netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2855                                    kcqe_op_flag);
2856                         goto end;
2857                 }
2858
2859                 rcu_read_lock();
2860                 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2861                 if (likely(ulp_ops)) {
2862                         ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2863                                                   cp->completed_kcq + i, j);
2864                 }
2865                 rcu_read_unlock();
2866 end:
2867                 num_cqes -= j;
2868                 i += j;
2869                 j = 1;
2870         }
2871         if (unlikely(comp))
2872                 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2873 }
2874
2875 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2876 {
2877         struct cnic_local *cp = dev->cnic_priv;
2878         u16 i, ri, hw_prod, last;
2879         struct kcqe *kcqe;
2880         int kcqe_cnt = 0, last_cnt = 0;
2881
2882         i = ri = last = info->sw_prod_idx;
2883         ri &= MAX_KCQ_IDX;
2884         hw_prod = *info->hw_prod_idx_ptr;
2885         hw_prod = info->hw_idx(hw_prod);
2886
2887         while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2888                 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2889                 cp->completed_kcq[kcqe_cnt++] = kcqe;
2890                 i = info->next_idx(i);
2891                 ri = i & MAX_KCQ_IDX;
2892                 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2893                         last_cnt = kcqe_cnt;
2894                         last = i;
2895                 }
2896         }
2897
2898         info->sw_prod_idx = last;
2899         return last_cnt;
2900 }
2901
2902 static int cnic_l2_completion(struct cnic_local *cp)
2903 {
2904         u16 hw_cons, sw_cons;
2905         struct cnic_uio_dev *udev = cp->udev;
2906         union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2907                                         (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
2908         u32 cmd;
2909         int comp = 0;
2910
2911         if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2912                 return 0;
2913
2914         hw_cons = *cp->rx_cons_ptr;
2915         if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2916                 hw_cons++;
2917
2918         sw_cons = cp->rx_cons;
2919         while (sw_cons != hw_cons) {
2920                 u8 cqe_fp_flags;
2921
2922                 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2923                 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2924                 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2925                         cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2926                         cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2927                         if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2928                             cmd == RAMROD_CMD_ID_ETH_HALT)
2929                                 comp++;
2930                 }
2931                 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2932         }
2933         return comp;
2934 }
2935
2936 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2937 {
2938         u16 rx_cons, tx_cons;
2939         int comp = 0;
2940
2941         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2942                 return;
2943
2944         rx_cons = *cp->rx_cons_ptr;
2945         tx_cons = *cp->tx_cons_ptr;
2946         if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2947                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2948                         comp = cnic_l2_completion(cp);
2949
2950                 cp->tx_cons = tx_cons;
2951                 cp->rx_cons = rx_cons;
2952
2953                 if (cp->udev)
2954                         uio_event_notify(&cp->udev->cnic_uinfo);
2955         }
2956         if (comp)
2957                 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2958 }
2959
2960 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2961 {
2962         struct cnic_local *cp = dev->cnic_priv;
2963         u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2964         int kcqe_cnt;
2965
2966         /* status block index must be read before reading other fields */
2967         rmb();
2968         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2969
2970         while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2971
2972                 service_kcqes(dev, kcqe_cnt);
2973
2974                 /* Tell compiler that status_blk fields can change. */
2975                 barrier();
2976                 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2977                 /* status block index must be read first */
2978                 rmb();
2979                 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2980         }
2981
2982         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2983
2984         cnic_chk_pkt_rings(cp);
2985
2986         return status_idx;
2987 }
2988
2989 static int cnic_service_bnx2(void *data, void *status_blk)
2990 {
2991         struct cnic_dev *dev = data;
2992
2993         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2994                 struct status_block *sblk = status_blk;
2995
2996                 return sblk->status_idx;
2997         }
2998
2999         return cnic_service_bnx2_queues(dev);
3000 }
3001
3002 static void cnic_service_bnx2_msix(unsigned long data)
3003 {
3004         struct cnic_dev *dev = (struct cnic_dev *) data;
3005         struct cnic_local *cp = dev->cnic_priv;
3006
3007         cp->last_status_idx = cnic_service_bnx2_queues(dev);
3008
3009         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3010                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3011 }
3012
3013 static void cnic_doirq(struct cnic_dev *dev)
3014 {
3015         struct cnic_local *cp = dev->cnic_priv;
3016
3017         if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
3018                 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
3019
3020                 prefetch(cp->status_blk.gen);
3021                 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
3022
3023                 tasklet_schedule(&cp->cnic_irq_task);
3024         }
3025 }
3026
3027 static irqreturn_t cnic_irq(int irq, void *dev_instance)
3028 {
3029         struct cnic_dev *dev = dev_instance;
3030         struct cnic_local *cp = dev->cnic_priv;
3031
3032         if (cp->ack_int)
3033                 cp->ack_int(dev);
3034
3035         cnic_doirq(dev);
3036
3037         return IRQ_HANDLED;
3038 }
3039
3040 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
3041                                       u16 index, u8 op, u8 update)
3042 {
3043         struct cnic_local *cp = dev->cnic_priv;
3044         u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
3045                        COMMAND_REG_INT_ACK);
3046         struct igu_ack_register igu_ack;
3047
3048         igu_ack.status_block_index = index;
3049         igu_ack.sb_id_and_flags =
3050                         ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
3051                          (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3052                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3053                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3054
3055         CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3056 }
3057
3058 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3059                             u16 index, u8 op, u8 update)
3060 {
3061         struct igu_regular cmd_data;
3062         u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3063
3064         cmd_data.sb_id_and_flags =
3065                 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3066                 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3067                 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3068                 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3069
3070
3071         CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3072 }
3073
3074 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3075 {
3076         struct cnic_local *cp = dev->cnic_priv;
3077
3078         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3079                            IGU_INT_DISABLE, 0);
3080 }
3081
3082 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3083 {
3084         struct cnic_local *cp = dev->cnic_priv;
3085
3086         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3087                         IGU_INT_DISABLE, 0);
3088 }
3089
3090 static void cnic_arm_bnx2x_msix(struct cnic_dev *dev, u32 idx)
3091 {
3092         struct cnic_local *cp = dev->cnic_priv;
3093
3094         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, idx,
3095                            IGU_INT_ENABLE, 1);
3096 }
3097
3098 static void cnic_arm_bnx2x_e2_msix(struct cnic_dev *dev, u32 idx)
3099 {
3100         struct cnic_local *cp = dev->cnic_priv;
3101
3102         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, idx,
3103                         IGU_INT_ENABLE, 1);
3104 }
3105
3106 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3107 {
3108         u32 last_status = *info->status_idx_ptr;
3109         int kcqe_cnt;
3110
3111         /* status block index must be read before reading the KCQ */
3112         rmb();
3113         while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3114
3115                 service_kcqes(dev, kcqe_cnt);
3116
3117                 /* Tell compiler that sblk fields can change. */
3118                 barrier();
3119
3120                 last_status = *info->status_idx_ptr;
3121                 /* status block index must be read before reading the KCQ */
3122                 rmb();
3123         }
3124         return last_status;
3125 }
3126
3127 static void cnic_service_bnx2x_bh(unsigned long data)
3128 {
3129         struct cnic_dev *dev = (struct cnic_dev *) data;
3130         struct cnic_local *cp = dev->cnic_priv;
3131         u32 status_idx, new_status_idx;
3132
3133         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3134                 return;
3135
3136         while (1) {
3137                 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3138
3139                 CNIC_WR16(dev, cp->kcq1.io_addr,
3140                           cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3141
3142                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE) {
3143                         cp->arm_int(dev, status_idx);
3144                         break;
3145                 }
3146
3147                 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3148
3149                 if (new_status_idx != status_idx)
3150                         continue;
3151
3152                 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3153                           MAX_KCQ_IDX);
3154
3155                 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3156                                 status_idx, IGU_INT_ENABLE, 1);
3157
3158                 break;
3159         }
3160 }
3161
3162 static int cnic_service_bnx2x(void *data, void *status_blk)
3163 {
3164         struct cnic_dev *dev = data;
3165         struct cnic_local *cp = dev->cnic_priv;
3166
3167         if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3168                 cnic_doirq(dev);
3169
3170         cnic_chk_pkt_rings(cp);
3171
3172         return 0;
3173 }
3174
3175 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3176 {
3177         struct cnic_ulp_ops *ulp_ops;
3178
3179         if (if_type == CNIC_ULP_ISCSI)
3180                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3181
3182         mutex_lock(&cnic_lock);
3183         ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3184                                             lockdep_is_held(&cnic_lock));
3185         if (!ulp_ops) {
3186                 mutex_unlock(&cnic_lock);
3187                 return;
3188         }
3189         set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3190         mutex_unlock(&cnic_lock);
3191
3192         if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3193                 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3194
3195         clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3196 }
3197
3198 static void cnic_ulp_stop(struct cnic_dev *dev)
3199 {
3200         struct cnic_local *cp = dev->cnic_priv;
3201         int if_type;
3202
3203         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3204                 cnic_ulp_stop_one(cp, if_type);
3205 }
3206
3207 static void cnic_ulp_start(struct cnic_dev *dev)
3208 {
3209         struct cnic_local *cp = dev->cnic_priv;
3210         int if_type;
3211
3212         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3213                 struct cnic_ulp_ops *ulp_ops;
3214
3215                 mutex_lock(&cnic_lock);
3216                 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3217                                                     lockdep_is_held(&cnic_lock));
3218                 if (!ulp_ops || !ulp_ops->cnic_start) {
3219                         mutex_unlock(&cnic_lock);
3220                         continue;
3221                 }
3222                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3223                 mutex_unlock(&cnic_lock);
3224
3225                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3226                         ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3227
3228                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3229         }
3230 }
3231
3232 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3233 {
3234         struct cnic_local *cp = dev->cnic_priv;
3235         struct cnic_ulp_ops *ulp_ops;
3236         int rc;
3237
3238         mutex_lock(&cnic_lock);
3239         ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3240         if (ulp_ops && ulp_ops->cnic_get_stats)
3241                 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3242         else
3243                 rc = -ENODEV;
3244         mutex_unlock(&cnic_lock);
3245         return rc;
3246 }
3247
3248 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3249 {
3250         struct cnic_dev *dev = data;
3251         int ulp_type = CNIC_ULP_ISCSI;
3252
3253         switch (info->cmd) {
3254         case CNIC_CTL_STOP_CMD:
3255                 cnic_hold(dev);
3256
3257                 cnic_ulp_stop(dev);
3258                 cnic_stop_hw(dev);
3259
3260                 cnic_put(dev);
3261                 break;
3262         case CNIC_CTL_START_CMD:
3263                 cnic_hold(dev);
3264
3265                 if (!cnic_start_hw(dev))
3266                         cnic_ulp_start(dev);
3267
3268                 cnic_put(dev);
3269                 break;
3270         case CNIC_CTL_STOP_ISCSI_CMD: {
3271                 struct cnic_local *cp = dev->cnic_priv;
3272                 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3273                 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3274                 break;
3275         }
3276         case CNIC_CTL_COMPLETION_CMD: {
3277                 struct cnic_ctl_completion *comp = &info->data.comp;
3278                 u32 cid = BNX2X_SW_CID(comp->cid);
3279                 u32 l5_cid;
3280                 struct cnic_local *cp = dev->cnic_priv;
3281
3282                 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
3283                         break;
3284
3285                 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3286                         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3287
3288                         if (unlikely(comp->error)) {
3289                                 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3290                                 netdev_err(dev->netdev,
3291                                            "CID %x CFC delete comp error %x\n",
3292                                            cid, comp->error);
3293                         }
3294
3295                         ctx->wait_cond = 1;
3296                         wake_up(&ctx->waitq);
3297                 }
3298                 break;
3299         }
3300         case CNIC_CTL_FCOE_STATS_GET_CMD:
3301                 ulp_type = CNIC_ULP_FCOE;
3302                 /* fall through */
3303         case CNIC_CTL_ISCSI_STATS_GET_CMD:
3304                 cnic_hold(dev);
3305                 cnic_copy_ulp_stats(dev, ulp_type);
3306                 cnic_put(dev);
3307                 break;
3308
3309         default:
3310                 return -EINVAL;
3311         }
3312         return 0;
3313 }
3314
3315 static void cnic_ulp_init(struct cnic_dev *dev)
3316 {
3317         int i;
3318         struct cnic_local *cp = dev->cnic_priv;
3319
3320         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3321                 struct cnic_ulp_ops *ulp_ops;
3322
3323                 mutex_lock(&cnic_lock);
3324                 ulp_ops = cnic_ulp_tbl_prot(i);
3325                 if (!ulp_ops || !ulp_ops->cnic_init) {
3326                         mutex_unlock(&cnic_lock);
3327                         continue;
3328                 }
3329                 ulp_get(ulp_ops);
3330                 mutex_unlock(&cnic_lock);
3331
3332                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3333                         ulp_ops->cnic_init(dev);
3334
3335                 ulp_put(ulp_ops);
3336         }
3337 }
3338
3339 static void cnic_ulp_exit(struct cnic_dev *dev)
3340 {
3341         int i;
3342         struct cnic_local *cp = dev->cnic_priv;
3343
3344         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3345                 struct cnic_ulp_ops *ulp_ops;
3346
3347                 mutex_lock(&cnic_lock);
3348                 ulp_ops = cnic_ulp_tbl_prot(i);
3349                 if (!ulp_ops || !ulp_ops->cnic_exit) {
3350                         mutex_unlock(&cnic_lock);
3351                         continue;
3352                 }
3353                 ulp_get(ulp_ops);
3354                 mutex_unlock(&cnic_lock);
3355
3356                 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3357                         ulp_ops->cnic_exit(dev);
3358
3359                 ulp_put(ulp_ops);
3360         }
3361 }
3362
3363 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3364 {
3365         struct cnic_dev *dev = csk->dev;
3366         struct l4_kwq_offload_pg *l4kwqe;
3367         struct kwqe *wqes[1];
3368
3369         l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3370         memset(l4kwqe, 0, sizeof(*l4kwqe));
3371         wqes[0] = (struct kwqe *) l4kwqe;
3372
3373         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3374         l4kwqe->flags =
3375                 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3376         l4kwqe->l2hdr_nbytes = ETH_HLEN;
3377
3378         l4kwqe->da0 = csk->ha[0];
3379         l4kwqe->da1 = csk->ha[1];
3380         l4kwqe->da2 = csk->ha[2];
3381         l4kwqe->da3 = csk->ha[3];
3382         l4kwqe->da4 = csk->ha[4];
3383         l4kwqe->da5 = csk->ha[5];
3384
3385         l4kwqe->sa0 = dev->mac_addr[0];
3386         l4kwqe->sa1 = dev->mac_addr[1];
3387         l4kwqe->sa2 = dev->mac_addr[2];
3388         l4kwqe->sa3 = dev->mac_addr[3];
3389         l4kwqe->sa4 = dev->mac_addr[4];
3390         l4kwqe->sa5 = dev->mac_addr[5];
3391
3392         l4kwqe->etype = ETH_P_IP;
3393         l4kwqe->ipid_start = DEF_IPID_START;
3394         l4kwqe->host_opaque = csk->l5_cid;
3395
3396         if (csk->vlan_id) {
3397                 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3398                 l4kwqe->vlan_tag = csk->vlan_id;
3399                 l4kwqe->l2hdr_nbytes += 4;
3400         }
3401
3402         return dev->submit_kwqes(dev, wqes, 1);
3403 }
3404
3405 static int cnic_cm_update_pg(struct cnic_sock *csk)
3406 {
3407         struct cnic_dev *dev = csk->dev;
3408         struct l4_kwq_update_pg *l4kwqe;
3409         struct kwqe *wqes[1];
3410
3411         l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3412         memset(l4kwqe, 0, sizeof(*l4kwqe));
3413         wqes[0] = (struct kwqe *) l4kwqe;
3414
3415         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3416         l4kwqe->flags =
3417                 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3418         l4kwqe->pg_cid = csk->pg_cid;
3419
3420         l4kwqe->da0 = csk->ha[0];
3421         l4kwqe->da1 = csk->ha[1];
3422         l4kwqe->da2 = csk->ha[2];
3423         l4kwqe->da3 = csk->ha[3];
3424         l4kwqe->da4 = csk->ha[4];
3425         l4kwqe->da5 = csk->ha[5];
3426
3427         l4kwqe->pg_host_opaque = csk->l5_cid;
3428         l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3429
3430         return dev->submit_kwqes(dev, wqes, 1);
3431 }
3432
3433 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3434 {
3435         struct cnic_dev *dev = csk->dev;
3436         struct l4_kwq_upload *l4kwqe;
3437         struct kwqe *wqes[1];
3438
3439         l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3440         memset(l4kwqe, 0, sizeof(*l4kwqe));
3441         wqes[0] = (struct kwqe *) l4kwqe;
3442
3443         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3444         l4kwqe->flags =
3445                 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3446         l4kwqe->cid = csk->pg_cid;
3447
3448         return dev->submit_kwqes(dev, wqes, 1);
3449 }
3450
3451 static int cnic_cm_conn_req(struct cnic_sock *csk)
3452 {
3453         struct cnic_dev *dev = csk->dev;
3454         struct l4_kwq_connect_req1 *l4kwqe1;
3455         struct l4_kwq_connect_req2 *l4kwqe2;
3456         struct l4_kwq_connect_req3 *l4kwqe3;
3457         struct kwqe *wqes[3];
3458         u8 tcp_flags = 0;
3459         int num_wqes = 2;
3460
3461         l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3462         l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3463         l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3464         memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3465         memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3466         memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3467
3468         l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3469         l4kwqe3->flags =
3470                 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3471         l4kwqe3->ka_timeout = csk->ka_timeout;
3472         l4kwqe3->ka_interval = csk->ka_interval;
3473         l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3474         l4kwqe3->tos = csk->tos;
3475         l4kwqe3->ttl = csk->ttl;
3476         l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3477         l4kwqe3->pmtu = csk->mtu;
3478         l4kwqe3->rcv_buf = csk->rcv_buf;
3479         l4kwqe3->snd_buf = csk->snd_buf;
3480         l4kwqe3->seed = csk->seed;
3481
3482         wqes[0] = (struct kwqe *) l4kwqe1;
3483         if (test_bit(SK_F_IPV6, &csk->flags)) {
3484                 wqes[1] = (struct kwqe *) l4kwqe2;
3485                 wqes[2] = (struct kwqe *) l4kwqe3;
3486                 num_wqes = 3;
3487
3488                 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3489                 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3490                 l4kwqe2->flags =
3491                         L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3492                         L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3493                 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3494                 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3495                 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3496                 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3497                 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3498                 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3499                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3500                                sizeof(struct tcphdr);
3501         } else {
3502                 wqes[1] = (struct kwqe *) l4kwqe3;
3503                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3504                                sizeof(struct tcphdr);
3505         }
3506
3507         l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3508         l4kwqe1->flags =
3509                 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3510                  L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3511         l4kwqe1->cid = csk->cid;
3512         l4kwqe1->pg_cid = csk->pg_cid;
3513         l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3514         l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3515         l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3516         l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3517         if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3518                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3519         if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3520                 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3521         if (csk->tcp_flags & SK_TCP_NAGLE)
3522                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3523         if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3524                 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3525         if (csk->tcp_flags & SK_TCP_SACK)
3526                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3527         if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3528                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3529
3530         l4kwqe1->tcp_flags = tcp_flags;
3531
3532         return dev->submit_kwqes(dev, wqes, num_wqes);
3533 }
3534
3535 static int cnic_cm_close_req(struct cnic_sock *csk)
3536 {
3537         struct cnic_dev *dev = csk->dev;
3538         struct l4_kwq_close_req *l4kwqe;
3539         struct kwqe *wqes[1];
3540
3541         l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3542         memset(l4kwqe, 0, sizeof(*l4kwqe));
3543         wqes[0] = (struct kwqe *) l4kwqe;
3544
3545         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3546         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3547         l4kwqe->cid = csk->cid;
3548
3549         return dev->submit_kwqes(dev, wqes, 1);
3550 }
3551
3552 static int cnic_cm_abort_req(struct cnic_sock *csk)
3553 {
3554         struct cnic_dev *dev = csk->dev;
3555         struct l4_kwq_reset_req *l4kwqe;
3556         struct kwqe *wqes[1];
3557
3558         l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3559         memset(l4kwqe, 0, sizeof(*l4kwqe));
3560         wqes[0] = (struct kwqe *) l4kwqe;
3561
3562         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3563         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3564         l4kwqe->cid = csk->cid;
3565
3566         return dev->submit_kwqes(dev, wqes, 1);
3567 }
3568
3569 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3570                           u32 l5_cid, struct cnic_sock **csk, void *context)
3571 {
3572         struct cnic_local *cp = dev->cnic_priv;
3573         struct cnic_sock *csk1;
3574
3575         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3576                 return -EINVAL;
3577
3578         if (cp->ctx_tbl) {
3579                 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3580
3581                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3582                         return -EAGAIN;
3583         }
3584
3585         csk1 = &cp->csk_tbl[l5_cid];
3586         if (atomic_read(&csk1->ref_count))
3587                 return -EAGAIN;
3588
3589         if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3590                 return -EBUSY;
3591
3592         csk1->dev = dev;
3593         csk1->cid = cid;
3594         csk1->l5_cid = l5_cid;
3595         csk1->ulp_type = ulp_type;
3596         csk1->context = context;
3597
3598         csk1->ka_timeout = DEF_KA_TIMEOUT;
3599         csk1->ka_interval = DEF_KA_INTERVAL;
3600         csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3601         csk1->tos = DEF_TOS;
3602         csk1->ttl = DEF_TTL;
3603         csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3604         csk1->rcv_buf = DEF_RCV_BUF;
3605         csk1->snd_buf = DEF_SND_BUF;
3606         csk1->seed = DEF_SEED;
3607         csk1->tcp_flags = 0;
3608
3609         *csk = csk1;
3610         return 0;
3611 }
3612
3613 static void cnic_cm_cleanup(struct cnic_sock *csk)
3614 {
3615         if (csk->src_port) {
3616                 struct cnic_dev *dev = csk->dev;
3617                 struct cnic_local *cp = dev->cnic_priv;
3618
3619                 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3620                 csk->src_port = 0;
3621         }
3622 }
3623
3624 static void cnic_close_conn(struct cnic_sock *csk)
3625 {
3626         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3627                 cnic_cm_upload_pg(csk);
3628                 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3629         }
3630         cnic_cm_cleanup(csk);
3631 }
3632
3633 static int cnic_cm_destroy(struct cnic_sock *csk)
3634 {
3635         if (!cnic_in_use(csk))
3636                 return -EINVAL;
3637
3638         csk_hold(csk);
3639         clear_bit(SK_F_INUSE, &csk->flags);
3640         smp_mb__after_clear_bit();
3641         while (atomic_read(&csk->ref_count) != 1)
3642                 msleep(1);
3643         cnic_cm_cleanup(csk);
3644
3645         csk->flags = 0;
3646         csk_put(csk);
3647         return 0;
3648 }
3649
3650 static inline u16 cnic_get_vlan(struct net_device *dev,
3651                                 struct net_device **vlan_dev)
3652 {
3653         if (dev->priv_flags & IFF_802_1Q_VLAN) {
3654                 *vlan_dev = vlan_dev_real_dev(dev);
3655                 return vlan_dev_vlan_id(dev);
3656         }
3657         *vlan_dev = dev;
3658         return 0;
3659 }
3660
3661 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3662                              struct dst_entry **dst)
3663 {
3664 #if defined(CONFIG_INET)
3665         struct rtable *rt;
3666
3667         rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3668         if (!IS_ERR(rt)) {
3669                 *dst = &rt->dst;
3670                 return 0;
3671         }
3672         return PTR_ERR(rt);
3673 #else
3674         return -ENETUNREACH;
3675 #endif
3676 }
3677
3678 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3679                              struct dst_entry **dst)
3680 {
3681 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3682         struct flowi6 fl6;
3683
3684         memset(&fl6, 0, sizeof(fl6));
3685         fl6.daddr = dst_addr->sin6_addr;
3686         if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3687                 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3688
3689         *dst = ip6_route_output(&init_net, NULL, &fl6);
3690         if ((*dst)->error) {
3691                 dst_release(*dst);
3692                 *dst = NULL;
3693                 return -ENETUNREACH;
3694         } else
3695                 return 0;
3696 #endif
3697
3698         return -ENETUNREACH;
3699 }
3700
3701 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3702                                            int ulp_type)
3703 {
3704         struct cnic_dev *dev = NULL;
3705         struct dst_entry *dst;
3706         struct net_device *netdev = NULL;
3707         int err = -ENETUNREACH;
3708
3709         if (dst_addr->sin_family == AF_INET)
3710                 err = cnic_get_v4_route(dst_addr, &dst);
3711         else if (dst_addr->sin_family == AF_INET6) {
3712                 struct sockaddr_in6 *dst_addr6 =
3713                         (struct sockaddr_in6 *) dst_addr;
3714
3715                 err = cnic_get_v6_route(dst_addr6, &dst);
3716         } else
3717                 return NULL;
3718
3719         if (err)
3720                 return NULL;
3721
3722         if (!dst->dev)
3723                 goto done;
3724
3725         cnic_get_vlan(dst->dev, &netdev);
3726
3727         dev = cnic_from_netdev(netdev);
3728
3729 done:
3730         dst_release(dst);
3731         if (dev)
3732                 cnic_put(dev);
3733         return dev;
3734 }
3735
3736 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3737 {
3738         struct cnic_dev *dev = csk->dev;
3739         struct cnic_local *cp = dev->cnic_priv;
3740
3741         return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3742 }
3743
3744 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3745 {
3746         struct cnic_dev *dev = csk->dev;
3747         struct cnic_local *cp = dev->cnic_priv;
3748         int is_v6, rc = 0;
3749         struct dst_entry *dst = NULL;
3750         struct net_device *realdev;
3751         __be16 local_port;
3752         u32 port_id;
3753
3754         if (saddr->local.v6.sin6_family == AF_INET6 &&
3755             saddr->remote.v6.sin6_family == AF_INET6)
3756                 is_v6 = 1;
3757         else if (saddr->local.v4.sin_family == AF_INET &&
3758                  saddr->remote.v4.sin_family == AF_INET)
3759                 is_v6 = 0;
3760         else
3761                 return -EINVAL;
3762
3763         clear_bit(SK_F_IPV6, &csk->flags);
3764
3765         if (is_v6) {
3766                 set_bit(SK_F_IPV6, &csk->flags);
3767                 cnic_get_v6_route(&saddr->remote.v6, &dst);
3768
3769                 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3770                        sizeof(struct in6_addr));
3771                 csk->dst_port = saddr->remote.v6.sin6_port;
3772                 local_port = saddr->local.v6.sin6_port;
3773
3774         } else {
3775                 cnic_get_v4_route(&saddr->remote.v4, &dst);
3776
3777                 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3778                 csk->dst_port = saddr->remote.v4.sin_port;
3779                 local_port = saddr->local.v4.sin_port;
3780         }
3781
3782         csk->vlan_id = 0;
3783         csk->mtu = dev->netdev->mtu;
3784         if (dst && dst->dev) {
3785                 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3786                 if (realdev == dev->netdev) {
3787                         csk->vlan_id = vlan;
3788                         csk->mtu = dst_mtu(dst);
3789                 }
3790         }
3791
3792         port_id = be16_to_cpu(local_port);
3793         if (port_id >= CNIC_LOCAL_PORT_MIN &&
3794             port_id < CNIC_LOCAL_PORT_MAX) {
3795                 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3796                         port_id = 0;
3797         } else
3798                 port_id = 0;
3799
3800         if (!port_id) {
3801                 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3802                 if (port_id == -1) {
3803                         rc = -ENOMEM;
3804                         goto err_out;
3805                 }
3806                 local_port = cpu_to_be16(port_id);
3807         }
3808         csk->src_port = local_port;
3809
3810 err_out:
3811         dst_release(dst);
3812         return rc;
3813 }
3814
3815 static void cnic_init_csk_state(struct cnic_sock *csk)
3816 {
3817         csk->state = 0;
3818         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3819         clear_bit(SK_F_CLOSING, &csk->flags);
3820 }
3821
3822 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3823 {
3824         struct cnic_local *cp = csk->dev->cnic_priv;
3825         int err = 0;
3826
3827         if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3828                 return -EOPNOTSUPP;
3829
3830         if (!cnic_in_use(csk))
3831                 return -EINVAL;
3832
3833         if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3834                 return -EINVAL;
3835
3836         cnic_init_csk_state(csk);
3837
3838         err = cnic_get_route(csk, saddr);
3839         if (err)
3840                 goto err_out;
3841
3842         err = cnic_resolve_addr(csk, saddr);
3843         if (!err)
3844                 return 0;
3845
3846 err_out:
3847         clear_bit(SK_F_CONNECT_START, &csk->flags);
3848         return err;
3849 }
3850
3851 static int cnic_cm_abort(struct cnic_sock *csk)
3852 {
3853         struct cnic_local *cp = csk->dev->cnic_priv;
3854         u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3855
3856         if (!cnic_in_use(csk))
3857                 return -EINVAL;
3858
3859         if (cnic_abort_prep(csk))
3860                 return cnic_cm_abort_req(csk);
3861
3862         /* Getting here means that we haven't started connect, or
3863          * connect was not successful, or it has been reset by the target.
3864          */
3865
3866         cp->close_conn(csk, opcode);
3867         if (csk->state != opcode) {
3868                 /* Wait for remote reset sequence to complete */
3869                 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3870                         msleep(1);
3871
3872                 return -EALREADY;
3873         }
3874
3875         return 0;
3876 }
3877
3878 static int cnic_cm_close(struct cnic_sock *csk)
3879 {
3880         if (!cnic_in_use(csk))
3881                 return -EINVAL;
3882
3883         if (cnic_close_prep(csk)) {
3884                 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3885                 return cnic_cm_close_req(csk);
3886         } else {
3887                 /* Wait for remote reset sequence to complete */
3888                 while (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3889                         msleep(1);
3890
3891                 return -EALREADY;
3892         }
3893         return 0;
3894 }
3895
3896 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3897                            u8 opcode)
3898 {
3899         struct cnic_ulp_ops *ulp_ops;
3900         int ulp_type = csk->ulp_type;
3901
3902         rcu_read_lock();
3903         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3904         if (ulp_ops) {
3905                 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3906                         ulp_ops->cm_connect_complete(csk);
3907                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3908                         ulp_ops->cm_close_complete(csk);
3909                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3910                         ulp_ops->cm_remote_abort(csk);
3911                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3912                         ulp_ops->cm_abort_complete(csk);
3913                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3914                         ulp_ops->cm_remote_close(csk);
3915         }
3916         rcu_read_unlock();
3917 }
3918
3919 static int cnic_cm_set_pg(struct cnic_sock *csk)
3920 {
3921         if (cnic_offld_prep(csk)) {
3922                 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3923                         cnic_cm_update_pg(csk);
3924                 else
3925                         cnic_cm_offload_pg(csk);
3926         }
3927         return 0;
3928 }
3929
3930 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3931 {
3932         struct cnic_local *cp = dev->cnic_priv;
3933         u32 l5_cid = kcqe->pg_host_opaque;
3934         u8 opcode = kcqe->op_code;
3935         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3936
3937         csk_hold(csk);
3938         if (!cnic_in_use(csk))
3939                 goto done;
3940
3941         if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3942                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3943                 goto done;
3944         }
3945         /* Possible PG kcqe status:  SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3946         if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3947                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3948                 cnic_cm_upcall(cp, csk,
3949                                L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3950                 goto done;
3951         }
3952
3953         csk->pg_cid = kcqe->pg_cid;
3954         set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3955         cnic_cm_conn_req(csk);
3956
3957 done:
3958         csk_put(csk);
3959 }
3960
3961 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3962 {
3963         struct cnic_local *cp = dev->cnic_priv;
3964         struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3965         u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3966         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3967
3968         ctx->timestamp = jiffies;
3969         ctx->wait_cond = 1;
3970         wake_up(&ctx->waitq);
3971 }
3972
3973 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3974 {
3975         struct cnic_local *cp = dev->cnic_priv;
3976         struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3977         u8 opcode = l4kcqe->op_code;
3978         u32 l5_cid;
3979         struct cnic_sock *csk;
3980
3981         if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3982                 cnic_process_fcoe_term_conn(dev, kcqe);
3983                 return;
3984         }
3985         if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3986             opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3987                 cnic_cm_process_offld_pg(dev, l4kcqe);
3988                 return;
3989         }
3990
3991         l5_cid = l4kcqe->conn_id;
3992         if (opcode & 0x80)
3993                 l5_cid = l4kcqe->cid;
3994         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3995                 return;
3996
3997         csk = &cp->csk_tbl[l5_cid];
3998         csk_hold(csk);
3999
4000         if (!cnic_in_use(csk)) {
4001                 csk_put(csk);
4002                 return;
4003         }
4004
4005         switch (opcode) {
4006         case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
4007                 if (l4kcqe->status != 0) {
4008                         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4009                         cnic_cm_upcall(cp, csk,
4010                                        L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
4011                 }
4012                 break;
4013         case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
4014                 if (l4kcqe->status == 0)
4015                         set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
4016                 else if (l4kcqe->status ==
4017                          L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4018                         set_bit(SK_F_HW_ERR, &csk->flags);
4019
4020                 smp_mb__before_clear_bit();
4021                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
4022                 cnic_cm_upcall(cp, csk, opcode);
4023                 break;
4024
4025         case L5CM_RAMROD_CMD_ID_CLOSE: {
4026                 struct iscsi_kcqe *l5kcqe = (struct iscsi_kcqe *) kcqe;
4027
4028                 if (l4kcqe->status != 0 || l5kcqe->completion_status != 0) {
4029                         netdev_warn(dev->netdev, "RAMROD CLOSE compl with status 0x%x completion status 0x%x\n",
4030                                     l4kcqe->status, l5kcqe->completion_status);
4031                         opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4032                         /* Fall through */
4033                 } else {
4034                         break;
4035                 }
4036         }
4037         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4038         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4039         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4040         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4041         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4042                 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_PARITY_ERROR)
4043                         set_bit(SK_F_HW_ERR, &csk->flags);
4044
4045                 cp->close_conn(csk, opcode);
4046                 break;
4047
4048         case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
4049                 /* after we already sent CLOSE_REQ */
4050                 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
4051                     !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
4052                     csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
4053                         cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
4054                 else
4055                         cnic_cm_upcall(cp, csk, opcode);
4056                 break;
4057         }
4058         csk_put(csk);
4059 }
4060
4061 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
4062 {
4063         struct cnic_dev *dev = data;
4064         int i;
4065
4066         for (i = 0; i < num; i++)
4067                 cnic_cm_process_kcqe(dev, kcqe[i]);
4068 }
4069
4070 static struct cnic_ulp_ops cm_ulp_ops = {
4071         .indicate_kcqes         = cnic_cm_indicate_kcqe,
4072 };
4073
4074 static void cnic_cm_free_mem(struct cnic_dev *dev)
4075 {
4076         struct cnic_local *cp = dev->cnic_priv;
4077
4078         kfree(cp->csk_tbl);
4079         cp->csk_tbl = NULL;
4080         cnic_free_id_tbl(&cp->csk_port_tbl);
4081 }
4082
4083 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
4084 {
4085         struct cnic_local *cp = dev->cnic_priv;
4086         u32 port_id;
4087
4088         cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4089                               GFP_KERNEL);
4090         if (!cp->csk_tbl)
4091                 return -ENOMEM;
4092
4093         port_id = prandom_u32();
4094         port_id %= CNIC_LOCAL_PORT_RANGE;
4095         if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4096                              CNIC_LOCAL_PORT_MIN, port_id)) {
4097                 cnic_cm_free_mem(dev);
4098                 return -ENOMEM;
4099         }
4100         return 0;
4101 }
4102
4103 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4104 {
4105         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4106                 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4107                 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4108                 csk->state = opcode;
4109         }
4110
4111         /* 1. If event opcode matches the expected event in csk->state
4112          * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4113          *    event
4114          * 3. If the expected event is 0, meaning the connection was never
4115          *    never established, we accept the opcode from cm_abort.
4116          */
4117         if (opcode == csk->state || csk->state == 0 ||
4118             csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4119             csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4120                 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4121                         if (csk->state == 0)
4122                                 csk->state = opcode;
4123                         return 1;
4124                 }
4125         }
4126         return 0;
4127 }
4128
4129 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4130 {
4131         struct cnic_dev *dev = csk->dev;
4132         struct cnic_local *cp = dev->cnic_priv;
4133
4134         if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4135                 cnic_cm_upcall(cp, csk, opcode);
4136                 return;
4137         }
4138
4139         clear_bit(SK_F_CONNECT_START, &csk->flags);
4140         cnic_close_conn(csk);
4141         csk->state = opcode;
4142         cnic_cm_upcall(cp, csk, opcode);
4143 }
4144
4145 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4146 {
4147 }
4148
4149 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4150 {
4151         u32 seed;
4152
4153         seed = prandom_u32();
4154         cnic_ctx_wr(dev, 45, 0, seed);
4155         return 0;
4156 }
4157
4158 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4159 {
4160         struct cnic_dev *dev = csk->dev;
4161         struct cnic_local *cp = dev->cnic_priv;
4162         struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4163         union l5cm_specific_data l5_data;
4164         u32 cmd = 0;
4165         int close_complete = 0;
4166
4167         switch (opcode) {
4168         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4169         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4170         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4171                 if (cnic_ready_to_close(csk, opcode)) {
4172                         if (test_bit(SK_F_HW_ERR, &csk->flags))
4173                                 close_complete = 1;
4174                         else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4175                                 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4176                         else
4177                                 close_complete = 1;
4178                 }
4179                 break;
4180         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4181                 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4182                 break;
4183         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4184                 close_complete = 1;
4185                 break;
4186         }
4187         if (cmd) {
4188                 memset(&l5_data, 0, sizeof(l5_data));
4189
4190                 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4191                                     &l5_data);
4192         } else if (close_complete) {
4193                 ctx->timestamp = jiffies;
4194                 cnic_close_conn(csk);
4195                 cnic_cm_upcall(cp, csk, csk->state);
4196         }
4197 }
4198
4199 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4200 {
4201         struct cnic_local *cp = dev->cnic_priv;
4202
4203         if (!cp->ctx_tbl)
4204                 return;
4205
4206         if (!netif_running(dev->netdev))
4207                 return;
4208
4209         cnic_bnx2x_delete_wait(dev, 0);
4210
4211         cancel_delayed_work(&cp->delete_task);
4212         flush_workqueue(cnic_wq);
4213
4214         if (atomic_read(&cp->iscsi_conn) != 0)
4215                 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4216                             atomic_read(&cp->iscsi_conn));
4217 }
4218
4219 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4220 {
4221         struct cnic_local *cp = dev->cnic_priv;
4222         struct bnx2x *bp = netdev_priv(dev->netdev);
4223         u32 pfid = cp->pfid;
4224         u32 port = CNIC_PORT(cp);
4225
4226         cnic_init_bnx2x_mac(dev);
4227         cnic_bnx2x_set_tcp_options(dev, 0, 1);
4228
4229         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4230                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4231
4232         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4233                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4234         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4235                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4236                 DEF_MAX_DA_COUNT);
4237
4238         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4239                  XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4240         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4241                  XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4242         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4243                  XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4244         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4245                 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4246
4247         CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4248                 DEF_MAX_CWND);
4249         return 0;
4250 }
4251
4252 static void cnic_delete_task(struct work_struct *work)
4253 {
4254         struct cnic_local *cp;
4255         struct cnic_dev *dev;
4256         u32 i;
4257         int need_resched = 0;
4258
4259         cp = container_of(work, struct cnic_local, delete_task.work);
4260         dev = cp->dev;
4261
4262         if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4263                 struct drv_ctl_info info;
4264
4265                 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4266
4267                 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4268                 cp->ethdev->drv_ctl(dev->netdev, &info);
4269         }
4270
4271         for (i = 0; i < cp->max_cid_space; i++) {
4272                 struct cnic_context *ctx = &cp->ctx_tbl[i];
4273                 int err;
4274
4275                 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4276                     !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4277                         continue;
4278
4279                 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4280                         need_resched = 1;
4281                         continue;
4282                 }
4283
4284                 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4285                         continue;
4286
4287                 err = cnic_bnx2x_destroy_ramrod(dev, i);
4288
4289                 cnic_free_bnx2x_conn_resc(dev, i);
4290                 if (!err) {
4291                         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4292                                 atomic_dec(&cp->iscsi_conn);
4293
4294                         clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4295                 }
4296         }
4297
4298         if (need_resched)
4299                 queue_delayed_work(cnic_wq, &cp->delete_task,
4300                                    msecs_to_jiffies(10));
4301
4302 }
4303
4304 static int cnic_cm_open(struct cnic_dev *dev)
4305 {
4306         struct cnic_local *cp = dev->cnic_priv;
4307         int err;
4308
4309         err = cnic_cm_alloc_mem(dev);
4310         if (err)
4311                 return err;
4312
4313         err = cp->start_cm(dev);
4314
4315         if (err)
4316                 goto err_out;
4317
4318         INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4319
4320         dev->cm_create = cnic_cm_create;
4321         dev->cm_destroy = cnic_cm_destroy;
4322         dev->cm_connect = cnic_cm_connect;
4323         dev->cm_abort = cnic_cm_abort;
4324         dev->cm_close = cnic_cm_close;
4325         dev->cm_select_dev = cnic_cm_select_dev;
4326
4327         cp->ulp_handle[CNIC_ULP_L4] = dev;
4328         rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4329         return 0;
4330
4331 err_out:
4332         cnic_cm_free_mem(dev);
4333         return err;
4334 }
4335
4336 static int cnic_cm_shutdown(struct cnic_dev *dev)
4337 {
4338         struct cnic_local *cp = dev->cnic_priv;
4339         int i;
4340
4341         if (!cp->csk_tbl)
4342                 return 0;
4343
4344         for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4345                 struct cnic_sock *csk = &cp->csk_tbl[i];
4346
4347                 clear_bit(SK_F_INUSE, &csk->flags);
4348                 cnic_cm_cleanup(csk);
4349         }
4350         cnic_cm_free_mem(dev);
4351
4352         return 0;
4353 }
4354
4355 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4356 {
4357         u32 cid_addr;
4358         int i;
4359
4360         cid_addr = GET_CID_ADDR(cid);
4361
4362         for (i = 0; i < CTX_SIZE; i += 4)
4363                 cnic_ctx_wr(dev, cid_addr, i, 0);
4364 }
4365
4366 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4367 {
4368         struct cnic_local *cp = dev->cnic_priv;
4369         int ret = 0, i;
4370         u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4371
4372         if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4373                 return 0;
4374
4375         for (i = 0; i < cp->ctx_blks; i++) {
4376                 int j;
4377                 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4378                 u32 val;
4379
4380                 memset(cp->ctx_arr[i].ctx, 0, BNX2_PAGE_SIZE);
4381
4382                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4383                         (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4384                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4385                         (u64) cp->ctx_arr[i].mapping >> 32);
4386                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4387                         BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4388                 for (j = 0; j < 10; j++) {
4389
4390                         val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4391                         if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4392                                 break;
4393                         udelay(5);
4394                 }
4395                 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4396                         ret = -EBUSY;
4397                         break;
4398                 }
4399         }
4400         return ret;
4401 }
4402
4403 static void cnic_free_irq(struct cnic_dev *dev)
4404 {
4405         struct cnic_local *cp = dev->cnic_priv;
4406         struct cnic_eth_dev *ethdev = cp->ethdev;
4407
4408         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4409                 cp->disable_int_sync(dev);
4410                 tasklet_kill(&cp->cnic_irq_task);
4411                 free_irq(ethdev->irq_arr[0].vector, dev);
4412         }
4413 }
4414
4415 static int cnic_request_irq(struct cnic_dev *dev)
4416 {
4417         struct cnic_local *cp = dev->cnic_priv;
4418         struct cnic_eth_dev *ethdev = cp->ethdev;
4419         int err;
4420
4421         err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4422         if (err)
4423                 tasklet_disable(&cp->cnic_irq_task);
4424
4425         return err;
4426 }
4427
4428 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4429 {
4430         struct cnic_local *cp = dev->cnic_priv;
4431         struct cnic_eth_dev *ethdev = cp->ethdev;
4432
4433         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4434                 int err, i = 0;
4435                 int sblk_num = cp->status_blk_num;
4436                 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4437                            BNX2_HC_SB_CONFIG_1;
4438
4439                 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4440
4441                 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4442                 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4443                 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4444
4445                 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4446                 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4447                              (unsigned long) dev);
4448                 err = cnic_request_irq(dev);
4449                 if (err)
4450                         return err;
4451
4452                 while (cp->status_blk.bnx2->status_completion_producer_index &&
4453                        i < 10) {
4454                         CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4455                                 1 << (11 + sblk_num));
4456                         udelay(10);
4457                         i++;
4458                         barrier();
4459                 }
4460                 if (cp->status_blk.bnx2->status_completion_producer_index) {
4461                         cnic_free_irq(dev);
4462                         goto failed;
4463                 }
4464
4465         } else {
4466                 struct status_block *sblk = cp->status_blk.gen;
4467                 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4468                 int i = 0;
4469
4470                 while (sblk->status_completion_producer_index && i < 10) {
4471                         CNIC_WR(dev, BNX2_HC_COMMAND,
4472                                 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4473                         udelay(10);
4474                         i++;
4475                         barrier();
4476                 }
4477                 if (sblk->status_completion_producer_index)
4478                         goto failed;
4479
4480         }
4481         return 0;
4482
4483 failed:
4484         netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4485         return -EBUSY;
4486 }
4487
4488 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4489 {
4490         struct cnic_local *cp = dev->cnic_priv;
4491         struct cnic_eth_dev *ethdev = cp->ethdev;
4492
4493         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4494                 return;
4495
4496         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4497                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4498 }
4499
4500 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4501 {
4502         struct cnic_local *cp = dev->cnic_priv;
4503         struct cnic_eth_dev *ethdev = cp->ethdev;
4504
4505         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4506                 return;
4507
4508         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4509                 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4510         CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4511         synchronize_irq(ethdev->irq_arr[0].vector);
4512 }
4513
4514 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4515 {
4516         struct cnic_local *cp = dev->cnic_priv;
4517         struct cnic_eth_dev *ethdev = cp->ethdev;
4518         struct cnic_uio_dev *udev = cp->udev;
4519         u32 cid_addr, tx_cid, sb_id;
4520         u32 val, offset0, offset1, offset2, offset3;
4521         int i;
4522         struct bnx2_tx_bd *txbd;
4523         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4524         struct status_block *s_blk = cp->status_blk.gen;
4525
4526         sb_id = cp->status_blk_num;
4527         tx_cid = 20;
4528         cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4529         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4530                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4531
4532                 tx_cid = TX_TSS_CID + sb_id - 1;
4533                 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4534                         (TX_TSS_CID << 7));
4535                 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4536         }
4537         cp->tx_cons = *cp->tx_cons_ptr;
4538
4539         cid_addr = GET_CID_ADDR(tx_cid);
4540         if (BNX2_CHIP(cp) == BNX2_CHIP_5709) {
4541                 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4542
4543                 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4544                         cnic_ctx_wr(dev, cid_addr2, i, 0);
4545
4546                 offset0 = BNX2_L2CTX_TYPE_XI;
4547                 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4548                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4549                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4550         } else {
4551                 cnic_init_context(dev, tx_cid);
4552                 cnic_init_context(dev, tx_cid + 1);
4553
4554                 offset0 = BNX2_L2CTX_TYPE;
4555                 offset1 = BNX2_L2CTX_CMD_TYPE;
4556                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4557                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4558         }
4559         val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4560         cnic_ctx_wr(dev, cid_addr, offset0, val);
4561
4562         val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4563         cnic_ctx_wr(dev, cid_addr, offset1, val);
4564
4565         txbd = udev->l2_ring;
4566
4567         buf_map = udev->l2_buf_map;
4568         for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i++, txbd++) {
4569                 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4570                 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4571         }
4572         val = (u64) ring_map >> 32;
4573         cnic_ctx_wr(dev, cid_addr, offset2, val);
4574         txbd->tx_bd_haddr_hi = val;
4575
4576         val = (u64) ring_map & 0xffffffff;
4577         cnic_ctx_wr(dev, cid_addr, offset3, val);
4578         txbd->tx_bd_haddr_lo = val;
4579 }
4580
4581 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4582 {
4583         struct cnic_local *cp = dev->cnic_priv;
4584         struct cnic_eth_dev *ethdev = cp->ethdev;
4585         struct cnic_uio_dev *udev = cp->udev;
4586         u32 cid_addr, sb_id, val, coal_reg, coal_val;
4587         int i;
4588         struct bnx2_rx_bd *rxbd;
4589         struct status_block *s_blk = cp->status_blk.gen;
4590         dma_addr_t ring_map = udev->l2_ring_map;
4591
4592         sb_id = cp->status_blk_num;
4593         cnic_init_context(dev, 2);
4594         cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4595         coal_reg = BNX2_HC_COMMAND;
4596         coal_val = CNIC_RD(dev, coal_reg);
4597         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4598                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4599
4600                 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4601                 coal_reg = BNX2_HC_COALESCE_NOW;
4602                 coal_val = 1 << (11 + sb_id);
4603         }
4604         i = 0;
4605         while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4606                 CNIC_WR(dev, coal_reg, coal_val);
4607                 udelay(10);
4608                 i++;
4609                 barrier();
4610         }
4611         cp->rx_cons = *cp->rx_cons_ptr;
4612
4613         cid_addr = GET_CID_ADDR(2);
4614         val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4615               BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4616         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4617
4618         if (sb_id == 0)
4619                 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4620         else
4621                 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4622         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4623
4624         rxbd = udev->l2_ring + BNX2_PAGE_SIZE;
4625         for (i = 0; i < BNX2_MAX_RX_DESC_CNT; i++, rxbd++) {
4626                 dma_addr_t buf_map;
4627                 int n = (i % cp->l2_rx_ring_size) + 1;
4628
4629                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4630                 rxbd->rx_bd_len = cp->l2_single_buf_size;
4631                 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4632                 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4633                 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4634         }
4635         val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
4636         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4637         rxbd->rx_bd_haddr_hi = val;
4638
4639         val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
4640         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4641         rxbd->rx_bd_haddr_lo = val;
4642
4643         val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4644         cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4645 }
4646
4647 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4648 {
4649         struct kwqe *wqes[1], l2kwqe;
4650
4651         memset(&l2kwqe, 0, sizeof(l2kwqe));
4652         wqes[0] = &l2kwqe;
4653         l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4654                               (L2_KWQE_OPCODE_VALUE_FLUSH <<
4655                                KWQE_OPCODE_SHIFT) | 2;
4656         dev->submit_kwqes(dev, wqes, 1);
4657 }
4658
4659 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4660 {
4661         struct cnic_local *cp = dev->cnic_priv;
4662         u32 val;
4663
4664         val = cp->func << 2;
4665
4666         cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4667
4668         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4669                               BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4670         dev->mac_addr[0] = (u8) (val >> 8);
4671         dev->mac_addr[1] = (u8) val;
4672
4673         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4674
4675         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4676                               BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4677         dev->mac_addr[2] = (u8) (val >> 24);
4678         dev->mac_addr[3] = (u8) (val >> 16);
4679         dev->mac_addr[4] = (u8) (val >> 8);
4680         dev->mac_addr[5] = (u8) val;
4681
4682         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4683
4684         val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4685         if (BNX2_CHIP(cp) != BNX2_CHIP_5709)
4686                 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4687
4688         CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4689         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4690         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4691 }
4692
4693 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4694 {
4695         struct cnic_local *cp = dev->cnic_priv;
4696         struct cnic_eth_dev *ethdev = cp->ethdev;
4697         struct status_block *sblk = cp->status_blk.gen;
4698         u32 val, kcq_cid_addr, kwq_cid_addr;
4699         int err;
4700
4701         cnic_set_bnx2_mac(dev);
4702
4703         val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4704         val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4705         if (BNX2_PAGE_BITS > 12)
4706                 val |= (12 - 8)  << 4;
4707         else
4708                 val |= (BNX2_PAGE_BITS - 8)  << 4;
4709
4710         CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4711
4712         CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4713         CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4714         CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4715
4716         err = cnic_setup_5709_context(dev, 1);
4717         if (err)
4718                 return err;
4719
4720         cnic_init_context(dev, KWQ_CID);
4721         cnic_init_context(dev, KCQ_CID);
4722
4723         kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4724         cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4725
4726         cp->max_kwq_idx = MAX_KWQ_IDX;
4727         cp->kwq_prod_idx = 0;
4728         cp->kwq_con_idx = 0;
4729         set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4730
4731         if (BNX2_CHIP(cp) == BNX2_CHIP_5706 || BNX2_CHIP(cp) == BNX2_CHIP_5708)
4732                 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4733         else
4734                 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4735
4736         /* Initialize the kernel work queue context. */
4737         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4738               (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4739         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4740
4741         val = (BNX2_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4742         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4743
4744         val = ((BNX2_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4745         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4746
4747         val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4748         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4749
4750         val = (u32) cp->kwq_info.pgtbl_map;
4751         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4752
4753         kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4754         cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4755
4756         cp->kcq1.sw_prod_idx = 0;
4757         cp->kcq1.hw_prod_idx_ptr =
4758                 &sblk->status_completion_producer_index;
4759
4760         cp->kcq1.status_idx_ptr = &sblk->status_idx;
4761
4762         /* Initialize the kernel complete queue context. */
4763         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4764               (BNX2_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4765         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4766
4767         val = (BNX2_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4768         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4769
4770         val = ((BNX2_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4771         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4772
4773         val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4774         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4775
4776         val = (u32) cp->kcq1.dma.pgtbl_map;
4777         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4778
4779         cp->int_num = 0;
4780         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4781                 struct status_block_msix *msblk = cp->status_blk.bnx2;
4782                 u32 sb_id = cp->status_blk_num;
4783                 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4784
4785                 cp->kcq1.hw_prod_idx_ptr =
4786                         &msblk->status_completion_producer_index;
4787                 cp->kcq1.status_idx_ptr = &msblk->status_idx;
4788                 cp->kwq_con_idx_ptr = &msblk->status_cmd_consumer_index;
4789                 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4790                 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4791                 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4792         }
4793
4794         /* Enable Commnad Scheduler notification when we write to the
4795          * host producer index of the kernel contexts. */
4796         CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4797
4798         /* Enable Command Scheduler notification when we write to either
4799          * the Send Queue or Receive Queue producer indexes of the kernel
4800          * bypass contexts. */
4801         CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4802         CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4803
4804         /* Notify COM when the driver post an application buffer. */
4805         CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4806
4807         /* Set the CP and COM doorbells.  These two processors polls the
4808          * doorbell for a non zero value before running.  This must be done
4809          * after setting up the kernel queue contexts. */
4810         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4811         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4812
4813         cnic_init_bnx2_tx_ring(dev);
4814         cnic_init_bnx2_rx_ring(dev);
4815
4816         err = cnic_init_bnx2_irq(dev);
4817         if (err) {
4818                 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4819                 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4820                 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4821                 return err;
4822         }
4823
4824         ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
4825
4826         return 0;
4827 }
4828
4829 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4830 {
4831         struct cnic_local *cp = dev->cnic_priv;
4832         struct cnic_eth_dev *ethdev = cp->ethdev;
4833         u32 start_offset = ethdev->ctx_tbl_offset;
4834         int i;
4835
4836         for (i = 0; i < cp->ctx_blks; i++) {
4837                 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4838                 dma_addr_t map = ctx->mapping;
4839
4840                 if (cp->ctx_align) {
4841                         unsigned long mask = cp->ctx_align - 1;
4842
4843                         map = (map + mask) & ~mask;
4844                 }
4845
4846                 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4847         }
4848 }
4849
4850 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4851 {
4852         struct cnic_local *cp = dev->cnic_priv;
4853         struct cnic_eth_dev *ethdev = cp->ethdev;
4854         int err = 0;
4855
4856         tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4857                      (unsigned long) dev);
4858         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4859                 err = cnic_request_irq(dev);
4860
4861         return err;
4862 }
4863
4864 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4865                                                 u16 sb_id, u8 sb_index,
4866                                                 u8 disable)
4867 {
4868         struct bnx2x *bp = netdev_priv(dev->netdev);
4869
4870         u32 addr = BAR_CSTRORM_INTMEM +
4871                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4872                         offsetof(struct hc_status_block_data_e1x, index_data) +
4873                         sizeof(struct hc_index_data)*sb_index +
4874                         offsetof(struct hc_index_data, flags);
4875         u16 flags = CNIC_RD16(dev, addr);
4876         /* clear and set */
4877         flags &= ~HC_INDEX_DATA_HC_ENABLED;
4878         flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4879                   HC_INDEX_DATA_HC_ENABLED);
4880         CNIC_WR16(dev, addr, flags);
4881 }
4882
4883 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4884 {
4885         struct cnic_local *cp = dev->cnic_priv;
4886         struct bnx2x *bp = netdev_priv(dev->netdev);
4887         u8 sb_id = cp->status_blk_num;
4888
4889         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4890                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4891                         offsetof(struct hc_status_block_data_e1x, index_data) +
4892                         sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4893                         offsetof(struct hc_index_data, timeout), 64 / 4);
4894         cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4895 }
4896
4897 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4898 {
4899 }
4900
4901 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4902                                     struct client_init_ramrod_data *data)
4903 {
4904         struct cnic_local *cp = dev->cnic_priv;
4905         struct cnic_uio_dev *udev = cp->udev;
4906         union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4907         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4908         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4909         int i;
4910         u32 cli = cp->ethdev->iscsi_l2_client_id;
4911         u32 val;
4912
4913         memset(txbd, 0, BNX2_PAGE_SIZE);
4914
4915         buf_map = udev->l2_buf_map;
4916         for (i = 0; i < BNX2_MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4917                 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4918                 struct eth_tx_parse_bd_e1x *pbd_e1x =
4919                         &((txbd + 1)->parse_bd_e1x);
4920                 struct eth_tx_parse_bd_e2 *pbd_e2 = &((txbd + 1)->parse_bd_e2);
4921                 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4922
4923                 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4924                 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4925                 reg_bd->addr_hi = start_bd->addr_hi;
4926                 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4927                 start_bd->nbytes = cpu_to_le16(0x10);
4928                 start_bd->nbd = cpu_to_le16(3);
4929                 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4930                 start_bd->general_data &= ~ETH_TX_START_BD_PARSE_NBDS;
4931                 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4932
4933                 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
4934                         pbd_e2->parsing_data = (UNICAST_ADDRESS <<
4935                                 ETH_TX_PARSE_BD_E2_ETH_ADDR_TYPE_SHIFT);
4936                 else
4937                         pbd_e1x->global_data = (UNICAST_ADDRESS <<
4938                                 ETH_TX_PARSE_BD_E1X_ETH_ADDR_TYPE_SHIFT);
4939         }
4940
4941         val = (u64) ring_map >> 32;
4942         txbd->next_bd.addr_hi = cpu_to_le32(val);
4943
4944         data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4945
4946         val = (u64) ring_map & 0xffffffff;
4947         txbd->next_bd.addr_lo = cpu_to_le32(val);
4948
4949         data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4950
4951         /* Other ramrod params */
4952         data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4953         data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4954
4955         /* reset xstorm per client statistics */
4956         if (cli < MAX_STAT_COUNTER_ID) {
4957                 data->general.statistics_zero_flg = 1;
4958                 data->general.statistics_en_flg = 1;
4959                 data->general.statistics_counter_id = cli;
4960         }
4961
4962         cp->tx_cons_ptr =
4963                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4964 }
4965
4966 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4967                                     struct client_init_ramrod_data *data)
4968 {
4969         struct cnic_local *cp = dev->cnic_priv;
4970         struct cnic_uio_dev *udev = cp->udev;
4971         struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4972                                 BNX2_PAGE_SIZE);
4973         struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4974                                 (udev->l2_ring + (2 * BNX2_PAGE_SIZE));
4975         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4976         int i;
4977         u32 cli = cp->ethdev->iscsi_l2_client_id;
4978         int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4979         u32 val;
4980         dma_addr_t ring_map = udev->l2_ring_map;
4981
4982         /* General data */
4983         data->general.client_id = cli;
4984         data->general.activate_flg = 1;
4985         data->general.sp_client_id = cli;
4986         data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4987         data->general.func_id = cp->pfid;
4988
4989         for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4990                 dma_addr_t buf_map;
4991                 int n = (i % cp->l2_rx_ring_size) + 1;
4992
4993                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4994                 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4995                 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4996         }
4997
4998         val = (u64) (ring_map + BNX2_PAGE_SIZE) >> 32;
4999         rxbd->addr_hi = cpu_to_le32(val);
5000         data->rx.bd_page_base.hi = cpu_to_le32(val);
5001
5002         val = (u64) (ring_map + BNX2_PAGE_SIZE) & 0xffffffff;
5003         rxbd->addr_lo = cpu_to_le32(val);
5004         data->rx.bd_page_base.lo = cpu_to_le32(val);
5005
5006         rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
5007         val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) >> 32;
5008         rxcqe->addr_hi = cpu_to_le32(val);
5009         data->rx.cqe_page_base.hi = cpu_to_le32(val);
5010
5011         val = (u64) (ring_map + (2 * BNX2_PAGE_SIZE)) & 0xffffffff;
5012         rxcqe->addr_lo = cpu_to_le32(val);
5013         data->rx.cqe_page_base.lo = cpu_to_le32(val);
5014
5015         /* Other ramrod params */
5016         data->rx.client_qzone_id = cl_qzone_id;
5017         data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
5018         data->rx.status_block_id = BNX2X_DEF_SB_ID;
5019
5020         data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
5021
5022         data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
5023         data->rx.outer_vlan_removal_enable_flg = 1;
5024         data->rx.silent_vlan_removal_flg = 1;
5025         data->rx.silent_vlan_value = 0;
5026         data->rx.silent_vlan_mask = 0xffff;
5027
5028         cp->rx_cons_ptr =
5029                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
5030         cp->rx_cons = *cp->rx_cons_ptr;
5031 }
5032
5033 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
5034 {
5035         struct cnic_local *cp = dev->cnic_priv;
5036         struct bnx2x *bp = netdev_priv(dev->netdev);
5037         u32 pfid = cp->pfid;
5038
5039         cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
5040                            CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
5041         cp->kcq1.sw_prod_idx = 0;
5042
5043         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5044                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5045
5046                 cp->kcq1.hw_prod_idx_ptr =
5047                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5048                 cp->kcq1.status_idx_ptr =
5049                         &sb->sb.running_index[SM_RX_ID];
5050         } else {
5051                 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
5052
5053                 cp->kcq1.hw_prod_idx_ptr =
5054                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
5055                 cp->kcq1.status_idx_ptr =
5056                         &sb->sb.running_index[SM_RX_ID];
5057         }
5058
5059         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5060                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
5061
5062                 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
5063                                         USTORM_FCOE_EQ_PROD_OFFSET(pfid);
5064                 cp->kcq2.sw_prod_idx = 0;
5065                 cp->kcq2.hw_prod_idx_ptr =
5066                         &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
5067                 cp->kcq2.status_idx_ptr =
5068                         &sb->sb.running_index[SM_RX_ID];
5069         }
5070 }
5071
5072 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
5073 {
5074         struct cnic_local *cp = dev->cnic_priv;
5075         struct bnx2x *bp = netdev_priv(dev->netdev);
5076         struct cnic_eth_dev *ethdev = cp->ethdev;
5077         int func, ret;
5078         u32 pfid;
5079
5080         dev->stats_addr = ethdev->addr_drv_info_to_mcp;
5081         cp->port_mode = bp->common.chip_port_mode;
5082         cp->pfid = bp->pfid;
5083         cp->func = bp->pf_num;
5084
5085         func = CNIC_FUNC(cp);
5086         pfid = cp->pfid;
5087
5088         ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
5089                                cp->iscsi_start_cid, 0);
5090
5091         if (ret)
5092                 return -ENOMEM;
5093
5094         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5095                 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5096                                         cp->fcoe_start_cid, 0);
5097
5098                 if (ret)
5099                         return -ENOMEM;
5100         }
5101
5102         cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5103
5104         cnic_init_bnx2x_kcq(dev);
5105
5106         /* Only 1 EQ */
5107         CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5108         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5109                 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5110         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5111                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5112                 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5113         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5114                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5115                 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5116         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5117                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5118                 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5119         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5120                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5121                 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5122         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5123                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5124         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5125                 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5126         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5127                 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5128                 HC_INDEX_ISCSI_EQ_CONS);
5129
5130         CNIC_WR(dev, BAR_USTRORM_INTMEM +
5131                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5132                 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5133         CNIC_WR(dev, BAR_USTRORM_INTMEM +
5134                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5135                 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5136
5137         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5138                 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5139
5140         cnic_setup_bnx2x_context(dev);
5141
5142         ret = cnic_init_bnx2x_irq(dev);
5143         if (ret)
5144                 return ret;
5145
5146         ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
5147         return 0;
5148 }
5149
5150 static void cnic_init_rings(struct cnic_dev *dev)
5151 {
5152         struct cnic_local *cp = dev->cnic_priv;
5153         struct bnx2x *bp = netdev_priv(dev->netdev);
5154         struct cnic_uio_dev *udev = cp->udev;
5155
5156         if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5157                 return;
5158
5159         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5160                 cnic_init_bnx2_tx_ring(dev);
5161                 cnic_init_bnx2_rx_ring(dev);
5162                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5163         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5164                 u32 cli = cp->ethdev->iscsi_l2_client_id;
5165                 u32 cid = cp->ethdev->iscsi_l2_cid;
5166                 u32 cl_qzone_id;
5167                 struct client_init_ramrod_data *data;
5168                 union l5cm_specific_data l5_data;
5169                 struct ustorm_eth_rx_producers rx_prods = {0};
5170                 u32 off, i, *cid_ptr;
5171
5172                 rx_prods.bd_prod = 0;
5173                 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5174                 barrier();
5175
5176                 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5177
5178                 off = BAR_USTRORM_INTMEM +
5179                         (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ?
5180                          USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5181                          USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5182
5183                 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5184                         CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5185
5186                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5187
5188                 data = udev->l2_buf;
5189                 cid_ptr = udev->l2_buf + 12;
5190
5191                 memset(data, 0, sizeof(*data));
5192
5193                 cnic_init_bnx2x_tx_ring(dev, data);
5194                 cnic_init_bnx2x_rx_ring(dev, data);
5195
5196                 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5197                 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5198
5199                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5200
5201                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5202                         cid, ETH_CONNECTION_TYPE, &l5_data);
5203
5204                 i = 0;
5205                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5206                        ++i < 10)
5207                         msleep(1);
5208
5209                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5210                         netdev_err(dev->netdev,
5211                                 "iSCSI CLIENT_SETUP did not complete\n");
5212                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5213                 cnic_ring_ctl(dev, cid, cli, 1);
5214                 *cid_ptr = cid;
5215         }
5216 }
5217
5218 static void cnic_shutdown_rings(struct cnic_dev *dev)
5219 {
5220         struct cnic_local *cp = dev->cnic_priv;
5221         struct cnic_uio_dev *udev = cp->udev;
5222         void *rx_ring;
5223
5224         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5225                 return;
5226
5227         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5228                 cnic_shutdown_bnx2_rx_ring(dev);
5229         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5230                 u32 cli = cp->ethdev->iscsi_l2_client_id;
5231                 u32 cid = cp->ethdev->iscsi_l2_cid;
5232                 union l5cm_specific_data l5_data;
5233                 int i;
5234
5235                 cnic_ring_ctl(dev, cid, cli, 0);
5236
5237                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5238
5239                 l5_data.phy_address.lo = cli;
5240                 l5_data.phy_address.hi = 0;
5241                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5242                         cid, ETH_CONNECTION_TYPE, &l5_data);
5243                 i = 0;
5244                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5245                        ++i < 10)
5246                         msleep(1);
5247
5248                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5249                         netdev_err(dev->netdev,
5250                                 "iSCSI CLIENT_HALT did not complete\n");
5251                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5252
5253                 memset(&l5_data, 0, sizeof(l5_data));
5254                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5255                         cid, NONE_CONNECTION_TYPE, &l5_data);
5256                 msleep(10);
5257         }
5258         clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5259         rx_ring = udev->l2_ring + BNX2_PAGE_SIZE;
5260         memset(rx_ring, 0, BNX2_PAGE_SIZE);
5261 }
5262
5263 static int cnic_register_netdev(struct cnic_dev *dev)
5264 {
5265         struct cnic_local *cp = dev->cnic_priv;
5266         struct cnic_eth_dev *ethdev = cp->ethdev;
5267         int err;
5268
5269         if (!ethdev)
5270                 return -ENODEV;
5271
5272         if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5273                 return 0;
5274
5275         err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5276         if (err)
5277                 netdev_err(dev->netdev, "register_cnic failed\n");
5278
5279         return err;
5280 }
5281
5282 static void cnic_unregister_netdev(struct cnic_dev *dev)
5283 {
5284         struct cnic_local *cp = dev->cnic_priv;
5285         struct cnic_eth_dev *ethdev = cp->ethdev;
5286
5287         if (!ethdev)
5288                 return;
5289
5290         ethdev->drv_unregister_cnic(dev->netdev);
5291 }
5292
5293 static int cnic_start_hw(struct cnic_dev *dev)
5294 {
5295         struct cnic_local *cp = dev->cnic_priv;
5296         struct cnic_eth_dev *ethdev = cp->ethdev;
5297         int err;
5298
5299         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5300                 return -EALREADY;
5301
5302         dev->regview = ethdev->io_base;
5303         pci_dev_get(dev->pcidev);
5304         cp->func = PCI_FUNC(dev->pcidev->devfn);
5305         cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5306         cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5307
5308         err = cp->alloc_resc(dev);
5309         if (err) {
5310                 netdev_err(dev->netdev, "allocate resource failure\n");
5311                 goto err1;
5312         }
5313
5314         err = cp->start_hw(dev);
5315         if (err)
5316                 goto err1;
5317
5318         err = cnic_cm_open(dev);
5319         if (err)
5320                 goto err1;
5321
5322         set_bit(CNIC_F_CNIC_UP, &dev->flags);
5323
5324         cp->enable_int(dev);
5325
5326         return 0;
5327
5328 err1:
5329         cp->free_resc(dev);
5330         pci_dev_put(dev->pcidev);
5331         return err;
5332 }
5333
5334 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5335 {
5336         cnic_disable_bnx2_int_sync(dev);
5337
5338         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5339         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5340
5341         cnic_init_context(dev, KWQ_CID);
5342         cnic_init_context(dev, KCQ_CID);
5343
5344         cnic_setup_5709_context(dev, 0);
5345         cnic_free_irq(dev);
5346
5347         cnic_free_resc(dev);
5348 }
5349
5350
5351 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5352 {
5353         struct cnic_local *cp = dev->cnic_priv;
5354         struct bnx2x *bp = netdev_priv(dev->netdev);
5355         u32 hc_index = HC_INDEX_ISCSI_EQ_CONS;
5356         u32 sb_id = cp->status_blk_num;
5357         u32 idx_off, syn_off;
5358
5359         cnic_free_irq(dev);
5360
5361         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5362                 idx_off = offsetof(struct hc_status_block_e2, index_values) +
5363                           (hc_index * sizeof(u16));
5364
5365                 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E2_OFFSET(hc_index, sb_id);
5366         } else {
5367                 idx_off = offsetof(struct hc_status_block_e1x, index_values) +
5368                           (hc_index * sizeof(u16));
5369
5370                 syn_off = CSTORM_HC_SYNC_LINE_INDEX_E1X_OFFSET(hc_index, sb_id);
5371         }
5372         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + syn_off, 0);
5373         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_STATUS_BLOCK_OFFSET(sb_id) +
5374                   idx_off, 0);
5375
5376         *cp->kcq1.hw_prod_idx_ptr = 0;
5377         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5378                 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5379         CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5380         cnic_free_resc(dev);
5381 }
5382
5383 static void cnic_stop_hw(struct cnic_dev *dev)
5384 {
5385         if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5386                 struct cnic_local *cp = dev->cnic_priv;
5387                 int i = 0;
5388
5389                 /* Need to wait for the ring shutdown event to complete
5390                  * before clearing the CNIC_UP flag.
5391                  */
5392                 while (cp->udev && cp->udev->uio_dev != -1 && i < 15) {
5393                         msleep(100);
5394                         i++;
5395                 }
5396                 cnic_shutdown_rings(dev);
5397                 cp->stop_cm(dev);
5398                 cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
5399                 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5400                 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5401                 synchronize_rcu();
5402                 cnic_cm_shutdown(dev);
5403                 cp->stop_hw(dev);
5404                 pci_dev_put(dev->pcidev);
5405         }
5406 }
5407
5408 static void cnic_free_dev(struct cnic_dev *dev)
5409 {
5410         int i = 0;
5411
5412         while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5413                 msleep(100);
5414                 i++;
5415         }
5416         if (atomic_read(&dev->ref_count) != 0)
5417                 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5418
5419         netdev_info(dev->netdev, "Removed CNIC device\n");
5420         dev_put(dev->netdev);
5421         kfree(dev);
5422 }
5423
5424 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5425                                        struct pci_dev *pdev)
5426 {
5427         struct cnic_dev *cdev;
5428         struct cnic_local *cp;
5429         int alloc_size;
5430
5431         alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5432
5433         cdev = kzalloc(alloc_size, GFP_KERNEL);
5434         if (cdev == NULL)
5435                 return NULL;
5436
5437         cdev->netdev = dev;
5438         cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5439         cdev->register_device = cnic_register_device;
5440         cdev->unregister_device = cnic_unregister_device;
5441         cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5442
5443         cp = cdev->cnic_priv;
5444         cp->dev = cdev;
5445         cp->l2_single_buf_size = 0x400;
5446         cp->l2_rx_ring_size = 3;
5447
5448         spin_lock_init(&cp->cnic_ulp_lock);
5449
5450         netdev_info(dev, "Added CNIC device\n");
5451
5452         return cdev;
5453 }
5454
5455 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5456 {
5457         struct pci_dev *pdev;
5458         struct cnic_dev *cdev;
5459         struct cnic_local *cp;
5460         struct bnx2 *bp = netdev_priv(dev);
5461         struct cnic_eth_dev *ethdev = NULL;
5462
5463         if (bp->cnic_probe)
5464                 ethdev = (bp->cnic_probe)(dev);
5465
5466         if (!ethdev)
5467                 return NULL;
5468
5469         pdev = ethdev->pdev;
5470         if (!pdev)
5471                 return NULL;
5472
5473         dev_hold(dev);
5474         pci_dev_get(pdev);
5475         if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5476              pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5477             (pdev->revision < 0x10)) {
5478                 pci_dev_put(pdev);
5479                 goto cnic_err;
5480         }
5481         pci_dev_put(pdev);
5482
5483         cdev = cnic_alloc_dev(dev, pdev);
5484         if (cdev == NULL)
5485                 goto cnic_err;
5486
5487         set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5488         cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5489
5490         cp = cdev->cnic_priv;
5491         cp->ethdev = ethdev;
5492         cdev->pcidev = pdev;
5493         cp->chip_id = ethdev->chip_id;
5494
5495         cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5496
5497         cp->cnic_ops = &cnic_bnx2_ops;
5498         cp->start_hw = cnic_start_bnx2_hw;
5499         cp->stop_hw = cnic_stop_bnx2_hw;
5500         cp->setup_pgtbl = cnic_setup_page_tbl;
5501         cp->alloc_resc = cnic_alloc_bnx2_resc;
5502         cp->free_resc = cnic_free_resc;
5503         cp->start_cm = cnic_cm_init_bnx2_hw;
5504         cp->stop_cm = cnic_cm_stop_bnx2_hw;
5505         cp->enable_int = cnic_enable_bnx2_int;
5506         cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5507         cp->close_conn = cnic_close_bnx2_conn;
5508         return cdev;
5509
5510 cnic_err:
5511         dev_put(dev);
5512         return NULL;
5513 }
5514
5515 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5516 {
5517         struct pci_dev *pdev;
5518         struct cnic_dev *cdev;
5519         struct cnic_local *cp;
5520         struct bnx2x *bp = netdev_priv(dev);
5521         struct cnic_eth_dev *ethdev = NULL;
5522
5523         if (bp->cnic_probe)
5524                 ethdev = bp->cnic_probe(dev);
5525
5526         if (!ethdev)
5527                 return NULL;
5528
5529         pdev = ethdev->pdev;
5530         if (!pdev)
5531                 return NULL;
5532
5533         dev_hold(dev);
5534         cdev = cnic_alloc_dev(dev, pdev);
5535         if (cdev == NULL) {
5536                 dev_put(dev);
5537                 return NULL;
5538         }
5539
5540         set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5541         cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5542
5543         cp = cdev->cnic_priv;
5544         cp->ethdev = ethdev;
5545         cdev->pcidev = pdev;
5546         cp->chip_id = ethdev->chip_id;
5547
5548         cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5549
5550         if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5551                 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5552         if (CNIC_SUPPORTS_FCOE(cp)) {
5553                 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5554                 cdev->max_fcoe_exchanges = ethdev->max_fcoe_exchanges;
5555         }
5556
5557         if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5558                 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5559
5560         memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5561
5562         cp->cnic_ops = &cnic_bnx2x_ops;
5563         cp->start_hw = cnic_start_bnx2x_hw;
5564         cp->stop_hw = cnic_stop_bnx2x_hw;
5565         cp->setup_pgtbl = cnic_setup_page_tbl_le;
5566         cp->alloc_resc = cnic_alloc_bnx2x_resc;
5567         cp->free_resc = cnic_free_resc;
5568         cp->start_cm = cnic_cm_init_bnx2x_hw;
5569         cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5570         cp->enable_int = cnic_enable_bnx2x_int;
5571         cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5572         if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5573                 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5574                 cp->arm_int = cnic_arm_bnx2x_e2_msix;
5575         } else {
5576                 cp->ack_int = cnic_ack_bnx2x_msix;
5577                 cp->arm_int = cnic_arm_bnx2x_msix;
5578         }
5579         cp->close_conn = cnic_close_bnx2x_conn;
5580         return cdev;
5581 }
5582
5583 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5584 {
5585         struct ethtool_drvinfo drvinfo;
5586         struct cnic_dev *cdev = NULL;
5587
5588         if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5589                 memset(&drvinfo, 0, sizeof(drvinfo));
5590                 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5591
5592                 if (!strcmp(drvinfo.driver, "bnx2"))
5593                         cdev = init_bnx2_cnic(dev);
5594                 if (!strcmp(drvinfo.driver, "bnx2x"))
5595                         cdev = init_bnx2x_cnic(dev);
5596                 if (cdev) {
5597                         write_lock(&cnic_dev_lock);
5598                         list_add(&cdev->list, &cnic_dev_list);
5599                         write_unlock(&cnic_dev_lock);
5600                 }
5601         }
5602         return cdev;
5603 }
5604
5605 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5606                               u16 vlan_id)
5607 {
5608         int if_type;
5609
5610         rcu_read_lock();
5611         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5612                 struct cnic_ulp_ops *ulp_ops;
5613                 void *ctx;
5614
5615                 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5616                 if (!ulp_ops || !ulp_ops->indicate_netevent)
5617                         continue;
5618
5619                 ctx = cp->ulp_handle[if_type];
5620
5621                 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5622         }
5623         rcu_read_unlock();
5624 }
5625
5626 /* netdev event handler */
5627 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5628                                                          void *ptr)
5629 {
5630         struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
5631         struct cnic_dev *dev;
5632         int new_dev = 0;
5633
5634         dev = cnic_from_netdev(netdev);
5635
5636         if (!dev && event == NETDEV_REGISTER) {
5637                 /* Check for the hot-plug device */
5638                 dev = is_cnic_dev(netdev);
5639                 if (dev) {
5640                         new_dev = 1;
5641                         cnic_hold(dev);
5642                 }
5643         }
5644         if (dev) {
5645                 struct cnic_local *cp = dev->cnic_priv;
5646
5647                 if (new_dev)
5648                         cnic_ulp_init(dev);
5649                 else if (event == NETDEV_UNREGISTER)
5650                         cnic_ulp_exit(dev);
5651
5652                 if (event == NETDEV_UP) {
5653                         if (cnic_register_netdev(dev) != 0) {
5654                                 cnic_put(dev);
5655                                 goto done;
5656                         }
5657                         if (!cnic_start_hw(dev))
5658                                 cnic_ulp_start(dev);
5659                 }
5660
5661                 cnic_rcv_netevent(cp, event, 0);
5662
5663                 if (event == NETDEV_GOING_DOWN) {
5664                         cnic_ulp_stop(dev);
5665                         cnic_stop_hw(dev);
5666                         cnic_unregister_netdev(dev);
5667                 } else if (event == NETDEV_UNREGISTER) {
5668                         write_lock(&cnic_dev_lock);
5669                         list_del_init(&dev->list);
5670                         write_unlock(&cnic_dev_lock);
5671
5672                         cnic_put(dev);
5673                         cnic_free_dev(dev);
5674                         goto done;
5675                 }
5676                 cnic_put(dev);
5677         } else {
5678                 struct net_device *realdev;
5679                 u16 vid;
5680
5681                 vid = cnic_get_vlan(netdev, &realdev);
5682                 if (realdev) {
5683                         dev = cnic_from_netdev(realdev);
5684                         if (dev) {
5685                                 vid |= VLAN_TAG_PRESENT;
5686                                 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5687                                 cnic_put(dev);
5688                         }
5689                 }
5690         }
5691 done:
5692         return NOTIFY_DONE;
5693 }
5694
5695 static struct notifier_block cnic_netdev_notifier = {
5696         .notifier_call = cnic_netdev_event
5697 };
5698
5699 static void cnic_release(void)
5700 {
5701         struct cnic_uio_dev *udev;
5702
5703         while (!list_empty(&cnic_udev_list)) {
5704                 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5705                                   list);
5706                 cnic_free_uio(udev);
5707         }
5708 }
5709
5710 static int __init cnic_init(void)
5711 {
5712         int rc = 0;
5713
5714         pr_info("%s", version);
5715
5716         rc = register_netdevice_notifier(&cnic_netdev_notifier);
5717         if (rc) {
5718                 cnic_release();
5719                 return rc;
5720         }
5721
5722         cnic_wq = create_singlethread_workqueue("cnic_wq");
5723         if (!cnic_wq) {
5724                 cnic_release();
5725                 unregister_netdevice_notifier(&cnic_netdev_notifier);
5726                 return -ENOMEM;
5727         }
5728
5729         return 0;
5730 }
5731
5732 static void __exit cnic_exit(void)
5733 {
5734         unregister_netdevice_notifier(&cnic_netdev_notifier);
5735         cnic_release();
5736         destroy_workqueue(cnic_wq);
5737 }
5738
5739 module_init(cnic_init);
5740 module_exit(cnic_exit);