2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
21 #include <linux/rtnetlink.h>
22 #include <linux/workqueue.h>
23 #include <linux/ipv6.h>
24 #include <linux/etherdevice.h>
25 #include <linux/mutex.h>
26 #include <linux/firmware.h>
27 #include <linux/if_vlan.h>
30 #include <asm/checksum.h>
31 #include <net/ip6_checksum.h>
38 #define BNAD_TXQ_DEPTH 2048
39 #define BNAD_RXQ_DEPTH 2048
42 #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */
43 #define BNAD_TXQ_NUM 1
46 #define BNAD_MAX_RXP_PER_RX 16
47 #define BNAD_MAX_RXQ_PER_RXP 2
50 * Control structure pointed to ccb->ctrl, which
51 * determines the NAPI / LRO behavior CCB
52 * There is 1:1 corres. between ccb & ctrl
58 struct napi_struct napi;
61 #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
63 #define BNAD_GET_TX_ID(_skb) (0)
66 * GLOBAL #defines (CONSTANTS)
68 #define BNAD_NAME "bna"
69 #define BNAD_NAME_LEN 64
71 #define BNAD_VERSION "3.0.2.0"
73 #define BNAD_MAILBOX_MSIX_INDEX 0
74 #define BNAD_MAILBOX_MSIX_VECTORS 1
75 #define BNAD_INTX_TX_IB_BITMASK 0x1
76 #define BNAD_INTX_RX_IB_BITMASK 0x2
78 #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */
79 #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */
81 #define BNAD_IOCETH_TIMEOUT 10000
83 #define BNAD_MAX_Q_DEPTH 0x10000
84 #define BNAD_MIN_Q_DEPTH 0x200
86 #define BNAD_JUMBO_MTU 9000
88 #define BNAD_NETIF_WAKE_THRESHOLD 8
90 #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
92 /* Bit positions for tcb->flags */
93 #define BNAD_TXQ_FREE_SENT 0
94 #define BNAD_TXQ_TX_STARTED 1
96 /* Bit positions for rcb->flags */
97 #define BNAD_RXQ_REFILL 0
98 #define BNAD_RXQ_STARTED 1
100 /* Resource limits */
101 #define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
102 #define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
109 enum bnad_intr_source {
114 enum bnad_link_state {
119 struct bnad_completion {
120 struct completion ioc_comp;
121 struct completion ucast_comp;
122 struct completion mcast_comp;
123 struct completion tx_comp;
124 struct completion rx_comp;
125 struct completion stats_comp;
126 struct completion enet_comp;
127 struct completion mtu_comp;
130 u8 ucast_comp_status;
131 u8 mcast_comp_status;
134 u8 stats_comp_status;
139 /* Tx Rx Control Stats */
140 struct bnad_drv_stats {
141 u64 netif_queue_stop;
142 u64 netif_queue_wakeup;
143 u64 netif_queue_stopped;
152 u64 hw_stats_updates;
153 u64 netif_rx_schedule;
154 u64 netif_rx_complete;
155 u64 netif_rx_dropped;
161 u64 rxp_info_alloc_failed;
162 u64 mbox_intr_disabled;
163 u64 mbox_intr_enabled;
164 u64 tx_unmap_q_alloc_failed;
165 u64 rx_unmap_q_alloc_failed;
167 u64 rxbuf_alloc_failed;
170 /* Complete driver stats */
172 struct bnad_drv_stats drv_stats;
173 struct bna_stats *bna_stats;
176 /* Tx / Rx Resources */
177 struct bnad_tx_res_info {
178 struct bna_res_info res_info[BNA_TX_RES_T_MAX];
181 struct bnad_rx_res_info {
182 struct bna_res_info res_info[BNA_RX_RES_T_MAX];
185 struct bnad_tx_info {
186 struct bna_tx *tx; /* 1:1 between tx_info & tx */
187 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
189 } ____cacheline_aligned;
191 struct bnad_rx_info {
192 struct bna_rx *rx; /* 1:1 between rx_info & rx */
194 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
196 } ____cacheline_aligned;
198 /* Unmap queues for Tx / Rx cleanup */
199 struct bnad_skb_unmap {
201 DEFINE_DMA_UNMAP_ADDR(dma_addr);
204 struct bnad_unmap_q {
208 /* This should be the last one */
209 struct bnad_skb_unmap unmap_array[1];
212 /* Bit mask values for bnad->cfg_flags */
213 #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */
214 #define BNAD_CF_PROMISC 0x02
215 #define BNAD_CF_ALLMULTI 0x04
216 #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */
218 /* Defines for run_flags bit-mask */
219 /* Set, tested & cleared using xxx_bit() functions */
220 /* Values indicated bit positions */
221 #define BNAD_RF_CEE_RUNNING 0
222 #define BNAD_RF_MTU_SET 1
223 #define BNAD_RF_MBOX_IRQ_DISABLED 2
224 #define BNAD_RF_NETDEV_REGISTERED 3
225 #define BNAD_RF_DIM_TIMER_RUNNING 4
226 #define BNAD_RF_STATS_TIMER_RUNNING 5
227 #define BNAD_RF_TX_PRIO_SET 6
230 /* Define for Fast Path flags */
231 /* Defined as bit positions */
232 #define BNAD_FP_IN_RX_PATH 0
235 struct net_device *netdev;
238 struct bnad_tx_info tx_info[BNAD_MAX_TX];
239 struct bnad_rx_info rx_info[BNAD_MAX_RX];
241 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
243 * These q numbers are global only because
244 * they are used to calculate MSIx vectors.
245 * Actually the exact # of queues are per Tx/Rx
256 u8 tx_coalescing_timeo;
257 u8 rx_coalescing_timeo;
259 struct bna_rx_config rx_config[BNAD_MAX_RX];
260 struct bna_tx_config tx_config[BNAD_MAX_TX];
262 void __iomem *bar0; /* BAR0 address */
267 unsigned long run_flags;
269 struct pci_dev *pcidev;
274 struct msix_entry *msix_table;
276 struct mutex conf_mutex;
277 spinlock_t bna_lock ____cacheline_aligned;
280 struct timer_list ioc_timer;
281 struct timer_list dim_timer;
282 struct timer_list stats_timer;
284 /* Control path resources, memory & irq */
285 struct bna_res_info res_info[BNA_RES_T_MAX];
286 struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
287 struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
288 struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
290 struct bnad_completion bnad_completions;
292 /* Burnt in MAC address */
295 struct tasklet_struct tx_free_tasklet;
298 struct bnad_stats stats;
300 struct bnad_diag *diag;
302 char adapter_name[BNAD_NAME_LEN];
303 char port_name[BNAD_NAME_LEN];
304 char mbox_irq_name[BNAD_NAME_LEN];
310 extern struct firmware *bfi_fw;
311 extern u32 bnad_rxqs_per_cq;
316 extern u32 *cna_get_firmware_buf(struct pci_dev *pdev);
317 /* Netdev entry point prototypes */
318 extern void bnad_set_ethtool_ops(struct net_device *netdev);
320 /* Configuration & setup */
321 extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
322 extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
324 extern int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
325 extern int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
326 extern void bnad_cleanup_tx(struct bnad *bnad, u32 tx_id);
327 extern void bnad_cleanup_rx(struct bnad *bnad, u32 rx_id);
329 /* Timer start/stop protos */
330 extern void bnad_dim_timer_start(struct bnad *bnad);
333 extern void bnad_netdev_qstats_fill(struct bnad *bnad,
334 struct rtnl_link_stats64 *stats);
335 extern void bnad_netdev_hwstats_fill(struct bnad *bnad,
336 struct rtnl_link_stats64 *stats);
341 /* To set & get the stats counters */
342 #define BNAD_UPDATE_CTR(_bnad, _ctr) \
343 (((_bnad)->stats.drv_stats._ctr)++)
345 #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
347 #define bnad_enable_rx_irq_unsafe(_ccb) \
349 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\
350 bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
351 (_ccb)->rx_coalescing_timeo); \
352 bna_ib_ack((_ccb)->i_dbell, 0); \
356 #define bnad_dim_timer_running(_bnad) \
357 (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \
358 (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags))))
360 #endif /* __BNAD_H__ */