drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/device.h>
  20 #include <linux/vmalloc.h>
  21
  22 #include "hns_dsaf_main.h"
  23 #include "hns_dsaf_rcb.h"
  24 #include "hns_dsaf_ppe.h"
  25 #include "hns_dsaf_mac.h"
  26
  27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
  28         [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
  29         [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
  30         [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
  31 };
  32
  33 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
  34 {
  35         int ret, i;
  36         u32 desc_num;
  37         u32 buf_size;
  38         const char *mode_str;
  39         struct device_node *np = dsaf_dev->dev->of_node;
  40
  41         if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
  42                 dsaf_dev->dsaf_ver = AE_VERSION_1;
  43         else
  44                 dsaf_dev->dsaf_ver = AE_VERSION_2;
  45
  46         ret = of_property_read_string(np, "mode", &mode_str);
  47         if (ret) {
  48                 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
  49                 return ret;
  50         }
  51         for (i = 0; i < DSAF_MODE_MAX; i++) {
  52                 if (g_dsaf_mode_match[i] &&
  53                     !strcmp(mode_str, g_dsaf_mode_match[i]))
  54                         break;
  55         }
  56         if (i >= DSAF_MODE_MAX ||
  57             i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
  58                 dev_err(dsaf_dev->dev,
  59                         "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
  60                 return -EINVAL;
  61         }
  62         dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
  63
  64         if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
  65                 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
  66         else
  67                 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
  68
  69         if ((i == DSAF_MODE_ENABLE_16VM) ||
  70             (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
  71             (i == DSAF_MODE_DISABLE_6PORT_2VM))
  72                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
  73         else
  74                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
  75
  76         dsaf_dev->sc_base = of_iomap(np, 0);
  77         if (!dsaf_dev->sc_base) {
  78                 dev_err(dsaf_dev->dev,
  79                         "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
  80                 ret = -ENOMEM;
  81                 goto unmap_base_addr;
  82         }
  83
  84         dsaf_dev->sds_base = of_iomap(np, 1);
  85         if (!dsaf_dev->sds_base) {
  86                 dev_err(dsaf_dev->dev,
  87                         "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
  88                 ret = -ENOMEM;
  89                 goto unmap_base_addr;
  90         }
  91
  92         dsaf_dev->ppe_base = of_iomap(np, 2);
  93         if (!dsaf_dev->ppe_base) {
  94                 dev_err(dsaf_dev->dev,
  95                         "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
  96                 ret = -ENOMEM;
  97                 goto unmap_base_addr;
  98         }
  99
 100         dsaf_dev->io_base = of_iomap(np, 3);
 101         if (!dsaf_dev->io_base) {
 102                 dev_err(dsaf_dev->dev,
 103                         "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
 104                 ret = -ENOMEM;
 105                 goto unmap_base_addr;
 106         }
 107
 108         dsaf_dev->cpld_base = of_iomap(np, 4);
 109         if (!dsaf_dev->cpld_base)
 110                 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
 111
 112         ret = of_property_read_u32(np, "desc-num", &desc_num);
 113         if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
 114             desc_num > HNS_DSAF_MAX_DESC_CNT) {
 115                 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
 116                         desc_num, ret);
 117                 goto unmap_base_addr;
 118         }
 119         dsaf_dev->desc_num = desc_num;
 120
 121         ret = of_property_read_u32(np, "buf-size", &buf_size);
 122         if (ret < 0) {
 123                 dev_err(dsaf_dev->dev,
 124                         "get buf-size fail, ret=%d!\r\n", ret);
 125                 goto unmap_base_addr;
 126         }
 127         dsaf_dev->buf_size = buf_size;
 128
 129         dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
 130         if (dsaf_dev->buf_size_type < 0) {
 131                 dev_err(dsaf_dev->dev,
 132                         "buf_size(%d) is wrong!\n", buf_size);
 133                 goto unmap_base_addr;
 134         }
 135
 136         if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
 137                 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
 138         else
 139                 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
 140
 141         return 0;
 142
 143 unmap_base_addr:
 144         if (dsaf_dev->io_base)
 145                 iounmap(dsaf_dev->io_base);
 146         if (dsaf_dev->ppe_base)
 147                 iounmap(dsaf_dev->ppe_base);
 148         if (dsaf_dev->sds_base)
 149                 iounmap(dsaf_dev->sds_base);
 150         if (dsaf_dev->sc_base)
 151                 iounmap(dsaf_dev->sc_base);
 152         if (dsaf_dev->cpld_base)
 153                 iounmap(dsaf_dev->cpld_base);
 154         return ret;
 155 }
 156
 157 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
 158 {
 159         if (dsaf_dev->io_base)
 160                 iounmap(dsaf_dev->io_base);
 161
 162         if (dsaf_dev->ppe_base)
 163                 iounmap(dsaf_dev->ppe_base);
 164
 165         if (dsaf_dev->sds_base)
 166                 iounmap(dsaf_dev->sds_base);
 167
 168         if (dsaf_dev->sc_base)
 169                 iounmap(dsaf_dev->sc_base);
 170
 171         if (dsaf_dev->cpld_base)
 172                 iounmap(dsaf_dev->cpld_base);
 173 }
 174
 175 /**
 176  * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
 177  * @dsaf_id: dsa fabric id
 178  */
 179 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
 180 {
 181         dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
 182 }
 183
 184 /**
 185  * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
 186  * @dsaf_id: dsa fabric id
 187  * @hns_dsaf_reg_cnt_clr_ce: config value
 188  */
 189 static void
 190 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
 191 {
 192         dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
 193                          DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
 194 }
 195
 196 /**
 197  * hns_ppe_qid_cfg - config ppe qid
 198  * @dsaf_id: dsa fabric id
 199  * @pppe_qid_cfg: value array
 200  */
 201 static void
 202 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
 203 {
 204         u32 i;
 205
 206         for (i = 0; i < DSAF_COMM_CHN; i++) {
 207                 dsaf_set_dev_field(dsaf_dev,
 208                                    DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
 209                                    DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
 210                                    qid_cfg);
 211         }
 212 }
 213
 214 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
 215 {
 216         u16 max_q_per_vf, max_vfn;
 217         u32 q_id, q_num_per_port;
 218         u32 i;
 219
 220         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
 221                                HNS_DSAF_COMM_SERVICE_NW_IDX,
 222                                &max_vfn, &max_q_per_vf);
 223         q_num_per_port = max_vfn * max_q_per_vf;
 224
 225         for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
 226                 dsaf_set_dev_field(dsaf_dev,
 227                                    DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
 228                                    0xff, 0, q_id);
 229                 q_id += q_num_per_port;
 230         }
 231 }
 232
 233 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
 234 {
 235         u16 max_q_per_vf, max_vfn;
 236         u32 q_id, q_num_per_port;
 237         u32 mac_id;
 238
 239         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 240                 return;
 241
 242         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
 243                                HNS_DSAF_COMM_SERVICE_NW_IDX,
 244                                &max_vfn, &max_q_per_vf);
 245         q_num_per_port = max_vfn * max_q_per_vf;
 246
 247         for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
 248                 dsaf_set_dev_field(dsaf_dev,
 249                                    DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 250                                    DSAFV2_SERDES_LBK_QID_M,
 251                                    DSAFV2_SERDES_LBK_QID_S,
 252                                    q_id);
 253                 q_id += q_num_per_port;
 254         }
 255 }
 256
 257 /**
 258  * hns_dsaf_sw_port_type_cfg - cfg sw type
 259  * @dsaf_id: dsa fabric id
 260  * @psw_port_type: array
 261  */
 262 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
 263                                       enum dsaf_sw_port_type port_type)
 264 {
 265         u32 i;
 266
 267         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
 268                 dsaf_set_dev_field(dsaf_dev,
 269                                    DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
 270                                    DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
 271                                    port_type);
 272         }
 273 }
 274
 275 /**
 276  * hns_dsaf_stp_port_type_cfg - cfg stp type
 277  * @dsaf_id: dsa fabric id
 278  * @pstp_port_type: array
 279  */
 280 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
 281                                        enum dsaf_stp_port_type port_type)
 282 {
 283         u32 i;
 284
 285         for (i = 0; i < DSAF_COMM_CHN; i++) {
 286                 dsaf_set_dev_field(dsaf_dev,
 287                                    DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
 288                                    DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
 289                                    port_type);
 290         }
 291 }
 292
 293 #define HNS_DSAF_SBM_NUM(dev) \
 294         (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
 295 /**
 296  * hns_dsaf_sbm_cfg - config sbm
 297  * @dsaf_id: dsa fabric id
 298  */
 299 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
 300 {
 301         u32 o_sbm_cfg;
 302         u32 i;
 303
 304         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 305                 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
 306                                           DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
 307                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
 308                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
 309                 dsaf_write_dev(dsaf_dev,
 310                                DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
 311         }
 312 }
 313
 314 /**
 315  * hns_dsaf_sbm_cfg_mib_en - config sbm
 316  * @dsaf_id: dsa fabric id
 317  */
 318 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
 319 {
 320         u32 sbm_cfg_mib_en;
 321         u32 i;
 322         u32 reg;
 323         u32 read_cnt;
 324
 325         /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
 326         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 327                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 328                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
 329         }
 330
 331         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 332                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 333                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
 334         }
 335
 336         /* waitint for all sbm enable finished */
 337         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 338                 read_cnt = 0;
 339                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 340                 do {
 341                         udelay(1);
 342                         sbm_cfg_mib_en = dsaf_get_dev_bit(
 343                                         dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
 344                         read_cnt++;
 345                 } while (sbm_cfg_mib_en == 0 &&
 346                         read_cnt < DSAF_CFG_READ_CNT);
 347
 348                 if (sbm_cfg_mib_en == 0) {
 349                         dev_err(dsaf_dev->dev,
 350                                 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
 351                                 dsaf_dev->ae_dev.name, i);
 352                         return -ENODEV;
 353                 }
 354         }
 355
 356         return 0;
 357 }
 358
 359 /**
 360  * hns_dsaf_sbm_bp_wl_cfg - config sbm
 361  * @dsaf_id: dsa fabric id
 362  */
 363 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 364 {
 365         u32 o_sbm_bp_cfg;
 366         u32 reg;
 367         u32 i;
 368
 369         /* XGE */
 370         for (i = 0; i < DSAF_XGE_NUM; i++) {
 371                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 372                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 373                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
 374                                DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
 375                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 376                                DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 377                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 378                                DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 379                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 380
 381                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 382                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 383                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 384                                DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 385                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 386                                DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 387                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 388
 389                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 390                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 391                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 392                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
 393                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 394                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
 395                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 396
 397                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 398                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 399                 dsaf_set_field(o_sbm_bp_cfg,
 400                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 401                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 402                 dsaf_set_field(o_sbm_bp_cfg,
 403                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 404                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 405                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 406
 407                 /* for no enable pfc mode */
 408                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 409                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 410                 dsaf_set_field(o_sbm_bp_cfg,
 411                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 412                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
 413                 dsaf_set_field(o_sbm_bp_cfg,
 414                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 415                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
 416                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 417         }
 418
 419         /* PPE */
 420         for (i = 0; i < DSAF_COMM_CHN; i++) {
 421                 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 422                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 423                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 424                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
 425                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 426                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
 427                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 428         }
 429
 430         /* RoCEE */
 431         for (i = 0; i < DSAF_COMM_CHN; i++) {
 432                 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 433                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 434                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 435                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
 436                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 437                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
 438                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 439         }
 440 }
 441
 442 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 443 {
 444         u32 o_sbm_bp_cfg;
 445         u32 reg;
 446         u32 i;
 447
 448         /* XGE */
 449         for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
 450                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 451                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 452                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
 453                                DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
 454                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 455                                DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 456                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 457                                DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 458                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 459
 460                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 461                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 462                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 463                                DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 464                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 465                                DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 466                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 467
 468                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 469                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 470                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 471                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
 472                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 473                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
 474                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 475
 476                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 477                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 478                 dsaf_set_field(o_sbm_bp_cfg,
 479                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 480                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 481                 dsaf_set_field(o_sbm_bp_cfg,
 482                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 483                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 484                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 485
 486                 /* for no enable pfc mode */
 487                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 488                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 489                 dsaf_set_field(o_sbm_bp_cfg,
 490                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
 491                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
 492                 dsaf_set_field(o_sbm_bp_cfg,
 493                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
 494                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
 495                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 496         }
 497
 498         /* PPE */
 499         reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 500         o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 501         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 502                        DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
 503         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 504                        DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
 505         dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 506         /* RoCEE */
 507         for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
 508                 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 509                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 510                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 511                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
 512                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 513                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
 514                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 515         }
 516 }
 517
 518 /**
 519  * hns_dsaf_voq_bp_all_thrd_cfg -  voq
 520  * @dsaf_id: dsa fabric id
 521  */
 522 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
 523 {
 524         u32 voq_bp_all_thrd;
 525         u32 i;
 526
 527         for (i = 0; i < DSAF_VOQ_NUM; i++) {
 528                 voq_bp_all_thrd = dsaf_read_dev(
 529                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
 530                 if (i < DSAF_XGE_NUM) {
 531                         dsaf_set_field(voq_bp_all_thrd,
 532                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 533                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
 534                         dsaf_set_field(voq_bp_all_thrd,
 535                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 536                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
 537                 } else {
 538                         dsaf_set_field(voq_bp_all_thrd,
 539                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 540                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
 541                         dsaf_set_field(voq_bp_all_thrd,
 542                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 543                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
 544                 }
 545                 dsaf_write_dev(
 546                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
 547                         voq_bp_all_thrd);
 548         }
 549 }
 550
 551 /**
 552  * hns_dsaf_tbl_tcam_data_cfg - tbl
 553  * @dsaf_id: dsa fabric id
 554  * @ptbl_tcam_data: addr
 555  */
 556 static void hns_dsaf_tbl_tcam_data_cfg(
 557         struct dsaf_device *dsaf_dev,
 558         struct dsaf_tbl_tcam_data *ptbl_tcam_data)
 559 {
 560         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
 561                        ptbl_tcam_data->tbl_tcam_data_low);
 562         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
 563                        ptbl_tcam_data->tbl_tcam_data_high);
 564 }
 565
 566 /**
 567  * dsaf_tbl_tcam_mcast_cfg - tbl
 568  * @dsaf_id: dsa fabric id
 569  * @ptbl_tcam_mcast: addr
 570  */
 571 static void hns_dsaf_tbl_tcam_mcast_cfg(
 572         struct dsaf_device *dsaf_dev,
 573         struct dsaf_tbl_tcam_mcast_cfg *mcast)
 574 {
 575         u32 mcast_cfg4;
 576
 577         mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
 578         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
 579                      mcast->tbl_mcast_item_vld);
 580         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
 581                      mcast->tbl_mcast_old_en);
 582         dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
 583                        DSAF_TBL_MCAST_CFG4_VM128_112_S,
 584                        mcast->tbl_mcast_port_msk[4]);
 585         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
 586
 587         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
 588                        mcast->tbl_mcast_port_msk[3]);
 589
 590         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
 591                        mcast->tbl_mcast_port_msk[2]);
 592
 593         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
 594                        mcast->tbl_mcast_port_msk[1]);
 595
 596         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
 597                        mcast->tbl_mcast_port_msk[0]);
 598 }
 599
 600 /**
 601  * hns_dsaf_tbl_tcam_ucast_cfg - tbl
 602  * @dsaf_id: dsa fabric id
 603  * @ptbl_tcam_ucast: addr
 604  */
 605 static void hns_dsaf_tbl_tcam_ucast_cfg(
 606         struct dsaf_device *dsaf_dev,
 607         struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
 608 {
 609         u32 ucast_cfg1;
 610
 611         ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
 612         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
 613                      tbl_tcam_ucast->tbl_ucast_mac_discard);
 614         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
 615                      tbl_tcam_ucast->tbl_ucast_item_vld);
 616         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
 617                      tbl_tcam_ucast->tbl_ucast_old_en);
 618         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
 619                      tbl_tcam_ucast->tbl_ucast_dvc);
 620         dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 621                        DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
 622                        tbl_tcam_ucast->tbl_ucast_out_port);
 623         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
 624 }
 625
 626 /**
 627  * hns_dsaf_tbl_line_cfg - tbl
 628  * @dsaf_id: dsa fabric id
 629  * @ptbl_lin: addr
 630  */
 631 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
 632                                   struct dsaf_tbl_line_cfg *tbl_lin)
 633 {
 634         u32 tbl_line;
 635
 636         tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
 637         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
 638                      tbl_lin->tbl_line_mac_discard);
 639         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
 640                      tbl_lin->tbl_line_dvc);
 641         dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
 642                        DSAF_TBL_LINE_CFG_OUT_PORT_S,
 643                        tbl_lin->tbl_line_out_port);
 644         dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
 645 }
 646
 647 /**
 648  * hns_dsaf_tbl_tcam_mcast_pul - tbl
 649  * @dsaf_id: dsa fabric id
 650  */
 651 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
 652 {
 653         u32 o_tbl_pul;
 654
 655         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 656         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 657         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 658         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 659         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 660 }
 661
 662 /**
 663  * hns_dsaf_tbl_line_pul - tbl
 664  * @dsaf_id: dsa fabric id
 665  */
 666 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
 667 {
 668         u32 tbl_pul;
 669
 670         tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 671         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
 672         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 673         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
 674         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 675 }
 676
 677 /**
 678  * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
 679  * @dsaf_id: dsa fabric id
 680  */
 681 static void hns_dsaf_tbl_tcam_data_mcast_pul(
 682         struct dsaf_device *dsaf_dev)
 683 {
 684         u32 o_tbl_pul;
 685
 686         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 687         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 688         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 689         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 690         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 691         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 692         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 693 }
 694
 695 /**
 696  * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
 697  * @dsaf_id: dsa fabric id
 698  */
 699 static void hns_dsaf_tbl_tcam_data_ucast_pul(
 700         struct dsaf_device *dsaf_dev)
 701 {
 702         u32 o_tbl_pul;
 703
 704         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 705         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 706         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
 707         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 708         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 709         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
 710         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 711 }
 712
 713 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
 714 {
 715         dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_MIX_MODE_S, !!en);
 716 }
 717
 718 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
 719 {
 720         if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
 721             dsaf_dev->mac_cb[mac_id].mac_type == HNAE_PORT_DEBUG)
 722                 return;
 723
 724         dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 725                          DSAFV2_SERDES_LBK_EN_B, !!en);
 726 }
 727
 728 /**
 729  * hns_dsaf_tbl_stat_en - tbl
 730  * @dsaf_id: dsa fabric id
 731  * @ptbl_stat_en: addr
 732  */
 733 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
 734 {
 735         u32 o_tbl_ctrl;
 736
 737         o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
 738         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
 739         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
 740         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
 741         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
 742         dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
 743 }
 744
 745 /**
 746  * hns_dsaf_rocee_bp_en - rocee back press enable
 747  * @dsaf_id: dsa fabric id
 748  */
 749 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
 750 {
 751         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 752                 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
 753                                  DSAF_FC_XGE_TX_PAUSE_S, 1);
 754 }
 755
 756 /* set msk for dsaf exception irq*/
 757 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
 758                                      u32 chnn_num, u32 mask_set)
 759 {
 760         dsaf_write_dev(dsaf_dev,
 761                        DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
 762 }
 763
 764 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
 765                                      u32 chnn_num, u32 msk_set)
 766 {
 767         dsaf_write_dev(dsaf_dev,
 768                        DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
 769 }
 770
 771 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
 772                                        u32 chnn, u32 msk_set)
 773 {
 774         dsaf_write_dev(dsaf_dev,
 775                        DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
 776 }
 777
 778 static void
 779 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
 780 {
 781         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
 782 }
 783
 784 /* clr dsaf exception irq*/
 785 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
 786                                      u32 chnn_num, u32 int_src)
 787 {
 788         dsaf_write_dev(dsaf_dev,
 789                        DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
 790 }
 791
 792 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
 793                                      u32 chnn, u32 int_src)
 794 {
 795         dsaf_write_dev(dsaf_dev,
 796                        DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 797 }
 798
 799 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
 800                                        u32 chnn, u32 int_src)
 801 {
 802         dsaf_write_dev(dsaf_dev,
 803                        DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 804 }
 805
 806 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
 807                                      u32 int_src)
 808 {
 809         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
 810 }
 811
 812 /**
 813  * hns_dsaf_single_line_tbl_cfg - INT
 814  * @dsaf_id: dsa fabric id
 815  * @address:
 816  * @ptbl_line:
 817  */
 818 static void hns_dsaf_single_line_tbl_cfg(
 819         struct dsaf_device *dsaf_dev,
 820         u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
 821 {
 822         /*Write Addr*/
 823         hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
 824
 825         /*Write Line*/
 826         hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
 827
 828         /*Write Plus*/
 829         hns_dsaf_tbl_line_pul(dsaf_dev);
 830 }
 831
 832 /**
 833  * hns_dsaf_tcam_uc_cfg - INT
 834  * @dsaf_id: dsa fabric id
 835  * @address,
 836  * @ptbl_tcam_data,
 837  */
 838 static void hns_dsaf_tcam_uc_cfg(
 839         struct dsaf_device *dsaf_dev, u32 address,
 840         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 841         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 842 {
 843         /*Write Addr*/
 844         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 845         /*Write Tcam Data*/
 846         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 847         /*Write Tcam Ucast*/
 848         hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
 849         /*Write Plus*/
 850         hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
 851 }
 852
 853 /**
 854  * hns_dsaf_tcam_mc_cfg - INT
 855  * @dsaf_id: dsa fabric id
 856  * @address,
 857  * @ptbl_tcam_data,
 858  * @ptbl_tcam_mcast,
 859  */
 860 static void hns_dsaf_tcam_mc_cfg(
 861         struct dsaf_device *dsaf_dev, u32 address,
 862         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 863         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 864 {
 865         /*Write Addr*/
 866         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 867         /*Write Tcam Data*/
 868         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 869         /*Write Tcam Mcast*/
 870         hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
 871         /*Write Plus*/
 872         hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
 873 }
 874
 875 /**
 876  * hns_dsaf_tcam_mc_invld - INT
 877  * @dsaf_id: dsa fabric id
 878  * @address
 879  */
 880 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
 881 {
 882         /*Write Addr*/
 883         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 884
 885         /*write tcam mcast*/
 886         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
 887         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
 888         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
 889         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
 890         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
 891
 892         /*Write Plus*/
 893         hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
 894 }
 895
 896 /**
 897  * hns_dsaf_tcam_uc_get - INT
 898  * @dsaf_id: dsa fabric id
 899  * @address
 900  * @ptbl_tcam_data
 901  * @ptbl_tcam_ucast
 902  */
 903 static void hns_dsaf_tcam_uc_get(
 904         struct dsaf_device *dsaf_dev, u32 address,
 905         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 906         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 907 {
 908         u32 tcam_read_data0;
 909         u32 tcam_read_data4;
 910
 911         /*Write Addr*/
 912         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 913
 914         /*read tcam item puls*/
 915         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
 916
 917         /*read tcam data*/
 918         ptbl_tcam_data->tbl_tcam_data_high
 919                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
 920         ptbl_tcam_data->tbl_tcam_data_low
 921                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
 922
 923         /*read tcam mcast*/
 924         tcam_read_data0 = dsaf_read_dev(dsaf_dev,
 925                                         DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
 926         tcam_read_data4 = dsaf_read_dev(dsaf_dev,
 927                                         DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
 928
 929         ptbl_tcam_ucast->tbl_ucast_item_vld
 930                 = dsaf_get_bit(tcam_read_data4,
 931                                DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
 932         ptbl_tcam_ucast->tbl_ucast_old_en
 933                 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
 934         ptbl_tcam_ucast->tbl_ucast_mac_discard
 935                 = dsaf_get_bit(tcam_read_data0,
 936                                DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
 937         ptbl_tcam_ucast->tbl_ucast_out_port
 938                 = dsaf_get_field(tcam_read_data0,
 939                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 940                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
 941         ptbl_tcam_ucast->tbl_ucast_dvc
 942                 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
 943 }
 944
 945 /**
 946  * hns_dsaf_tcam_mc_get - INT
 947  * @dsaf_id: dsa fabric id
 948  * @address
 949  * @ptbl_tcam_data
 950  * @ptbl_tcam_ucast
 951  */
 952 static void hns_dsaf_tcam_mc_get(
 953         struct dsaf_device *dsaf_dev, u32 address,
 954         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 955         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 956 {
 957         u32 data_tmp;
 958
 959         /*Write Addr*/
 960         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 961
 962         /*read tcam item puls*/
 963         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
 964
 965         /*read tcam data*/
 966         ptbl_tcam_data->tbl_tcam_data_high =
 967                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
 968         ptbl_tcam_data->tbl_tcam_data_low =
 969                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
 970
 971         /*read tcam mcast*/
 972         ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
 973                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
 974         ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
 975                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
 976         ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
 977                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
 978         ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
 979                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
 980
 981         data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
 982         ptbl_tcam_mcast->tbl_mcast_item_vld =
 983                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
 984         ptbl_tcam_mcast->tbl_mcast_old_en =
 985                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
 986         ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
 987                 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
 988                                DSAF_TBL_MCAST_CFG4_VM128_112_S);
 989 }
 990
 991 /**
 992  * hns_dsaf_tbl_line_init - INT
 993  * @dsaf_id: dsa fabric id
 994  */
 995 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
 996 {
 997         u32 i;
 998         /* defaultly set all lineal mac table entry resulting discard */
 999         struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1000
1001         for (i = 0; i < DSAF_LINE_SUM; i++)
1002                 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1003 }
1004
1005 /**
1006  * hns_dsaf_tbl_tcam_init - INT
1007  * @dsaf_id: dsa fabric id
1008  */
1009 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1010 {
1011         u32 i;
1012         struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1013         struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1014
1015         /*tcam tbl*/
1016         for (i = 0; i < DSAF_TCAM_SUM; i++)
1017                 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1018 }
1019
1020 /**
1021  * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1022  * @mac_cb: mac contrl block
1023  */
1024 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1025                                 int mac_id, int en)
1026 {
1027         if (!en)
1028                 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0);
1029         else
1030                 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, 0xff);
1031 }
1032
1033 /**
1034  * hns_dsaf_tbl_tcam_init - INT
1035  * @dsaf_id: dsa fabric id
1036  * @dsaf_mode
1037  */
1038 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1039 {
1040         u32 i;
1041         u32 o_dsaf_cfg;
1042
1043         o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1044         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1045         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1046         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1047         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1048         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1049         dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1050
1051         hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1052         hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1053
1054         /* set 22 queue per tx ppe engine, only used in switch mode */
1055         hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1056
1057         /* set promisc def queue id */
1058         hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1059
1060         /* set inner loopback queue id */
1061         hns_dsaf_inner_qid_cfg(dsaf_dev);
1062
1063         /* in non switch mode, set all port to access mode */
1064         hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1065
1066         /*set dsaf pfc  to 0 for parseing rx pause*/
1067         for (i = 0; i < DSAF_COMM_CHN; i++)
1068                 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1069
1070         /*msk and  clr exception irqs */
1071         for (i = 0; i < DSAF_COMM_CHN; i++) {
1072                 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1073                 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1074                 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1075
1076                 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1077                 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1078                 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1079         }
1080         hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1081         hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1082 }
1083
1084 /**
1085  * hns_dsaf_inode_init - INT
1086  * @dsaf_id: dsa fabric id
1087  */
1088 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1089 {
1090         u32 reg;
1091         u32 tc_cfg;
1092         u32 i;
1093
1094         if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1095                 tc_cfg = HNS_DSAF_I4TC_CFG;
1096         else
1097                 tc_cfg = HNS_DSAF_I8TC_CFG;
1098
1099         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1100                 for (i = 0; i < DSAF_INODE_NUM; i++) {
1101                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1102                         dsaf_set_dev_field(dsaf_dev, reg,
1103                                            DSAF_INODE_IN_PORT_NUM_M,
1104                                            DSAF_INODE_IN_PORT_NUM_S,
1105                                            i % DSAF_XGE_NUM);
1106                 }
1107         } else {
1108                 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1109                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1110                         dsaf_set_dev_field(dsaf_dev, reg,
1111                                            DSAF_INODE_IN_PORT_NUM_M,
1112                                            DSAF_INODE_IN_PORT_NUM_S, 0);
1113                         dsaf_set_dev_field(dsaf_dev, reg,
1114                                            DSAFV2_INODE_IN_PORT1_NUM_M,
1115                                            DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1116                         dsaf_set_dev_field(dsaf_dev, reg,
1117                                            DSAFV2_INODE_IN_PORT2_NUM_M,
1118                                            DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1119                         dsaf_set_dev_field(dsaf_dev, reg,
1120                                            DSAFV2_INODE_IN_PORT3_NUM_M,
1121                                            DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1122                         dsaf_set_dev_field(dsaf_dev, reg,
1123                                            DSAFV2_INODE_IN_PORT4_NUM_M,
1124                                            DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1125                         dsaf_set_dev_field(dsaf_dev, reg,
1126                                            DSAFV2_INODE_IN_PORT5_NUM_M,
1127                                            DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1128                 }
1129         }
1130         for (i = 0; i < DSAF_INODE_NUM; i++) {
1131                 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1132                 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1133         }
1134 }
1135
1136 /**
1137  * hns_dsaf_sbm_init - INT
1138  * @dsaf_id: dsa fabric id
1139  */
1140 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1141 {
1142         u32 flag;
1143         u32 finish_msk;
1144         u32 cnt = 0;
1145         int ret;
1146
1147         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1148                 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1149                 finish_msk = DSAF_SRAM_INIT_OVER_M;
1150         } else {
1151                 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1152                 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1153         }
1154
1155         /* enable sbm chanel, disable sbm chanel shcut function*/
1156         hns_dsaf_sbm_cfg(dsaf_dev);
1157
1158         /* enable sbm mib */
1159         ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1160         if (ret) {
1161                 dev_err(dsaf_dev->dev,
1162                         "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1163                         dsaf_dev->ae_dev.name, ret);
1164                 return ret;
1165         }
1166
1167         /* enable sbm initial link sram */
1168         hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1169
1170         do {
1171                 usleep_range(200, 210);/*udelay(200);*/
1172                 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1173                                           finish_msk, DSAF_SRAM_INIT_OVER_S);
1174                 cnt++;
1175         } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1176                  cnt < DSAF_CFG_READ_CNT);
1177
1178         if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1179                 dev_err(dsaf_dev->dev,
1180                         "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1181                         dsaf_dev->ae_dev.name, flag, cnt);
1182                 return -ENODEV;
1183         }
1184
1185         hns_dsaf_rocee_bp_en(dsaf_dev);
1186
1187         return 0;
1188 }
1189
1190 /**
1191  * hns_dsaf_tbl_init - INT
1192  * @dsaf_id: dsa fabric id
1193  */
1194 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1195 {
1196         hns_dsaf_tbl_stat_en(dsaf_dev);
1197
1198         hns_dsaf_tbl_tcam_init(dsaf_dev);
1199         hns_dsaf_tbl_line_init(dsaf_dev);
1200 }
1201
1202 /**
1203  * hns_dsaf_voq_init - INT
1204  * @dsaf_id: dsa fabric id
1205  */
1206 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1207 {
1208         hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1209 }
1210
1211 /**
1212  * hns_dsaf_init_hw - init dsa fabric hardware
1213  * @dsaf_dev: dsa fabric device struct pointer
1214  */
1215 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1216 {
1217         int ret;
1218
1219         dev_dbg(dsaf_dev->dev,
1220                 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1221
1222         hns_dsaf_rst(dsaf_dev, 0);
1223         mdelay(10);
1224         hns_dsaf_rst(dsaf_dev, 1);
1225
1226         hns_dsaf_comm_init(dsaf_dev);
1227
1228         /*init XBAR_INODE*/
1229         hns_dsaf_inode_init(dsaf_dev);
1230
1231         /*init SBM*/
1232         ret = hns_dsaf_sbm_init(dsaf_dev);
1233         if (ret)
1234                 return ret;
1235
1236         /*init TBL*/
1237         hns_dsaf_tbl_init(dsaf_dev);
1238
1239         /*init VOQ*/
1240         hns_dsaf_voq_init(dsaf_dev);
1241
1242         return 0;
1243 }
1244
1245 /**
1246  * hns_dsaf_remove_hw - uninit dsa fabric hardware
1247  * @dsaf_dev: dsa fabric device struct pointer
1248  */
1249 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1250 {
1251         /*reset*/
1252         hns_dsaf_rst(dsaf_dev, 0);
1253 }
1254
1255 /**
1256  * hns_dsaf_init - init dsa fabric
1257  * @dsaf_dev: dsa fabric device struct pointer
1258  * retuen 0 - success , negative --fail
1259  */
1260 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1261 {
1262         struct dsaf_drv_priv *priv =
1263             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1264         u32 i;
1265         int ret;
1266
1267         ret = hns_dsaf_init_hw(dsaf_dev);
1268         if (ret)
1269                 return ret;
1270
1271         /* malloc mem for tcam mac key(vlan+mac) */
1272         priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1273                   * DSAF_TCAM_SUM);
1274         if (!priv->soft_mac_tbl) {
1275                 ret = -ENOMEM;
1276                 goto remove_hw;
1277         }
1278
1279         /*all entry invall */
1280         for (i = 0; i < DSAF_TCAM_SUM; i++)
1281                 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1282
1283         return 0;
1284
1285 remove_hw:
1286         hns_dsaf_remove_hw(dsaf_dev);
1287         return ret;
1288 }
1289
1290 /**
1291  * hns_dsaf_free - free dsa fabric
1292  * @dsaf_dev: dsa fabric device struct pointer
1293  */
1294 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1295 {
1296         struct dsaf_drv_priv *priv =
1297             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1298
1299         hns_dsaf_remove_hw(dsaf_dev);
1300
1301         /* free all mac mem */
1302         vfree(priv->soft_mac_tbl);
1303         priv->soft_mac_tbl = NULL;
1304 }
1305
1306 /**
1307  * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1308  * @dsaf_dev: dsa fabric device struct pointer
1309  * @mac_key: mac entry struct pointer
1310  */
1311 static u16 hns_dsaf_find_soft_mac_entry(
1312         struct dsaf_device *dsaf_dev,
1313         struct dsaf_drv_tbl_tcam_key *mac_key)
1314 {
1315         struct dsaf_drv_priv *priv =
1316             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1317         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1318         u32 i;
1319
1320         soft_mac_entry = priv->soft_mac_tbl;
1321         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1322                 /* invall tab entry */
1323                 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1324                     (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1325                     (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1326                         /* return find result --soft index */
1327                         return soft_mac_entry->index;
1328
1329                 soft_mac_entry++;
1330         }
1331         return DSAF_INVALID_ENTRY_IDX;
1332 }
1333
1334 /**
1335  * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1336  * @dsaf_dev: dsa fabric device struct pointer
1337  */
1338 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1339 {
1340         struct dsaf_drv_priv *priv =
1341             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1342         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1343         u32 i;
1344
1345         soft_mac_entry = priv->soft_mac_tbl;
1346         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1347                 /* inv all entry */
1348                 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1349                         /* return find result --soft index */
1350                         return i;
1351
1352                 soft_mac_entry++;
1353         }
1354         return DSAF_INVALID_ENTRY_IDX;
1355 }
1356
1357 /**
1358  * hns_dsaf_set_mac_key - set mac key
1359  * @dsaf_dev: dsa fabric device struct pointer
1360  * @mac_key: tcam key pointer
1361  * @vlan_id: vlan id
1362  * @in_port_num: input port num
1363  * @addr: mac addr
1364  */
1365 static void hns_dsaf_set_mac_key(
1366         struct dsaf_device *dsaf_dev,
1367         struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1368         u8 *addr)
1369 {
1370         u8 port;
1371
1372         if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1373                 /*DSAF mode : in port id fixed 0*/
1374                 port = 0;
1375         else
1376                 /*non-dsaf mode*/
1377                 port = in_port_num;
1378
1379         mac_key->high.bits.mac_0 = addr[0];
1380         mac_key->high.bits.mac_1 = addr[1];
1381         mac_key->high.bits.mac_2 = addr[2];
1382         mac_key->high.bits.mac_3 = addr[3];
1383         mac_key->low.bits.mac_4 = addr[4];
1384         mac_key->low.bits.mac_5 = addr[5];
1385         mac_key->low.bits.vlan = vlan_id;
1386         mac_key->low.bits.port = port;
1387 }
1388
1389 /**
1390  * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1391  * @dsaf_dev: dsa fabric device struct pointer
1392  * @mac_entry: uc-mac entry
1393  */
1394 int hns_dsaf_set_mac_uc_entry(
1395         struct dsaf_device *dsaf_dev,
1396         struct dsaf_drv_mac_single_dest_entry *mac_entry)
1397 {
1398         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1399         struct dsaf_drv_tbl_tcam_key mac_key;
1400         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1401         struct dsaf_drv_priv *priv =
1402             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1403         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1404
1405         /* mac addr check */
1406         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1407             MAC_IS_BROADCAST(mac_entry->addr) ||
1408             MAC_IS_MULTICAST(mac_entry->addr)) {
1409                 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1410                         dsaf_dev->ae_dev.name, mac_entry->addr);
1411                 return -EINVAL;
1412         }
1413
1414         /* config key */
1415         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1416                              mac_entry->in_port_num, mac_entry->addr);
1417
1418         /* entry ie exist? */
1419         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1420         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1421                 /*if has not inv entry,find a empty entry */
1422                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1423                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1424                         /* has not empty,return error */
1425                         dev_err(dsaf_dev->dev,
1426                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1427                                 dsaf_dev->ae_dev.name,
1428                                 mac_key.high.val, mac_key.low.val);
1429                         return -EINVAL;
1430                 }
1431         }
1432
1433         dev_dbg(dsaf_dev->dev,
1434                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1435                 dsaf_dev->ae_dev.name, mac_key.high.val,
1436                 mac_key.low.val, entry_index);
1437
1438         /* config hardware entry */
1439         mac_data.tbl_ucast_item_vld = 1;
1440         mac_data.tbl_ucast_mac_discard = 0;
1441         mac_data.tbl_ucast_old_en = 0;
1442         /* default config dvc to 0 */
1443         mac_data.tbl_ucast_dvc = 0;
1444         mac_data.tbl_ucast_out_port = mac_entry->port_num;
1445         hns_dsaf_tcam_uc_cfg(
1446                 dsaf_dev, entry_index,
1447                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1448
1449         /* config software entry */
1450         soft_mac_entry += entry_index;
1451         soft_mac_entry->index = entry_index;
1452         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1453         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1454
1455         return 0;
1456 }
1457
1458 /**
1459  * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1460  * @dsaf_dev: dsa fabric device struct pointer
1461  * @mac_entry: mc-mac entry
1462  */
1463 int hns_dsaf_set_mac_mc_entry(
1464         struct dsaf_device *dsaf_dev,
1465         struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1466 {
1467         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1468         struct dsaf_drv_tbl_tcam_key mac_key;
1469         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1470         struct dsaf_drv_priv *priv =
1471             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1472         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1473         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1474
1475         /* mac addr check */
1476         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1477                 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1478                         dsaf_dev->ae_dev.name, mac_entry->addr);
1479                 return -EINVAL;
1480         }
1481
1482         /*config key */
1483         hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1484                              mac_entry->in_vlan_id,
1485                              mac_entry->in_port_num, mac_entry->addr);
1486
1487         /* entry ie exist? */
1488         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1489         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1490                 /*if hasnot, find enpty entry*/
1491                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1492                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1493                         /*if hasnot empty, error*/
1494                         dev_err(dsaf_dev->dev,
1495                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1496                                 dsaf_dev->ae_dev.name,
1497                                 mac_key.high.val, mac_key.low.val);
1498                         return -EINVAL;
1499                 }
1500
1501                 /* config hardware entry */
1502                 memset(mac_data.tbl_mcast_port_msk,
1503                        0, sizeof(mac_data.tbl_mcast_port_msk));
1504         } else {
1505                 /* config hardware entry */
1506                 hns_dsaf_tcam_mc_get(
1507                         dsaf_dev, entry_index,
1508                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1509         }
1510         mac_data.tbl_mcast_old_en = 0;
1511         mac_data.tbl_mcast_item_vld = 1;
1512         dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1513                        0x3F, 0, mac_entry->port_mask[0]);
1514
1515         dev_dbg(dsaf_dev->dev,
1516                 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1517                 dsaf_dev->ae_dev.name, mac_key.high.val,
1518                 mac_key.low.val, entry_index);
1519
1520         hns_dsaf_tcam_mc_cfg(
1521                 dsaf_dev, entry_index,
1522                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1523
1524         /* config software entry */
1525         soft_mac_entry += entry_index;
1526         soft_mac_entry->index = entry_index;
1527         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1528         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1529
1530         return 0;
1531 }
1532
1533 /**
1534  * hns_dsaf_add_mac_mc_port - add mac mc-port
1535  * @dsaf_dev: dsa fabric device struct pointer
1536  * @mac_entry: mc-mac entry
1537  */
1538 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1539                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1540 {
1541         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1542         struct dsaf_drv_tbl_tcam_key mac_key;
1543         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1544         struct dsaf_drv_priv *priv =
1545             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1546         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1547         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1548         int mskid;
1549
1550         /*chechk mac addr */
1551         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1552                 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1553                         mac_entry->addr);
1554                 return -EINVAL;
1555         }
1556
1557         /*config key */
1558         hns_dsaf_set_mac_key(
1559                 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1560                 mac_entry->in_port_num, mac_entry->addr);
1561
1562         memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1563
1564         /*check exist? */
1565         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1566         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1567                 /*if hasnot , find a empty*/
1568                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1569                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1570                         /*if hasnot empty, error*/
1571                         dev_err(dsaf_dev->dev,
1572                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1573                                 dsaf_dev->ae_dev.name, mac_key.high.val,
1574                                 mac_key.low.val);
1575                         return -EINVAL;
1576                 }
1577         } else {
1578                 /*if exist, add in */
1579                 hns_dsaf_tcam_mc_get(
1580                         dsaf_dev, entry_index,
1581                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1582         }
1583         /* config hardware entry */
1584         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1585                 mskid = mac_entry->port_num;
1586         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1587                 mskid = mac_entry->port_num -
1588                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1589         } else {
1590                 dev_err(dsaf_dev->dev,
1591                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1592                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1593                         mac_key.high.val, mac_key.low.val);
1594                 return -EINVAL;
1595         }
1596         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1597         mac_data.tbl_mcast_old_en = 0;
1598         mac_data.tbl_mcast_item_vld = 1;
1599
1600         dev_dbg(dsaf_dev->dev,
1601                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1602                 dsaf_dev->ae_dev.name, mac_key.high.val,
1603                 mac_key.low.val, entry_index);
1604
1605         hns_dsaf_tcam_mc_cfg(
1606                 dsaf_dev, entry_index,
1607                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1608
1609         /*config software entry */
1610         soft_mac_entry += entry_index;
1611         soft_mac_entry->index = entry_index;
1612         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1613         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1614
1615         return 0;
1616 }
1617
1618 /**
1619  * hns_dsaf_del_mac_entry - del mac mc-port
1620  * @dsaf_dev: dsa fabric device struct pointer
1621  * @vlan_id: vlian id
1622  * @in_port_num: input port num
1623  * @addr : mac addr
1624  */
1625 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1626                            u8 in_port_num, u8 *addr)
1627 {
1628         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1629         struct dsaf_drv_tbl_tcam_key mac_key;
1630         struct dsaf_drv_priv *priv =
1631             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1632         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1633
1634         /*check mac addr */
1635         if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1636                 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1637                         addr);
1638                 return -EINVAL;
1639         }
1640
1641         /*config key */
1642         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1643
1644         /*exist ?*/
1645         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1646         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1647                 /*not exist, error */
1648                 dev_err(dsaf_dev->dev,
1649                         "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1650                         dsaf_dev->ae_dev.name,
1651                         mac_key.high.val, mac_key.low.val);
1652                 return -EINVAL;
1653         }
1654         dev_dbg(dsaf_dev->dev,
1655                 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1656                 dsaf_dev->ae_dev.name, mac_key.high.val,
1657                 mac_key.low.val, entry_index);
1658
1659         /*do del opt*/
1660         hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1661
1662         /*del soft emtry */
1663         soft_mac_entry += entry_index;
1664         soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1665
1666         return 0;
1667 }
1668
1669 /**
1670  * hns_dsaf_del_mac_mc_port - del mac mc- port
1671  * @dsaf_dev: dsa fabric device struct pointer
1672  * @mac_entry: mac entry
1673  */
1674 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1675                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1676 {
1677         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1678         struct dsaf_drv_tbl_tcam_key mac_key;
1679         struct dsaf_drv_priv *priv =
1680             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1681         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1682         u16 vlan_id;
1683         u8 in_port_num;
1684         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1685         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1686         int mskid;
1687         const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1688
1689         if (!(void *)mac_entry) {
1690                 dev_err(dsaf_dev->dev,
1691                         "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1692                 return -EINVAL;
1693         }
1694
1695         /*get key info*/
1696         vlan_id = mac_entry->in_vlan_id;
1697         in_port_num = mac_entry->in_port_num;
1698
1699         /*check mac addr */
1700         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1701                 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1702                         mac_entry->addr);
1703                 return -EINVAL;
1704         }
1705
1706         /*config key */
1707         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1708                              mac_entry->addr);
1709
1710         /*check is exist? */
1711         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1712         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1713                 /*find none */
1714                 dev_err(dsaf_dev->dev,
1715                         "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1716                         dsaf_dev->ae_dev.name,
1717                         mac_key.high.val, mac_key.low.val);
1718                 return -EINVAL;
1719         }
1720
1721         dev_dbg(dsaf_dev->dev,
1722                 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1723                 dsaf_dev->ae_dev.name, mac_key.high.val,
1724                 mac_key.low.val, entry_index);
1725
1726         /*read entry*/
1727         hns_dsaf_tcam_mc_get(
1728                 dsaf_dev, entry_index,
1729                 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1730
1731         /*del the port*/
1732         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1733                 mskid = mac_entry->port_num;
1734         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1735                 mskid = mac_entry->port_num -
1736                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1737         } else {
1738                 dev_err(dsaf_dev->dev,
1739                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1740                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1741                         mac_key.high.val, mac_key.low.val);
1742                 return -EINVAL;
1743         }
1744         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1745
1746         /*check non port, do del entry */
1747         if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1748                     sizeof(mac_data.tbl_mcast_port_msk))) {
1749                 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1750
1751                 /* del soft entry */
1752                 soft_mac_entry += entry_index;
1753                 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1754         } else { /* not zer, just del port, updata*/
1755                 hns_dsaf_tcam_mc_cfg(
1756                         dsaf_dev, entry_index,
1757                         (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1758         }
1759
1760         return 0;
1761 }
1762
1763 /**
1764  * hns_dsaf_get_mac_uc_entry - get mac uc entry
1765  * @dsaf_dev: dsa fabric device struct pointer
1766  * @mac_entry: mac entry
1767  */
1768 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1769                               struct dsaf_drv_mac_single_dest_entry *mac_entry)
1770 {
1771         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1772         struct dsaf_drv_tbl_tcam_key mac_key;
1773
1774         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1775
1776         /* check macaddr */
1777         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1778             MAC_IS_BROADCAST(mac_entry->addr)) {
1779                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1780                         mac_entry->addr);
1781                 return -EINVAL;
1782         }
1783
1784         /*config key */
1785         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1786                              mac_entry->in_port_num, mac_entry->addr);
1787
1788         /*check exist? */
1789         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1790         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1791                 /*find none, error */
1792                 dev_err(dsaf_dev->dev,
1793                         "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1794                         dsaf_dev->ae_dev.name,
1795                         mac_key.high.val, mac_key.low.val);
1796                 return -EINVAL;
1797         }
1798         dev_dbg(dsaf_dev->dev,
1799                 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1800                 dsaf_dev->ae_dev.name, mac_key.high.val,
1801                 mac_key.low.val, entry_index);
1802
1803         /*read entry*/
1804         hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1805                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1806         mac_entry->port_num = mac_data.tbl_ucast_out_port;
1807
1808         return 0;
1809 }
1810
1811 /**
1812  * hns_dsaf_get_mac_mc_entry - get mac mc entry
1813  * @dsaf_dev: dsa fabric device struct pointer
1814  * @mac_entry: mac entry
1815  */
1816 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1817                               struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1818 {
1819         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1820         struct dsaf_drv_tbl_tcam_key mac_key;
1821
1822         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1823
1824         /*check mac addr */
1825         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1826             MAC_IS_BROADCAST(mac_entry->addr)) {
1827                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1828                         mac_entry->addr);
1829                 return -EINVAL;
1830         }
1831
1832         /*config key */
1833         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1834                              mac_entry->in_port_num, mac_entry->addr);
1835
1836         /*check exist? */
1837         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1838         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1839                 /* find none, error */
1840                 dev_err(dsaf_dev->dev,
1841                         "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1842                         dsaf_dev->ae_dev.name, mac_key.high.val,
1843                         mac_key.low.val);
1844                 return -EINVAL;
1845         }
1846         dev_dbg(dsaf_dev->dev,
1847                 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1848                 dsaf_dev->ae_dev.name, mac_key.high.val,
1849                 mac_key.low.val, entry_index);
1850
1851         /*read entry */
1852         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1853                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1854
1855         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1856         return 0;
1857 }
1858
1859 /**
1860  * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1861  * @dsaf_dev: dsa fabric device struct pointer
1862  * @entry_index: tab entry index
1863  * @mac_entry: mac entry
1864  */
1865 int hns_dsaf_get_mac_entry_by_index(
1866         struct dsaf_device *dsaf_dev,
1867         u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1868 {
1869         struct dsaf_drv_tbl_tcam_key mac_key;
1870
1871         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1872         struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1873         char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1874
1875         if (entry_index >= DSAF_TCAM_SUM) {
1876                 /* find none, del error */
1877                 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1878                         dsaf_dev->ae_dev.name);
1879                 return -EINVAL;
1880         }
1881
1882         /* mc entry, do read opt */
1883         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1884                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1885
1886         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1887
1888         /***get mac addr*/
1889         mac_addr[0] = mac_key.high.bits.mac_0;
1890         mac_addr[1] = mac_key.high.bits.mac_1;
1891         mac_addr[2] = mac_key.high.bits.mac_2;
1892         mac_addr[3] = mac_key.high.bits.mac_3;
1893         mac_addr[4] = mac_key.low.bits.mac_4;
1894         mac_addr[5] = mac_key.low.bits.mac_5;
1895         /**is mc or uc*/
1896         if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1897             MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1898                 /**mc donot do*/
1899         } else {
1900                 /*is not mc, just uc... */
1901                 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1902                                      (struct dsaf_tbl_tcam_data *)&mac_key,
1903                                      &mac_uc_data);
1904                 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1905         }
1906
1907         return 0;
1908 }
1909
1910 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1911                                               size_t sizeof_priv)
1912 {
1913         struct dsaf_device *dsaf_dev;
1914
1915         dsaf_dev = devm_kzalloc(dev,
1916                                 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1917         if (unlikely(!dsaf_dev)) {
1918                 dsaf_dev = ERR_PTR(-ENOMEM);
1919         } else {
1920                 dsaf_dev->dev = dev;
1921                 dev_set_drvdata(dev, dsaf_dev);
1922         }
1923
1924         return dsaf_dev;
1925 }
1926
1927 /**
1928  * hns_dsaf_free_dev - free dev mem
1929  * @dev: struct device pointer
1930  */
1931 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1932 {
1933         (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1934 }
1935
1936 /**
1937  * dsaf_pfc_unit_cnt - set pfc unit count
1938  * @dsaf_id: dsa fabric id
1939  * @pport_rate:  value array
1940  * @pdsaf_pfc_unit_cnt:  value array
1941  */
1942 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int  mac_id,
1943                                   enum dsaf_port_rate_mode rate)
1944 {
1945         u32 unit_cnt;
1946
1947         switch (rate) {
1948         case DSAF_PORT_RATE_10000:
1949                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1950                 break;
1951         case DSAF_PORT_RATE_1000:
1952                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1953                 break;
1954         case DSAF_PORT_RATE_2500:
1955                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1956                 break;
1957         default:
1958                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1959         }
1960
1961         dsaf_set_dev_field(dsaf_dev,
1962                            (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
1963                            DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
1964                            unit_cnt);
1965 }
1966
1967 /**
1968  * dsaf_port_work_rate_cfg - fifo
1969  * @dsaf_id: dsa fabric id
1970  * @xge_ge_work_mode
1971  */
1972 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
1973                                  enum dsaf_port_rate_mode rate_mode)
1974 {
1975         u32 port_work_mode;
1976
1977         port_work_mode = dsaf_read_dev(
1978                 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
1979
1980         if (rate_mode == DSAF_PORT_RATE_10000)
1981                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
1982         else
1983                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
1984
1985         dsaf_write_dev(dsaf_dev,
1986                        DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
1987                        port_work_mode);
1988
1989         hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
1990 }
1991
1992 /**
1993  * hns_dsaf_fix_mac_mode - dsaf modify mac mode
1994  * @mac_cb: mac contrl block
1995  */
1996 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
1997 {
1998         enum dsaf_port_rate_mode mode;
1999         struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2000         int mac_id = mac_cb->mac_id;
2001
2002         if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2003                 return;
2004         if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2005                 mode = DSAF_PORT_RATE_10000;
2006         else
2007                 mode = DSAF_PORT_RATE_1000;
2008
2009         hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2010 }
2011
2012 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2013 {
2014         struct dsaf_hw_stats *hw_stats
2015                 = &dsaf_dev->hw_stats[node_num];
2016
2017         hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2018                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2019         hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2020                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2021         hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2022                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2023         hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2024                 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2025         hw_stats->rx_pause_frame += dsaf_read_dev(dsaf_dev,
2026                 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + 0x80 * (u64)node_num);
2027         hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2028                 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2029         hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2030                 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2031         hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2032                 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2033         hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2034                 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2035         hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2036                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2037         hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2038                 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2039
2040         hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2041                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2042         hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2043                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2044
2045         hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2046                 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2047 }
2048
2049 /**
2050  *hns_dsaf_get_regs - dump dsaf regs
2051  *@dsaf_dev: dsaf device
2052  *@data:data for value of regs
2053  */
2054 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2055 {
2056         u32 i = 0;
2057         u32 j;
2058         u32 *p = data;
2059
2060         /* dsaf common registers */
2061         p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2062         p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2063         p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2064         p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2065         p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2066         p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2067         p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2068         p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2069         p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2070
2071         p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2072         p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2073         p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2074         p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2075         p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2076         p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2077         p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2078         p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2079         p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2080         p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2081         p[19] =  dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2082         p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2083         p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2084         p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2085         p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2086
2087         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2088                 p[24 + i] = dsaf_read_dev(ddev,
2089                                 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2090
2091         p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2092
2093         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2094                 p[33 + i] = dsaf_read_dev(ddev,
2095                                 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2096
2097         for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2098                 p[41 + i] = dsaf_read_dev(ddev,
2099                                 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2100
2101         /* dsaf inode registers */
2102         p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2103
2104         p[171] = dsaf_read_dev(ddev,
2105                         DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2106
2107         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2108                 j = i * DSAF_COMM_CHN + port;
2109                 p[172 + i] = dsaf_read_dev(ddev,
2110                                 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2111                 p[175 + i] = dsaf_read_dev(ddev,
2112                                 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2113                 p[178 + i] = dsaf_read_dev(ddev,
2114                                 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2115                 p[181 + i] = dsaf_read_dev(ddev,
2116                                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2117                 p[184 + i] = dsaf_read_dev(ddev,
2118                                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2119                 p[187 + i] = dsaf_read_dev(ddev,
2120                                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2121                 p[190 + i] = dsaf_read_dev(ddev,
2122                                 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2123                 p[193 + i] = dsaf_read_dev(ddev,
2124                                 DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG + j * 0x80);
2125                 p[196 + i] = dsaf_read_dev(ddev,
2126                                 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2127                 p[199 + i] = dsaf_read_dev(ddev,
2128                                 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2129                 p[202 + i] = dsaf_read_dev(ddev,
2130                                 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2131                 p[205 + i] = dsaf_read_dev(ddev,
2132                                 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2133                 p[208 + i] = dsaf_read_dev(ddev,
2134                                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2135                 p[211 + i] = dsaf_read_dev(ddev,
2136                         DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2137                 p[214 + i] = dsaf_read_dev(ddev,
2138                                 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2139                 p[217 + i] = dsaf_read_dev(ddev,
2140                                 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2141                 p[220 + i] = dsaf_read_dev(ddev,
2142                                 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2143                 p[223 + i] = dsaf_read_dev(ddev,
2144                                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2145                 p[224 + i] = dsaf_read_dev(ddev,
2146                                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2147         }
2148
2149         p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2150
2151         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2152                 j = i * DSAF_COMM_CHN + port;
2153                 p[228 + i] = dsaf_read_dev(ddev,
2154                                 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2155         }
2156
2157         p[231] = dsaf_read_dev(ddev,
2158                 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2159
2160         /* dsaf inode registers */
2161         for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2162                 j = i * DSAF_COMM_CHN + port;
2163                 p[232 + i] = dsaf_read_dev(ddev,
2164                                 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2165                 p[235 + i] = dsaf_read_dev(ddev,
2166                                 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2167                 p[238 + i] = dsaf_read_dev(ddev,
2168                                 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2169                 p[241 + i] = dsaf_read_dev(ddev,
2170                                 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2171                 p[244 + i] = dsaf_read_dev(ddev,
2172                                 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2173                 p[245 + i] = dsaf_read_dev(ddev,
2174                                 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2175                 p[248 + i] = dsaf_read_dev(ddev,
2176                                 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2177                 p[251 + i] = dsaf_read_dev(ddev,
2178                                 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2179                 p[254 + i] = dsaf_read_dev(ddev,
2180                                 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2181                 p[257 + i] = dsaf_read_dev(ddev,
2182                                 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2183                 p[260 + i] = dsaf_read_dev(ddev,
2184                                 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2185                 p[263 + i] = dsaf_read_dev(ddev,
2186                                 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2187                 p[266 + i] = dsaf_read_dev(ddev,
2188                                 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2189                 p[269 + i] = dsaf_read_dev(ddev,
2190                                 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2191                 p[272 + i] = dsaf_read_dev(ddev,
2192                                 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2193                 p[275 + i] = dsaf_read_dev(ddev,
2194                                 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2195                 p[278 + i] = dsaf_read_dev(ddev,
2196                                 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2197                 p[281 + i] = dsaf_read_dev(ddev,
2198                                 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2199                 p[284 + i] = dsaf_read_dev(ddev,
2200                                 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2201                 p[287 + i] = dsaf_read_dev(ddev,
2202                                 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2203                 p[290 + i] = dsaf_read_dev(ddev,
2204                                 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2205                 p[293 + i] = dsaf_read_dev(ddev,
2206                                 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2207                 p[296 + i] = dsaf_read_dev(ddev,
2208                                 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2209                 p[299 + i] = dsaf_read_dev(ddev,
2210                                 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2211                 p[302 + i] = dsaf_read_dev(ddev,
2212                                 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2213                 p[305 + i] = dsaf_read_dev(ddev,
2214                                 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2215                 p[308 + i] = dsaf_read_dev(ddev,
2216                                 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2217         }
2218
2219         /* dsaf onode registers */
2220         for (i = 0; i < DSAF_XOD_NUM; i++) {
2221                 p[311 + i] = dsaf_read_dev(ddev,
2222                                 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + j * 0x90);
2223                 p[319 + i] = dsaf_read_dev(ddev,
2224                                 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + j * 0x90);
2225                 p[327 + i] = dsaf_read_dev(ddev,
2226                                 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + j * 0x90);
2227                 p[335 + i] = dsaf_read_dev(ddev,
2228                                 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + j * 0x90);
2229                 p[343 + i] = dsaf_read_dev(ddev,
2230                                 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + j * 0x90);
2231                 p[351 + i] = dsaf_read_dev(ddev,
2232                                 DSAF_XOD_ETS_TOKEN_CFG_0_REG + j * 0x90);
2233         }
2234
2235         p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2236         p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2237         p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2238
2239         for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2240                 j = i * DSAF_COMM_CHN + port;
2241                 p[362 + i] = dsaf_read_dev(ddev,
2242                                 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2243                 p[365 + i] = dsaf_read_dev(ddev,
2244                                 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2245                 p[368 + i] = dsaf_read_dev(ddev,
2246                                 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2247                 p[371 + i] = dsaf_read_dev(ddev,
2248                                 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2249                 p[374 + i] = dsaf_read_dev(ddev,
2250                                 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2251                 p[377 + i] = dsaf_read_dev(ddev,
2252                                 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2253                 p[380 + i] = dsaf_read_dev(ddev,
2254                                 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2255                 p[383 + i] = dsaf_read_dev(ddev,
2256                                 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2257                 p[386 + i] = dsaf_read_dev(ddev,
2258                                 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2259                 p[389 + i] = dsaf_read_dev(ddev,
2260                                 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2261         }
2262
2263         p[392] = dsaf_read_dev(ddev,
2264                 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2265         p[393] = dsaf_read_dev(ddev,
2266                 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2267         p[394] = dsaf_read_dev(ddev,
2268                 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2269         p[395] = dsaf_read_dev(ddev,
2270                 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2271         p[396] = dsaf_read_dev(ddev,
2272                 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2273         p[397] = dsaf_read_dev(ddev,
2274                 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2275         p[398] = dsaf_read_dev(ddev,
2276                 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2277         p[399] = dsaf_read_dev(ddev,
2278                 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2279         p[400] = dsaf_read_dev(ddev,
2280                 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2281         p[401] = dsaf_read_dev(ddev,
2282                 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2283         p[402] = dsaf_read_dev(ddev,
2284                 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2285         p[403] = dsaf_read_dev(ddev,
2286                 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2287         p[404] = dsaf_read_dev(ddev,
2288                 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2289
2290         /* dsaf voq registers */
2291         for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2292                 j = (i * DSAF_COMM_CHN + port) * 0x90;
2293                 p[405 + i] = dsaf_read_dev(ddev,
2294                         DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2295                 p[408 + i] = dsaf_read_dev(ddev,
2296                         DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2297                 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2298                 p[414 + i] = dsaf_read_dev(ddev,
2299                         DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2300                 p[417 + i] = dsaf_read_dev(ddev,
2301                         DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2302                 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2303                 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2304                 p[426 + i] = dsaf_read_dev(ddev,
2305                         DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2306                 p[429 + i] = dsaf_read_dev(ddev,
2307                         DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2308                 p[432 + i] = dsaf_read_dev(ddev,
2309                         DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2310                 p[435 + i] = dsaf_read_dev(ddev,
2311                         DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2312                 p[438 + i] = dsaf_read_dev(ddev,
2313                         DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2314         }
2315
2316         /* dsaf tbl registers */
2317         p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2318         p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2319         p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2320         p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2321         p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2322         p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2323         p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2324         p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2325         p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2326         p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2327         p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2328         p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2329         p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2330         p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2331         p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2332         p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2333         p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2334         p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2335         p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2336         p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2337         p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2338         p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2339         p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2340
2341         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2342                 j = i * 0x8;
2343                 p[464 + 2 * i] = dsaf_read_dev(ddev,
2344                         DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2345                 p[465 + 2 * i] = dsaf_read_dev(ddev,
2346                         DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2347         }
2348
2349         p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2350         p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2351         p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2352         p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2353         p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2354         p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2355         p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2356         p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2357         p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2358         p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2359         p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2360         p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2361
2362         /* dsaf other registers */
2363         p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2364         p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2365         p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2366         p[495] = dsaf_read_dev(ddev,
2367                 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2368         p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2369         p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2370
2371         /* mark end of dsaf regs */
2372         for (i = 498; i < 504; i++)
2373                 p[i] = 0xdddddddd;
2374 }
2375
2376 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2377 {
2378         char *buff = data;
2379
2380         snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2381         buff = buff + ETH_GSTRING_LEN;
2382         snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2383         buff = buff + ETH_GSTRING_LEN;
2384         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2385         buff = buff + ETH_GSTRING_LEN;
2386         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2387         buff = buff + ETH_GSTRING_LEN;
2388         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2389         buff = buff + ETH_GSTRING_LEN;
2390         snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2391         buff = buff + ETH_GSTRING_LEN;
2392         snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2393         buff = buff + ETH_GSTRING_LEN;
2394         snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2395         buff = buff + ETH_GSTRING_LEN;
2396         snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2397         buff = buff + ETH_GSTRING_LEN;
2398         snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2399         buff = buff + ETH_GSTRING_LEN;
2400         snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2401         buff = buff + ETH_GSTRING_LEN;
2402         snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2403         buff = buff + ETH_GSTRING_LEN;
2404         snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2405         buff = buff + ETH_GSTRING_LEN;
2406         snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2407         buff = buff + ETH_GSTRING_LEN;
2408
2409         return buff;
2410 }
2411
2412 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2413                                     int node_num)
2414 {
2415         u64 *p = data;
2416         struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2417
2418         p[0] = hw_stats->pad_drop;
2419         p[1] = hw_stats->man_pkts;
2420         p[2] = hw_stats->rx_pkts;
2421         p[3] = hw_stats->rx_pkt_id;
2422         p[4] = hw_stats->rx_pause_frame;
2423         p[5] = hw_stats->release_buf_num;
2424         p[6] = hw_stats->sbm_drop;
2425         p[7] = hw_stats->crc_false;
2426         p[8] = hw_stats->bp_drop;
2427         p[9] = hw_stats->rslt_drop;
2428         p[10] = hw_stats->local_addr_false;
2429         p[11] = hw_stats->vlan_drop;
2430         p[12] = hw_stats->stp_drop;
2431         p[13] = hw_stats->tx_pkts;
2432
2433         return &p[14];
2434 }
2435
2436 /**
2437  *hns_dsaf_get_stats - get dsaf statistic
2438  *@ddev: dsaf device
2439  *@data:statistic value
2440  *@port: port num
2441  */
2442 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2443 {
2444         u64 *p = data;
2445         int node_num = port;
2446
2447         /* for ge/xge node info */
2448         p = hns_dsaf_get_node_stats(ddev, p, node_num);
2449
2450         /* for ppe node info */
2451         node_num = port + DSAF_PPE_INODE_BASE;
2452         (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2453 }
2454
2455 /**
2456  *hns_dsaf_get_sset_count - get dsaf string set count
2457  *@stringset: type of values in data
2458  *return dsaf string name count
2459  */
2460 int hns_dsaf_get_sset_count(int stringset)
2461 {
2462         if (stringset == ETH_SS_STATS)
2463                 return DSAF_STATIC_NUM;
2464
2465         return 0;
2466 }
2467
2468 /**
2469  *hns_dsaf_get_strings - get dsaf string set
2470  *@stringset:srting set index
2471  *@data:strings name value
2472  *@port:port index
2473  */
2474 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2475 {
2476         char *buff = (char *)data;
2477         int node = port;
2478
2479         if (stringset != ETH_SS_STATS)
2480                 return;
2481
2482         /* for ge/xge node info */
2483         buff = hns_dsaf_get_node_stats_strings(buff, node);
2484
2485         /* for ppe node info */
2486         node = port + DSAF_PPE_INODE_BASE;
2487         (void)hns_dsaf_get_node_stats_strings(buff, node);
2488 }
2489
2490 /**
2491  *hns_dsaf_get_sset_count - get dsaf regs count
2492  *return dsaf regs count
2493  */
2494 int hns_dsaf_get_regs_count(void)
2495 {
2496         return DSAF_DUMP_REGS_NUM;
2497 }
2498
2499 /**
2500  * dsaf_probe - probo dsaf dev
2501  * @pdev: dasf platform device
2502  * retuen 0 - success , negative --fail
2503  */
2504 static int hns_dsaf_probe(struct platform_device *pdev)
2505 {
2506         struct dsaf_device *dsaf_dev;
2507         int ret;
2508
2509         dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2510         if (IS_ERR(dsaf_dev)) {
2511                 ret = PTR_ERR(dsaf_dev);
2512                 dev_err(&pdev->dev,
2513                         "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2514                 return ret;
2515         }
2516
2517         ret = hns_dsaf_get_cfg(dsaf_dev);
2518         if (ret)
2519                 goto free_dev;
2520
2521         ret = hns_dsaf_init(dsaf_dev);
2522         if (ret)
2523                 goto free_cfg;
2524
2525         ret = hns_mac_init(dsaf_dev);
2526         if (ret)
2527                 goto uninit_dsaf;
2528
2529         ret = hns_ppe_init(dsaf_dev);
2530         if (ret)
2531                 goto uninit_mac;
2532
2533         ret = hns_dsaf_ae_init(dsaf_dev);
2534         if (ret)
2535                 goto uninit_ppe;
2536
2537         return 0;
2538
2539 uninit_ppe:
2540         hns_ppe_uninit(dsaf_dev);
2541
2542 uninit_mac:
2543         hns_mac_uninit(dsaf_dev);
2544
2545 uninit_dsaf:
2546         hns_dsaf_free(dsaf_dev);
2547
2548 free_cfg:
2549         hns_dsaf_free_cfg(dsaf_dev);
2550
2551 free_dev:
2552         hns_dsaf_free_dev(dsaf_dev);
2553
2554         return ret;
2555 }
2556
2557 /**
2558  * dsaf_remove - remove dsaf dev
2559  * @pdev: dasf platform device
2560  */
2561 static int hns_dsaf_remove(struct platform_device *pdev)
2562 {
2563         struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2564
2565         hns_dsaf_ae_uninit(dsaf_dev);
2566
2567         hns_ppe_uninit(dsaf_dev);
2568
2569         hns_mac_uninit(dsaf_dev);
2570
2571         hns_dsaf_free(dsaf_dev);
2572
2573         hns_dsaf_free_cfg(dsaf_dev);
2574
2575         hns_dsaf_free_dev(dsaf_dev);
2576
2577         return 0;
2578 }
2579
2580 static const struct of_device_id g_dsaf_match[] = {
2581         {.compatible = "hisilicon,hns-dsaf-v1"},
2582         {.compatible = "hisilicon,hns-dsaf-v2"},
2583         {}
2584 };
2585
2586 static struct platform_driver g_dsaf_driver = {
2587         .probe = hns_dsaf_probe,
2588         .remove = hns_dsaf_remove,
2589         .driver = {
2590                 .name = DSAF_DRV_NAME,
2591                 .of_match_table = g_dsaf_match,
2592         },
2593 };
2594
2595 module_platform_driver(g_dsaf_driver);
2596
2597 MODULE_LICENSE("GPL");
2598 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2599 MODULE_DESCRIPTION("HNS DSAF driver");
2600 MODULE_VERSION(DSAF_MOD_VERSION);