1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 ******************************************************************************/
31 const char i40e_driver_name[] = "i40e";
32 static const char i40e_driver_string[] =
33 "Intel(R) Ethernet Connection XL710 Network Driver";
37 #define DRV_VERSION_MAJOR 0
38 #define DRV_VERSION_MINOR 3
39 #define DRV_VERSION_BUILD 10
40 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
41 __stringify(DRV_VERSION_MINOR) "." \
42 __stringify(DRV_VERSION_BUILD) DRV_KERN
43 const char i40e_driver_version_str[] = DRV_VERSION;
44 static const char i40e_copyright[] = "Copyright (c) 2013 Intel Corporation.";
46 /* a bit of forward declarations */
47 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
48 static void i40e_handle_reset_warning(struct i40e_pf *pf);
49 static int i40e_add_vsi(struct i40e_vsi *vsi);
50 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
51 static int i40e_setup_pf_switch(struct i40e_pf *pf);
52 static int i40e_setup_misc_vector(struct i40e_pf *pf);
53 static void i40e_determine_queue_usage(struct i40e_pf *pf);
54 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
56 /* i40e_pci_tbl - PCI Device ID Table
58 * Last entry must be all 0s
60 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
61 * Class, Class Mask, private data (not used) }
63 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
64 {PCI_VDEVICE(INTEL, I40E_SFP_XL710_DEVICE_ID), 0},
65 {PCI_VDEVICE(INTEL, I40E_SFP_X710_DEVICE_ID), 0},
66 {PCI_VDEVICE(INTEL, I40E_QEMU_DEVICE_ID), 0},
67 {PCI_VDEVICE(INTEL, I40E_KX_A_DEVICE_ID), 0},
68 {PCI_VDEVICE(INTEL, I40E_KX_B_DEVICE_ID), 0},
69 {PCI_VDEVICE(INTEL, I40E_KX_C_DEVICE_ID), 0},
70 {PCI_VDEVICE(INTEL, I40E_KX_D_DEVICE_ID), 0},
71 {PCI_VDEVICE(INTEL, I40E_QSFP_A_DEVICE_ID), 0},
72 {PCI_VDEVICE(INTEL, I40E_QSFP_B_DEVICE_ID), 0},
73 {PCI_VDEVICE(INTEL, I40E_QSFP_C_DEVICE_ID), 0},
74 /* required last entry */
77 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
79 #define I40E_MAX_VF_COUNT 128
80 static int debug = -1;
81 module_param(debug, int, 0);
82 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
85 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
90 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
91 * @hw: pointer to the HW structure
92 * @mem: ptr to mem struct to fill out
93 * @size: size of memory requested
94 * @alignment: what to align the allocation to
96 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
97 u64 size, u32 alignment)
99 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
101 mem->size = ALIGN(size, alignment);
102 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
103 &mem->pa, GFP_KERNEL);
111 * i40e_free_dma_mem_d - OS specific memory free for shared code
112 * @hw: pointer to the HW structure
113 * @mem: ptr to mem struct to free
115 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
117 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
119 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
128 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
129 * @hw: pointer to the HW structure
130 * @mem: ptr to mem struct to fill out
131 * @size: size of memory requested
133 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
137 mem->va = kzalloc(size, GFP_KERNEL);
146 * i40e_free_virt_mem_d - OS specific memory free for shared code
147 * @hw: pointer to the HW structure
148 * @mem: ptr to mem struct to free
150 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
152 /* it's ok to kfree a NULL pointer */
161 * i40e_get_lump - find a lump of free generic resource
162 * @pf: board private structure
163 * @pile: the pile of resource to search
164 * @needed: the number of items needed
165 * @id: an owner id to stick on the items assigned
167 * Returns the base item index of the lump, or negative for error
169 * The search_hint trick and lack of advanced fit-finding only work
170 * because we're highly likely to have all the same size lump requests.
171 * Linear search time and any fragmentation should be minimal.
173 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
179 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
180 dev_info(&pf->pdev->dev,
181 "param err: pile=%p needed=%d id=0x%04x\n",
186 /* start the linear search with an imperfect hint */
187 i = pile->search_hint;
188 while (i < pile->num_entries) {
189 /* skip already allocated entries */
190 if (pile->list[i] & I40E_PILE_VALID_BIT) {
195 /* do we have enough in this lump? */
196 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
197 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
202 /* there was enough, so assign it to the requestor */
203 for (j = 0; j < needed; j++)
204 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
206 pile->search_hint = i + j;
209 /* not enough, so skip over it and continue looking */
218 * i40e_put_lump - return a lump of generic resource
219 * @pile: the pile of resource to search
220 * @index: the base item index
221 * @id: the owner id of the items assigned
223 * Returns the count of items in the lump
225 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
227 int valid_id = (id | I40E_PILE_VALID_BIT);
231 if (!pile || index >= pile->num_entries)
235 i < pile->num_entries && pile->list[i] == valid_id;
241 if (count && index < pile->search_hint)
242 pile->search_hint = index;
248 * i40e_service_event_schedule - Schedule the service task to wake up
249 * @pf: board private structure
251 * If not already scheduled, this puts the task into the work queue
253 static void i40e_service_event_schedule(struct i40e_pf *pf)
255 if (!test_bit(__I40E_DOWN, &pf->state) &&
256 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
257 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
258 schedule_work(&pf->service_task);
262 * i40e_tx_timeout - Respond to a Tx Hang
263 * @netdev: network interface device structure
265 * If any port has noticed a Tx timeout, it is likely that the whole
266 * device is munged, not just the one netdev port, so go for the full
269 static void i40e_tx_timeout(struct net_device *netdev)
271 struct i40e_netdev_priv *np = netdev_priv(netdev);
272 struct i40e_vsi *vsi = np->vsi;
273 struct i40e_pf *pf = vsi->back;
275 pf->tx_timeout_count++;
277 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
278 pf->tx_timeout_recovery_level = 0;
279 pf->tx_timeout_last_recovery = jiffies;
280 netdev_info(netdev, "tx_timeout recovery level %d\n",
281 pf->tx_timeout_recovery_level);
283 switch (pf->tx_timeout_recovery_level) {
285 /* disable and re-enable queues for the VSI */
286 if (in_interrupt()) {
287 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
288 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
290 i40e_vsi_reinit_locked(vsi);
294 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
297 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
300 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
303 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
307 i40e_service_event_schedule(pf);
308 pf->tx_timeout_recovery_level++;
312 * i40e_release_rx_desc - Store the new tail and head values
313 * @rx_ring: ring to bump
314 * @val: new head index
316 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
318 rx_ring->next_to_use = val;
320 /* Force memory writes to complete before letting h/w
321 * know there are new descriptors to fetch. (Only
322 * applicable for weak-ordered memory model archs,
326 writel(val, rx_ring->tail);
330 * i40e_get_vsi_stats_struct - Get System Network Statistics
331 * @vsi: the VSI we care about
333 * Returns the address of the device statistics structure.
334 * The statistics are actually updated from the service task.
336 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
338 return &vsi->net_stats;
342 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
343 * @netdev: network interface device structure
345 * Returns the address of the device statistics structure.
346 * The statistics are actually updated from the service task.
348 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
349 struct net_device *netdev,
350 struct rtnl_link_stats64 *stats)
352 struct i40e_netdev_priv *np = netdev_priv(netdev);
353 struct i40e_vsi *vsi = np->vsi;
354 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
358 for (i = 0; i < vsi->num_queue_pairs; i++) {
359 struct i40e_ring *tx_ring, *rx_ring;
363 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
368 start = u64_stats_fetch_begin_bh(&tx_ring->syncp);
369 packets = tx_ring->stats.packets;
370 bytes = tx_ring->stats.bytes;
371 } while (u64_stats_fetch_retry_bh(&tx_ring->syncp, start));
373 stats->tx_packets += packets;
374 stats->tx_bytes += bytes;
375 rx_ring = &tx_ring[1];
378 start = u64_stats_fetch_begin_bh(&rx_ring->syncp);
379 packets = rx_ring->stats.packets;
380 bytes = rx_ring->stats.bytes;
381 } while (u64_stats_fetch_retry_bh(&rx_ring->syncp, start));
383 stats->rx_packets += packets;
384 stats->rx_bytes += bytes;
388 /* following stats updated by ixgbe_watchdog_task() */
389 stats->multicast = vsi_stats->multicast;
390 stats->tx_errors = vsi_stats->tx_errors;
391 stats->tx_dropped = vsi_stats->tx_dropped;
392 stats->rx_errors = vsi_stats->rx_errors;
393 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
394 stats->rx_length_errors = vsi_stats->rx_length_errors;
400 * i40e_vsi_reset_stats - Resets all stats of the given vsi
401 * @vsi: the VSI to have its stats reset
403 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
405 struct rtnl_link_stats64 *ns;
411 ns = i40e_get_vsi_stats_struct(vsi);
412 memset(ns, 0, sizeof(*ns));
413 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
414 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
415 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
417 for (i = 0; i < vsi->num_queue_pairs; i++) {
418 memset(&vsi->rx_rings[i]->stats, 0 ,
419 sizeof(vsi->rx_rings[i]->stats));
420 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
421 sizeof(vsi->rx_rings[i]->rx_stats));
422 memset(&vsi->tx_rings[i]->stats, 0 ,
423 sizeof(vsi->tx_rings[i]->stats));
424 memset(&vsi->tx_rings[i]->tx_stats, 0,
425 sizeof(vsi->tx_rings[i]->tx_stats));
427 vsi->stat_offsets_loaded = false;
431 * i40e_pf_reset_stats - Reset all of the stats for the given pf
432 * @pf: the PF to be reset
434 void i40e_pf_reset_stats(struct i40e_pf *pf)
436 memset(&pf->stats, 0, sizeof(pf->stats));
437 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
438 pf->stat_offsets_loaded = false;
442 * i40e_stat_update48 - read and update a 48 bit stat from the chip
443 * @hw: ptr to the hardware info
444 * @hireg: the high 32 bit reg to read
445 * @loreg: the low 32 bit reg to read
446 * @offset_loaded: has the initial offset been loaded yet
447 * @offset: ptr to current offset value
448 * @stat: ptr to the stat
450 * Since the device stats are not reset at PFReset, they likely will not
451 * be zeroed when the driver starts. We'll save the first values read
452 * and use them as offsets to be subtracted from the raw values in order
453 * to report stats that count from zero. In the process, we also manage
454 * the potential roll-over.
456 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
457 bool offset_loaded, u64 *offset, u64 *stat)
461 if (hw->device_id == I40E_QEMU_DEVICE_ID) {
462 new_data = rd32(hw, loreg);
463 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
465 new_data = rd64(hw, loreg);
469 if (likely(new_data >= *offset))
470 *stat = new_data - *offset;
472 *stat = (new_data + ((u64)1 << 48)) - *offset;
473 *stat &= 0xFFFFFFFFFFFFULL;
477 * i40e_stat_update32 - read and update a 32 bit stat from the chip
478 * @hw: ptr to the hardware info
479 * @reg: the hw reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
484 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
485 bool offset_loaded, u64 *offset, u64 *stat)
489 new_data = rd32(hw, reg);
492 if (likely(new_data >= *offset))
493 *stat = (u32)(new_data - *offset);
495 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
499 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
500 * @vsi: the VSI to be updated
502 void i40e_update_eth_stats(struct i40e_vsi *vsi)
504 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
505 struct i40e_pf *pf = vsi->back;
506 struct i40e_hw *hw = &pf->hw;
507 struct i40e_eth_stats *oes;
508 struct i40e_eth_stats *es; /* device's eth stats */
510 es = &vsi->eth_stats;
511 oes = &vsi->eth_stats_offsets;
513 /* Gather up the stats that the hw collects */
514 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
515 vsi->stat_offsets_loaded,
516 &oes->tx_errors, &es->tx_errors);
517 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
518 vsi->stat_offsets_loaded,
519 &oes->rx_discards, &es->rx_discards);
521 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
522 I40E_GLV_GORCL(stat_idx),
523 vsi->stat_offsets_loaded,
524 &oes->rx_bytes, &es->rx_bytes);
525 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
526 I40E_GLV_UPRCL(stat_idx),
527 vsi->stat_offsets_loaded,
528 &oes->rx_unicast, &es->rx_unicast);
529 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
530 I40E_GLV_MPRCL(stat_idx),
531 vsi->stat_offsets_loaded,
532 &oes->rx_multicast, &es->rx_multicast);
533 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
534 I40E_GLV_BPRCL(stat_idx),
535 vsi->stat_offsets_loaded,
536 &oes->rx_broadcast, &es->rx_broadcast);
538 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
539 I40E_GLV_GOTCL(stat_idx),
540 vsi->stat_offsets_loaded,
541 &oes->tx_bytes, &es->tx_bytes);
542 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
543 I40E_GLV_UPTCL(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->tx_unicast, &es->tx_unicast);
546 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
547 I40E_GLV_MPTCL(stat_idx),
548 vsi->stat_offsets_loaded,
549 &oes->tx_multicast, &es->tx_multicast);
550 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
551 I40E_GLV_BPTCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->tx_broadcast, &es->tx_broadcast);
554 vsi->stat_offsets_loaded = true;
558 * i40e_update_veb_stats - Update Switch component statistics
559 * @veb: the VEB being updated
561 static void i40e_update_veb_stats(struct i40e_veb *veb)
563 struct i40e_pf *pf = veb->pf;
564 struct i40e_hw *hw = &pf->hw;
565 struct i40e_eth_stats *oes;
566 struct i40e_eth_stats *es; /* device's eth stats */
569 idx = veb->stats_idx;
571 oes = &veb->stats_offsets;
573 /* Gather up the stats that the hw collects */
574 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
575 veb->stat_offsets_loaded,
576 &oes->tx_discards, &es->tx_discards);
577 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
578 veb->stat_offsets_loaded,
579 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
581 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
582 veb->stat_offsets_loaded,
583 &oes->rx_bytes, &es->rx_bytes);
584 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
585 veb->stat_offsets_loaded,
586 &oes->rx_unicast, &es->rx_unicast);
587 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
588 veb->stat_offsets_loaded,
589 &oes->rx_multicast, &es->rx_multicast);
590 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
591 veb->stat_offsets_loaded,
592 &oes->rx_broadcast, &es->rx_broadcast);
594 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
595 veb->stat_offsets_loaded,
596 &oes->tx_bytes, &es->tx_bytes);
597 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
598 veb->stat_offsets_loaded,
599 &oes->tx_unicast, &es->tx_unicast);
600 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
601 veb->stat_offsets_loaded,
602 &oes->tx_multicast, &es->tx_multicast);
603 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
604 veb->stat_offsets_loaded,
605 &oes->tx_broadcast, &es->tx_broadcast);
606 veb->stat_offsets_loaded = true;
610 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
611 * @pf: the corresponding PF
613 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
615 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
617 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
618 struct i40e_hw_port_stats *nsd = &pf->stats;
619 struct i40e_hw *hw = &pf->hw;
623 if ((hw->fc.current_mode != I40E_FC_FULL) &&
624 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
627 xoff = nsd->link_xoff_rx;
628 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
629 pf->stat_offsets_loaded,
630 &osd->link_xoff_rx, &nsd->link_xoff_rx);
632 /* No new LFC xoff rx */
633 if (!(nsd->link_xoff_rx - xoff))
636 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
637 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
638 struct i40e_vsi *vsi = pf->vsi[v];
643 for (i = 0; i < vsi->num_queue_pairs; i++) {
644 struct i40e_ring *ring = vsi->tx_rings[i];
645 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
651 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
652 * @pf: the corresponding PF
654 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
656 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
658 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
659 struct i40e_hw_port_stats *nsd = &pf->stats;
660 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
661 struct i40e_dcbx_config *dcb_cfg;
662 struct i40e_hw *hw = &pf->hw;
666 dcb_cfg = &hw->local_dcbx_config;
668 /* See if DCB enabled with PFC TC */
669 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
670 !(dcb_cfg->pfc.pfcenable)) {
671 i40e_update_link_xoff_rx(pf);
675 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
676 u64 prio_xoff = nsd->priority_xoff_rx[i];
677 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
678 pf->stat_offsets_loaded,
679 &osd->priority_xoff_rx[i],
680 &nsd->priority_xoff_rx[i]);
682 /* No new PFC xoff rx */
683 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
685 /* Get the TC for given priority */
686 tc = dcb_cfg->etscfg.prioritytable[i];
690 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
691 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
692 struct i40e_vsi *vsi = pf->vsi[v];
697 for (i = 0; i < vsi->num_queue_pairs; i++) {
698 struct i40e_ring *ring = vsi->tx_rings[i];
702 clear_bit(__I40E_HANG_CHECK_ARMED,
709 * i40e_update_stats - Update the board statistics counters.
710 * @vsi: the VSI to be updated
712 * There are a few instances where we store the same stat in a
713 * couple of different structs. This is partly because we have
714 * the netdev stats that need to be filled out, which is slightly
715 * different from the "eth_stats" defined by the chip and used in
716 * VF communications. We sort it all out here in a central place.
718 void i40e_update_stats(struct i40e_vsi *vsi)
720 struct i40e_pf *pf = vsi->back;
721 struct i40e_hw *hw = &pf->hw;
722 struct rtnl_link_stats64 *ons;
723 struct rtnl_link_stats64 *ns; /* netdev stats */
724 struct i40e_eth_stats *oes;
725 struct i40e_eth_stats *es; /* device's eth stats */
726 u32 tx_restart, tx_busy;
733 if (test_bit(__I40E_DOWN, &vsi->state) ||
734 test_bit(__I40E_CONFIG_BUSY, &pf->state))
737 ns = i40e_get_vsi_stats_struct(vsi);
738 ons = &vsi->net_stats_offsets;
739 es = &vsi->eth_stats;
740 oes = &vsi->eth_stats_offsets;
742 /* Gather up the netdev and vsi stats that the driver collects
743 * on the fly during packet processing
747 tx_restart = tx_busy = 0;
751 for (q = 0; q < vsi->num_queue_pairs; q++) {
757 p = ACCESS_ONCE(vsi->tx_rings[q]);
760 start = u64_stats_fetch_begin_bh(&p->syncp);
761 packets = p->stats.packets;
762 bytes = p->stats.bytes;
763 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
766 tx_restart += p->tx_stats.restart_queue;
767 tx_busy += p->tx_stats.tx_busy;
769 /* Rx queue is part of the same block as Tx queue */
772 start = u64_stats_fetch_begin_bh(&p->syncp);
773 packets = p->stats.packets;
774 bytes = p->stats.bytes;
775 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
778 rx_buf += p->rx_stats.alloc_rx_buff_failed;
779 rx_page += p->rx_stats.alloc_rx_page_failed;
782 vsi->tx_restart = tx_restart;
783 vsi->tx_busy = tx_busy;
784 vsi->rx_page_failed = rx_page;
785 vsi->rx_buf_failed = rx_buf;
787 ns->rx_packets = rx_p;
789 ns->tx_packets = tx_p;
792 i40e_update_eth_stats(vsi);
793 /* update netdev stats from eth stats */
794 ons->rx_errors = oes->rx_errors;
795 ns->rx_errors = es->rx_errors;
796 ons->tx_errors = oes->tx_errors;
797 ns->tx_errors = es->tx_errors;
798 ons->multicast = oes->rx_multicast;
799 ns->multicast = es->rx_multicast;
800 ons->tx_dropped = oes->tx_discards;
801 ns->tx_dropped = es->tx_discards;
803 /* Get the port data only if this is the main PF VSI */
804 if (vsi == pf->vsi[pf->lan_vsi]) {
805 struct i40e_hw_port_stats *nsd = &pf->stats;
806 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
808 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
809 I40E_GLPRT_GORCL(hw->port),
810 pf->stat_offsets_loaded,
811 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
812 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
813 I40E_GLPRT_GOTCL(hw->port),
814 pf->stat_offsets_loaded,
815 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
816 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
817 pf->stat_offsets_loaded,
818 &osd->eth.rx_discards,
819 &nsd->eth.rx_discards);
820 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
821 pf->stat_offsets_loaded,
822 &osd->eth.tx_discards,
823 &nsd->eth.tx_discards);
824 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
825 I40E_GLPRT_MPRCL(hw->port),
826 pf->stat_offsets_loaded,
827 &osd->eth.rx_multicast,
828 &nsd->eth.rx_multicast);
830 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
831 pf->stat_offsets_loaded,
832 &osd->tx_dropped_link_down,
833 &nsd->tx_dropped_link_down);
835 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
836 pf->stat_offsets_loaded,
837 &osd->crc_errors, &nsd->crc_errors);
838 ns->rx_crc_errors = nsd->crc_errors;
840 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
841 pf->stat_offsets_loaded,
842 &osd->illegal_bytes, &nsd->illegal_bytes);
843 ns->rx_errors = nsd->crc_errors
844 + nsd->illegal_bytes;
846 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
847 pf->stat_offsets_loaded,
848 &osd->mac_local_faults,
849 &nsd->mac_local_faults);
850 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
851 pf->stat_offsets_loaded,
852 &osd->mac_remote_faults,
853 &nsd->mac_remote_faults);
855 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
856 pf->stat_offsets_loaded,
857 &osd->rx_length_errors,
858 &nsd->rx_length_errors);
859 ns->rx_length_errors = nsd->rx_length_errors;
861 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
862 pf->stat_offsets_loaded,
863 &osd->link_xon_rx, &nsd->link_xon_rx);
864 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
865 pf->stat_offsets_loaded,
866 &osd->link_xon_tx, &nsd->link_xon_tx);
867 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
868 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
869 pf->stat_offsets_loaded,
870 &osd->link_xoff_tx, &nsd->link_xoff_tx);
872 for (i = 0; i < 8; i++) {
873 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
874 pf->stat_offsets_loaded,
875 &osd->priority_xon_rx[i],
876 &nsd->priority_xon_rx[i]);
877 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
878 pf->stat_offsets_loaded,
879 &osd->priority_xon_tx[i],
880 &nsd->priority_xon_tx[i]);
881 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
882 pf->stat_offsets_loaded,
883 &osd->priority_xoff_tx[i],
884 &nsd->priority_xoff_tx[i]);
885 i40e_stat_update32(hw,
886 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
887 pf->stat_offsets_loaded,
888 &osd->priority_xon_2_xoff[i],
889 &nsd->priority_xon_2_xoff[i]);
892 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
893 I40E_GLPRT_PRC64L(hw->port),
894 pf->stat_offsets_loaded,
895 &osd->rx_size_64, &nsd->rx_size_64);
896 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
897 I40E_GLPRT_PRC127L(hw->port),
898 pf->stat_offsets_loaded,
899 &osd->rx_size_127, &nsd->rx_size_127);
900 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
901 I40E_GLPRT_PRC255L(hw->port),
902 pf->stat_offsets_loaded,
903 &osd->rx_size_255, &nsd->rx_size_255);
904 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
905 I40E_GLPRT_PRC511L(hw->port),
906 pf->stat_offsets_loaded,
907 &osd->rx_size_511, &nsd->rx_size_511);
908 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
909 I40E_GLPRT_PRC1023L(hw->port),
910 pf->stat_offsets_loaded,
911 &osd->rx_size_1023, &nsd->rx_size_1023);
912 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
913 I40E_GLPRT_PRC1522L(hw->port),
914 pf->stat_offsets_loaded,
915 &osd->rx_size_1522, &nsd->rx_size_1522);
916 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
917 I40E_GLPRT_PRC9522L(hw->port),
918 pf->stat_offsets_loaded,
919 &osd->rx_size_big, &nsd->rx_size_big);
921 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
922 I40E_GLPRT_PTC64L(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->tx_size_64, &nsd->tx_size_64);
925 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
926 I40E_GLPRT_PTC127L(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->tx_size_127, &nsd->tx_size_127);
929 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
930 I40E_GLPRT_PTC255L(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->tx_size_255, &nsd->tx_size_255);
933 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
934 I40E_GLPRT_PTC511L(hw->port),
935 pf->stat_offsets_loaded,
936 &osd->tx_size_511, &nsd->tx_size_511);
937 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
938 I40E_GLPRT_PTC1023L(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->tx_size_1023, &nsd->tx_size_1023);
941 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
942 I40E_GLPRT_PTC1522L(hw->port),
943 pf->stat_offsets_loaded,
944 &osd->tx_size_1522, &nsd->tx_size_1522);
945 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
946 I40E_GLPRT_PTC9522L(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->tx_size_big, &nsd->tx_size_big);
950 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->rx_undersize, &nsd->rx_undersize);
953 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->rx_fragments, &nsd->rx_fragments);
956 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
957 pf->stat_offsets_loaded,
958 &osd->rx_oversize, &nsd->rx_oversize);
959 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->rx_jabber, &nsd->rx_jabber);
964 pf->stat_offsets_loaded = true;
968 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
969 * @vsi: the VSI to be searched
970 * @macaddr: the MAC address
972 * @is_vf: make sure its a vf filter, else doesn't matter
973 * @is_netdev: make sure its a netdev filter, else doesn't matter
975 * Returns ptr to the filter object or NULL
977 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
978 u8 *macaddr, s16 vlan,
979 bool is_vf, bool is_netdev)
981 struct i40e_mac_filter *f;
983 if (!vsi || !macaddr)
986 list_for_each_entry(f, &vsi->mac_filter_list, list) {
987 if ((ether_addr_equal(macaddr, f->macaddr)) &&
989 (!is_vf || f->is_vf) &&
990 (!is_netdev || f->is_netdev))
997 * i40e_find_mac - Find a mac addr in the macvlan filters list
998 * @vsi: the VSI to be searched
999 * @macaddr: the MAC address we are searching for
1000 * @is_vf: make sure its a vf filter, else doesn't matter
1001 * @is_netdev: make sure its a netdev filter, else doesn't matter
1003 * Returns the first filter with the provided MAC address or NULL if
1004 * MAC address was not found
1006 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1007 bool is_vf, bool is_netdev)
1009 struct i40e_mac_filter *f;
1011 if (!vsi || !macaddr)
1014 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1015 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1016 (!is_vf || f->is_vf) &&
1017 (!is_netdev || f->is_netdev))
1024 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1025 * @vsi: the VSI to be searched
1027 * Returns true if VSI is in vlan mode or false otherwise
1029 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1031 struct i40e_mac_filter *f;
1033 /* Only -1 for all the filters denotes not in vlan mode
1034 * so we have to go through all the list in order to make sure
1036 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1045 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1046 * @vsi: the VSI to be searched
1047 * @macaddr: the mac address to be filtered
1048 * @is_vf: true if it is a vf
1049 * @is_netdev: true if it is a netdev
1051 * Goes through all the macvlan filters and adds a
1052 * macvlan filter for each unique vlan that already exists
1054 * Returns first filter found on success, else NULL
1056 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1057 bool is_vf, bool is_netdev)
1059 struct i40e_mac_filter *f;
1061 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1062 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1063 is_vf, is_netdev)) {
1064 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1070 return list_first_entry_or_null(&vsi->mac_filter_list,
1071 struct i40e_mac_filter, list);
1075 * i40e_add_filter - Add a mac/vlan filter to the VSI
1076 * @vsi: the VSI to be searched
1077 * @macaddr: the MAC address
1079 * @is_vf: make sure its a vf filter, else doesn't matter
1080 * @is_netdev: make sure its a netdev filter, else doesn't matter
1082 * Returns ptr to the filter object or NULL when no memory available.
1084 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1085 u8 *macaddr, s16 vlan,
1086 bool is_vf, bool is_netdev)
1088 struct i40e_mac_filter *f;
1090 if (!vsi || !macaddr)
1093 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1095 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1097 goto add_filter_out;
1099 memcpy(f->macaddr, macaddr, ETH_ALEN);
1103 INIT_LIST_HEAD(&f->list);
1104 list_add(&f->list, &vsi->mac_filter_list);
1107 /* increment counter and add a new flag if needed */
1113 } else if (is_netdev) {
1114 if (!f->is_netdev) {
1115 f->is_netdev = true;
1122 /* changed tells sync_filters_subtask to
1123 * push the filter down to the firmware
1126 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1127 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1135 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1136 * @vsi: the VSI to be searched
1137 * @macaddr: the MAC address
1139 * @is_vf: make sure it's a vf filter, else doesn't matter
1140 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1142 void i40e_del_filter(struct i40e_vsi *vsi,
1143 u8 *macaddr, s16 vlan,
1144 bool is_vf, bool is_netdev)
1146 struct i40e_mac_filter *f;
1148 if (!vsi || !macaddr)
1151 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1152 if (!f || f->counter == 0)
1160 } else if (is_netdev) {
1162 f->is_netdev = false;
1166 /* make sure we don't remove a filter in use by vf or netdev */
1168 min_f += (f->is_vf ? 1 : 0);
1169 min_f += (f->is_netdev ? 1 : 0);
1171 if (f->counter > min_f)
1175 /* counter == 0 tells sync_filters_subtask to
1176 * remove the filter from the firmware's list
1178 if (f->counter == 0) {
1180 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1181 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1186 * i40e_set_mac - NDO callback to set mac address
1187 * @netdev: network interface device structure
1188 * @p: pointer to an address structure
1190 * Returns 0 on success, negative on failure
1192 static int i40e_set_mac(struct net_device *netdev, void *p)
1194 struct i40e_netdev_priv *np = netdev_priv(netdev);
1195 struct i40e_vsi *vsi = np->vsi;
1196 struct sockaddr *addr = p;
1197 struct i40e_mac_filter *f;
1199 if (!is_valid_ether_addr(addr->sa_data))
1200 return -EADDRNOTAVAIL;
1202 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1204 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1207 if (vsi->type == I40E_VSI_MAIN) {
1209 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1210 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1211 addr->sa_data, NULL);
1214 "Addr change for Main VSI failed: %d\n",
1216 return -EADDRNOTAVAIL;
1219 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1222 /* In order to be sure to not drop any packets, add the new address
1223 * then delete the old one.
1225 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1229 i40e_sync_vsi_filters(vsi);
1230 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1231 i40e_sync_vsi_filters(vsi);
1233 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1239 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1240 * @vsi: the VSI being setup
1241 * @ctxt: VSI context structure
1242 * @enabled_tc: Enabled TCs bitmap
1243 * @is_add: True if called before Add VSI
1245 * Setup VSI queue mapping for enabled traffic classes.
1247 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1248 struct i40e_vsi_context *ctxt,
1252 struct i40e_pf *pf = vsi->back;
1261 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1264 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1265 /* Find numtc from enabled TC bitmap */
1266 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1267 if (enabled_tc & (1 << i)) /* TC is enabled */
1271 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1275 /* At least TC0 is enabled in case of non-DCB case */
1279 vsi->tc_config.numtc = numtc;
1280 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1282 /* Setup queue offset/count for all TCs for given VSI */
1283 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1284 /* See if the given TC is enabled for the given VSI */
1285 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1288 vsi->tc_config.tc_info[i].qoffset = offset;
1289 switch (vsi->type) {
1292 qcount = pf->rss_size;
1294 qcount = pf->num_tc_qps;
1295 vsi->tc_config.tc_info[i].qcount = qcount;
1298 case I40E_VSI_SRIOV:
1299 case I40E_VSI_VMDQ2:
1301 qcount = vsi->alloc_queue_pairs;
1302 vsi->tc_config.tc_info[i].qcount = qcount;
1307 /* find the power-of-2 of the number of queue pairs */
1308 num_qps = vsi->tc_config.tc_info[i].qcount;
1311 ((1 << pow) < vsi->tc_config.tc_info[i].qcount)) {
1316 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1318 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1319 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1321 offset += vsi->tc_config.tc_info[i].qcount;
1323 /* TC is not enabled so set the offset to
1324 * default queue and allocate one queue
1327 vsi->tc_config.tc_info[i].qoffset = 0;
1328 vsi->tc_config.tc_info[i].qcount = 1;
1329 vsi->tc_config.tc_info[i].netdev_tc = 0;
1333 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1336 /* Set actual Tx/Rx queue pairs */
1337 vsi->num_queue_pairs = offset;
1339 /* Scheduler section valid can only be set for ADD VSI */
1341 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1343 ctxt->info.up_enable_bits = enabled_tc;
1345 if (vsi->type == I40E_VSI_SRIOV) {
1346 ctxt->info.mapping_flags |=
1347 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1348 for (i = 0; i < vsi->num_queue_pairs; i++)
1349 ctxt->info.queue_mapping[i] =
1350 cpu_to_le16(vsi->base_queue + i);
1352 ctxt->info.mapping_flags |=
1353 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1354 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1356 ctxt->info.valid_sections |= cpu_to_le16(sections);
1360 * i40e_set_rx_mode - NDO callback to set the netdev filters
1361 * @netdev: network interface device structure
1363 static void i40e_set_rx_mode(struct net_device *netdev)
1365 struct i40e_netdev_priv *np = netdev_priv(netdev);
1366 struct i40e_mac_filter *f, *ftmp;
1367 struct i40e_vsi *vsi = np->vsi;
1368 struct netdev_hw_addr *uca;
1369 struct netdev_hw_addr *mca;
1370 struct netdev_hw_addr *ha;
1372 /* add addr if not already in the filter list */
1373 netdev_for_each_uc_addr(uca, netdev) {
1374 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1375 if (i40e_is_vsi_in_vlan(vsi))
1376 i40e_put_mac_in_vlan(vsi, uca->addr,
1379 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1384 netdev_for_each_mc_addr(mca, netdev) {
1385 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1386 if (i40e_is_vsi_in_vlan(vsi))
1387 i40e_put_mac_in_vlan(vsi, mca->addr,
1390 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1395 /* remove filter if not in netdev list */
1396 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1402 if (is_multicast_ether_addr(f->macaddr)) {
1403 netdev_for_each_mc_addr(mca, netdev) {
1404 if (ether_addr_equal(mca->addr, f->macaddr)) {
1410 netdev_for_each_uc_addr(uca, netdev) {
1411 if (ether_addr_equal(uca->addr, f->macaddr)) {
1417 for_each_dev_addr(netdev, ha) {
1418 if (ether_addr_equal(ha->addr, f->macaddr)) {
1426 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1429 /* check for other flag changes */
1430 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1431 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1432 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1437 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1438 * @vsi: ptr to the VSI
1440 * Push any outstanding VSI filter changes through the AdminQ.
1442 * Returns 0 or error value
1444 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1446 struct i40e_mac_filter *f, *ftmp;
1447 bool promisc_forced_on = false;
1448 bool add_happened = false;
1449 int filter_list_len = 0;
1450 u32 changed_flags = 0;
1451 i40e_status aq_ret = 0;
1457 /* empty array typed pointers, kcalloc later */
1458 struct i40e_aqc_add_macvlan_element_data *add_list;
1459 struct i40e_aqc_remove_macvlan_element_data *del_list;
1461 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1462 usleep_range(1000, 2000);
1466 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1467 vsi->current_netdev_flags = vsi->netdev->flags;
1470 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1471 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1473 filter_list_len = pf->hw.aq.asq_buf_size /
1474 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1475 del_list = kcalloc(filter_list_len,
1476 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1481 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1485 if (f->counter != 0)
1490 /* add to delete list */
1491 memcpy(del_list[num_del].mac_addr,
1492 f->macaddr, ETH_ALEN);
1493 del_list[num_del].vlan_tag =
1494 cpu_to_le16((u16)(f->vlan ==
1495 I40E_VLAN_ANY ? 0 : f->vlan));
1497 /* vlan0 as wild card to allow packets from all vlans */
1498 if (f->vlan == I40E_VLAN_ANY ||
1499 (vsi->netdev && !(vsi->netdev->features &
1500 NETIF_F_HW_VLAN_CTAG_FILTER)))
1501 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1502 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1503 del_list[num_del].flags = cmd_flags;
1506 /* unlink from filter list */
1510 /* flush a full buffer */
1511 if (num_del == filter_list_len) {
1512 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1513 vsi->seid, del_list, num_del,
1516 memset(del_list, 0, sizeof(*del_list));
1519 dev_info(&pf->pdev->dev,
1520 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1522 pf->hw.aq.asq_last_status);
1526 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1527 del_list, num_del, NULL);
1531 dev_info(&pf->pdev->dev,
1532 "ignoring delete macvlan error, err %d, aq_err %d\n",
1533 aq_ret, pf->hw.aq.asq_last_status);
1539 /* do all the adds now */
1540 filter_list_len = pf->hw.aq.asq_buf_size /
1541 sizeof(struct i40e_aqc_add_macvlan_element_data),
1542 add_list = kcalloc(filter_list_len,
1543 sizeof(struct i40e_aqc_add_macvlan_element_data),
1548 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1552 if (f->counter == 0)
1555 add_happened = true;
1558 /* add to add array */
1559 memcpy(add_list[num_add].mac_addr,
1560 f->macaddr, ETH_ALEN);
1561 add_list[num_add].vlan_tag =
1563 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1564 add_list[num_add].queue_number = 0;
1566 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1568 /* vlan0 as wild card to allow packets from all vlans */
1569 if (f->vlan == I40E_VLAN_ANY || (vsi->netdev &&
1570 !(vsi->netdev->features &
1571 NETIF_F_HW_VLAN_CTAG_FILTER)))
1572 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1573 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1576 /* flush a full buffer */
1577 if (num_add == filter_list_len) {
1578 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1585 memset(add_list, 0, sizeof(*add_list));
1589 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1590 add_list, num_add, NULL);
1596 if (add_happened && (!aq_ret)) {
1598 } else if (add_happened && (aq_ret)) {
1599 dev_info(&pf->pdev->dev,
1600 "add filter failed, err %d, aq_err %d\n",
1601 aq_ret, pf->hw.aq.asq_last_status);
1602 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1603 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1605 promisc_forced_on = true;
1606 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1608 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1613 /* check for changes in promiscuous modes */
1614 if (changed_flags & IFF_ALLMULTI) {
1615 bool cur_multipromisc;
1616 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1617 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1622 dev_info(&pf->pdev->dev,
1623 "set multi promisc failed, err %d, aq_err %d\n",
1624 aq_ret, pf->hw.aq.asq_last_status);
1626 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1628 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1629 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1631 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1635 dev_info(&pf->pdev->dev,
1636 "set uni promisc failed, err %d, aq_err %d\n",
1637 aq_ret, pf->hw.aq.asq_last_status);
1640 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1645 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1646 * @pf: board private structure
1648 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1652 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1654 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1656 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1658 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1659 i40e_sync_vsi_filters(pf->vsi[v]);
1664 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1665 * @netdev: network interface device structure
1666 * @new_mtu: new value for maximum frame size
1668 * Returns 0 on success, negative on failure
1670 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1672 struct i40e_netdev_priv *np = netdev_priv(netdev);
1673 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1674 struct i40e_vsi *vsi = np->vsi;
1676 /* MTU < 68 is an error and causes problems on some kernels */
1677 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1680 netdev_info(netdev, "changing MTU from %d to %d\n",
1681 netdev->mtu, new_mtu);
1682 netdev->mtu = new_mtu;
1683 if (netif_running(netdev))
1684 i40e_vsi_reinit_locked(vsi);
1690 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1691 * @vsi: the vsi being adjusted
1693 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1695 struct i40e_vsi_context ctxt;
1698 if ((vsi->info.valid_sections &
1699 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1700 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1701 return; /* already enabled */
1703 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1704 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1705 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1707 ctxt.seid = vsi->seid;
1708 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1709 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1711 dev_info(&vsi->back->pdev->dev,
1712 "%s: update vsi failed, aq_err=%d\n",
1713 __func__, vsi->back->hw.aq.asq_last_status);
1718 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1719 * @vsi: the vsi being adjusted
1721 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1723 struct i40e_vsi_context ctxt;
1726 if ((vsi->info.valid_sections &
1727 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1728 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1729 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1730 return; /* already disabled */
1732 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1733 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1734 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1736 ctxt.seid = vsi->seid;
1737 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1738 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1740 dev_info(&vsi->back->pdev->dev,
1741 "%s: update vsi failed, aq_err=%d\n",
1742 __func__, vsi->back->hw.aq.asq_last_status);
1747 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1748 * @netdev: network interface to be adjusted
1749 * @features: netdev features to test if VLAN offload is enabled or not
1751 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1753 struct i40e_netdev_priv *np = netdev_priv(netdev);
1754 struct i40e_vsi *vsi = np->vsi;
1756 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1757 i40e_vlan_stripping_enable(vsi);
1759 i40e_vlan_stripping_disable(vsi);
1763 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1764 * @vsi: the vsi being configured
1765 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1767 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1769 struct i40e_mac_filter *f, *add_f;
1770 bool is_netdev, is_vf;
1773 is_vf = (vsi->type == I40E_VSI_SRIOV);
1774 is_netdev = !!(vsi->netdev);
1777 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1780 dev_info(&vsi->back->pdev->dev,
1781 "Could not add vlan filter %d for %pM\n",
1782 vid, vsi->netdev->dev_addr);
1787 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1788 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1790 dev_info(&vsi->back->pdev->dev,
1791 "Could not add vlan filter %d for %pM\n",
1797 ret = i40e_sync_vsi_filters(vsi);
1799 dev_info(&vsi->back->pdev->dev,
1800 "Could not sync filters for vid %d\n", vid);
1804 /* Now if we add a vlan tag, make sure to check if it is the first
1805 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1806 * with 0, so we now accept untagged and specified tagged traffic
1807 * (and not any taged and untagged)
1810 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1812 is_vf, is_netdev)) {
1813 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1814 I40E_VLAN_ANY, is_vf, is_netdev);
1815 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1818 dev_info(&vsi->back->pdev->dev,
1819 "Could not add filter 0 for %pM\n",
1820 vsi->netdev->dev_addr);
1825 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1826 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1827 is_vf, is_netdev)) {
1828 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1830 add_f = i40e_add_filter(vsi, f->macaddr,
1831 0, is_vf, is_netdev);
1833 dev_info(&vsi->back->pdev->dev,
1834 "Could not add filter 0 for %pM\n",
1840 ret = i40e_sync_vsi_filters(vsi);
1847 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1848 * @vsi: the vsi being configured
1849 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1851 * Return: 0 on success or negative otherwise
1853 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1855 struct net_device *netdev = vsi->netdev;
1856 struct i40e_mac_filter *f, *add_f;
1857 bool is_vf, is_netdev;
1858 int filter_count = 0;
1861 is_vf = (vsi->type == I40E_VSI_SRIOV);
1862 is_netdev = !!(netdev);
1865 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1867 list_for_each_entry(f, &vsi->mac_filter_list, list)
1868 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1870 ret = i40e_sync_vsi_filters(vsi);
1872 dev_info(&vsi->back->pdev->dev, "Could not sync filters\n");
1876 /* go through all the filters for this VSI and if there is only
1877 * vid == 0 it means there are no other filters, so vid 0 must
1878 * be replaced with -1. This signifies that we should from now
1879 * on accept any traffic (with any tag present, or untagged)
1881 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1884 ether_addr_equal(netdev->dev_addr, f->macaddr))
1892 if (!filter_count && is_netdev) {
1893 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1894 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1897 dev_info(&vsi->back->pdev->dev,
1898 "Could not add filter %d for %pM\n",
1899 I40E_VLAN_ANY, netdev->dev_addr);
1904 if (!filter_count) {
1905 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1906 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1907 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1910 dev_info(&vsi->back->pdev->dev,
1911 "Could not add filter %d for %pM\n",
1912 I40E_VLAN_ANY, f->macaddr);
1918 return i40e_sync_vsi_filters(vsi);
1922 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1923 * @netdev: network interface to be adjusted
1924 * @vid: vlan id to be added
1926 * net_device_ops implementation for adding vlan ids
1928 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1929 __always_unused __be16 proto, u16 vid)
1931 struct i40e_netdev_priv *np = netdev_priv(netdev);
1932 struct i40e_vsi *vsi = np->vsi;
1938 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1940 /* If the network stack called us with vid = 0, we should
1941 * indicate to i40e_vsi_add_vlan() that we want to receive
1942 * any traffic (i.e. with any vlan tag, or untagged)
1944 ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY);
1946 if (!ret && (vid < VLAN_N_VID))
1947 set_bit(vid, vsi->active_vlans);
1953 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
1954 * @netdev: network interface to be adjusted
1955 * @vid: vlan id to be removed
1957 * net_device_ops implementation for adding vlan ids
1959 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
1960 __always_unused __be16 proto, u16 vid)
1962 struct i40e_netdev_priv *np = netdev_priv(netdev);
1963 struct i40e_vsi *vsi = np->vsi;
1965 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
1967 /* return code is ignored as there is nothing a user
1968 * can do about failure to remove and a log message was
1969 * already printed from the other function
1971 i40e_vsi_kill_vlan(vsi, vid);
1973 clear_bit(vid, vsi->active_vlans);
1979 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
1980 * @vsi: the vsi being brought back up
1982 static void i40e_restore_vlan(struct i40e_vsi *vsi)
1989 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
1991 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
1992 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
1997 * i40e_vsi_add_pvid - Add pvid for the VSI
1998 * @vsi: the vsi being adjusted
1999 * @vid: the vlan id to set as a PVID
2001 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2003 struct i40e_vsi_context ctxt;
2006 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2007 vsi->info.pvid = cpu_to_le16(vid);
2008 vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_INSERT_PVID;
2009 vsi->info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_UNTAGGED;
2011 ctxt.seid = vsi->seid;
2012 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2013 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2015 dev_info(&vsi->back->pdev->dev,
2016 "%s: update vsi failed, aq_err=%d\n",
2017 __func__, vsi->back->hw.aq.asq_last_status);
2025 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2026 * @vsi: the vsi being adjusted
2028 * Just use the vlan_rx_register() service to put it back to normal
2030 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2033 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2037 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2038 * @vsi: ptr to the VSI
2040 * If this function returns with an error, then it's possible one or
2041 * more of the rings is populated (while the rest are not). It is the
2042 * callers duty to clean those orphaned rings.
2044 * Return 0 on success, negative on failure
2046 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2050 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2051 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2057 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2058 * @vsi: ptr to the VSI
2060 * Free VSI's transmit software resources
2062 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2066 for (i = 0; i < vsi->num_queue_pairs; i++)
2067 if (vsi->tx_rings[i]->desc)
2068 i40e_free_tx_resources(vsi->tx_rings[i]);
2072 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2073 * @vsi: ptr to the VSI
2075 * If this function returns with an error, then it's possible one or
2076 * more of the rings is populated (while the rest are not). It is the
2077 * callers duty to clean those orphaned rings.
2079 * Return 0 on success, negative on failure
2081 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2085 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2086 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2091 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2092 * @vsi: ptr to the VSI
2094 * Free all receive software resources
2096 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2100 for (i = 0; i < vsi->num_queue_pairs; i++)
2101 if (vsi->rx_rings[i]->desc)
2102 i40e_free_rx_resources(vsi->rx_rings[i]);
2106 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2107 * @ring: The Tx ring to configure
2109 * Configure the Tx descriptor ring in the HMC context.
2111 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2113 struct i40e_vsi *vsi = ring->vsi;
2114 u16 pf_q = vsi->base_queue + ring->queue_index;
2115 struct i40e_hw *hw = &vsi->back->hw;
2116 struct i40e_hmc_obj_txq tx_ctx;
2117 i40e_status err = 0;
2120 /* some ATR related tx ring init */
2121 if (vsi->back->flags & I40E_FLAG_FDIR_ATR_ENABLED) {
2122 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2123 ring->atr_count = 0;
2125 ring->atr_sample_rate = 0;
2128 /* initialize XPS */
2129 if (ring->q_vector && ring->netdev &&
2130 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2131 netif_set_xps_queue(ring->netdev,
2132 &ring->q_vector->affinity_mask,
2135 /* clear the context structure first */
2136 memset(&tx_ctx, 0, sizeof(tx_ctx));
2138 tx_ctx.new_context = 1;
2139 tx_ctx.base = (ring->dma / 128);
2140 tx_ctx.qlen = ring->count;
2141 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FDIR_ENABLED |
2142 I40E_FLAG_FDIR_ATR_ENABLED));
2144 /* As part of VSI creation/update, FW allocates certain
2145 * Tx arbitration queue sets for each TC enabled for
2146 * the VSI. The FW returns the handles to these queue
2147 * sets as part of the response buffer to Add VSI,
2148 * Update VSI, etc. AQ commands. It is expected that
2149 * these queue set handles be associated with the Tx
2150 * queues by the driver as part of the TX queue context
2151 * initialization. This has to be done regardless of
2152 * DCB as by default everything is mapped to TC0.
2154 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2155 tx_ctx.rdylist_act = 0;
2157 /* clear the context in the HMC */
2158 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2160 dev_info(&vsi->back->pdev->dev,
2161 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2162 ring->queue_index, pf_q, err);
2166 /* set the context in the HMC */
2167 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2169 dev_info(&vsi->back->pdev->dev,
2170 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2171 ring->queue_index, pf_q, err);
2175 /* Now associate this queue with this PCI function */
2176 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2177 qtx_ctl |= ((hw->hmc.hmc_fn_id << I40E_QTX_CTL_PF_INDX_SHIFT)
2178 & I40E_QTX_CTL_PF_INDX_MASK);
2179 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2182 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2184 /* cache tail off for easier writes later */
2185 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2191 * i40e_configure_rx_ring - Configure a receive ring context
2192 * @ring: The Rx ring to configure
2194 * Configure the Rx descriptor ring in the HMC context.
2196 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2198 struct i40e_vsi *vsi = ring->vsi;
2199 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2200 u16 pf_q = vsi->base_queue + ring->queue_index;
2201 struct i40e_hw *hw = &vsi->back->hw;
2202 struct i40e_hmc_obj_rxq rx_ctx;
2203 i40e_status err = 0;
2207 /* clear the context structure first */
2208 memset(&rx_ctx, 0, sizeof(rx_ctx));
2210 ring->rx_buf_len = vsi->rx_buf_len;
2211 ring->rx_hdr_len = vsi->rx_hdr_len;
2213 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2214 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2216 rx_ctx.base = (ring->dma / 128);
2217 rx_ctx.qlen = ring->count;
2219 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2220 set_ring_16byte_desc_enabled(ring);
2226 rx_ctx.dtype = vsi->dtype;
2228 set_ring_ps_enabled(ring);
2229 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2231 I40E_RX_SPLIT_TCP_UDP |
2234 rx_ctx.hsplit_0 = 0;
2237 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2238 (chain_len * ring->rx_buf_len));
2239 rx_ctx.tphrdesc_ena = 1;
2240 rx_ctx.tphwdesc_ena = 1;
2241 rx_ctx.tphdata_ena = 1;
2242 rx_ctx.tphhead_ena = 1;
2243 rx_ctx.lrxqthresh = 2;
2244 rx_ctx.crcstrip = 1;
2248 /* clear the context in the HMC */
2249 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2251 dev_info(&vsi->back->pdev->dev,
2252 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2253 ring->queue_index, pf_q, err);
2257 /* set the context in the HMC */
2258 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2260 dev_info(&vsi->back->pdev->dev,
2261 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2262 ring->queue_index, pf_q, err);
2266 /* cache tail for quicker writes, and clear the reg before use */
2267 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2268 writel(0, ring->tail);
2270 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2276 * i40e_vsi_configure_tx - Configure the VSI for Tx
2277 * @vsi: VSI structure describing this set of rings and resources
2279 * Configure the Tx VSI for operation.
2281 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2286 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2287 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2293 * i40e_vsi_configure_rx - Configure the VSI for Rx
2294 * @vsi: the VSI being configured
2296 * Configure the Rx VSI for operation.
2298 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2303 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2304 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2305 + ETH_FCS_LEN + VLAN_HLEN;
2307 vsi->max_frame = I40E_RXBUFFER_2048;
2309 /* figure out correct receive buffer length */
2310 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2311 I40E_FLAG_RX_PS_ENABLED)) {
2312 case I40E_FLAG_RX_1BUF_ENABLED:
2313 vsi->rx_hdr_len = 0;
2314 vsi->rx_buf_len = vsi->max_frame;
2315 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2317 case I40E_FLAG_RX_PS_ENABLED:
2318 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2319 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2320 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2323 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2324 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2325 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2329 /* round up for the chip's needs */
2330 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2331 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2332 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2333 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2335 /* set up individual rings */
2336 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2337 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2343 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2344 * @vsi: ptr to the VSI
2346 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2348 u16 qoffset, qcount;
2351 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2354 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2355 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2358 qoffset = vsi->tc_config.tc_info[n].qoffset;
2359 qcount = vsi->tc_config.tc_info[n].qcount;
2360 for (i = qoffset; i < (qoffset + qcount); i++) {
2361 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2362 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2363 rx_ring->dcb_tc = n;
2364 tx_ring->dcb_tc = n;
2370 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2371 * @vsi: ptr to the VSI
2373 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2376 i40e_set_rx_mode(vsi->netdev);
2380 * i40e_vsi_configure - Set up the VSI for action
2381 * @vsi: the VSI being configured
2383 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2387 i40e_set_vsi_rx_mode(vsi);
2388 i40e_restore_vlan(vsi);
2389 i40e_vsi_config_dcb_rings(vsi);
2390 err = i40e_vsi_configure_tx(vsi);
2392 err = i40e_vsi_configure_rx(vsi);
2398 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2399 * @vsi: the VSI being configured
2401 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2403 struct i40e_pf *pf = vsi->back;
2404 struct i40e_q_vector *q_vector;
2405 struct i40e_hw *hw = &pf->hw;
2411 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2412 * and PFINT_LNKLSTn registers, e.g.:
2413 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2415 qp = vsi->base_queue;
2416 vector = vsi->base_vector;
2417 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2418 q_vector = vsi->q_vectors[i];
2419 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2420 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2421 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2423 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2424 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2425 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2428 /* Linked list for the queuepairs assigned to this vector */
2429 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2430 for (q = 0; q < q_vector->num_ringpairs; q++) {
2431 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2432 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2433 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2434 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2436 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2438 wr32(hw, I40E_QINT_RQCTL(qp), val);
2440 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2441 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2442 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2443 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2445 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2447 /* Terminate the linked list */
2448 if (q == (q_vector->num_ringpairs - 1))
2449 val |= (I40E_QUEUE_END_OF_LIST
2450 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2452 wr32(hw, I40E_QINT_TQCTL(qp), val);
2461 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2462 * @hw: ptr to the hardware info
2464 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2468 /* clear things first */
2469 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2470 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2472 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2473 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2474 I40E_PFINT_ICR0_ENA_GRST_MASK |
2475 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2476 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2477 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2478 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2479 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2480 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2482 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2484 /* SW_ITR_IDX = 0, but don't change INTENA */
2485 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK |
2486 I40E_PFINT_DYN_CTLN_INTENA_MSK_MASK);
2488 /* OTHER_ITR_IDX = 0 */
2489 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2493 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2494 * @vsi: the VSI being configured
2496 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2498 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2499 struct i40e_pf *pf = vsi->back;
2500 struct i40e_hw *hw = &pf->hw;
2503 /* set the ITR configuration */
2504 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2505 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2506 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2507 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2508 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2509 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2511 i40e_enable_misc_int_causes(hw);
2513 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2514 wr32(hw, I40E_PFINT_LNKLST0, 0);
2516 /* Associate the queue pair to the vector and enable the q int */
2517 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2518 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2519 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2521 wr32(hw, I40E_QINT_RQCTL(0), val);
2523 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2524 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2525 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2527 wr32(hw, I40E_QINT_TQCTL(0), val);
2532 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2533 * @pf: board private structure
2535 static void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2537 struct i40e_hw *hw = &pf->hw;
2540 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2541 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2542 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2544 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2549 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2550 * @vsi: pointer to a vsi
2551 * @vector: enable a particular Hw Interrupt vector
2553 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2555 struct i40e_pf *pf = vsi->back;
2556 struct i40e_hw *hw = &pf->hw;
2559 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2560 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2561 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2562 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2567 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2568 * @irq: interrupt number
2569 * @data: pointer to a q_vector
2571 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2573 struct i40e_q_vector *q_vector = data;
2575 if (!q_vector->tx.ring && !q_vector->rx.ring)
2578 napi_schedule(&q_vector->napi);
2584 * i40e_fdir_clean_rings - Interrupt Handler for FDIR rings
2585 * @irq: interrupt number
2586 * @data: pointer to a q_vector
2588 static irqreturn_t i40e_fdir_clean_rings(int irq, void *data)
2590 struct i40e_q_vector *q_vector = data;
2592 if (!q_vector->tx.ring && !q_vector->rx.ring)
2595 pr_info("fdir ring cleaning needed\n");
2601 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2602 * @vsi: the VSI being configured
2603 * @basename: name for the vector
2605 * Allocates MSI-X vectors and requests interrupts from the kernel.
2607 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2609 int q_vectors = vsi->num_q_vectors;
2610 struct i40e_pf *pf = vsi->back;
2611 int base = vsi->base_vector;
2616 for (vector = 0; vector < q_vectors; vector++) {
2617 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2619 if (q_vector->tx.ring && q_vector->rx.ring) {
2620 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2621 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2623 } else if (q_vector->rx.ring) {
2624 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2625 "%s-%s-%d", basename, "rx", rx_int_idx++);
2626 } else if (q_vector->tx.ring) {
2627 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2628 "%s-%s-%d", basename, "tx", tx_int_idx++);
2630 /* skip this unused q_vector */
2633 err = request_irq(pf->msix_entries[base + vector].vector,
2639 dev_info(&pf->pdev->dev,
2640 "%s: request_irq failed, error: %d\n",
2642 goto free_queue_irqs;
2644 /* assign the mask for this irq */
2645 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2646 &q_vector->affinity_mask);
2654 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2656 free_irq(pf->msix_entries[base + vector].vector,
2657 &(vsi->q_vectors[vector]));
2663 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2664 * @vsi: the VSI being un-configured
2666 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2668 struct i40e_pf *pf = vsi->back;
2669 struct i40e_hw *hw = &pf->hw;
2670 int base = vsi->base_vector;
2673 for (i = 0; i < vsi->num_queue_pairs; i++) {
2674 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2675 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2678 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2679 for (i = vsi->base_vector;
2680 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2681 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2684 for (i = 0; i < vsi->num_q_vectors; i++)
2685 synchronize_irq(pf->msix_entries[i + base].vector);
2687 /* Legacy and MSI mode - this stops all interrupt handling */
2688 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2689 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2691 synchronize_irq(pf->pdev->irq);
2696 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2697 * @vsi: the VSI being configured
2699 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2701 struct i40e_pf *pf = vsi->back;
2704 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2705 for (i = vsi->base_vector;
2706 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2707 i40e_irq_dynamic_enable(vsi, i);
2709 i40e_irq_dynamic_enable_icr0(pf);
2716 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2717 * @pf: board private structure
2719 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2722 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2723 i40e_flush(&pf->hw);
2727 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2728 * @irq: interrupt number
2729 * @data: pointer to a q_vector
2731 * This is the handler used for all MSI/Legacy interrupts, and deals
2732 * with both queue and non-queue interrupts. This is also used in
2733 * MSIX mode to handle the non-queue interrupts.
2735 static irqreturn_t i40e_intr(int irq, void *data)
2737 struct i40e_pf *pf = (struct i40e_pf *)data;
2738 struct i40e_hw *hw = &pf->hw;
2739 u32 icr0, icr0_remaining;
2742 icr0 = rd32(hw, I40E_PFINT_ICR0);
2744 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2745 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2748 val = rd32(hw, I40E_PFINT_DYN_CTL0);
2749 val = val | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK;
2750 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2752 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2754 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2755 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2757 /* temporarily disable queue cause for NAPI processing */
2758 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2759 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2760 wr32(hw, I40E_QINT_RQCTL(0), qval);
2762 qval = rd32(hw, I40E_QINT_TQCTL(0));
2763 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2764 wr32(hw, I40E_QINT_TQCTL(0), qval);
2767 if (!test_bit(__I40E_DOWN, &pf->state))
2768 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2771 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2772 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2773 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2776 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2777 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2778 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2781 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2782 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2783 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2786 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2787 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2788 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2789 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2790 val = rd32(hw, I40E_GLGEN_RSTAT);
2791 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2792 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2793 if (val & I40E_RESET_CORER)
2795 else if (val & I40E_RESET_GLOBR)
2797 else if (val & I40E_RESET_EMPR)
2801 /* If a critical error is pending we have no choice but to reset the
2803 * Report and mask out any remaining unexpected interrupts.
2805 icr0_remaining = icr0 & ena_mask;
2806 if (icr0_remaining) {
2807 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2809 if ((icr0_remaining & I40E_PFINT_ICR0_HMC_ERR_MASK) ||
2810 (icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2811 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2812 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
2813 (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
2814 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2815 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2817 dev_info(&pf->pdev->dev, "device will be reset\n");
2818 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2819 i40e_service_event_schedule(pf);
2822 ena_mask &= ~icr0_remaining;
2825 /* re-enable interrupt causes */
2826 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2828 if (!test_bit(__I40E_DOWN, &pf->state)) {
2829 i40e_service_event_schedule(pf);
2830 i40e_irq_dynamic_enable_icr0(pf);
2837 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
2838 * @vsi: the VSI being configured
2839 * @v_idx: vector index
2840 * @qp_idx: queue pair index
2842 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
2844 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
2845 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
2846 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
2848 tx_ring->q_vector = q_vector;
2849 tx_ring->next = q_vector->tx.ring;
2850 q_vector->tx.ring = tx_ring;
2851 q_vector->tx.count++;
2853 rx_ring->q_vector = q_vector;
2854 rx_ring->next = q_vector->rx.ring;
2855 q_vector->rx.ring = rx_ring;
2856 q_vector->rx.count++;
2860 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
2861 * @vsi: the VSI being configured
2863 * This function maps descriptor rings to the queue-specific vectors
2864 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2865 * one vector per queue pair, but on a constrained vector budget, we
2866 * group the queue pairs as "efficiently" as possible.
2868 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
2870 int qp_remaining = vsi->num_queue_pairs;
2871 int q_vectors = vsi->num_q_vectors;
2876 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
2877 * group them so there are multiple queues per vector.
2879 for (; v_start < q_vectors && qp_remaining; v_start++) {
2880 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
2882 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
2884 q_vector->num_ringpairs = num_ringpairs;
2886 q_vector->rx.count = 0;
2887 q_vector->tx.count = 0;
2888 q_vector->rx.ring = NULL;
2889 q_vector->tx.ring = NULL;
2891 while (num_ringpairs--) {
2892 map_vector_to_qp(vsi, v_start, qp_idx);
2900 * i40e_vsi_request_irq - Request IRQ from the OS
2901 * @vsi: the VSI being configured
2902 * @basename: name for the vector
2904 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
2906 struct i40e_pf *pf = vsi->back;
2909 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2910 err = i40e_vsi_request_irq_msix(vsi, basename);
2911 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
2912 err = request_irq(pf->pdev->irq, i40e_intr, 0,
2913 pf->misc_int_name, pf);
2915 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
2916 pf->misc_int_name, pf);
2919 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
2924 #ifdef CONFIG_NET_POLL_CONTROLLER
2926 * i40e_netpoll - A Polling 'interrupt'handler
2927 * @netdev: network interface device structure
2929 * This is used by netconsole to send skbs without having to re-enable
2930 * interrupts. It's not called while the normal interrupt routine is executing.
2932 static void i40e_netpoll(struct net_device *netdev)
2934 struct i40e_netdev_priv *np = netdev_priv(netdev);
2935 struct i40e_vsi *vsi = np->vsi;
2936 struct i40e_pf *pf = vsi->back;
2939 /* if interface is down do nothing */
2940 if (test_bit(__I40E_DOWN, &vsi->state))
2943 pf->flags |= I40E_FLAG_IN_NETPOLL;
2944 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2945 for (i = 0; i < vsi->num_q_vectors; i++)
2946 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
2948 i40e_intr(pf->pdev->irq, netdev);
2950 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
2955 * i40e_vsi_control_tx - Start or stop a VSI's rings
2956 * @vsi: the VSI being configured
2957 * @enable: start or stop the rings
2959 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
2961 struct i40e_pf *pf = vsi->back;
2962 struct i40e_hw *hw = &pf->hw;
2966 pf_q = vsi->base_queue;
2967 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
2970 usleep_range(1000, 2000);
2971 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
2972 } while (j-- && ((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT)
2973 ^ (tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT)) & 1);
2977 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) {
2978 dev_info(&pf->pdev->dev,
2979 "Tx %d already enabled\n", i);
2983 /* is !STAT set ? */
2984 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) {
2985 dev_info(&pf->pdev->dev,
2986 "Tx %d already disabled\n", i);
2991 /* turn on/off the queue */
2993 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK |
2994 I40E_QTX_ENA_QENA_STAT_MASK;
2996 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
2998 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3000 /* wait for the change to finish */
3001 for (j = 0; j < 10; j++) {
3002 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3004 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3007 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3014 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3015 pf_q, (enable ? "en" : "dis"));
3024 * i40e_vsi_control_rx - Start or stop a VSI's rings
3025 * @vsi: the VSI being configured
3026 * @enable: start or stop the rings
3028 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3030 struct i40e_pf *pf = vsi->back;
3031 struct i40e_hw *hw = &pf->hw;
3035 pf_q = vsi->base_queue;
3036 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3039 usleep_range(1000, 2000);
3040 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3041 } while (j-- && ((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT)
3042 ^ (rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT)) & 1);
3046 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3049 /* is !STAT set ? */
3050 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3054 /* turn on/off the queue */
3056 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK |
3057 I40E_QRX_ENA_QENA_STAT_MASK;
3059 rx_reg &= ~(I40E_QRX_ENA_QENA_REQ_MASK |
3060 I40E_QRX_ENA_QENA_STAT_MASK);
3061 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3063 /* wait for the change to finish */
3064 for (j = 0; j < 10; j++) {
3065 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3068 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3071 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3078 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3079 pf_q, (enable ? "en" : "dis"));
3088 * i40e_vsi_control_rings - Start or stop a VSI's rings
3089 * @vsi: the VSI being configured
3090 * @enable: start or stop the rings
3092 static int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3096 /* do rx first for enable and last for disable */
3098 ret = i40e_vsi_control_rx(vsi, request);
3101 ret = i40e_vsi_control_tx(vsi, request);
3103 ret = i40e_vsi_control_tx(vsi, request);
3106 ret = i40e_vsi_control_rx(vsi, request);
3113 * i40e_vsi_free_irq - Free the irq association with the OS
3114 * @vsi: the VSI being configured
3116 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3118 struct i40e_pf *pf = vsi->back;
3119 struct i40e_hw *hw = &pf->hw;
3120 int base = vsi->base_vector;
3124 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3125 if (!vsi->q_vectors)
3128 for (i = 0; i < vsi->num_q_vectors; i++) {
3129 u16 vector = i + base;
3131 /* free only the irqs that were actually requested */
3132 if (vsi->q_vectors[i]->num_ringpairs == 0)
3135 /* clear the affinity_mask in the IRQ descriptor */
3136 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3138 free_irq(pf->msix_entries[vector].vector,
3141 /* Tear down the interrupt queue link list
3143 * We know that they come in pairs and always
3144 * the Rx first, then the Tx. To clear the
3145 * link list, stick the EOL value into the
3146 * next_q field of the registers.
3148 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3149 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3150 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3151 val |= I40E_QUEUE_END_OF_LIST
3152 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3153 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3155 while (qp != I40E_QUEUE_END_OF_LIST) {
3158 val = rd32(hw, I40E_QINT_RQCTL(qp));
3160 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3161 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3162 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3163 I40E_QINT_RQCTL_INTEVENT_MASK);
3165 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3166 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3168 wr32(hw, I40E_QINT_RQCTL(qp), val);
3170 val = rd32(hw, I40E_QINT_TQCTL(qp));
3172 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3173 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3175 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3176 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3177 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3178 I40E_QINT_TQCTL_INTEVENT_MASK);
3180 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3181 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3183 wr32(hw, I40E_QINT_TQCTL(qp), val);
3188 free_irq(pf->pdev->irq, pf);
3190 val = rd32(hw, I40E_PFINT_LNKLST0);
3191 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3192 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3193 val |= I40E_QUEUE_END_OF_LIST
3194 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3195 wr32(hw, I40E_PFINT_LNKLST0, val);
3197 val = rd32(hw, I40E_QINT_RQCTL(qp));
3198 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3199 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3200 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3201 I40E_QINT_RQCTL_INTEVENT_MASK);
3203 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3204 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3206 wr32(hw, I40E_QINT_RQCTL(qp), val);
3208 val = rd32(hw, I40E_QINT_TQCTL(qp));
3210 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3211 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3212 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3213 I40E_QINT_TQCTL_INTEVENT_MASK);
3215 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3216 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3218 wr32(hw, I40E_QINT_TQCTL(qp), val);
3223 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3224 * @vsi: the VSI being configured
3225 * @v_idx: Index of vector to be freed
3227 * This function frees the memory allocated to the q_vector. In addition if
3228 * NAPI is enabled it will delete any references to the NAPI struct prior
3229 * to freeing the q_vector.
3231 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3233 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3234 struct i40e_ring *ring;
3239 /* disassociate q_vector from rings */
3240 i40e_for_each_ring(ring, q_vector->tx)
3241 ring->q_vector = NULL;
3243 i40e_for_each_ring(ring, q_vector->rx)
3244 ring->q_vector = NULL;
3246 /* only VSI w/ an associated netdev is set up w/ NAPI */
3248 netif_napi_del(&q_vector->napi);
3250 vsi->q_vectors[v_idx] = NULL;
3252 kfree_rcu(q_vector, rcu);
3256 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3257 * @vsi: the VSI being un-configured
3259 * This frees the memory allocated to the q_vectors and
3260 * deletes references to the NAPI struct.
3262 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3266 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3267 i40e_free_q_vector(vsi, v_idx);
3271 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3272 * @pf: board private structure
3274 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3276 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3277 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3278 pci_disable_msix(pf->pdev);
3279 kfree(pf->msix_entries);
3280 pf->msix_entries = NULL;
3281 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3282 pci_disable_msi(pf->pdev);
3284 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3288 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3289 * @pf: board private structure
3291 * We go through and clear interrupt specific resources and reset the structure
3292 * to pre-load conditions
3294 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3298 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3299 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3301 i40e_vsi_free_q_vectors(pf->vsi[i]);
3302 i40e_reset_interrupt_capability(pf);
3306 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3307 * @vsi: the VSI being configured
3309 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3316 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3317 napi_enable(&vsi->q_vectors[q_idx]->napi);
3321 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3322 * @vsi: the VSI being configured
3324 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3331 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3332 napi_disable(&vsi->q_vectors[q_idx]->napi);
3336 * i40e_quiesce_vsi - Pause a given VSI
3337 * @vsi: the VSI being paused
3339 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3341 if (test_bit(__I40E_DOWN, &vsi->state))
3344 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3345 if (vsi->netdev && netif_running(vsi->netdev)) {
3346 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3348 set_bit(__I40E_DOWN, &vsi->state);
3354 * i40e_unquiesce_vsi - Resume a given VSI
3355 * @vsi: the VSI being resumed
3357 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3359 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3362 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3363 if (vsi->netdev && netif_running(vsi->netdev))
3364 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3366 i40e_up(vsi); /* this clears the DOWN bit */
3370 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3373 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3377 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3379 i40e_quiesce_vsi(pf->vsi[v]);
3384 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3387 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3391 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3393 i40e_unquiesce_vsi(pf->vsi[v]);
3398 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3399 * @dcbcfg: the corresponding DCBx configuration structure
3401 * Return the number of TCs from given DCBx configuration
3403 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3408 /* Scan the ETS Config Priority Table to find
3409 * traffic class enabled for a given priority
3410 * and use the traffic class index to get the
3411 * number of traffic classes enabled
3413 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3414 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3415 num_tc = dcbcfg->etscfg.prioritytable[i];
3418 /* Traffic class index starts from zero so
3419 * increment to return the actual count
3425 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3426 * @dcbcfg: the corresponding DCBx configuration structure
3428 * Query the current DCB configuration and return the number of
3429 * traffic classes enabled from the given DCBX config
3431 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3433 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3437 for (i = 0; i < num_tc; i++)
3438 enabled_tc |= 1 << i;
3444 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3445 * @pf: PF being queried
3447 * Return number of traffic classes enabled for the given PF
3449 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3451 struct i40e_hw *hw = &pf->hw;
3454 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3456 /* If DCB is not enabled then always in single TC */
3457 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3460 /* MFP mode return count of enabled TCs for this PF */
3461 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3462 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3463 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3464 if (enabled_tc & (1 << i))
3470 /* SFP mode will be enabled for all TCs on port */
3471 return i40e_dcb_get_num_tc(dcbcfg);
3475 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3476 * @pf: PF being queried
3478 * Return a bitmap for first enabled traffic class for this PF.
3480 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3482 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3486 return 0x1; /* TC0 */
3488 /* Find the first enabled TC */
3489 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3490 if (enabled_tc & (1 << i))
3498 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3499 * @pf: PF being queried
3501 * Return a bitmap for enabled traffic classes for this PF.
3503 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3505 /* If DCB is not enabled for this PF then just return default TC */
3506 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3507 return i40e_pf_get_default_tc(pf);
3509 /* MFP mode will have enabled TCs set by FW */
3510 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3511 return pf->hw.func_caps.enabled_tcmap;
3513 /* SFP mode we want PF to be enabled for all TCs */
3514 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3518 * i40e_vsi_get_bw_info - Query VSI BW Information
3519 * @vsi: the VSI being queried
3521 * Returns 0 on success, negative value on failure
3523 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3525 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3526 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3527 struct i40e_pf *pf = vsi->back;
3528 struct i40e_hw *hw = &pf->hw;
3533 /* Get the VSI level BW configuration */
3534 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3536 dev_info(&pf->pdev->dev,
3537 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3538 aq_ret, pf->hw.aq.asq_last_status);
3542 /* Get the VSI level BW configuration per TC */
3543 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3546 dev_info(&pf->pdev->dev,
3547 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3548 aq_ret, pf->hw.aq.asq_last_status);
3552 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3553 dev_info(&pf->pdev->dev,
3554 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3555 bw_config.tc_valid_bits,
3556 bw_ets_config.tc_valid_bits);
3557 /* Still continuing */
3560 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3561 vsi->bw_max_quanta = bw_config.max_bw;
3562 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3563 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3564 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3565 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3566 vsi->bw_ets_limit_credits[i] =
3567 le16_to_cpu(bw_ets_config.credits[i]);
3568 /* 3 bits out of 4 for each TC */
3569 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3576 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3577 * @vsi: the VSI being configured
3578 * @enabled_tc: TC bitmap
3579 * @bw_credits: BW shared credits per TC
3581 * Returns 0 on success, negative value on failure
3583 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3586 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3590 bw_data.tc_valid_bits = enabled_tc;
3591 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3592 bw_data.tc_bw_credits[i] = bw_share[i];
3594 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3597 dev_info(&vsi->back->pdev->dev,
3598 "%s: AQ command Config VSI BW allocation per TC failed = %d\n",
3599 __func__, vsi->back->hw.aq.asq_last_status);
3603 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3604 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3610 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3611 * @vsi: the VSI being configured
3612 * @enabled_tc: TC map to be enabled
3615 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3617 struct net_device *netdev = vsi->netdev;
3618 struct i40e_pf *pf = vsi->back;
3619 struct i40e_hw *hw = &pf->hw;
3622 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3628 netdev_reset_tc(netdev);
3632 /* Set up actual enabled TCs on the VSI */
3633 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3636 /* set per TC queues for the VSI */
3637 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3638 /* Only set TC queues for enabled tcs
3640 * e.g. For a VSI that has TC0 and TC3 enabled the
3641 * enabled_tc bitmap would be 0x00001001; the driver
3642 * will set the numtc for netdev as 2 that will be
3643 * referenced by the netdev layer as TC 0 and 1.
3645 if (vsi->tc_config.enabled_tc & (1 << i))
3646 netdev_set_tc_queue(netdev,
3647 vsi->tc_config.tc_info[i].netdev_tc,
3648 vsi->tc_config.tc_info[i].qcount,
3649 vsi->tc_config.tc_info[i].qoffset);
3652 /* Assign UP2TC map for the VSI */
3653 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3654 /* Get the actual TC# for the UP */
3655 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3656 /* Get the mapped netdev TC# for the UP */
3657 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3658 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3663 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3664 * @vsi: the VSI being configured
3665 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3667 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3668 struct i40e_vsi_context *ctxt)
3670 /* copy just the sections touched not the entire info
3671 * since not all sections are valid as returned by
3674 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3675 memcpy(&vsi->info.queue_mapping,
3676 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3677 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3678 sizeof(vsi->info.tc_mapping));
3682 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3683 * @vsi: VSI to be configured
3684 * @enabled_tc: TC bitmap
3686 * This configures a particular VSI for TCs that are mapped to the
3687 * given TC bitmap. It uses default bandwidth share for TCs across
3688 * VSIs to configure TC for a particular VSI.
3691 * It is expected that the VSI queues have been quisced before calling
3694 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3696 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3697 struct i40e_vsi_context ctxt;
3701 /* Check if enabled_tc is same as existing or new TCs */
3702 if (vsi->tc_config.enabled_tc == enabled_tc)
3705 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3706 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3707 if (enabled_tc & (1 << i))
3711 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3713 dev_info(&vsi->back->pdev->dev,
3714 "Failed configuring TC map %d for VSI %d\n",
3715 enabled_tc, vsi->seid);
3719 /* Update Queue Pairs Mapping for currently enabled UPs */
3720 ctxt.seid = vsi->seid;
3721 ctxt.pf_num = vsi->back->hw.pf_id;
3723 ctxt.uplink_seid = vsi->uplink_seid;
3724 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3725 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3727 /* Update the VSI after updating the VSI queue-mapping information */
3728 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3730 dev_info(&vsi->back->pdev->dev,
3731 "update vsi failed, aq_err=%d\n",
3732 vsi->back->hw.aq.asq_last_status);
3735 /* update the local VSI info with updated queue map */
3736 i40e_vsi_update_queue_map(vsi, &ctxt);
3737 vsi->info.valid_sections = 0;
3739 /* Update current VSI BW information */
3740 ret = i40e_vsi_get_bw_info(vsi);
3742 dev_info(&vsi->back->pdev->dev,
3743 "Failed updating vsi bw info, aq_err=%d\n",
3744 vsi->back->hw.aq.asq_last_status);
3748 /* Update the netdev TC setup */
3749 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3755 * i40e_up_complete - Finish the last steps of bringing up a connection
3756 * @vsi: the VSI being configured
3758 static int i40e_up_complete(struct i40e_vsi *vsi)
3760 struct i40e_pf *pf = vsi->back;
3763 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3764 i40e_vsi_configure_msix(vsi);
3766 i40e_configure_msi_and_legacy(vsi);
3769 err = i40e_vsi_control_rings(vsi, true);
3773 clear_bit(__I40E_DOWN, &vsi->state);
3774 i40e_napi_enable_all(vsi);
3775 i40e_vsi_enable_irq(vsi);
3777 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
3779 netdev_info(vsi->netdev, "NIC Link is Up\n");
3780 netif_tx_start_all_queues(vsi->netdev);
3781 netif_carrier_on(vsi->netdev);
3782 } else if (vsi->netdev) {
3783 netdev_info(vsi->netdev, "NIC Link is Down\n");
3785 i40e_service_event_schedule(pf);
3791 * i40e_vsi_reinit_locked - Reset the VSI
3792 * @vsi: the VSI being configured
3794 * Rebuild the ring structs after some configuration
3795 * has changed, e.g. MTU size.
3797 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
3799 struct i40e_pf *pf = vsi->back;
3801 WARN_ON(in_interrupt());
3802 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
3803 usleep_range(1000, 2000);
3806 /* Give a VF some time to respond to the reset. The
3807 * two second wait is based upon the watchdog cycle in
3810 if (vsi->type == I40E_VSI_SRIOV)
3813 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
3817 * i40e_up - Bring the connection back up after being down
3818 * @vsi: the VSI being configured
3820 int i40e_up(struct i40e_vsi *vsi)
3824 err = i40e_vsi_configure(vsi);
3826 err = i40e_up_complete(vsi);
3832 * i40e_down - Shutdown the connection processing
3833 * @vsi: the VSI being stopped
3835 void i40e_down(struct i40e_vsi *vsi)
3839 /* It is assumed that the caller of this function
3840 * sets the vsi->state __I40E_DOWN bit.
3843 netif_carrier_off(vsi->netdev);
3844 netif_tx_disable(vsi->netdev);
3846 i40e_vsi_disable_irq(vsi);
3847 i40e_vsi_control_rings(vsi, false);
3848 i40e_napi_disable_all(vsi);
3850 for (i = 0; i < vsi->num_queue_pairs; i++) {
3851 i40e_clean_tx_ring(vsi->tx_rings[i]);
3852 i40e_clean_rx_ring(vsi->rx_rings[i]);
3857 * i40e_setup_tc - configure multiple traffic classes
3858 * @netdev: net device to configure
3859 * @tc: number of traffic classes to enable
3861 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
3863 struct i40e_netdev_priv *np = netdev_priv(netdev);
3864 struct i40e_vsi *vsi = np->vsi;
3865 struct i40e_pf *pf = vsi->back;
3870 /* Check if DCB enabled to continue */
3871 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
3872 netdev_info(netdev, "DCB is not enabled for adapter\n");
3876 /* Check if MFP enabled */
3877 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3878 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
3882 /* Check whether tc count is within enabled limit */
3883 if (tc > i40e_pf_get_num_tc(pf)) {
3884 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
3888 /* Generate TC map for number of tc requested */
3889 for (i = 0; i < tc; i++)
3890 enabled_tc |= (1 << i);
3892 /* Requesting same TC configuration as already enabled */
3893 if (enabled_tc == vsi->tc_config.enabled_tc)
3896 /* Quiesce VSI queues */
3897 i40e_quiesce_vsi(vsi);
3899 /* Configure VSI for enabled TCs */
3900 ret = i40e_vsi_config_tc(vsi, enabled_tc);
3902 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
3908 i40e_unquiesce_vsi(vsi);
3915 * i40e_open - Called when a network interface is made active
3916 * @netdev: network interface device structure
3918 * The open entry point is called when a network interface is made
3919 * active by the system (IFF_UP). At this point all resources needed
3920 * for transmit and receive operations are allocated, the interrupt
3921 * handler is registered with the OS, the netdev watchdog subtask is
3922 * enabled, and the stack is notified that the interface is ready.
3924 * Returns 0 on success, negative value on failure
3926 static int i40e_open(struct net_device *netdev)
3928 struct i40e_netdev_priv *np = netdev_priv(netdev);
3929 struct i40e_vsi *vsi = np->vsi;
3930 struct i40e_pf *pf = vsi->back;
3931 char int_name[IFNAMSIZ];
3934 /* disallow open during test */
3935 if (test_bit(__I40E_TESTING, &pf->state))
3938 netif_carrier_off(netdev);
3940 /* allocate descriptors */
3941 err = i40e_vsi_setup_tx_resources(vsi);
3944 err = i40e_vsi_setup_rx_resources(vsi);
3948 err = i40e_vsi_configure(vsi);
3952 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
3953 dev_driver_string(&pf->pdev->dev), netdev->name);
3954 err = i40e_vsi_request_irq(vsi, int_name);
3958 err = i40e_up_complete(vsi);
3960 goto err_up_complete;
3962 if ((vsi->type == I40E_VSI_MAIN) || (vsi->type == I40E_VSI_VMDQ2)) {
3963 err = i40e_aq_set_vsi_broadcast(&pf->hw, vsi->seid, true, NULL);
3966 "couldn't set broadcast err %d aq_err %d\n",
3967 err, pf->hw.aq.asq_last_status);
3974 i40e_vsi_free_irq(vsi);
3976 i40e_vsi_free_rx_resources(vsi);
3978 i40e_vsi_free_tx_resources(vsi);
3979 if (vsi == pf->vsi[pf->lan_vsi])
3980 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
3986 * i40e_close - Disables a network interface
3987 * @netdev: network interface device structure
3989 * The close entry point is called when an interface is de-activated
3990 * by the OS. The hardware is still under the driver's control, but
3991 * this netdev interface is disabled.
3993 * Returns 0, this is not allowed to fail
3995 static int i40e_close(struct net_device *netdev)
3997 struct i40e_netdev_priv *np = netdev_priv(netdev);
3998 struct i40e_vsi *vsi = np->vsi;
4000 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4004 i40e_vsi_free_irq(vsi);
4006 i40e_vsi_free_tx_resources(vsi);
4007 i40e_vsi_free_rx_resources(vsi);
4013 * i40e_do_reset - Start a PF or Core Reset sequence
4014 * @pf: board private structure
4015 * @reset_flags: which reset is requested
4017 * The essential difference in resets is that the PF Reset
4018 * doesn't clear the packet buffers, doesn't reset the PE
4019 * firmware, and doesn't bother the other PFs on the chip.
4021 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4025 WARN_ON(in_interrupt());
4027 /* do the biggest reset indicated */
4028 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4030 /* Request a Global Reset
4032 * This will start the chip's countdown to the actual full
4033 * chip reset event, and a warning interrupt to be sent
4034 * to all PFs, including the requestor. Our handler
4035 * for the warning interrupt will deal with the shutdown
4036 * and recovery of the switch setup.
4038 dev_info(&pf->pdev->dev, "GlobalR requested\n");
4039 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4040 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4041 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4043 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4045 /* Request a Core Reset
4047 * Same as Global Reset, except does *not* include the MAC/PHY
4049 dev_info(&pf->pdev->dev, "CoreR requested\n");
4050 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4051 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4052 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4053 i40e_flush(&pf->hw);
4055 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4057 /* Request a PF Reset
4059 * Resets only the PF-specific registers
4061 * This goes directly to the tear-down and rebuild of
4062 * the switch, since we need to do all the recovery as
4063 * for the Core Reset.
4065 dev_info(&pf->pdev->dev, "PFR requested\n");
4066 i40e_handle_reset_warning(pf);
4068 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4071 /* Find the VSI(s) that requested a re-init */
4072 dev_info(&pf->pdev->dev,
4073 "VSI reinit requested\n");
4074 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4075 struct i40e_vsi *vsi = pf->vsi[v];
4077 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4078 i40e_vsi_reinit_locked(pf->vsi[v]);
4079 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4083 /* no further action needed, so return now */
4086 dev_info(&pf->pdev->dev,
4087 "bad reset request 0x%08x\n", reset_flags);
4093 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4094 * @pf: board private structure
4095 * @e: event info posted on ARQ
4097 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4100 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4101 struct i40e_arq_event_info *e)
4103 struct i40e_aqc_lan_overflow *data =
4104 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4105 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4106 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4107 struct i40e_hw *hw = &pf->hw;
4111 dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n",
4112 __func__, queue, qtx_ctl);
4114 /* Queue belongs to VF, find the VF and issue VF reset */
4115 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4116 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4117 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4118 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4119 vf_id -= hw->func_caps.vf_base_id;
4120 vf = &pf->vf[vf_id];
4121 i40e_vc_notify_vf_reset(vf);
4122 /* Allow VF to process pending reset notification */
4124 i40e_reset_vf(vf, false);
4129 * i40e_service_event_complete - Finish up the service event
4130 * @pf: board private structure
4132 static void i40e_service_event_complete(struct i40e_pf *pf)
4134 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4136 /* flush memory to make sure state is correct before next watchog */
4137 smp_mb__before_clear_bit();
4138 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4142 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4143 * @pf: board private structure
4145 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4147 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4150 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4152 /* if interface is down do nothing */
4153 if (test_bit(__I40E_DOWN, &pf->state))
4158 * i40e_vsi_link_event - notify VSI of a link event
4159 * @vsi: vsi to be notified
4160 * @link_up: link up or down
4162 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4167 switch (vsi->type) {
4169 if (!vsi->netdev || !vsi->netdev_registered)
4173 netif_carrier_on(vsi->netdev);
4174 netif_tx_wake_all_queues(vsi->netdev);
4176 netif_carrier_off(vsi->netdev);
4177 netif_tx_stop_all_queues(vsi->netdev);
4181 case I40E_VSI_SRIOV:
4184 case I40E_VSI_VMDQ2:
4186 case I40E_VSI_MIRROR:
4188 /* there is no notification for other VSIs */
4194 * i40e_veb_link_event - notify elements on the veb of a link event
4195 * @veb: veb to be notified
4196 * @link_up: link up or down
4198 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4203 if (!veb || !veb->pf)
4207 /* depth first... */
4208 for (i = 0; i < I40E_MAX_VEB; i++)
4209 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4210 i40e_veb_link_event(pf->veb[i], link_up);
4212 /* ... now the local VSIs */
4213 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4214 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4215 i40e_vsi_link_event(pf->vsi[i], link_up);
4219 * i40e_link_event - Update netif_carrier status
4220 * @pf: board private structure
4222 static void i40e_link_event(struct i40e_pf *pf)
4224 bool new_link, old_link;
4226 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4227 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4229 if (new_link == old_link)
4232 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4233 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4234 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4236 /* Notify the base of the switch tree connected to
4237 * the link. Floating VEBs are not notified.
4239 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4240 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4242 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4245 i40e_vc_notify_link_state(pf);
4249 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4250 * @pf: board private structure
4252 * Set the per-queue flags to request a check for stuck queues in the irq
4253 * clean functions, then force interrupts to be sure the irq clean is called.
4255 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4259 /* If we're down or resetting, just bail */
4260 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4263 /* for each VSI/netdev
4265 * set the check flag
4267 * force an interrupt
4269 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4270 struct i40e_vsi *vsi = pf->vsi[v];
4274 test_bit(__I40E_DOWN, &vsi->state) ||
4275 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4278 for (i = 0; i < vsi->num_queue_pairs; i++) {
4279 set_check_for_tx_hang(vsi->tx_rings[i]);
4280 if (test_bit(__I40E_HANG_CHECK_ARMED,
4281 &vsi->tx_rings[i]->state))
4286 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4287 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4288 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4289 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4291 u16 vec = vsi->base_vector - 1;
4292 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4293 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4294 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4295 wr32(&vsi->back->hw,
4296 I40E_PFINT_DYN_CTLN(vec), val);
4298 i40e_flush(&vsi->back->hw);
4304 * i40e_watchdog_subtask - Check and bring link up
4305 * @pf: board private structure
4307 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4311 /* if interface is down do nothing */
4312 if (test_bit(__I40E_DOWN, &pf->state) ||
4313 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4316 /* Update the stats for active netdevs so the network stack
4317 * can look at updated numbers whenever it cares to
4319 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4320 if (pf->vsi[i] && pf->vsi[i]->netdev)
4321 i40e_update_stats(pf->vsi[i]);
4323 /* Update the stats for the active switching components */
4324 for (i = 0; i < I40E_MAX_VEB; i++)
4326 i40e_update_veb_stats(pf->veb[i]);
4330 * i40e_reset_subtask - Set up for resetting the device and driver
4331 * @pf: board private structure
4333 static void i40e_reset_subtask(struct i40e_pf *pf)
4335 u32 reset_flags = 0;
4337 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4338 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4339 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4341 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4342 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4343 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4345 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4346 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4347 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4349 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4350 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4351 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4354 /* If there's a recovery already waiting, it takes
4355 * precedence before starting a new reset sequence.
4357 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4358 i40e_handle_reset_warning(pf);
4362 /* If we're already down or resetting, just bail */
4364 !test_bit(__I40E_DOWN, &pf->state) &&
4365 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4366 i40e_do_reset(pf, reset_flags);
4370 * i40e_handle_link_event - Handle link event
4371 * @pf: board private structure
4372 * @e: event info posted on ARQ
4374 static void i40e_handle_link_event(struct i40e_pf *pf,
4375 struct i40e_arq_event_info *e)
4377 struct i40e_hw *hw = &pf->hw;
4378 struct i40e_aqc_get_link_status *status =
4379 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4380 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4382 /* save off old link status information */
4383 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4384 sizeof(pf->hw.phy.link_info_old));
4386 /* update link status */
4387 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4388 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4389 hw_link_info->link_info = status->link_info;
4390 hw_link_info->an_info = status->an_info;
4391 hw_link_info->ext_info = status->ext_info;
4392 hw_link_info->lse_enable =
4393 le16_to_cpu(status->command_flags) &
4396 /* process the event */
4397 i40e_link_event(pf);
4399 /* Do a new status request to re-enable LSE reporting
4400 * and load new status information into the hw struct,
4401 * then see if the status changed while processing the
4404 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
4405 i40e_link_event(pf);
4409 * i40e_clean_adminq_subtask - Clean the AdminQ rings
4410 * @pf: board private structure
4412 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
4414 struct i40e_arq_event_info event;
4415 struct i40e_hw *hw = &pf->hw;
4421 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
4424 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
4425 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
4430 ret = i40e_clean_arq_element(hw, &event, &pending);
4431 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
4432 dev_info(&pf->pdev->dev, "No ARQ event found\n");
4435 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
4439 opcode = le16_to_cpu(event.desc.opcode);
4442 case i40e_aqc_opc_get_link_status:
4443 i40e_handle_link_event(pf, &event);
4445 case i40e_aqc_opc_send_msg_to_pf:
4446 ret = i40e_vc_process_vf_msg(pf,
4447 le16_to_cpu(event.desc.retval),
4448 le32_to_cpu(event.desc.cookie_high),
4449 le32_to_cpu(event.desc.cookie_low),
4453 case i40e_aqc_opc_lldp_update_mib:
4454 dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
4456 case i40e_aqc_opc_event_lan_overflow:
4457 dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
4458 i40e_handle_lan_overflow_event(pf, &event);
4461 dev_info(&pf->pdev->dev,
4462 "ARQ Error: Unknown event %d received\n",
4466 } while (pending && (i++ < pf->adminq_work_limit));
4468 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
4469 /* re-enable Admin queue interrupt cause */
4470 val = rd32(hw, I40E_PFINT_ICR0_ENA);
4471 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4472 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4475 kfree(event.msg_buf);
4479 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
4480 * @veb: pointer to the VEB instance
4482 * This is a recursive function that first builds the attached VSIs then
4483 * recurses in to build the next layer of VEB. We track the connections
4484 * through our own index numbers because the seid's from the HW could
4485 * change across the reset.
4487 static int i40e_reconstitute_veb(struct i40e_veb *veb)
4489 struct i40e_vsi *ctl_vsi = NULL;
4490 struct i40e_pf *pf = veb->pf;
4494 /* build VSI that owns this VEB, temporarily attached to base VEB */
4495 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
4497 pf->vsi[v]->veb_idx == veb->idx &&
4498 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
4499 ctl_vsi = pf->vsi[v];
4504 dev_info(&pf->pdev->dev,
4505 "missing owner VSI for veb_idx %d\n", veb->idx);
4507 goto end_reconstitute;
4509 if (ctl_vsi != pf->vsi[pf->lan_vsi])
4510 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
4511 ret = i40e_add_vsi(ctl_vsi);
4513 dev_info(&pf->pdev->dev,
4514 "rebuild of owner VSI failed: %d\n", ret);
4515 goto end_reconstitute;
4517 i40e_vsi_reset_stats(ctl_vsi);
4519 /* create the VEB in the switch and move the VSI onto the VEB */
4520 ret = i40e_add_veb(veb, ctl_vsi);
4522 goto end_reconstitute;
4524 /* create the remaining VSIs attached to this VEB */
4525 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4526 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
4529 if (pf->vsi[v]->veb_idx == veb->idx) {
4530 struct i40e_vsi *vsi = pf->vsi[v];
4531 vsi->uplink_seid = veb->seid;
4532 ret = i40e_add_vsi(vsi);
4534 dev_info(&pf->pdev->dev,
4535 "rebuild of vsi_idx %d failed: %d\n",
4537 goto end_reconstitute;
4539 i40e_vsi_reset_stats(vsi);
4543 /* create any VEBs attached to this VEB - RECURSION */
4544 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
4545 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
4546 pf->veb[veb_idx]->uplink_seid = veb->seid;
4547 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
4558 * i40e_get_capabilities - get info about the HW
4559 * @pf: the PF struct
4561 static int i40e_get_capabilities(struct i40e_pf *pf)
4563 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
4568 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
4570 cap_buf = kzalloc(buf_len, GFP_KERNEL);
4574 /* this loads the data into the hw struct for us */
4575 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
4577 i40e_aqc_opc_list_func_capabilities,
4579 /* data loaded, buffer no longer needed */
4582 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
4583 /* retry with a larger buffer */
4584 buf_len = data_size;
4585 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
4586 dev_info(&pf->pdev->dev,
4587 "capability discovery failed: aq=%d\n",
4588 pf->hw.aq.asq_last_status);
4593 if (pf->hw.debug_mask & I40E_DEBUG_USER)
4594 dev_info(&pf->pdev->dev,
4595 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
4596 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
4597 pf->hw.func_caps.num_msix_vectors,
4598 pf->hw.func_caps.num_msix_vectors_vf,
4599 pf->hw.func_caps.fd_filters_guaranteed,
4600 pf->hw.func_caps.fd_filters_best_effort,
4601 pf->hw.func_caps.num_tx_qp,
4602 pf->hw.func_caps.num_vsis);
4608 * i40e_fdir_setup - initialize the Flow Director resources
4609 * @pf: board private structure
4611 static void i40e_fdir_setup(struct i40e_pf *pf)
4613 struct i40e_vsi *vsi;
4614 bool new_vsi = false;
4617 if (!(pf->flags & (I40E_FLAG_FDIR_ENABLED|I40E_FLAG_FDIR_ATR_ENABLED)))
4620 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
4622 /* find existing or make new FDIR VSI */
4624 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4625 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR)
4628 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->mac_seid, 0);
4630 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
4631 pf->flags &= ~I40E_FLAG_FDIR_ENABLED;
4636 WARN_ON(vsi->base_queue != I40E_FDIR_RING);
4637 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_rings);
4639 err = i40e_vsi_setup_tx_resources(vsi);
4641 err = i40e_vsi_setup_rx_resources(vsi);
4643 err = i40e_vsi_configure(vsi);
4644 if (!err && new_vsi) {
4645 char int_name[IFNAMSIZ + 9];
4646 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4647 dev_driver_string(&pf->pdev->dev));
4648 err = i40e_vsi_request_irq(vsi, int_name);
4651 err = i40e_up_complete(vsi);
4653 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4657 * i40e_fdir_teardown - release the Flow Director resources
4658 * @pf: board private structure
4660 static void i40e_fdir_teardown(struct i40e_pf *pf)
4664 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
4665 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
4666 i40e_vsi_release(pf->vsi[i]);
4673 * i40e_handle_reset_warning - prep for the core to reset
4674 * @pf: board private structure
4676 * Close up the VFs and other things in prep for a Core Reset,
4677 * then get ready to rebuild the world.
4679 static void i40e_handle_reset_warning(struct i40e_pf *pf)
4681 struct i40e_driver_version dv;
4682 struct i40e_hw *hw = &pf->hw;
4686 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
4687 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4690 dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n");
4692 i40e_vc_notify_reset(pf);
4694 /* quiesce the VSIs and their queues that are not already DOWN */
4695 i40e_pf_quiesce_all_vsi(pf);
4697 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4699 pf->vsi[v]->seid = 0;
4702 i40e_shutdown_adminq(&pf->hw);
4704 /* Now we wait for GRST to settle out.
4705 * We don't have to delete the VEBs or VSIs from the hw switch
4706 * because the reset will make them disappear.
4708 ret = i40e_pf_reset(hw);
4710 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
4713 if (test_bit(__I40E_DOWN, &pf->state))
4714 goto end_core_reset;
4715 dev_info(&pf->pdev->dev, "Rebuilding internal switch\n");
4717 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
4718 ret = i40e_init_adminq(&pf->hw);
4720 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
4721 goto end_core_reset;
4724 ret = i40e_get_capabilities(pf);
4726 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
4728 goto end_core_reset;
4731 /* call shutdown HMC */
4732 ret = i40e_shutdown_lan_hmc(hw);
4734 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
4735 goto end_core_reset;
4738 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
4739 hw->func_caps.num_rx_qp,
4740 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
4742 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
4743 goto end_core_reset;
4745 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
4747 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
4748 goto end_core_reset;
4751 /* do basic switch setup */
4752 ret = i40e_setup_pf_switch(pf);
4754 goto end_core_reset;
4756 /* Rebuild the VSIs and VEBs that existed before reset.
4757 * They are still in our local switch element arrays, so only
4758 * need to rebuild the switch model in the HW.
4760 * If there were VEBs but the reconstitution failed, we'll try
4761 * try to recover minimal use by getting the basic PF VSI working.
4763 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
4764 dev_info(&pf->pdev->dev, "attempting to rebuild switch\n");
4765 /* find the one VEB connected to the MAC, and find orphans */
4766 for (v = 0; v < I40E_MAX_VEB; v++) {
4770 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
4771 pf->veb[v]->uplink_seid == 0) {
4772 ret = i40e_reconstitute_veb(pf->veb[v]);
4777 /* If Main VEB failed, we're in deep doodoo,
4778 * so give up rebuilding the switch and set up
4779 * for minimal rebuild of PF VSI.
4780 * If orphan failed, we'll report the error
4781 * but try to keep going.
4783 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
4784 dev_info(&pf->pdev->dev,
4785 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
4787 pf->vsi[pf->lan_vsi]->uplink_seid
4790 } else if (pf->veb[v]->uplink_seid == 0) {
4791 dev_info(&pf->pdev->dev,
4792 "rebuild of orphan VEB failed: %d\n",
4799 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
4800 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
4801 /* no VEB, so rebuild only the Main VSI */
4802 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
4804 dev_info(&pf->pdev->dev,
4805 "rebuild of Main VSI failed: %d\n", ret);
4806 goto end_core_reset;
4810 /* reinit the misc interrupt */
4811 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4812 ret = i40e_setup_misc_vector(pf);
4814 /* restart the VSIs that were rebuilt and running before the reset */
4815 i40e_pf_unquiesce_all_vsi(pf);
4817 /* tell the firmware that we're starting */
4818 dv.major_version = DRV_VERSION_MAJOR;
4819 dv.minor_version = DRV_VERSION_MINOR;
4820 dv.build_version = DRV_VERSION_BUILD;
4821 dv.subbuild_version = 0;
4822 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
4824 dev_info(&pf->pdev->dev, "PF reset done\n");
4827 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
4831 * i40e_handle_mdd_event
4832 * @pf: pointer to the pf structure
4834 * Called from the MDD irq handler to identify possibly malicious vfs
4836 static void i40e_handle_mdd_event(struct i40e_pf *pf)
4838 struct i40e_hw *hw = &pf->hw;
4839 bool mdd_detected = false;
4844 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
4847 /* find what triggered the MDD event */
4848 reg = rd32(hw, I40E_GL_MDET_TX);
4849 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
4850 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
4851 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
4852 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
4853 >> I40E_GL_MDET_TX_EVENT_SHIFT;
4854 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
4855 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
4856 dev_info(&pf->pdev->dev,
4857 "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n",
4858 event, queue, func);
4859 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
4860 mdd_detected = true;
4862 reg = rd32(hw, I40E_GL_MDET_RX);
4863 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
4864 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
4865 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
4866 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
4867 >> I40E_GL_MDET_RX_EVENT_SHIFT;
4868 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
4869 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
4870 dev_info(&pf->pdev->dev,
4871 "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n",
4872 event, queue, func);
4873 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
4874 mdd_detected = true;
4877 /* see if one of the VFs needs its hand slapped */
4878 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
4880 reg = rd32(hw, I40E_VP_MDET_TX(i));
4881 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
4882 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
4883 vf->num_mdd_events++;
4884 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
4887 reg = rd32(hw, I40E_VP_MDET_RX(i));
4888 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
4889 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
4890 vf->num_mdd_events++;
4891 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
4894 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
4895 dev_info(&pf->pdev->dev,
4896 "Too many MDD events on VF %d, disabled\n", i);
4897 dev_info(&pf->pdev->dev,
4898 "Use PF Control I/F to re-enable the VF\n");
4899 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
4903 /* re-enable mdd interrupt cause */
4904 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
4905 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4906 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4907 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4912 * i40e_service_task - Run the driver's async subtasks
4913 * @work: pointer to work_struct containing our data
4915 static void i40e_service_task(struct work_struct *work)
4917 struct i40e_pf *pf = container_of(work,
4920 unsigned long start_time = jiffies;
4922 i40e_reset_subtask(pf);
4923 i40e_handle_mdd_event(pf);
4924 i40e_vc_process_vflr_event(pf);
4925 i40e_watchdog_subtask(pf);
4926 i40e_fdir_reinit_subtask(pf);
4927 i40e_check_hang_subtask(pf);
4928 i40e_sync_filters_subtask(pf);
4929 i40e_clean_adminq_subtask(pf);
4931 i40e_service_event_complete(pf);
4933 /* If the tasks have taken longer than one timer cycle or there
4934 * is more work to be done, reschedule the service task now
4935 * rather than wait for the timer to tick again.
4937 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
4938 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
4939 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
4940 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
4941 i40e_service_event_schedule(pf);
4945 * i40e_service_timer - timer callback
4946 * @data: pointer to PF struct
4948 static void i40e_service_timer(unsigned long data)
4950 struct i40e_pf *pf = (struct i40e_pf *)data;
4952 mod_timer(&pf->service_timer,
4953 round_jiffies(jiffies + pf->service_timer_period));
4954 i40e_service_event_schedule(pf);
4958 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
4959 * @vsi: the VSI being configured
4961 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
4963 struct i40e_pf *pf = vsi->back;
4965 switch (vsi->type) {
4967 vsi->alloc_queue_pairs = pf->num_lan_qps;
4968 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
4969 I40E_REQ_DESCRIPTOR_MULTIPLE);
4970 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4971 vsi->num_q_vectors = pf->num_lan_msix;
4973 vsi->num_q_vectors = 1;
4978 vsi->alloc_queue_pairs = 1;
4979 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
4980 I40E_REQ_DESCRIPTOR_MULTIPLE);
4981 vsi->num_q_vectors = 1;
4984 case I40E_VSI_VMDQ2:
4985 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
4986 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
4987 I40E_REQ_DESCRIPTOR_MULTIPLE);
4988 vsi->num_q_vectors = pf->num_vmdq_msix;
4991 case I40E_VSI_SRIOV:
4992 vsi->alloc_queue_pairs = pf->num_vf_qps;
4993 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
4994 I40E_REQ_DESCRIPTOR_MULTIPLE);
5006 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5007 * @pf: board private structure
5008 * @type: type of VSI
5010 * On error: returns error code (negative)
5011 * On success: returns vsi index in PF (positive)
5013 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5016 struct i40e_vsi *vsi;
5022 /* Need to protect the allocation of the VSIs at the PF level */
5023 mutex_lock(&pf->switch_mutex);
5025 /* VSI list may be fragmented if VSI creation/destruction has
5026 * been happening. We can afford to do a quick scan to look
5027 * for any free VSIs in the list.
5029 * find next empty vsi slot, looping back around if necessary
5032 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5034 if (i >= pf->hw.func_caps.num_vsis) {
5036 while (i < pf->next_vsi && pf->vsi[i])
5040 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5041 vsi_idx = i; /* Found one! */
5044 goto unlock_pf; /* out of VSI slots! */
5048 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5055 set_bit(__I40E_DOWN, &vsi->state);
5058 vsi->rx_itr_setting = pf->rx_itr_default;
5059 vsi->tx_itr_setting = pf->tx_itr_default;
5060 vsi->netdev_registered = false;
5061 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5062 INIT_LIST_HEAD(&vsi->mac_filter_list);
5064 ret = i40e_set_num_rings_in_vsi(vsi);
5068 /* allocate memory for ring pointers */
5069 sz_rings = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5070 vsi->tx_rings = kzalloc(sz_rings, GFP_KERNEL);
5071 if (!vsi->tx_rings) {
5075 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5077 /* allocate memory for q_vector pointers */
5078 sz_vectors = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5079 vsi->q_vectors = kzalloc(sz_vectors, GFP_KERNEL);
5080 if (!vsi->q_vectors) {
5085 /* Setup default MSIX irq handler for VSI */
5086 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5088 pf->vsi[vsi_idx] = vsi;
5093 kfree(vsi->tx_rings);
5095 pf->next_vsi = i - 1;
5098 mutex_unlock(&pf->switch_mutex);
5103 * i40e_vsi_clear - Deallocate the VSI provided
5104 * @vsi: the VSI being un-configured
5106 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5117 mutex_lock(&pf->switch_mutex);
5118 if (!pf->vsi[vsi->idx]) {
5119 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5120 vsi->idx, vsi->idx, vsi, vsi->type);
5124 if (pf->vsi[vsi->idx] != vsi) {
5125 dev_err(&pf->pdev->dev,
5126 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5127 pf->vsi[vsi->idx]->idx,
5129 pf->vsi[vsi->idx]->type,
5130 vsi->idx, vsi, vsi->type);
5134 /* updates the pf for this cleared vsi */
5135 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5136 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5138 /* free the ring and vector containers */
5139 kfree(vsi->q_vectors);
5140 kfree(vsi->tx_rings);
5142 pf->vsi[vsi->idx] = NULL;
5143 if (vsi->idx < pf->next_vsi)
5144 pf->next_vsi = vsi->idx;
5147 mutex_unlock(&pf->switch_mutex);
5155 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5156 * @vsi: the VSI being cleaned
5158 static s32 i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5162 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5163 kfree_rcu(vsi->tx_rings[i], rcu);
5164 vsi->tx_rings[i] = NULL;
5165 vsi->rx_rings[i] = NULL;
5172 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5173 * @vsi: the VSI being configured
5175 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5177 struct i40e_pf *pf = vsi->back;
5180 /* Set basic values in the rings to be used later during open() */
5181 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5182 struct i40e_ring *tx_ring;
5183 struct i40e_ring *rx_ring;
5185 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
5189 tx_ring->queue_index = i;
5190 tx_ring->reg_idx = vsi->base_queue + i;
5191 tx_ring->ring_active = false;
5193 tx_ring->netdev = vsi->netdev;
5194 tx_ring->dev = &pf->pdev->dev;
5195 tx_ring->count = vsi->num_desc;
5197 tx_ring->dcb_tc = 0;
5198 vsi->tx_rings[i] = tx_ring;
5200 rx_ring = &tx_ring[1];
5201 rx_ring->queue_index = i;
5202 rx_ring->reg_idx = vsi->base_queue + i;
5203 rx_ring->ring_active = false;
5205 rx_ring->netdev = vsi->netdev;
5206 rx_ring->dev = &pf->pdev->dev;
5207 rx_ring->count = vsi->num_desc;
5209 rx_ring->dcb_tc = 0;
5210 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
5211 set_ring_16byte_desc_enabled(rx_ring);
5213 clear_ring_16byte_desc_enabled(rx_ring);
5214 vsi->rx_rings[i] = rx_ring;
5220 i40e_vsi_clear_rings(vsi);
5225 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
5226 * @pf: board private structure
5227 * @vectors: the number of MSI-X vectors to request
5229 * Returns the number of vectors reserved, or error
5231 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
5235 pf->num_msix_entries = 0;
5236 while (vectors >= I40E_MIN_MSIX) {
5237 err = pci_enable_msix(pf->pdev, pf->msix_entries, vectors);
5240 pf->num_msix_entries = vectors;
5242 } else if (err < 0) {
5244 dev_info(&pf->pdev->dev,
5245 "MSI-X vector reservation failed: %d\n", err);
5249 /* err > 0 is the hint for retry */
5250 dev_info(&pf->pdev->dev,
5251 "MSI-X vectors wanted %d, retrying with %d\n",
5257 if (vectors > 0 && vectors < I40E_MIN_MSIX) {
5258 dev_info(&pf->pdev->dev,
5259 "Couldn't get enough vectors, only %d available\n",
5268 * i40e_init_msix - Setup the MSIX capability
5269 * @pf: board private structure
5271 * Work with the OS to set up the MSIX vectors needed.
5273 * Returns 0 on success, negative on failure
5275 static int i40e_init_msix(struct i40e_pf *pf)
5277 i40e_status err = 0;
5278 struct i40e_hw *hw = &pf->hw;
5282 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
5285 /* The number of vectors we'll request will be comprised of:
5286 * - Add 1 for "other" cause for Admin Queue events, etc.
5287 * - The number of LAN queue pairs
5288 * already adjusted for the NUMA node
5289 * assumes symmetric Tx/Rx pairing
5290 * - The number of VMDq pairs
5291 * Once we count this up, try the request.
5293 * If we can't get what we want, we'll simplify to nearly nothing
5294 * and try again. If that still fails, we punt.
5296 pf->num_lan_msix = pf->num_lan_qps;
5297 pf->num_vmdq_msix = pf->num_vmdq_qps;
5298 v_budget = 1 + pf->num_lan_msix;
5299 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
5300 if (pf->flags & I40E_FLAG_FDIR_ENABLED)
5303 /* Scale down if necessary, and the rings will share vectors */
5304 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
5306 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
5308 if (!pf->msix_entries)
5311 for (i = 0; i < v_budget; i++)
5312 pf->msix_entries[i].entry = i;
5313 vec = i40e_reserve_msix_vectors(pf, v_budget);
5314 if (vec < I40E_MIN_MSIX) {
5315 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
5316 kfree(pf->msix_entries);
5317 pf->msix_entries = NULL;
5320 } else if (vec == I40E_MIN_MSIX) {
5321 /* Adjust for minimal MSIX use */
5322 dev_info(&pf->pdev->dev, "Features disabled, not enough MSIX vectors\n");
5323 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
5324 pf->num_vmdq_vsis = 0;
5325 pf->num_vmdq_qps = 0;
5326 pf->num_vmdq_msix = 0;
5327 pf->num_lan_qps = 1;
5328 pf->num_lan_msix = 1;
5330 } else if (vec != v_budget) {
5331 /* Scale vector usage down */
5332 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
5333 vec--; /* reserve the misc vector */
5335 /* partition out the remaining vectors */
5338 pf->num_vmdq_vsis = 1;
5339 pf->num_lan_msix = 1;
5342 pf->num_vmdq_vsis = 1;
5343 pf->num_lan_msix = 2;
5346 pf->num_lan_msix = min_t(int, (vec / 2),
5348 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
5349 I40E_DEFAULT_NUM_VMDQ_VSI);
5358 * i40e_alloc_q_vector - Allocate memory for a single interrupt vector
5359 * @vsi: the VSI being configured
5360 * @v_idx: index of the vector in the vsi struct
5362 * We allocate one q_vector. If allocation fails we return -ENOMEM.
5364 static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
5366 struct i40e_q_vector *q_vector;
5368 /* allocate q_vector */
5369 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
5373 q_vector->vsi = vsi;
5374 q_vector->v_idx = v_idx;
5375 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
5377 netif_napi_add(vsi->netdev, &q_vector->napi,
5378 i40e_napi_poll, vsi->work_limit);
5380 q_vector->rx.latency_range = I40E_LOW_LATENCY;
5381 q_vector->tx.latency_range = I40E_LOW_LATENCY;
5383 /* tie q_vector and vsi together */
5384 vsi->q_vectors[v_idx] = q_vector;
5390 * i40e_alloc_q_vectors - Allocate memory for interrupt vectors
5391 * @vsi: the VSI being configured
5393 * We allocate one q_vector per queue interrupt. If allocation fails we
5396 static int i40e_alloc_q_vectors(struct i40e_vsi *vsi)
5398 struct i40e_pf *pf = vsi->back;
5399 int v_idx, num_q_vectors;
5402 /* if not MSIX, give the one vector only to the LAN VSI */
5403 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5404 num_q_vectors = vsi->num_q_vectors;
5405 else if (vsi == pf->vsi[pf->lan_vsi])
5410 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
5411 err = i40e_alloc_q_vector(vsi, v_idx);
5420 i40e_free_q_vector(vsi, v_idx);
5426 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
5427 * @pf: board private structure to initialize
5429 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
5433 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5434 err = i40e_init_msix(pf);
5436 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
5437 I40E_FLAG_MQ_ENABLED |
5438 I40E_FLAG_DCB_ENABLED |
5439 I40E_FLAG_SRIOV_ENABLED |
5440 I40E_FLAG_FDIR_ENABLED |
5441 I40E_FLAG_FDIR_ATR_ENABLED |
5442 I40E_FLAG_VMDQ_ENABLED);
5444 /* rework the queue expectations without MSIX */
5445 i40e_determine_queue_usage(pf);
5449 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
5450 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
5451 err = pci_enable_msi(pf->pdev);
5453 dev_info(&pf->pdev->dev,
5454 "MSI init failed (%d), trying legacy.\n", err);
5455 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
5459 /* track first vector for misc interrupts */
5460 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
5464 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
5465 * @pf: board private structure
5467 * This sets up the handler for MSIX 0, which is used to manage the
5468 * non-queue interrupts, e.g. AdminQ and errors. This is not used
5469 * when in MSI or Legacy interrupt mode.
5471 static int i40e_setup_misc_vector(struct i40e_pf *pf)
5473 struct i40e_hw *hw = &pf->hw;
5476 /* Only request the irq if this is the first time through, and
5477 * not when we're rebuilding after a Reset
5479 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
5480 err = request_irq(pf->msix_entries[0].vector,
5481 i40e_intr, 0, pf->misc_int_name, pf);
5483 dev_info(&pf->pdev->dev,
5484 "request_irq for msix_misc failed: %d\n", err);
5489 i40e_enable_misc_int_causes(hw);
5491 /* associate no queues to the misc vector */
5492 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
5493 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
5497 i40e_irq_dynamic_enable_icr0(pf);
5503 * i40e_config_rss - Prepare for RSS if used
5504 * @pf: board private structure
5506 static int i40e_config_rss(struct i40e_pf *pf)
5508 struct i40e_hw *hw = &pf->hw;
5512 /* Set of random keys generated using kernel random number generator */
5513 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
5514 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
5515 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
5516 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
5518 /* Fill out hash function seed */
5519 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
5520 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
5522 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
5523 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
5524 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
5525 hena |= ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
5526 ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
5527 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) |
5528 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
5529 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
5530 ((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
5531 ((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
5532 ((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) |
5533 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4)|
5534 ((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6);
5535 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
5536 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
5538 /* Populate the LUT with max no. of queues in round robin fashion */
5539 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
5541 /* The assumption is that lan qp count will be the highest
5542 * qp count for any PF VSI that needs RSS.
5543 * If multiple VSIs need RSS support, all the qp counts
5544 * for those VSIs should be a power of 2 for RSS to work.
5545 * If LAN VSI is the only consumer for RSS then this requirement
5548 if (j == pf->rss_size)
5550 /* lut = 4-byte sliding window of 4 lut entries */
5551 lut = (lut << 8) | (j &
5552 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
5553 /* On i = 3, we have 4 entries in lut; write to the register */
5555 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
5563 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
5564 * @pf: board private structure to initialize
5566 * i40e_sw_init initializes the Adapter private data structure.
5567 * Fields are initialized based on PCI device information and
5568 * OS network device settings (MTU size).
5570 static int i40e_sw_init(struct i40e_pf *pf)
5575 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
5576 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
5577 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
5578 if (I40E_DEBUG_USER & debug)
5579 pf->hw.debug_mask = debug;
5580 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
5581 I40E_DEFAULT_MSG_ENABLE);
5584 /* Set default capability flags */
5585 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
5586 I40E_FLAG_MSI_ENABLED |
5587 I40E_FLAG_MSIX_ENABLED |
5588 I40E_FLAG_RX_PS_ENABLED |
5589 I40E_FLAG_MQ_ENABLED |
5590 I40E_FLAG_RX_1BUF_ENABLED;
5592 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
5593 if (pf->hw.func_caps.rss) {
5594 pf->flags |= I40E_FLAG_RSS_ENABLED;
5595 pf->rss_size = min_t(int, pf->rss_size_max,
5596 nr_cpus_node(numa_node_id()));
5601 if (pf->hw.func_caps.dcb)
5602 pf->num_tc_qps = I40E_DEFAULT_QUEUES_PER_TC;
5606 if (pf->hw.func_caps.fd) {
5607 /* FW/NVM is not yet fixed in this regard */
5608 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
5609 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
5610 pf->flags |= I40E_FLAG_FDIR_ATR_ENABLED;
5611 dev_info(&pf->pdev->dev,
5612 "Flow Director ATR mode Enabled\n");
5613 pf->flags |= I40E_FLAG_FDIR_ENABLED;
5614 dev_info(&pf->pdev->dev,
5615 "Flow Director Side Band mode Enabled\n");
5616 pf->fdir_pf_filter_count =
5617 pf->hw.func_caps.fd_filters_guaranteed;
5620 pf->fdir_pf_filter_count = 0;
5623 if (pf->hw.func_caps.vmdq) {
5624 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
5625 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
5626 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
5629 /* MFP mode enabled */
5630 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
5631 pf->flags |= I40E_FLAG_MFP_ENABLED;
5632 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
5635 #ifdef CONFIG_PCI_IOV
5636 if (pf->hw.func_caps.num_vfs) {
5637 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
5638 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
5639 pf->num_req_vfs = min_t(int,
5640 pf->hw.func_caps.num_vfs,
5643 #endif /* CONFIG_PCI_IOV */
5644 pf->eeprom_version = 0xDEAD;
5645 pf->lan_veb = I40E_NO_VEB;
5646 pf->lan_vsi = I40E_NO_VSI;
5648 /* set up queue assignment tracking */
5649 size = sizeof(struct i40e_lump_tracking)
5650 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
5651 pf->qp_pile = kzalloc(size, GFP_KERNEL);
5656 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
5657 pf->qp_pile->search_hint = 0;
5659 /* set up vector assignment tracking */
5660 size = sizeof(struct i40e_lump_tracking)
5661 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
5662 pf->irq_pile = kzalloc(size, GFP_KERNEL);
5663 if (!pf->irq_pile) {
5668 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
5669 pf->irq_pile->search_hint = 0;
5671 mutex_init(&pf->switch_mutex);
5678 * i40e_set_features - set the netdev feature flags
5679 * @netdev: ptr to the netdev being adjusted
5680 * @features: the feature set that the stack is suggesting
5682 static int i40e_set_features(struct net_device *netdev,
5683 netdev_features_t features)
5685 struct i40e_netdev_priv *np = netdev_priv(netdev);
5686 struct i40e_vsi *vsi = np->vsi;
5688 if (features & NETIF_F_HW_VLAN_CTAG_RX)
5689 i40e_vlan_stripping_enable(vsi);
5691 i40e_vlan_stripping_disable(vsi);
5696 static const struct net_device_ops i40e_netdev_ops = {
5697 .ndo_open = i40e_open,
5698 .ndo_stop = i40e_close,
5699 .ndo_start_xmit = i40e_lan_xmit_frame,
5700 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
5701 .ndo_set_rx_mode = i40e_set_rx_mode,
5702 .ndo_validate_addr = eth_validate_addr,
5703 .ndo_set_mac_address = i40e_set_mac,
5704 .ndo_change_mtu = i40e_change_mtu,
5705 .ndo_tx_timeout = i40e_tx_timeout,
5706 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
5707 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
5708 #ifdef CONFIG_NET_POLL_CONTROLLER
5709 .ndo_poll_controller = i40e_netpoll,
5711 .ndo_setup_tc = i40e_setup_tc,
5712 .ndo_set_features = i40e_set_features,
5713 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
5714 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
5715 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
5716 .ndo_get_vf_config = i40e_ndo_get_vf_config,
5720 * i40e_config_netdev - Setup the netdev flags
5721 * @vsi: the VSI being configured
5723 * Returns 0 on success, negative value on failure
5725 static int i40e_config_netdev(struct i40e_vsi *vsi)
5727 struct i40e_pf *pf = vsi->back;
5728 struct i40e_hw *hw = &pf->hw;
5729 struct i40e_netdev_priv *np;
5730 struct net_device *netdev;
5731 u8 mac_addr[ETH_ALEN];
5734 etherdev_size = sizeof(struct i40e_netdev_priv);
5735 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
5739 vsi->netdev = netdev;
5740 np = netdev_priv(netdev);
5743 netdev->hw_enc_features = NETIF_F_IP_CSUM |
5744 NETIF_F_GSO_UDP_TUNNEL |
5748 netdev->features = NETIF_F_SG |
5752 NETIF_F_GSO_UDP_TUNNEL |
5753 NETIF_F_HW_VLAN_CTAG_TX |
5754 NETIF_F_HW_VLAN_CTAG_RX |
5755 NETIF_F_HW_VLAN_CTAG_FILTER |
5763 /* copy netdev features into list of user selectable features */
5764 netdev->hw_features |= netdev->features;
5766 if (vsi->type == I40E_VSI_MAIN) {
5767 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
5768 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
5770 /* relate the VSI_VMDQ name to the VSI_MAIN name */
5771 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
5772 pf->vsi[pf->lan_vsi]->netdev->name);
5773 random_ether_addr(mac_addr);
5774 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
5777 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
5778 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
5779 /* vlan gets same features (except vlan offload)
5780 * after any tweaks for specific VSI types
5782 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
5783 NETIF_F_HW_VLAN_CTAG_RX |
5784 NETIF_F_HW_VLAN_CTAG_FILTER);
5785 netdev->priv_flags |= IFF_UNICAST_FLT;
5786 netdev->priv_flags |= IFF_SUPP_NOFCS;
5787 /* Setup netdev TC information */
5788 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
5790 netdev->netdev_ops = &i40e_netdev_ops;
5791 netdev->watchdog_timeo = 5 * HZ;
5792 i40e_set_ethtool_ops(netdev);
5798 * i40e_vsi_delete - Delete a VSI from the switch
5799 * @vsi: the VSI being removed
5801 * Returns 0 on success, negative value on failure
5803 static void i40e_vsi_delete(struct i40e_vsi *vsi)
5805 /* remove default VSI is not allowed */
5806 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
5809 /* there is no HW VSI for FDIR */
5810 if (vsi->type == I40E_VSI_FDIR)
5813 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
5818 * i40e_add_vsi - Add a VSI to the switch
5819 * @vsi: the VSI being configured
5821 * This initializes a VSI context depending on the VSI type to be added and
5822 * passes it down to the add_vsi aq command.
5824 static int i40e_add_vsi(struct i40e_vsi *vsi)
5827 struct i40e_mac_filter *f, *ftmp;
5828 struct i40e_pf *pf = vsi->back;
5829 struct i40e_hw *hw = &pf->hw;
5830 struct i40e_vsi_context ctxt;
5831 u8 enabled_tc = 0x1; /* TC0 enabled */
5834 memset(&ctxt, 0, sizeof(ctxt));
5835 switch (vsi->type) {
5837 /* The PF's main VSI is already setup as part of the
5838 * device initialization, so we'll not bother with
5839 * the add_vsi call, but we will retrieve the current
5842 ctxt.seid = pf->main_vsi_seid;
5843 ctxt.pf_num = pf->hw.pf_id;
5845 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
5846 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
5848 dev_info(&pf->pdev->dev,
5849 "couldn't get pf vsi config, err %d, aq_err %d\n",
5850 ret, pf->hw.aq.asq_last_status);
5853 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
5854 vsi->info.valid_sections = 0;
5856 vsi->seid = ctxt.seid;
5857 vsi->id = ctxt.vsi_number;
5859 enabled_tc = i40e_pf_get_tc_map(pf);
5861 /* MFP mode setup queue map and update VSI */
5862 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5863 memset(&ctxt, 0, sizeof(ctxt));
5864 ctxt.seid = pf->main_vsi_seid;
5865 ctxt.pf_num = pf->hw.pf_id;
5867 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5868 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5870 dev_info(&pf->pdev->dev,
5871 "update vsi failed, aq_err=%d\n",
5872 pf->hw.aq.asq_last_status);
5876 /* update the local VSI info queue map */
5877 i40e_vsi_update_queue_map(vsi, &ctxt);
5878 vsi->info.valid_sections = 0;
5880 /* Default/Main VSI is only enabled for TC0
5881 * reconfigure it to enable all TCs that are
5882 * available on the port in SFP mode.
5884 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5886 dev_info(&pf->pdev->dev,
5887 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
5889 pf->hw.aq.asq_last_status);
5896 /* no queue mapping or actual HW VSI needed */
5897 vsi->info.valid_sections = 0;
5900 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
5904 case I40E_VSI_VMDQ2:
5905 ctxt.pf_num = hw->pf_id;
5907 ctxt.uplink_seid = vsi->uplink_seid;
5908 ctxt.connection_type = 0x1; /* regular data port */
5909 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5911 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5913 /* This VSI is connected to VEB so the switch_id
5914 * should be set to zero by default.
5916 ctxt.info.switch_id = 0;
5917 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
5918 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5920 /* Setup the VSI tx/rx queue map for TC0 only for now */
5921 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
5924 case I40E_VSI_SRIOV:
5925 ctxt.pf_num = hw->pf_id;
5926 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
5927 ctxt.uplink_seid = vsi->uplink_seid;
5928 ctxt.connection_type = 0x1; /* regular data port */
5929 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5931 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5933 /* This VSI is connected to VEB so the switch_id
5934 * should be set to zero by default.
5936 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5938 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
5939 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
5940 /* Setup the VSI tx/rx queue map for TC0 only for now */
5941 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
5948 if (vsi->type != I40E_VSI_MAIN) {
5949 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5951 dev_info(&vsi->back->pdev->dev,
5952 "add vsi failed, aq_err=%d\n",
5953 vsi->back->hw.aq.asq_last_status);
5957 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
5958 vsi->info.valid_sections = 0;
5959 vsi->seid = ctxt.seid;
5960 vsi->id = ctxt.vsi_number;
5963 /* If macvlan filters already exist, force them to get loaded */
5964 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
5969 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
5970 pf->flags |= I40E_FLAG_FILTER_SYNC;
5973 /* Update VSI BW information */
5974 ret = i40e_vsi_get_bw_info(vsi);
5976 dev_info(&pf->pdev->dev,
5977 "couldn't get vsi bw info, err %d, aq_err %d\n",
5978 ret, pf->hw.aq.asq_last_status);
5979 /* VSI is already added so not tearing that up */
5988 * i40e_vsi_release - Delete a VSI and free its resources
5989 * @vsi: the VSI being removed
5991 * Returns 0 on success or < 0 on error
5993 int i40e_vsi_release(struct i40e_vsi *vsi)
5995 struct i40e_mac_filter *f, *ftmp;
5996 struct i40e_veb *veb = NULL;
6003 /* release of a VEB-owner or last VSI is not allowed */
6004 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6005 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6006 vsi->seid, vsi->uplink_seid);
6009 if (vsi == pf->vsi[pf->lan_vsi] &&
6010 !test_bit(__I40E_DOWN, &pf->state)) {
6011 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6015 uplink_seid = vsi->uplink_seid;
6016 if (vsi->type != I40E_VSI_SRIOV) {
6017 if (vsi->netdev_registered) {
6018 vsi->netdev_registered = false;
6020 /* results in a call to i40e_close() */
6021 unregister_netdev(vsi->netdev);
6022 free_netdev(vsi->netdev);
6026 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6028 i40e_vsi_free_irq(vsi);
6029 i40e_vsi_free_tx_resources(vsi);
6030 i40e_vsi_free_rx_resources(vsi);
6032 i40e_vsi_disable_irq(vsi);
6035 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6036 i40e_del_filter(vsi, f->macaddr, f->vlan,
6037 f->is_vf, f->is_netdev);
6038 i40e_sync_vsi_filters(vsi);
6040 i40e_vsi_delete(vsi);
6041 i40e_vsi_free_q_vectors(vsi);
6042 i40e_vsi_clear_rings(vsi);
6043 i40e_vsi_clear(vsi);
6045 /* If this was the last thing on the VEB, except for the
6046 * controlling VSI, remove the VEB, which puts the controlling
6047 * VSI onto the next level down in the switch.
6049 * Well, okay, there's one more exception here: don't remove
6050 * the orphan VEBs yet. We'll wait for an explicit remove request
6051 * from up the network stack.
6053 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6055 pf->vsi[i]->uplink_seid == uplink_seid &&
6056 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6057 n++; /* count the VSIs */
6060 for (i = 0; i < I40E_MAX_VEB; i++) {
6063 if (pf->veb[i]->uplink_seid == uplink_seid)
6064 n++; /* count the VEBs */
6065 if (pf->veb[i]->seid == uplink_seid)
6068 if (n == 0 && veb && veb->uplink_seid != 0)
6069 i40e_veb_release(veb);
6075 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
6076 * @vsi: ptr to the VSI
6078 * This should only be called after i40e_vsi_mem_alloc() which allocates the
6079 * corresponding SW VSI structure and initializes num_queue_pairs for the
6080 * newly allocated VSI.
6082 * Returns 0 on success or negative on failure
6084 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
6087 struct i40e_pf *pf = vsi->back;
6089 if (vsi->q_vectors[0]) {
6090 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
6095 if (vsi->base_vector) {
6096 dev_info(&pf->pdev->dev,
6097 "VSI %d has non-zero base vector %d\n",
6098 vsi->seid, vsi->base_vector);
6102 ret = i40e_alloc_q_vectors(vsi);
6104 dev_info(&pf->pdev->dev,
6105 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
6106 vsi->num_q_vectors, vsi->seid, ret);
6107 vsi->num_q_vectors = 0;
6108 goto vector_setup_out;
6111 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
6112 vsi->num_q_vectors, vsi->idx);
6113 if (vsi->base_vector < 0) {
6114 dev_info(&pf->pdev->dev,
6115 "failed to get q tracking for VSI %d, err=%d\n",
6116 vsi->seid, vsi->base_vector);
6117 i40e_vsi_free_q_vectors(vsi);
6119 goto vector_setup_out;
6127 * i40e_vsi_setup - Set up a VSI by a given type
6128 * @pf: board private structure
6130 * @uplink_seid: the switch element to link to
6131 * @param1: usage depends upon VSI type. For VF types, indicates VF id
6133 * This allocates the sw VSI structure and its queue resources, then add a VSI
6134 * to the identified VEB.
6136 * Returns pointer to the successfully allocated and configure VSI sw struct on
6137 * success, otherwise returns NULL on failure.
6139 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
6140 u16 uplink_seid, u32 param1)
6142 struct i40e_vsi *vsi = NULL;
6143 struct i40e_veb *veb = NULL;
6147 /* The requested uplink_seid must be either
6148 * - the PF's port seid
6149 * no VEB is needed because this is the PF
6150 * or this is a Flow Director special case VSI
6151 * - seid of an existing VEB
6152 * - seid of a VSI that owns an existing VEB
6153 * - seid of a VSI that doesn't own a VEB
6154 * a new VEB is created and the VSI becomes the owner
6155 * - seid of the PF VSI, which is what creates the first VEB
6156 * this is a special case of the previous
6158 * Find which uplink_seid we were given and create a new VEB if needed
6160 for (i = 0; i < I40E_MAX_VEB; i++) {
6161 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
6167 if (!veb && uplink_seid != pf->mac_seid) {
6169 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6170 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
6176 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
6181 if (vsi->uplink_seid == pf->mac_seid)
6182 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
6183 vsi->tc_config.enabled_tc);
6184 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
6185 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
6186 vsi->tc_config.enabled_tc);
6188 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
6189 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
6193 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
6197 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
6198 uplink_seid = veb->seid;
6201 /* get vsi sw struct */
6202 v_idx = i40e_vsi_mem_alloc(pf, type);
6205 vsi = pf->vsi[v_idx];
6207 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
6209 if (type == I40E_VSI_MAIN)
6210 pf->lan_vsi = v_idx;
6211 else if (type == I40E_VSI_SRIOV)
6212 vsi->vf_id = param1;
6213 /* assign it some queues */
6214 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
6216 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
6220 vsi->base_queue = ret;
6222 /* get a VSI from the hardware */
6223 vsi->uplink_seid = uplink_seid;
6224 ret = i40e_add_vsi(vsi);
6228 switch (vsi->type) {
6229 /* setup the netdev if needed */
6231 case I40E_VSI_VMDQ2:
6232 ret = i40e_config_netdev(vsi);
6235 ret = register_netdev(vsi->netdev);
6238 vsi->netdev_registered = true;
6239 netif_carrier_off(vsi->netdev);
6243 /* set up vectors and rings if needed */
6244 ret = i40e_vsi_setup_vectors(vsi);
6248 ret = i40e_alloc_rings(vsi);
6252 /* map all of the rings to the q_vectors */
6253 i40e_vsi_map_rings_to_vectors(vsi);
6255 i40e_vsi_reset_stats(vsi);
6259 /* no netdev or rings for the other VSI types */
6266 i40e_vsi_free_q_vectors(vsi);
6268 if (vsi->netdev_registered) {
6269 vsi->netdev_registered = false;
6270 unregister_netdev(vsi->netdev);
6271 free_netdev(vsi->netdev);
6275 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
6277 i40e_vsi_clear(vsi);
6283 * i40e_veb_get_bw_info - Query VEB BW information
6284 * @veb: the veb to query
6286 * Query the Tx scheduler BW configuration data for given VEB
6288 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
6290 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
6291 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
6292 struct i40e_pf *pf = veb->pf;
6293 struct i40e_hw *hw = &pf->hw;
6298 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
6301 dev_info(&pf->pdev->dev,
6302 "query veb bw config failed, aq_err=%d\n",
6303 hw->aq.asq_last_status);
6307 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
6310 dev_info(&pf->pdev->dev,
6311 "query veb bw ets config failed, aq_err=%d\n",
6312 hw->aq.asq_last_status);
6316 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
6317 veb->bw_max_quanta = ets_data.tc_bw_max;
6318 veb->is_abs_credits = bw_data.absolute_credits_enable;
6319 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
6320 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
6321 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6322 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
6323 veb->bw_tc_limit_credits[i] =
6324 le16_to_cpu(bw_data.tc_bw_limits[i]);
6325 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
6333 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
6334 * @pf: board private structure
6336 * On error: returns error code (negative)
6337 * On success: returns vsi index in PF (positive)
6339 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
6342 struct i40e_veb *veb;
6345 /* Need to protect the allocation of switch elements at the PF level */
6346 mutex_lock(&pf->switch_mutex);
6348 /* VEB list may be fragmented if VEB creation/destruction has
6349 * been happening. We can afford to do a quick scan to look
6350 * for any free slots in the list.
6352 * find next empty veb slot, looping back around if necessary
6355 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
6357 if (i >= I40E_MAX_VEB) {
6359 goto err_alloc_veb; /* out of VEB slots! */
6362 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
6369 veb->enabled_tc = 1;
6374 mutex_unlock(&pf->switch_mutex);
6379 * i40e_switch_branch_release - Delete a branch of the switch tree
6380 * @branch: where to start deleting
6382 * This uses recursion to find the tips of the branch to be
6383 * removed, deleting until we get back to and can delete this VEB.
6385 static void i40e_switch_branch_release(struct i40e_veb *branch)
6387 struct i40e_pf *pf = branch->pf;
6388 u16 branch_seid = branch->seid;
6389 u16 veb_idx = branch->idx;
6392 /* release any VEBs on this VEB - RECURSION */
6393 for (i = 0; i < I40E_MAX_VEB; i++) {
6396 if (pf->veb[i]->uplink_seid == branch->seid)
6397 i40e_switch_branch_release(pf->veb[i]);
6400 /* Release the VSIs on this VEB, but not the owner VSI.
6402 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
6403 * the VEB itself, so don't use (*branch) after this loop.
6405 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6408 if (pf->vsi[i]->uplink_seid == branch_seid &&
6409 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6410 i40e_vsi_release(pf->vsi[i]);
6414 /* There's one corner case where the VEB might not have been
6415 * removed, so double check it here and remove it if needed.
6416 * This case happens if the veb was created from the debugfs
6417 * commands and no VSIs were added to it.
6419 if (pf->veb[veb_idx])
6420 i40e_veb_release(pf->veb[veb_idx]);
6424 * i40e_veb_clear - remove veb struct
6425 * @veb: the veb to remove
6427 static void i40e_veb_clear(struct i40e_veb *veb)
6433 struct i40e_pf *pf = veb->pf;
6435 mutex_lock(&pf->switch_mutex);
6436 if (pf->veb[veb->idx] == veb)
6437 pf->veb[veb->idx] = NULL;
6438 mutex_unlock(&pf->switch_mutex);
6445 * i40e_veb_release - Delete a VEB and free its resources
6446 * @veb: the VEB being removed
6448 void i40e_veb_release(struct i40e_veb *veb)
6450 struct i40e_vsi *vsi = NULL;
6456 /* find the remaining VSI and check for extras */
6457 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6458 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
6464 dev_info(&pf->pdev->dev,
6465 "can't remove VEB %d with %d VSIs left\n",
6470 /* move the remaining VSI to uplink veb */
6471 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
6472 if (veb->uplink_seid) {
6473 vsi->uplink_seid = veb->uplink_seid;
6474 if (veb->uplink_seid == pf->mac_seid)
6475 vsi->veb_idx = I40E_NO_VEB;
6477 vsi->veb_idx = veb->veb_idx;
6480 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6481 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
6484 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
6485 i40e_veb_clear(veb);
6491 * i40e_add_veb - create the VEB in the switch
6492 * @veb: the VEB to be instantiated
6493 * @vsi: the controlling VSI
6495 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
6497 bool is_default = (vsi->idx == vsi->back->lan_vsi);
6500 /* get a VEB from the hardware */
6501 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
6502 veb->enabled_tc, is_default, &veb->seid, NULL);
6504 dev_info(&veb->pf->pdev->dev,
6505 "couldn't add VEB, err %d, aq_err %d\n",
6506 ret, veb->pf->hw.aq.asq_last_status);
6510 /* get statistics counter */
6511 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
6512 &veb->stats_idx, NULL, NULL, NULL);
6514 dev_info(&veb->pf->pdev->dev,
6515 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
6516 ret, veb->pf->hw.aq.asq_last_status);
6519 ret = i40e_veb_get_bw_info(veb);
6521 dev_info(&veb->pf->pdev->dev,
6522 "couldn't get VEB bw info, err %d, aq_err %d\n",
6523 ret, veb->pf->hw.aq.asq_last_status);
6524 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
6528 vsi->uplink_seid = veb->seid;
6529 vsi->veb_idx = veb->idx;
6530 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
6536 * i40e_veb_setup - Set up a VEB
6537 * @pf: board private structure
6538 * @flags: VEB setup flags
6539 * @uplink_seid: the switch element to link to
6540 * @vsi_seid: the initial VSI seid
6541 * @enabled_tc: Enabled TC bit-map
6543 * This allocates the sw VEB structure and links it into the switch
6544 * It is possible and legal for this to be a duplicate of an already
6545 * existing VEB. It is also possible for both uplink and vsi seids
6546 * to be zero, in order to create a floating VEB.
6548 * Returns pointer to the successfully allocated VEB sw struct on
6549 * success, otherwise returns NULL on failure.
6551 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
6552 u16 uplink_seid, u16 vsi_seid,
6555 struct i40e_veb *veb, *uplink_veb = NULL;
6556 int vsi_idx, veb_idx;
6559 /* if one seid is 0, the other must be 0 to create a floating relay */
6560 if ((uplink_seid == 0 || vsi_seid == 0) &&
6561 (uplink_seid + vsi_seid != 0)) {
6562 dev_info(&pf->pdev->dev,
6563 "one, not both seid's are 0: uplink=%d vsi=%d\n",
6564 uplink_seid, vsi_seid);
6568 /* make sure there is such a vsi and uplink */
6569 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
6570 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
6572 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
6573 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
6578 if (uplink_seid && uplink_seid != pf->mac_seid) {
6579 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6580 if (pf->veb[veb_idx] &&
6581 pf->veb[veb_idx]->seid == uplink_seid) {
6582 uplink_veb = pf->veb[veb_idx];
6587 dev_info(&pf->pdev->dev,
6588 "uplink seid %d not found\n", uplink_seid);
6593 /* get veb sw struct */
6594 veb_idx = i40e_veb_mem_alloc(pf);
6597 veb = pf->veb[veb_idx];
6599 veb->uplink_seid = uplink_seid;
6600 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
6601 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
6603 /* create the VEB in the switch */
6604 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
6611 i40e_veb_clear(veb);
6617 * i40e_setup_pf_switch_element - set pf vars based on switch type
6618 * @pf: board private structure
6619 * @ele: element we are building info from
6620 * @num_reported: total number of elements
6621 * @printconfig: should we print the contents
6623 * helper function to assist in extracting a few useful SEID values.
6625 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
6626 struct i40e_aqc_switch_config_element_resp *ele,
6627 u16 num_reported, bool printconfig)
6629 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
6630 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
6631 u8 element_type = ele->element_type;
6632 u16 seid = le16_to_cpu(ele->seid);
6635 dev_info(&pf->pdev->dev,
6636 "type=%d seid=%d uplink=%d downlink=%d\n",
6637 element_type, seid, uplink_seid, downlink_seid);
6639 switch (element_type) {
6640 case I40E_SWITCH_ELEMENT_TYPE_MAC:
6641 pf->mac_seid = seid;
6643 case I40E_SWITCH_ELEMENT_TYPE_VEB:
6645 if (uplink_seid != pf->mac_seid)
6647 if (pf->lan_veb == I40E_NO_VEB) {
6650 /* find existing or else empty VEB */
6651 for (v = 0; v < I40E_MAX_VEB; v++) {
6652 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
6657 if (pf->lan_veb == I40E_NO_VEB) {
6658 v = i40e_veb_mem_alloc(pf);
6665 pf->veb[pf->lan_veb]->seid = seid;
6666 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
6667 pf->veb[pf->lan_veb]->pf = pf;
6668 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
6670 case I40E_SWITCH_ELEMENT_TYPE_VSI:
6671 if (num_reported != 1)
6673 /* This is immediately after a reset so we can assume this is
6676 pf->mac_seid = uplink_seid;
6677 pf->pf_seid = downlink_seid;
6678 pf->main_vsi_seid = seid;
6680 dev_info(&pf->pdev->dev,
6681 "pf_seid=%d main_vsi_seid=%d\n",
6682 pf->pf_seid, pf->main_vsi_seid);
6684 case I40E_SWITCH_ELEMENT_TYPE_PF:
6685 case I40E_SWITCH_ELEMENT_TYPE_VF:
6686 case I40E_SWITCH_ELEMENT_TYPE_EMP:
6687 case I40E_SWITCH_ELEMENT_TYPE_BMC:
6688 case I40E_SWITCH_ELEMENT_TYPE_PE:
6689 case I40E_SWITCH_ELEMENT_TYPE_PA:
6690 /* ignore these for now */
6693 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
6694 element_type, seid);
6700 * i40e_fetch_switch_configuration - Get switch config from firmware
6701 * @pf: board private structure
6702 * @printconfig: should we print the contents
6704 * Get the current switch configuration from the device and
6705 * extract a few useful SEID values.
6707 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
6709 struct i40e_aqc_get_switch_config_resp *sw_config;
6715 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
6719 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
6721 u16 num_reported, num_total;
6723 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
6727 dev_info(&pf->pdev->dev,
6728 "get switch config failed %d aq_err=%x\n",
6729 ret, pf->hw.aq.asq_last_status);
6734 num_reported = le16_to_cpu(sw_config->header.num_reported);
6735 num_total = le16_to_cpu(sw_config->header.num_total);
6738 dev_info(&pf->pdev->dev,
6739 "header: %d reported %d total\n",
6740 num_reported, num_total);
6743 int sz = sizeof(*sw_config) * num_reported;
6745 kfree(pf->sw_config);
6746 pf->sw_config = kzalloc(sz, GFP_KERNEL);
6748 memcpy(pf->sw_config, sw_config, sz);
6751 for (i = 0; i < num_reported; i++) {
6752 struct i40e_aqc_switch_config_element_resp *ele =
6753 &sw_config->element[i];
6755 i40e_setup_pf_switch_element(pf, ele, num_reported,
6758 } while (next_seid != 0);
6765 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
6766 * @pf: board private structure
6768 * Returns 0 on success, negative value on failure
6770 static int i40e_setup_pf_switch(struct i40e_pf *pf)
6774 /* find out what's out there already */
6775 ret = i40e_fetch_switch_configuration(pf, false);
6777 dev_info(&pf->pdev->dev,
6778 "couldn't fetch switch config, err %d, aq_err %d\n",
6779 ret, pf->hw.aq.asq_last_status);
6782 i40e_pf_reset_stats(pf);
6784 /* fdir VSI must happen first to be sure it gets queue 0, but only
6785 * if there is enough room for the fdir VSI
6787 if (pf->num_lan_qps > 1)
6788 i40e_fdir_setup(pf);
6790 /* first time setup */
6791 if (pf->lan_vsi == I40E_NO_VSI) {
6792 struct i40e_vsi *vsi = NULL;
6795 /* Set up the PF VSI associated with the PF's main VSI
6796 * that is already in the HW switch
6798 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6799 uplink_seid = pf->veb[pf->lan_veb]->seid;
6801 uplink_seid = pf->mac_seid;
6803 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
6805 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
6806 i40e_fdir_teardown(pf);
6809 /* accommodate kcompat by copying the main VSI queue count
6810 * into the pf, since this newer code pushes the pf queue
6811 * info down a level into a VSI
6813 pf->num_rx_queues = vsi->alloc_queue_pairs;
6814 pf->num_tx_queues = vsi->alloc_queue_pairs;
6816 /* force a reset of TC and queue layout configurations */
6817 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
6818 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
6819 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
6820 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
6822 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
6824 /* Setup static PF queue filter control settings */
6825 ret = i40e_setup_pf_filter_control(pf);
6827 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
6829 /* Failure here should not stop continuing other steps */
6832 /* enable RSS in the HW, even for only one queue, as the stack can use
6835 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
6836 i40e_config_rss(pf);
6838 /* fill in link information and enable LSE reporting */
6839 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
6840 i40e_link_event(pf);
6842 /* Initialize user-specifics link properties */
6843 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
6844 I40E_AQ_AN_COMPLETED) ? true : false);
6845 pf->hw.fc.requested_mode = I40E_FC_DEFAULT;
6846 if (pf->hw.phy.link_info.an_info &
6847 (I40E_AQ_LINK_PAUSE_TX | I40E_AQ_LINK_PAUSE_RX))
6848 pf->hw.fc.current_mode = I40E_FC_FULL;
6849 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
6850 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
6851 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
6852 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
6854 pf->hw.fc.current_mode = I40E_FC_DEFAULT;
6860 * i40e_set_rss_size - helper to set rss_size
6861 * @pf: board private structure
6862 * @queues_left: how many queues
6864 static u16 i40e_set_rss_size(struct i40e_pf *pf, int queues_left)
6868 num_tc0 = min_t(int, queues_left, pf->rss_size_max);
6869 num_tc0 = min_t(int, num_tc0, nr_cpus_node(numa_node_id()));
6870 num_tc0 = rounddown_pow_of_two(num_tc0);
6876 * i40e_determine_queue_usage - Work out queue distribution
6877 * @pf: board private structure
6879 static void i40e_determine_queue_usage(struct i40e_pf *pf)
6884 pf->num_lan_qps = 0;
6885 pf->num_tc_qps = rounddown_pow_of_two(pf->num_tc_qps);
6886 accum_tc_size = (I40E_MAX_TRAFFIC_CLASS - 1) * pf->num_tc_qps;
6888 /* Find the max queues to be put into basic use. We'll always be
6889 * using TC0, whether or not DCB is running, and TC0 will get the
6892 queues_left = pf->hw.func_caps.num_tx_qp;
6894 if (!((pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6895 (pf->flags & I40E_FLAG_MQ_ENABLED)) ||
6896 !(pf->flags & (I40E_FLAG_RSS_ENABLED |
6897 I40E_FLAG_FDIR_ENABLED | I40E_FLAG_DCB_ENABLED)) ||
6898 (queues_left == 1)) {
6900 /* one qp for PF, no queues for anything else */
6902 pf->rss_size = pf->num_lan_qps = 1;
6904 /* make sure all the fancies are disabled */
6905 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
6906 I40E_FLAG_MQ_ENABLED |
6907 I40E_FLAG_FDIR_ENABLED |
6908 I40E_FLAG_FDIR_ATR_ENABLED |
6909 I40E_FLAG_DCB_ENABLED |
6910 I40E_FLAG_SRIOV_ENABLED |
6911 I40E_FLAG_VMDQ_ENABLED);
6913 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
6914 !(pf->flags & I40E_FLAG_FDIR_ENABLED) &&
6915 !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
6917 pf->rss_size = i40e_set_rss_size(pf, queues_left);
6919 queues_left -= pf->rss_size;
6920 pf->num_lan_qps = pf->rss_size;
6922 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
6923 !(pf->flags & I40E_FLAG_FDIR_ENABLED) &&
6924 (pf->flags & I40E_FLAG_DCB_ENABLED)) {
6926 /* save num_tc_qps queues for TCs 1 thru 7 and the rest
6927 * are set up for RSS in TC0
6929 queues_left -= accum_tc_size;
6931 pf->rss_size = i40e_set_rss_size(pf, queues_left);
6933 queues_left -= pf->rss_size;
6934 if (queues_left < 0) {
6935 dev_info(&pf->pdev->dev, "not enough queues for DCB\n");
6939 pf->num_lan_qps = pf->rss_size + accum_tc_size;
6941 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
6942 (pf->flags & I40E_FLAG_FDIR_ENABLED) &&
6943 !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
6945 queues_left -= 1; /* save 1 queue for FD */
6947 pf->rss_size = i40e_set_rss_size(pf, queues_left);
6949 queues_left -= pf->rss_size;
6950 if (queues_left < 0) {
6951 dev_info(&pf->pdev->dev, "not enough queues for Flow Director\n");
6955 pf->num_lan_qps = pf->rss_size;
6957 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
6958 (pf->flags & I40E_FLAG_FDIR_ENABLED) &&
6959 (pf->flags & I40E_FLAG_DCB_ENABLED)) {
6961 /* save 1 queue for TCs 1 thru 7,
6962 * 1 queue for flow director,
6963 * and the rest are set up for RSS in TC0
6966 queues_left -= accum_tc_size;
6968 pf->rss_size = i40e_set_rss_size(pf, queues_left);
6969 queues_left -= pf->rss_size;
6970 if (queues_left < 0) {
6971 dev_info(&pf->pdev->dev, "not enough queues for DCB and Flow Director\n");
6975 pf->num_lan_qps = pf->rss_size + accum_tc_size;
6978 dev_info(&pf->pdev->dev,
6979 "Invalid configuration, flags=0x%08llx\n", pf->flags);
6983 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
6984 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
6985 pf->num_req_vfs = min_t(int, pf->num_req_vfs, (queues_left /
6987 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
6990 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6991 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
6992 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
6993 (queues_left / pf->num_vmdq_qps));
6994 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7001 * i40e_setup_pf_filter_control - Setup PF static filter control
7002 * @pf: PF to be setup
7004 * i40e_setup_pf_filter_control sets up a pf's initial filter control
7005 * settings. If PE/FCoE are enabled then it will also set the per PF
7006 * based filter sizes required for them. It also enables Flow director,
7007 * ethertype and macvlan type filter settings for the pf.
7009 * Returns 0 on success, negative on failure
7011 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
7013 struct i40e_filter_control_settings *settings = &pf->filter_settings;
7015 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
7017 /* Flow Director is enabled */
7018 if (pf->flags & (I40E_FLAG_FDIR_ENABLED | I40E_FLAG_FDIR_ATR_ENABLED))
7019 settings->enable_fdir = true;
7021 /* Ethtype and MACVLAN filters enabled for PF */
7022 settings->enable_ethtype = true;
7023 settings->enable_macvlan = true;
7025 if (i40e_set_filter_control(&pf->hw, settings))
7032 * i40e_probe - Device initialization routine
7033 * @pdev: PCI device information struct
7034 * @ent: entry in i40e_pci_tbl
7036 * i40e_probe initializes a pf identified by a pci_dev structure.
7037 * The OS initialization, configuring of the pf private structure,
7038 * and a hardware reset occur.
7040 * Returns 0 on success, negative on failure
7042 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7044 struct i40e_driver_version dv;
7050 err = pci_enable_device_mem(pdev);
7054 /* set up for high or low dma */
7055 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7056 /* coherent mask for the same size will always succeed if
7059 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
7060 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
7061 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7063 dev_err(&pdev->dev, "DMA configuration failed: %d\n", err);
7068 /* set up pci connections */
7069 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7070 IORESOURCE_MEM), i40e_driver_name);
7072 dev_info(&pdev->dev,
7073 "pci_request_selected_regions failed %d\n", err);
7077 pci_enable_pcie_error_reporting(pdev);
7078 pci_set_master(pdev);
7080 /* Now that we have a PCI connection, we need to do the
7081 * low level device setup. This is primarily setting up
7082 * the Admin Queue structures and then querying for the
7083 * device's current profile information.
7085 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
7092 set_bit(__I40E_DOWN, &pf->state);
7096 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7097 pci_resource_len(pdev, 0));
7100 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
7101 (unsigned int)pci_resource_start(pdev, 0),
7102 (unsigned int)pci_resource_len(pdev, 0), err);
7105 hw->vendor_id = pdev->vendor;
7106 hw->device_id = pdev->device;
7107 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
7108 hw->subsystem_vendor_id = pdev->subsystem_vendor;
7109 hw->subsystem_device_id = pdev->subsystem_device;
7110 hw->bus.device = PCI_SLOT(pdev->devfn);
7111 hw->bus.func = PCI_FUNC(pdev->devfn);
7113 /* Reset here to make sure all is clean and to define PF 'n' */
7114 err = i40e_pf_reset(hw);
7116 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
7121 hw->aq.num_arq_entries = I40E_AQ_LEN;
7122 hw->aq.num_asq_entries = I40E_AQ_LEN;
7123 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7124 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7125 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
7126 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
7128 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
7130 err = i40e_init_shared_code(hw);
7132 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
7136 err = i40e_init_adminq(hw);
7137 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
7139 dev_info(&pdev->dev,
7140 "init_adminq failed: %d expecting API %02x.%02x\n",
7142 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
7146 err = i40e_get_capabilities(pf);
7148 goto err_adminq_setup;
7150 err = i40e_sw_init(pf);
7152 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
7156 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7157 hw->func_caps.num_rx_qp,
7158 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7160 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
7161 goto err_init_lan_hmc;
7164 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7166 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
7168 goto err_configure_lan_hmc;
7171 i40e_get_mac_addr(hw, hw->mac.addr);
7172 if (i40e_validate_mac_addr(hw->mac.addr)) {
7173 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
7177 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
7178 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
7180 pci_set_drvdata(pdev, pf);
7181 pci_save_state(pdev);
7183 /* set up periodic task facility */
7184 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
7185 pf->service_timer_period = HZ;
7187 INIT_WORK(&pf->service_task, i40e_service_task);
7188 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7189 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
7190 pf->link_check_timeout = jiffies;
7192 /* set up the main switch operations */
7193 i40e_determine_queue_usage(pf);
7194 i40e_init_interrupt_scheme(pf);
7196 /* Set up the *vsi struct based on the number of VSIs in the HW,
7197 * and set up our local tracking of the MAIN PF vsi.
7199 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
7200 pf->vsi = kzalloc(len, GFP_KERNEL);
7202 goto err_switch_setup;
7204 err = i40e_setup_pf_switch(pf);
7206 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
7210 /* The main driver is (mostly) up and happy. We need to set this state
7211 * before setting up the misc vector or we get a race and the vector
7212 * ends up disabled forever.
7214 clear_bit(__I40E_DOWN, &pf->state);
7216 /* In case of MSIX we are going to setup the misc vector right here
7217 * to handle admin queue events etc. In case of legacy and MSI
7218 * the misc functionality and queue processing is combined in
7219 * the same vector and that gets setup at open.
7221 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7222 err = i40e_setup_misc_vector(pf);
7224 dev_info(&pdev->dev,
7225 "setup of misc vector failed: %d\n", err);
7230 /* prep for VF support */
7231 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7232 (pf->flags & I40E_FLAG_MSIX_ENABLED)) {
7235 /* disable link interrupts for VFs */
7236 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
7237 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
7238 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
7242 i40e_dbg_pf_init(pf);
7244 /* tell the firmware that we're starting */
7245 dv.major_version = DRV_VERSION_MAJOR;
7246 dv.minor_version = DRV_VERSION_MINOR;
7247 dv.build_version = DRV_VERSION_BUILD;
7248 dv.subbuild_version = 0;
7249 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
7251 /* since everything's happy, start the service_task timer */
7252 mod_timer(&pf->service_timer,
7253 round_jiffies(jiffies + pf->service_timer_period));
7257 /* Unwind what we've done if something failed in the setup */
7259 set_bit(__I40E_DOWN, &pf->state);
7261 i40e_clear_interrupt_scheme(pf);
7263 del_timer_sync(&pf->service_timer);
7265 err_configure_lan_hmc:
7266 (void)i40e_shutdown_lan_hmc(hw);
7269 kfree(pf->irq_pile);
7272 (void)i40e_shutdown_adminq(hw);
7274 iounmap(hw->hw_addr);
7278 pci_disable_pcie_error_reporting(pdev);
7279 pci_release_selected_regions(pdev,
7280 pci_select_bars(pdev, IORESOURCE_MEM));
7283 pci_disable_device(pdev);
7288 * i40e_remove - Device removal routine
7289 * @pdev: PCI device information struct
7291 * i40e_remove is called by the PCI subsystem to alert the driver
7292 * that is should release a PCI device. This could be caused by a
7293 * Hot-Plug event, or because the driver is going to be removed from
7296 static void i40e_remove(struct pci_dev *pdev)
7298 struct i40e_pf *pf = pci_get_drvdata(pdev);
7299 i40e_status ret_code;
7303 i40e_dbg_pf_exit(pf);
7305 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7307 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
7310 /* no more scheduling of any task */
7311 set_bit(__I40E_DOWN, &pf->state);
7312 del_timer_sync(&pf->service_timer);
7313 cancel_work_sync(&pf->service_task);
7315 i40e_fdir_teardown(pf);
7317 /* If there is a switch structure or any orphans, remove them.
7318 * This will leave only the PF's VSI remaining.
7320 for (i = 0; i < I40E_MAX_VEB; i++) {
7324 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
7325 pf->veb[i]->uplink_seid == 0)
7326 i40e_switch_branch_release(pf->veb[i]);
7329 /* Now we can shutdown the PF's VSI, just before we kill
7332 if (pf->vsi[pf->lan_vsi])
7333 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
7335 i40e_stop_misc_vector(pf);
7336 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7337 synchronize_irq(pf->msix_entries[0].vector);
7338 free_irq(pf->msix_entries[0].vector, pf);
7341 /* shutdown and destroy the HMC */
7342 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
7344 dev_warn(&pdev->dev,
7345 "Failed to destroy the HMC resources: %d\n", ret_code);
7347 /* shutdown the adminq */
7348 i40e_aq_queue_shutdown(&pf->hw, true);
7349 ret_code = i40e_shutdown_adminq(&pf->hw);
7351 dev_warn(&pdev->dev,
7352 "Failed to destroy the Admin Queue resources: %d\n",
7355 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
7356 i40e_clear_interrupt_scheme(pf);
7357 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7359 i40e_vsi_clear_rings(pf->vsi[i]);
7360 i40e_vsi_clear(pf->vsi[i]);
7365 for (i = 0; i < I40E_MAX_VEB; i++) {
7371 kfree(pf->irq_pile);
7372 kfree(pf->sw_config);
7375 /* force a PF reset to clean anything leftover */
7376 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
7377 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
7378 i40e_flush(&pf->hw);
7380 iounmap(pf->hw.hw_addr);
7382 pci_release_selected_regions(pdev,
7383 pci_select_bars(pdev, IORESOURCE_MEM));
7385 pci_disable_pcie_error_reporting(pdev);
7386 pci_disable_device(pdev);
7390 * i40e_pci_error_detected - warning that something funky happened in PCI land
7391 * @pdev: PCI device information struct
7393 * Called to warn that something happened and the error handling steps
7394 * are in progress. Allows the driver to quiesce things, be ready for
7397 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
7398 enum pci_channel_state error)
7400 struct i40e_pf *pf = pci_get_drvdata(pdev);
7402 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
7404 /* shutdown all operations */
7405 i40e_pf_quiesce_all_vsi(pf);
7407 /* Request a slot reset */
7408 return PCI_ERS_RESULT_NEED_RESET;
7412 * i40e_pci_error_slot_reset - a PCI slot reset just happened
7413 * @pdev: PCI device information struct
7415 * Called to find if the driver can work with the device now that
7416 * the pci slot has been reset. If a basic connection seems good
7417 * (registers are readable and have sane content) then return a
7418 * happy little PCI_ERS_RESULT_xxx.
7420 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
7422 struct i40e_pf *pf = pci_get_drvdata(pdev);
7423 pci_ers_result_t result;
7427 dev_info(&pdev->dev, "%s\n", __func__);
7428 if (pci_enable_device_mem(pdev)) {
7429 dev_info(&pdev->dev,
7430 "Cannot re-enable PCI device after reset.\n");
7431 result = PCI_ERS_RESULT_DISCONNECT;
7433 pci_set_master(pdev);
7434 pci_restore_state(pdev);
7435 pci_save_state(pdev);
7436 pci_wake_from_d3(pdev, false);
7438 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7440 result = PCI_ERS_RESULT_RECOVERED;
7442 result = PCI_ERS_RESULT_DISCONNECT;
7445 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7447 dev_info(&pdev->dev,
7448 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7450 /* non-fatal, continue */
7457 * i40e_pci_error_resume - restart operations after PCI error recovery
7458 * @pdev: PCI device information struct
7460 * Called to allow the driver to bring things back up after PCI error
7461 * and/or reset recovery has finished.
7463 static void i40e_pci_error_resume(struct pci_dev *pdev)
7465 struct i40e_pf *pf = pci_get_drvdata(pdev);
7467 dev_info(&pdev->dev, "%s\n", __func__);
7468 i40e_handle_reset_warning(pf);
7471 static const struct pci_error_handlers i40e_err_handler = {
7472 .error_detected = i40e_pci_error_detected,
7473 .slot_reset = i40e_pci_error_slot_reset,
7474 .resume = i40e_pci_error_resume,
7477 static struct pci_driver i40e_driver = {
7478 .name = i40e_driver_name,
7479 .id_table = i40e_pci_tbl,
7480 .probe = i40e_probe,
7481 .remove = i40e_remove,
7482 .err_handler = &i40e_err_handler,
7483 .sriov_configure = i40e_pci_sriov_configure,
7487 * i40e_init_module - Driver registration routine
7489 * i40e_init_module is the first routine called when the driver is
7490 * loaded. All it does is register with the PCI subsystem.
7492 static int __init i40e_init_module(void)
7494 pr_info("%s: %s - version %s\n", i40e_driver_name,
7495 i40e_driver_string, i40e_driver_version_str);
7496 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
7498 return pci_register_driver(&i40e_driver);
7500 module_init(i40e_init_module);
7503 * i40e_exit_module - Driver exit cleanup routine
7505 * i40e_exit_module is called just before the driver is removed
7508 static void __exit i40e_exit_module(void)
7510 pci_unregister_driver(&i40e_driver);
7513 module_exit(i40e_exit_module);