drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic.h"
   9 #include "qlcnic_hw.h"
  10
  11 struct crb_addr_pair {
  12         u32 addr;
  13         u32 data;
  14 };
  15
  16 #define QLCNIC_MAX_CRB_XFORM 60
  17 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  18
  19 #define crb_addr_transform(name) \
  20         (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  21         QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  22
  23 #define QLCNIC_ADDR_ERROR (0xffffffff)
  24
  25 static int
  26 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  27
  28 static void crb_addr_transform_setup(void)
  29 {
  30         crb_addr_transform(XDMA);
  31         crb_addr_transform(TIMR);
  32         crb_addr_transform(SRE);
  33         crb_addr_transform(SQN3);
  34         crb_addr_transform(SQN2);
  35         crb_addr_transform(SQN1);
  36         crb_addr_transform(SQN0);
  37         crb_addr_transform(SQS3);
  38         crb_addr_transform(SQS2);
  39         crb_addr_transform(SQS1);
  40         crb_addr_transform(SQS0);
  41         crb_addr_transform(RPMX7);
  42         crb_addr_transform(RPMX6);
  43         crb_addr_transform(RPMX5);
  44         crb_addr_transform(RPMX4);
  45         crb_addr_transform(RPMX3);
  46         crb_addr_transform(RPMX2);
  47         crb_addr_transform(RPMX1);
  48         crb_addr_transform(RPMX0);
  49         crb_addr_transform(ROMUSB);
  50         crb_addr_transform(SN);
  51         crb_addr_transform(QMN);
  52         crb_addr_transform(QMS);
  53         crb_addr_transform(PGNI);
  54         crb_addr_transform(PGND);
  55         crb_addr_transform(PGN3);
  56         crb_addr_transform(PGN2);
  57         crb_addr_transform(PGN1);
  58         crb_addr_transform(PGN0);
  59         crb_addr_transform(PGSI);
  60         crb_addr_transform(PGSD);
  61         crb_addr_transform(PGS3);
  62         crb_addr_transform(PGS2);
  63         crb_addr_transform(PGS1);
  64         crb_addr_transform(PGS0);
  65         crb_addr_transform(PS);
  66         crb_addr_transform(PH);
  67         crb_addr_transform(NIU);
  68         crb_addr_transform(I2Q);
  69         crb_addr_transform(EG);
  70         crb_addr_transform(MN);
  71         crb_addr_transform(MS);
  72         crb_addr_transform(CAS2);
  73         crb_addr_transform(CAS1);
  74         crb_addr_transform(CAS0);
  75         crb_addr_transform(CAM);
  76         crb_addr_transform(C2C1);
  77         crb_addr_transform(C2C0);
  78         crb_addr_transform(SMB);
  79         crb_addr_transform(OCM0);
  80         crb_addr_transform(I2C0);
  81 }
  82
  83 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  84 {
  85         struct qlcnic_recv_context *recv_ctx;
  86         struct qlcnic_host_rds_ring *rds_ring;
  87         struct qlcnic_rx_buffer *rx_buf;
  88         int i, ring;
  89
  90         recv_ctx = adapter->recv_ctx;
  91         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  92                 rds_ring = &recv_ctx->rds_rings[ring];
  93                 for (i = 0; i < rds_ring->num_desc; ++i) {
  94                         rx_buf = &(rds_ring->rx_buf_arr[i]);
  95                         if (rx_buf->skb == NULL)
  96                                 continue;
  97
  98                         pci_unmap_single(adapter->pdev,
  99                                         rx_buf->dma,
 100                                         rds_ring->dma_size,
 101                                         PCI_DMA_FROMDEVICE);
 102
 103                         dev_kfree_skb_any(rx_buf->skb);
 104                 }
 105         }
 106 }
 107
 108 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
 109 {
 110         struct qlcnic_recv_context *recv_ctx;
 111         struct qlcnic_host_rds_ring *rds_ring;
 112         struct qlcnic_rx_buffer *rx_buf;
 113         int i, ring;
 114
 115         recv_ctx = adapter->recv_ctx;
 116         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 117                 rds_ring = &recv_ctx->rds_rings[ring];
 118
 119                 INIT_LIST_HEAD(&rds_ring->free_list);
 120
 121                 rx_buf = rds_ring->rx_buf_arr;
 122                 for (i = 0; i < rds_ring->num_desc; i++) {
 123                         list_add_tail(&rx_buf->list,
 124                                         &rds_ring->free_list);
 125                         rx_buf++;
 126                 }
 127         }
 128 }
 129
 130 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
 131 {
 132         struct qlcnic_cmd_buffer *cmd_buf;
 133         struct qlcnic_skb_frag *buffrag;
 134         int i, j;
 135         struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
 136
 137         cmd_buf = tx_ring->cmd_buf_arr;
 138         for (i = 0; i < tx_ring->num_desc; i++) {
 139                 buffrag = cmd_buf->frag_array;
 140                 if (buffrag->dma) {
 141                         pci_unmap_single(adapter->pdev, buffrag->dma,
 142                                          buffrag->length, PCI_DMA_TODEVICE);
 143                         buffrag->dma = 0ULL;
 144                 }
 145                 for (j = 1; j < cmd_buf->frag_count; j++) {
 146                         buffrag++;
 147                         if (buffrag->dma) {
 148                                 pci_unmap_page(adapter->pdev, buffrag->dma,
 149                                                buffrag->length,
 150                                                PCI_DMA_TODEVICE);
 151                                 buffrag->dma = 0ULL;
 152                         }
 153                 }
 154                 if (cmd_buf->skb) {
 155                         dev_kfree_skb_any(cmd_buf->skb);
 156                         cmd_buf->skb = NULL;
 157                 }
 158                 cmd_buf++;
 159         }
 160 }
 161
 162 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
 163 {
 164         struct qlcnic_recv_context *recv_ctx;
 165         struct qlcnic_host_rds_ring *rds_ring;
 166         int ring;
 167
 168         recv_ctx = adapter->recv_ctx;
 169
 170         if (recv_ctx->rds_rings == NULL)
 171                 return;
 172
 173         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 174                 rds_ring = &recv_ctx->rds_rings[ring];
 175                 vfree(rds_ring->rx_buf_arr);
 176                 rds_ring->rx_buf_arr = NULL;
 177         }
 178         kfree(recv_ctx->rds_rings);
 179 }
 180
 181 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
 182 {
 183         struct qlcnic_recv_context *recv_ctx;
 184         struct qlcnic_host_rds_ring *rds_ring;
 185         struct qlcnic_host_sds_ring *sds_ring;
 186         struct qlcnic_rx_buffer *rx_buf;
 187         int ring, i;
 188
 189         recv_ctx = adapter->recv_ctx;
 190
 191         rds_ring = kcalloc(adapter->max_rds_rings,
 192                            sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
 193         if (rds_ring == NULL)
 194                 goto err_out;
 195
 196         recv_ctx->rds_rings = rds_ring;
 197
 198         for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 199                 rds_ring = &recv_ctx->rds_rings[ring];
 200                 switch (ring) {
 201                 case RCV_RING_NORMAL:
 202                         rds_ring->num_desc = adapter->num_rxd;
 203                         rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
 204                         rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
 205                         break;
 206
 207                 case RCV_RING_JUMBO:
 208                         rds_ring->num_desc = adapter->num_jumbo_rxd;
 209                         rds_ring->dma_size =
 210                                 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
 211
 212                         if (adapter->ahw->capabilities &
 213                             QLCNIC_FW_CAPABILITY_HW_LRO)
 214                                 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
 215
 216                         rds_ring->skb_size =
 217                                 rds_ring->dma_size + NET_IP_ALIGN;
 218                         break;
 219                 }
 220                 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
 221                 if (rds_ring->rx_buf_arr == NULL)
 222                         goto err_out;
 223
 224                 INIT_LIST_HEAD(&rds_ring->free_list);
 225                 /*
 226                  * Now go through all of them, set reference handles
 227                  * and put them in the queues.
 228                  */
 229                 rx_buf = rds_ring->rx_buf_arr;
 230                 for (i = 0; i < rds_ring->num_desc; i++) {
 231                         list_add_tail(&rx_buf->list,
 232                                         &rds_ring->free_list);
 233                         rx_buf->ref_handle = i;
 234                         rx_buf++;
 235                 }
 236                 spin_lock_init(&rds_ring->lock);
 237         }
 238
 239         for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 240                 sds_ring = &recv_ctx->sds_rings[ring];
 241                 sds_ring->irq = adapter->msix_entries[ring].vector;
 242                 sds_ring->adapter = adapter;
 243                 sds_ring->num_desc = adapter->num_rxd;
 244
 245                 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
 246                         INIT_LIST_HEAD(&sds_ring->free_list[i]);
 247         }
 248
 249         return 0;
 250
 251 err_out:
 252         qlcnic_free_sw_resources(adapter);
 253         return -ENOMEM;
 254 }
 255
 256 /*
 257  * Utility to translate from internal Phantom CRB address
 258  * to external PCI CRB address.
 259  */
 260 static u32 qlcnic_decode_crb_addr(u32 addr)
 261 {
 262         int i;
 263         u32 base_addr, offset, pci_base;
 264
 265         crb_addr_transform_setup();
 266
 267         pci_base = QLCNIC_ADDR_ERROR;
 268         base_addr = addr & 0xfff00000;
 269         offset = addr & 0x000fffff;
 270
 271         for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
 272                 if (crb_addr_xform[i] == base_addr) {
 273                         pci_base = i << 20;
 274                         break;
 275                 }
 276         }
 277         if (pci_base == QLCNIC_ADDR_ERROR)
 278                 return pci_base;
 279         else
 280                 return pci_base + offset;
 281 }
 282
 283 #define QLCNIC_MAX_ROM_WAIT_USEC        100
 284
 285 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
 286 {
 287         long timeout = 0;
 288         long done = 0;
 289         int err = 0;
 290
 291         cond_resched();
 292         while (done == 0) {
 293                 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
 294                 done &= 2;
 295                 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
 296                         dev_err(&adapter->pdev->dev,
 297                                 "Timeout reached  waiting for rom done");
 298                         return -EIO;
 299                 }
 300                 udelay(1);
 301         }
 302         return 0;
 303 }
 304
 305 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
 306                             u32 addr, u32 *valp)
 307 {
 308         int err = 0;
 309
 310         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
 311         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
 312         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
 313         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
 314         if (qlcnic_wait_rom_done(adapter)) {
 315                 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
 316                 return -EIO;
 317         }
 318         /* reset abyte_cnt and dummy_byte_cnt */
 319         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
 320         udelay(10);
 321         QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
 322
 323         *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
 324         if (err == -EIO)
 325                 return err;
 326         return 0;
 327 }
 328
 329 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
 330                                   u8 *bytes, size_t size)
 331 {
 332         int addridx;
 333         int ret = 0;
 334
 335         for (addridx = addr; addridx < (addr + size); addridx += 4) {
 336                 int v;
 337                 ret = do_rom_fast_read(adapter, addridx, &v);
 338                 if (ret != 0)
 339                         break;
 340                 *(__le32 *)bytes = cpu_to_le32(v);
 341                 bytes += 4;
 342         }
 343
 344         return ret;
 345 }
 346
 347 int
 348 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
 349                                 u8 *bytes, size_t size)
 350 {
 351         int ret;
 352
 353         ret = qlcnic_rom_lock(adapter);
 354         if (ret < 0)
 355                 return ret;
 356
 357         ret = do_rom_fast_read_words(adapter, addr, bytes, size);
 358
 359         qlcnic_rom_unlock(adapter);
 360         return ret;
 361 }
 362
 363 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
 364 {
 365         int ret;
 366
 367         if (qlcnic_rom_lock(adapter) != 0)
 368                 return -EIO;
 369
 370         ret = do_rom_fast_read(adapter, addr, valp);
 371         qlcnic_rom_unlock(adapter);
 372         return ret;
 373 }
 374
 375 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
 376 {
 377         int addr, err = 0;
 378         int i, n, init_delay;
 379         struct crb_addr_pair *buf;
 380         unsigned offset;
 381         u32 off, val;
 382         struct pci_dev *pdev = adapter->pdev;
 383
 384         QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
 385         QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
 386
 387         /* Halt all the indiviual PEGs and other blocks */
 388         /* disable all I2Q */
 389         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
 390         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
 391         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
 392         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
 393         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
 394         QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
 395
 396         /* disable all niu interrupts */
 397         QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
 398         /* disable xge rx/tx */
 399         QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
 400         /* disable xg1 rx/tx */
 401         QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
 402         /* disable sideband mac */
 403         QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
 404         /* disable ap0 mac */
 405         QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
 406         /* disable ap1 mac */
 407         QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
 408
 409         /* halt sre */
 410         val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
 411         if (err == -EIO)
 412                 return err;
 413         QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
 414
 415         /* halt epg */
 416         QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
 417
 418         /* halt timers */
 419         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
 420         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
 421         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
 422         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
 423         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
 424         QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
 425         /* halt pegs */
 426         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
 427         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
 428         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
 429         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
 430         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
 431         msleep(20);
 432
 433         qlcnic_rom_unlock(adapter);
 434         /* big hammer don't reset CAM block on reset */
 435         QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
 436
 437         /* Init HW CRB block */
 438         if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
 439                         qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
 440                 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
 441                 return -EIO;
 442         }
 443         offset = n & 0xffffU;
 444         n = (n >> 16) & 0xffffU;
 445
 446         if (n >= 1024) {
 447                 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
 448                 return -EIO;
 449         }
 450
 451         buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
 452         if (buf == NULL)
 453                 return -ENOMEM;
 454
 455         for (i = 0; i < n; i++) {
 456                 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
 457                 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
 458                         kfree(buf);
 459                         return -EIO;
 460                 }
 461
 462                 buf[i].addr = addr;
 463                 buf[i].data = val;
 464         }
 465
 466         for (i = 0; i < n; i++) {
 467
 468                 off = qlcnic_decode_crb_addr(buf[i].addr);
 469                 if (off == QLCNIC_ADDR_ERROR) {
 470                         dev_err(&pdev->dev, "CRB init value out of range %x\n",
 471                                         buf[i].addr);
 472                         continue;
 473                 }
 474                 off += QLCNIC_PCI_CRBSPACE;
 475
 476                 if (off & 1)
 477                         continue;
 478
 479                 /* skipping cold reboot MAGIC */
 480                 if (off == QLCNIC_CAM_RAM(0x1fc))
 481                         continue;
 482                 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
 483                         continue;
 484                 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
 485                         continue;
 486                 if (off == (ROMUSB_GLB + 0xa8))
 487                         continue;
 488                 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
 489                         continue;
 490                 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
 491                         continue;
 492                 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
 493                         continue;
 494                 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
 495                         continue;
 496                 /* skip the function enable register */
 497                 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
 498                         continue;
 499                 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
 500                         continue;
 501                 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
 502                         continue;
 503
 504                 init_delay = 1;
 505                 /* After writing this register, HW needs time for CRB */
 506                 /* to quiet down (else crb_window returns 0xffffffff) */
 507                 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
 508                         init_delay = 1000;
 509
 510                 QLCWR32(adapter, off, buf[i].data);
 511
 512                 msleep(init_delay);
 513         }
 514         kfree(buf);
 515
 516         /* Initialize protocol process engine */
 517         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
 518         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
 519         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
 520         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
 521         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
 522         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
 523         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
 524         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
 525         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
 526         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
 527         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
 528         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
 529         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
 530         msleep(1);
 531
 532         QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
 533         QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
 534
 535         return 0;
 536 }
 537
 538 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
 539 {
 540         u32 val;
 541         int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
 542
 543         do {
 544                 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
 545
 546                 switch (val) {
 547                 case PHAN_INITIALIZE_COMPLETE:
 548                 case PHAN_INITIALIZE_ACK:
 549                         return 0;
 550                 case PHAN_INITIALIZE_FAILED:
 551                         goto out_err;
 552                 default:
 553                         break;
 554                 }
 555
 556                 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
 557
 558         } while (--retries);
 559
 560         QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
 561                             PHAN_INITIALIZE_FAILED);
 562
 563 out_err:
 564         dev_err(&adapter->pdev->dev, "Command Peg initialization not "
 565                       "complete, state: 0x%x.\n", val);
 566         return -EIO;
 567 }
 568
 569 static int
 570 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
 571 {
 572         u32 val;
 573         int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
 574
 575         do {
 576                 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
 577
 578                 if (val == PHAN_PEG_RCV_INITIALIZED)
 579                         return 0;
 580
 581                 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
 582
 583         } while (--retries);
 584
 585         if (!retries) {
 586                 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
 587                               "complete, state: 0x%x.\n", val);
 588                 return -EIO;
 589         }
 590
 591         return 0;
 592 }
 593
 594 int
 595 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
 596 {
 597         int err;
 598
 599         err = qlcnic_cmd_peg_ready(adapter);
 600         if (err)
 601                 return err;
 602
 603         err = qlcnic_receive_peg_ready(adapter);
 604         if (err)
 605                 return err;
 606
 607         QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
 608
 609         return err;
 610 }
 611
 612 int
 613 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
 614
 615         int timeo;
 616         u32 val;
 617
 618         val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
 619         val = QLC_DEV_GET_DRV(val, adapter->portnum);
 620         if ((val & 0x3) != QLCNIC_TYPE_NIC) {
 621                 dev_err(&adapter->pdev->dev,
 622                         "Not an Ethernet NIC func=%u\n", val);
 623                 return -EIO;
 624         }
 625         adapter->ahw->physical_port = (val >> 2);
 626         if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
 627                 timeo = QLCNIC_INIT_TIMEOUT_SECS;
 628
 629         adapter->dev_init_timeo = timeo;
 630
 631         if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
 632                 timeo = QLCNIC_RESET_TIMEOUT_SECS;
 633
 634         adapter->reset_ack_timeo = timeo;
 635
 636         return 0;
 637 }
 638
 639 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
 640                                 struct qlcnic_flt_entry *region_entry)
 641 {
 642         struct qlcnic_flt_header flt_hdr;
 643         struct qlcnic_flt_entry *flt_entry;
 644         int i = 0, ret;
 645         u32 entry_size;
 646
 647         memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
 648         ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
 649                                          (u8 *)&flt_hdr,
 650                                          sizeof(struct qlcnic_flt_header));
 651         if (ret) {
 652                 dev_warn(&adapter->pdev->dev,
 653                          "error reading flash layout header\n");
 654                 return -EIO;
 655         }
 656
 657         entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
 658         flt_entry = vzalloc(entry_size);
 659         if (flt_entry == NULL)
 660                 return -EIO;
 661
 662         ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
 663                                          sizeof(struct qlcnic_flt_header),
 664                                          (u8 *)flt_entry, entry_size);
 665         if (ret) {
 666                 dev_warn(&adapter->pdev->dev,
 667                          "error reading flash layout entries\n");
 668                 goto err_out;
 669         }
 670
 671         while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
 672                 if (flt_entry[i].region == region)
 673                         break;
 674                 i++;
 675         }
 676         if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
 677                 dev_warn(&adapter->pdev->dev,
 678                          "region=%x not found in %d regions\n", region, i);
 679                 ret = -EIO;
 680                 goto err_out;
 681         }
 682         memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
 683
 684 err_out:
 685         vfree(flt_entry);
 686         return ret;
 687 }
 688
 689 int
 690 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
 691 {
 692         struct qlcnic_flt_entry fw_entry;
 693         u32 ver = -1, min_ver;
 694         int ret;
 695
 696         if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
 697                 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
 698                                                  &fw_entry);
 699         else
 700                 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
 701                                                  &fw_entry);
 702
 703         if (!ret)
 704                 /* 0-4:-signature,  4-8:-fw version */
 705                 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
 706                                      (int *)&ver);
 707         else
 708                 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
 709                                      (int *)&ver);
 710
 711         ver = QLCNIC_DECODE_VERSION(ver);
 712         min_ver = QLCNIC_MIN_FW_VERSION;
 713
 714         if (ver < min_ver) {
 715                 dev_err(&adapter->pdev->dev,
 716                         "firmware version %d.%d.%d unsupported."
 717                         "Min supported version %d.%d.%d\n",
 718                         _major(ver), _minor(ver), _build(ver),
 719                         _major(min_ver), _minor(min_ver), _build(min_ver));
 720                 return -EINVAL;
 721         }
 722
 723         return 0;
 724 }
 725
 726 static int
 727 qlcnic_has_mn(struct qlcnic_adapter *adapter)
 728 {
 729         u32 capability = 0;
 730         int err = 0;
 731
 732         capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
 733         if (err == -EIO)
 734                 return err;
 735         if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
 736                 return 1;
 737
 738         return 0;
 739 }
 740
 741 static
 742 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
 743 {
 744         u32 i, entries;
 745         struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
 746         entries = le32_to_cpu(directory->num_entries);
 747
 748         for (i = 0; i < entries; i++) {
 749
 750                 u32 offs = le32_to_cpu(directory->findex) +
 751                            i * le32_to_cpu(directory->entry_size);
 752                 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
 753
 754                 if (tab_type == section)
 755                         return (struct uni_table_desc *) &unirom[offs];
 756         }
 757
 758         return NULL;
 759 }
 760
 761 #define FILEHEADER_SIZE (14 * 4)
 762
 763 static int
 764 qlcnic_validate_header(struct qlcnic_adapter *adapter)
 765 {
 766         const u8 *unirom = adapter->fw->data;
 767         struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
 768         u32 entries, entry_size, tab_size, fw_file_size;
 769
 770         fw_file_size = adapter->fw->size;
 771
 772         if (fw_file_size < FILEHEADER_SIZE)
 773                 return -EINVAL;
 774
 775         entries = le32_to_cpu(directory->num_entries);
 776         entry_size = le32_to_cpu(directory->entry_size);
 777         tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
 778
 779         if (fw_file_size < tab_size)
 780                 return -EINVAL;
 781
 782         return 0;
 783 }
 784
 785 static int
 786 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
 787 {
 788         struct uni_table_desc *tab_desc;
 789         struct uni_data_desc *descr;
 790         u32 offs, tab_size, data_size, idx;
 791         const u8 *unirom = adapter->fw->data;
 792         __le32 temp;
 793
 794         temp = *((__le32 *)&unirom[adapter->file_prd_off] +
 795                  QLCNIC_UNI_BOOTLD_IDX_OFF);
 796         idx = le32_to_cpu(temp);
 797         tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
 798
 799         if (!tab_desc)
 800                 return -EINVAL;
 801
 802         tab_size = le32_to_cpu(tab_desc->findex) +
 803                    le32_to_cpu(tab_desc->entry_size) * (idx + 1);
 804
 805         if (adapter->fw->size < tab_size)
 806                 return -EINVAL;
 807
 808         offs = le32_to_cpu(tab_desc->findex) +
 809                le32_to_cpu(tab_desc->entry_size) * idx;
 810         descr = (struct uni_data_desc *)&unirom[offs];
 811
 812         data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
 813
 814         if (adapter->fw->size < data_size)
 815                 return -EINVAL;
 816
 817         return 0;
 818 }
 819
 820 static int
 821 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
 822 {
 823         struct uni_table_desc *tab_desc;
 824         struct uni_data_desc *descr;
 825         const u8 *unirom = adapter->fw->data;
 826         u32 offs, tab_size, data_size, idx;
 827         __le32 temp;
 828
 829         temp = *((__le32 *)&unirom[adapter->file_prd_off] +
 830                  QLCNIC_UNI_FIRMWARE_IDX_OFF);
 831         idx = le32_to_cpu(temp);
 832         tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
 833
 834         if (!tab_desc)
 835                 return -EINVAL;
 836
 837         tab_size = le32_to_cpu(tab_desc->findex) +
 838                    le32_to_cpu(tab_desc->entry_size) * (idx + 1);
 839
 840         if (adapter->fw->size < tab_size)
 841                 return -EINVAL;
 842
 843         offs = le32_to_cpu(tab_desc->findex) +
 844                le32_to_cpu(tab_desc->entry_size) * idx;
 845         descr = (struct uni_data_desc *)&unirom[offs];
 846         data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
 847
 848         if (adapter->fw->size < data_size)
 849                 return -EINVAL;
 850
 851         return 0;
 852 }
 853
 854 static int
 855 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
 856 {
 857         struct uni_table_desc *ptab_descr;
 858         const u8 *unirom = adapter->fw->data;
 859         int mn_present = qlcnic_has_mn(adapter);
 860         u32 entries, entry_size, tab_size, i;
 861         __le32 temp;
 862
 863         ptab_descr = qlcnic_get_table_desc(unirom,
 864                                 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
 865         if (!ptab_descr)
 866                 return -EINVAL;
 867
 868         entries = le32_to_cpu(ptab_descr->num_entries);
 869         entry_size = le32_to_cpu(ptab_descr->entry_size);
 870         tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
 871
 872         if (adapter->fw->size < tab_size)
 873                 return -EINVAL;
 874
 875 nomn:
 876         for (i = 0; i < entries; i++) {
 877
 878                 u32 flags, file_chiprev, offs;
 879                 u8 chiprev = adapter->ahw->revision_id;
 880                 u32 flagbit;
 881
 882                 offs = le32_to_cpu(ptab_descr->findex) +
 883                        i * le32_to_cpu(ptab_descr->entry_size);
 884                 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
 885                 flags = le32_to_cpu(temp);
 886                 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
 887                 file_chiprev = le32_to_cpu(temp);
 888
 889                 flagbit = mn_present ? 1 : 2;
 890
 891                 if ((chiprev == file_chiprev) &&
 892                                         ((1ULL << flagbit) & flags)) {
 893                         adapter->file_prd_off = offs;
 894                         return 0;
 895                 }
 896         }
 897         if (mn_present) {
 898                 mn_present = 0;
 899                 goto nomn;
 900         }
 901         return -EINVAL;
 902 }
 903
 904 static int
 905 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
 906 {
 907         if (qlcnic_validate_header(adapter)) {
 908                 dev_err(&adapter->pdev->dev,
 909                                 "unified image: header validation failed\n");
 910                 return -EINVAL;
 911         }
 912
 913         if (qlcnic_validate_product_offs(adapter)) {
 914                 dev_err(&adapter->pdev->dev,
 915                                 "unified image: product validation failed\n");
 916                 return -EINVAL;
 917         }
 918
 919         if (qlcnic_validate_bootld(adapter)) {
 920                 dev_err(&adapter->pdev->dev,
 921                                 "unified image: bootld validation failed\n");
 922                 return -EINVAL;
 923         }
 924
 925         if (qlcnic_validate_fw(adapter)) {
 926                 dev_err(&adapter->pdev->dev,
 927                                 "unified image: firmware validation failed\n");
 928                 return -EINVAL;
 929         }
 930
 931         return 0;
 932 }
 933
 934 static
 935 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
 936                         u32 section, u32 idx_offset)
 937 {
 938         const u8 *unirom = adapter->fw->data;
 939         struct uni_table_desc *tab_desc;
 940         u32 offs, idx;
 941         __le32 temp;
 942
 943         temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
 944         idx = le32_to_cpu(temp);
 945
 946         tab_desc = qlcnic_get_table_desc(unirom, section);
 947
 948         if (tab_desc == NULL)
 949                 return NULL;
 950
 951         offs = le32_to_cpu(tab_desc->findex) +
 952                le32_to_cpu(tab_desc->entry_size) * idx;
 953
 954         return (struct uni_data_desc *)&unirom[offs];
 955 }
 956
 957 static u8 *
 958 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
 959 {
 960         u32 offs = QLCNIC_BOOTLD_START;
 961         struct uni_data_desc *data_desc;
 962
 963         data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
 964                                          QLCNIC_UNI_BOOTLD_IDX_OFF);
 965
 966         if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
 967                 offs = le32_to_cpu(data_desc->findex);
 968
 969         return (u8 *)&adapter->fw->data[offs];
 970 }
 971
 972 static u8 *
 973 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
 974 {
 975         u32 offs = QLCNIC_IMAGE_START;
 976         struct uni_data_desc *data_desc;
 977
 978         data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
 979                                          QLCNIC_UNI_FIRMWARE_IDX_OFF);
 980         if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
 981                 offs = le32_to_cpu(data_desc->findex);
 982
 983         return (u8 *)&adapter->fw->data[offs];
 984 }
 985
 986 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
 987 {
 988         struct uni_data_desc *data_desc;
 989         const u8 *unirom = adapter->fw->data;
 990
 991         data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
 992                                          QLCNIC_UNI_FIRMWARE_IDX_OFF);
 993
 994         if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
 995                 return le32_to_cpu(data_desc->size);
 996         else
 997                 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
 998 }
 999
1000 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1001 {
1002         struct uni_data_desc *fw_data_desc;
1003         const struct firmware *fw = adapter->fw;
1004         u32 major, minor, sub;
1005         __le32 version_offset;
1006         const u8 *ver_str;
1007         int i, ret;
1008
1009         if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1010                 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1011                 return le32_to_cpu(version_offset);
1012         }
1013
1014         fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1015                         QLCNIC_UNI_FIRMWARE_IDX_OFF);
1016         ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1017                   le32_to_cpu(fw_data_desc->size) - 17;
1018
1019         for (i = 0; i < 12; i++) {
1020                 if (!strncmp(&ver_str[i], "REV=", 4)) {
1021                         ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1022                                         &major, &minor, &sub);
1023                         if (ret != 3)
1024                                 return 0;
1025                         else
1026                                 return major + (minor << 8) + (sub << 16);
1027                 }
1028         }
1029
1030         return 0;
1031 }
1032
1033 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1034 {
1035         const struct firmware *fw = adapter->fw;
1036         u32 bios_ver, prd_off = adapter->file_prd_off;
1037         u8 *version_offset;
1038         __le32 temp;
1039
1040         if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1041                 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1042                 return le32_to_cpu(*(__le32 *)version_offset);
1043         }
1044
1045         temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1046         bios_ver = le32_to_cpu(temp);
1047
1048         return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1049 }
1050
1051 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1052 {
1053         if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1054                 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1055
1056         qlcnic_pcie_sem_unlock(adapter, 2);
1057 }
1058
1059 static int
1060 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1061 {
1062         u32 heartbeat, ret = -EIO;
1063         int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1064
1065         adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1066                                                  QLCNIC_PEG_ALIVE_COUNTER);
1067
1068         do {
1069                 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1070                 heartbeat = QLC_SHARED_REG_RD32(adapter,
1071                                                 QLCNIC_PEG_ALIVE_COUNTER);
1072                 if (heartbeat != adapter->heartbeat) {
1073                         ret = QLCNIC_RCODE_SUCCESS;
1074                         break;
1075                 }
1076         } while (--retries);
1077
1078         return ret;
1079 }
1080
1081 int
1082 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1083 {
1084         if ((adapter->flags & QLCNIC_FW_HANG) ||
1085                         qlcnic_check_fw_hearbeat(adapter)) {
1086                 qlcnic_rom_lock_recovery(adapter);
1087                 return 1;
1088         }
1089
1090         if (adapter->need_fw_reset)
1091                 return 1;
1092
1093         if (adapter->fw)
1094                 return 1;
1095
1096         return 0;
1097 }
1098
1099 static const char *fw_name[] = {
1100         QLCNIC_UNIFIED_ROMIMAGE_NAME,
1101         QLCNIC_FLASH_ROMIMAGE_NAME,
1102 };
1103
1104 int
1105 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1106 {
1107         __le64 *ptr64;
1108         u32 i, flashaddr, size;
1109         const struct firmware *fw = adapter->fw;
1110         struct pci_dev *pdev = adapter->pdev;
1111
1112         dev_info(&pdev->dev, "loading firmware from %s\n",
1113                  fw_name[adapter->ahw->fw_type]);
1114
1115         if (fw) {
1116                 u64 data;
1117
1118                 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1119
1120                 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1121                 flashaddr = QLCNIC_BOOTLD_START;
1122
1123                 for (i = 0; i < size; i++) {
1124                         data = le64_to_cpu(ptr64[i]);
1125
1126                         if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1127                                 return -EIO;
1128
1129                         flashaddr += 8;
1130                 }
1131
1132                 size = qlcnic_get_fw_size(adapter) / 8;
1133
1134                 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1135                 flashaddr = QLCNIC_IMAGE_START;
1136
1137                 for (i = 0; i < size; i++) {
1138                         data = le64_to_cpu(ptr64[i]);
1139
1140                         if (qlcnic_pci_mem_write_2M(adapter,
1141                                                 flashaddr, data))
1142                                 return -EIO;
1143
1144                         flashaddr += 8;
1145                 }
1146
1147                 size = qlcnic_get_fw_size(adapter) % 8;
1148                 if (size) {
1149                         data = le64_to_cpu(ptr64[i]);
1150
1151                         if (qlcnic_pci_mem_write_2M(adapter,
1152                                                 flashaddr, data))
1153                                 return -EIO;
1154                 }
1155
1156         } else {
1157                 u64 data;
1158                 u32 hi, lo;
1159                 int ret;
1160                 struct qlcnic_flt_entry bootld_entry;
1161
1162                 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1163                                         &bootld_entry);
1164                 if (!ret) {
1165                         size = bootld_entry.size / 8;
1166                         flashaddr = bootld_entry.start_addr;
1167                 } else {
1168                         size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1169                         flashaddr = QLCNIC_BOOTLD_START;
1170                         dev_info(&pdev->dev,
1171                                 "using legacy method to get flash fw region");
1172                 }
1173
1174                 for (i = 0; i < size; i++) {
1175                         if (qlcnic_rom_fast_read(adapter,
1176                                         flashaddr, (int *)&lo) != 0)
1177                                 return -EIO;
1178                         if (qlcnic_rom_fast_read(adapter,
1179                                         flashaddr + 4, (int *)&hi) != 0)
1180                                 return -EIO;
1181
1182                         data = (((u64)hi << 32) | lo);
1183
1184                         if (qlcnic_pci_mem_write_2M(adapter,
1185                                                 flashaddr, data))
1186                                 return -EIO;
1187
1188                         flashaddr += 8;
1189                 }
1190         }
1191         msleep(1);
1192
1193         QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1194         QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1195         return 0;
1196 }
1197
1198 static int
1199 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1200 {
1201         u32 val;
1202         u32 ver, bios, min_size;
1203         struct pci_dev *pdev = adapter->pdev;
1204         const struct firmware *fw = adapter->fw;
1205         u8 fw_type = adapter->ahw->fw_type;
1206
1207         if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1208                 if (qlcnic_validate_unified_romimage(adapter))
1209                         return -EINVAL;
1210
1211                 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1212         } else {
1213                 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1214                 if (val != QLCNIC_BDINFO_MAGIC)
1215                         return -EINVAL;
1216
1217                 min_size = QLCNIC_FW_MIN_SIZE;
1218         }
1219
1220         if (fw->size < min_size)
1221                 return -EINVAL;
1222
1223         val = qlcnic_get_fw_version(adapter);
1224         ver = QLCNIC_DECODE_VERSION(val);
1225
1226         if (ver < QLCNIC_MIN_FW_VERSION) {
1227                 dev_err(&pdev->dev,
1228                                 "%s: firmware version %d.%d.%d unsupported\n",
1229                 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1230                 return -EINVAL;
1231         }
1232
1233         val = qlcnic_get_bios_version(adapter);
1234         qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1235         if (val != bios) {
1236                 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1237                                 fw_name[fw_type]);
1238                 return -EINVAL;
1239         }
1240
1241         QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1242         return 0;
1243 }
1244
1245 static void
1246 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1247 {
1248         u8 fw_type;
1249
1250         switch (adapter->ahw->fw_type) {
1251         case QLCNIC_UNKNOWN_ROMIMAGE:
1252                 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1253                 break;
1254
1255         case QLCNIC_UNIFIED_ROMIMAGE:
1256         default:
1257                 fw_type = QLCNIC_FLASH_ROMIMAGE;
1258                 break;
1259         }
1260
1261         adapter->ahw->fw_type = fw_type;
1262 }
1263
1264
1265
1266 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1267 {
1268         struct pci_dev *pdev = adapter->pdev;
1269         int rc;
1270
1271         adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1272
1273 next:
1274         qlcnic_get_next_fwtype(adapter);
1275
1276         if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1277                 adapter->fw = NULL;
1278         } else {
1279                 rc = request_firmware(&adapter->fw,
1280                                       fw_name[adapter->ahw->fw_type],
1281                                       &pdev->dev);
1282                 if (rc != 0)
1283                         goto next;
1284
1285                 rc = qlcnic_validate_firmware(adapter);
1286                 if (rc != 0) {
1287                         release_firmware(adapter->fw);
1288                         msleep(1);
1289                         goto next;
1290                 }
1291         }
1292 }
1293
1294
1295 void
1296 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1297 {
1298         release_firmware(adapter->fw);
1299         adapter->fw = NULL;
1300 }