1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2013 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/ethtool.h>
21 #include <linux/topology.h>
22 #include <linux/gfp.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include "net_driver.h"
31 #include "workarounds.h"
33 /**************************************************************************
37 **************************************************************************
40 /* Loopback mode names (see LOOPBACK_MODE()) */
41 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
42 const char *const efx_loopback_mode_names[] = {
43 [LOOPBACK_NONE] = "NONE",
44 [LOOPBACK_DATA] = "DATAPATH",
45 [LOOPBACK_GMAC] = "GMAC",
46 [LOOPBACK_XGMII] = "XGMII",
47 [LOOPBACK_XGXS] = "XGXS",
48 [LOOPBACK_XAUI] = "XAUI",
49 [LOOPBACK_GMII] = "GMII",
50 [LOOPBACK_SGMII] = "SGMII",
51 [LOOPBACK_XGBR] = "XGBR",
52 [LOOPBACK_XFI] = "XFI",
53 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
54 [LOOPBACK_GMII_FAR] = "GMII_FAR",
55 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
56 [LOOPBACK_XFI_FAR] = "XFI_FAR",
57 [LOOPBACK_GPHY] = "GPHY",
58 [LOOPBACK_PHYXS] = "PHYXS",
59 [LOOPBACK_PCS] = "PCS",
60 [LOOPBACK_PMAPMD] = "PMA/PMD",
61 [LOOPBACK_XPORT] = "XPORT",
62 [LOOPBACK_XGMII_WS] = "XGMII_WS",
63 [LOOPBACK_XAUI_WS] = "XAUI_WS",
64 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
65 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
66 [LOOPBACK_GMII_WS] = "GMII_WS",
67 [LOOPBACK_XFI_WS] = "XFI_WS",
68 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
69 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
73 const char *const efx_reset_type_names[] = {
74 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
75 [RESET_TYPE_ALL] = "ALL",
76 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
77 [RESET_TYPE_WORLD] = "WORLD",
78 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
79 [RESET_TYPE_MC_BIST] = "MC_BIST",
80 [RESET_TYPE_DISABLE] = "DISABLE",
81 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
82 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
83 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
84 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
85 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
86 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
87 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
90 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
91 * queued onto this work queue. This is not a per-nic work queue, because
92 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
94 static struct workqueue_struct *reset_workqueue;
96 /* How often and how many times to poll for a reset while waiting for a
97 * BIST that another function started to complete.
99 #define BIST_WAIT_DELAY_MS 100
100 #define BIST_WAIT_DELAY_COUNT 100
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static bool separate_tx_channels;
117 module_param(separate_tx_channels, bool, 0444);
118 MODULE_PARM_DESC(separate_tx_channels,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight = 64;
126 /* This is the time (in jiffies) between invocations of the hardware
128 * On Falcon-based NICs, this will:
129 * - Check the on-board hardware monitor;
130 * - Poll the link state and reconfigure the hardware as necessary.
131 * On Siena-based NICs for power systems with EEH support, this will give EEH a
134 static unsigned int efx_monitor_interval = 1 * HZ;
136 /* Initial interrupt moderation settings. They can be modified after
137 * module load with ethtool.
139 * The default for RX should strike a balance between increasing the
140 * round-trip latency and reducing overhead.
142 static unsigned int rx_irq_mod_usec = 60;
144 /* Initial interrupt moderation settings. They can be modified after
145 * module load with ethtool.
147 * This default is chosen to ensure that a 10G link does not go idle
148 * while a TX queue is stopped after it has become full. A queue is
149 * restarted when it drops below half full. The time this takes (assuming
150 * worst case 3 descriptors per packet and 1024 descriptors) is
151 * 512 / 3 * 1.2 = 205 usec.
153 static unsigned int tx_irq_mod_usec = 150;
155 /* This is the first interrupt mode to try out of:
160 static unsigned int interrupt_mode;
162 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
163 * i.e. the number of CPUs among which we may distribute simultaneous
164 * interrupt handling.
166 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
167 * The default (0) means to assign an interrupt to each core.
169 static unsigned int rss_cpus;
170 module_param(rss_cpus, uint, 0444);
171 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
173 static bool phy_flash_cfg;
174 module_param(phy_flash_cfg, bool, 0644);
175 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
177 static unsigned irq_adapt_low_thresh = 8000;
178 module_param(irq_adapt_low_thresh, uint, 0644);
179 MODULE_PARM_DESC(irq_adapt_low_thresh,
180 "Threshold score for reducing IRQ moderation");
182 static unsigned irq_adapt_high_thresh = 16000;
183 module_param(irq_adapt_high_thresh, uint, 0644);
184 MODULE_PARM_DESC(irq_adapt_high_thresh,
185 "Threshold score for increasing IRQ moderation");
187 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
188 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
189 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
190 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
191 module_param(debug, uint, 0);
192 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
194 /**************************************************************************
196 * Utility functions and prototypes
198 *************************************************************************/
200 static int efx_soft_enable_interrupts(struct efx_nic *efx);
201 static void efx_soft_disable_interrupts(struct efx_nic *efx);
202 static void efx_remove_channel(struct efx_channel *channel);
203 static void efx_remove_channels(struct efx_nic *efx);
204 static const struct efx_channel_type efx_default_channel_type;
205 static void efx_remove_port(struct efx_nic *efx);
206 static void efx_init_napi_channel(struct efx_channel *channel);
207 static void efx_fini_napi(struct efx_nic *efx);
208 static void efx_fini_napi_channel(struct efx_channel *channel);
209 static void efx_fini_struct(struct efx_nic *efx);
210 static void efx_start_all(struct efx_nic *efx);
211 static void efx_stop_all(struct efx_nic *efx);
213 #define EFX_ASSERT_RESET_SERIALISED(efx) \
215 if ((efx->state == STATE_READY) || \
216 (efx->state == STATE_RECOVERY) || \
217 (efx->state == STATE_DISABLED)) \
221 static int efx_check_disabled(struct efx_nic *efx)
223 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
224 netif_err(efx, drv, efx->net_dev,
225 "device is disabled due to earlier errors\n");
231 /**************************************************************************
233 * Event queue processing
235 *************************************************************************/
237 /* Process channel's event queue
239 * This function is responsible for processing the event queue of a
240 * single channel. The caller must guarantee that this function will
241 * never be concurrently called more than once on the same channel,
242 * though different channels may be being processed concurrently.
244 static int efx_process_channel(struct efx_channel *channel, int budget)
248 if (unlikely(!channel->enabled))
251 spent = efx_nic_process_eventq(channel, budget);
252 if (spent && efx_channel_has_rx_queue(channel)) {
253 struct efx_rx_queue *rx_queue =
254 efx_channel_get_rx_queue(channel);
256 efx_rx_flush_packet(channel);
257 efx_fast_push_rx_descriptors(rx_queue, true);
265 * NAPI guarantees serialisation of polls of the same device, which
266 * provides the guarantee required by efx_process_channel().
268 static int efx_poll(struct napi_struct *napi, int budget)
270 struct efx_channel *channel =
271 container_of(napi, struct efx_channel, napi_str);
272 struct efx_nic *efx = channel->efx;
275 netif_vdbg(efx, intr, efx->net_dev,
276 "channel %d NAPI poll executing on CPU %d\n",
277 channel->channel, raw_smp_processor_id());
279 spent = efx_process_channel(channel, budget);
281 if (spent < budget) {
282 if (efx_channel_has_rx_queue(channel) &&
283 efx->irq_rx_adaptive &&
284 unlikely(++channel->irq_count == 1000)) {
285 if (unlikely(channel->irq_mod_score <
286 irq_adapt_low_thresh)) {
287 if (channel->irq_moderation > 1) {
288 channel->irq_moderation -= 1;
289 efx->type->push_irq_moderation(channel);
291 } else if (unlikely(channel->irq_mod_score >
292 irq_adapt_high_thresh)) {
293 if (channel->irq_moderation <
294 efx->irq_rx_moderation) {
295 channel->irq_moderation += 1;
296 efx->type->push_irq_moderation(channel);
299 channel->irq_count = 0;
300 channel->irq_mod_score = 0;
303 efx_filter_rfs_expire(channel);
305 /* There is no race here; although napi_disable() will
306 * only wait for napi_complete(), this isn't a problem
307 * since efx_nic_eventq_read_ack() will have no effect if
308 * interrupts have already been disabled.
311 efx_nic_eventq_read_ack(channel);
317 /* Create event queue
318 * Event queue memory allocations are done only once. If the channel
319 * is reset, the memory buffer will be reused; this guards against
320 * errors during channel reset and also simplifies interrupt handling.
322 static int efx_probe_eventq(struct efx_channel *channel)
324 struct efx_nic *efx = channel->efx;
325 unsigned long entries;
327 netif_dbg(efx, probe, efx->net_dev,
328 "chan %d create event queue\n", channel->channel);
330 /* Build an event queue with room for one event per tx and rx buffer,
331 * plus some extra for link state events and MCDI completions. */
332 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
333 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
334 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
336 return efx_nic_probe_eventq(channel);
339 /* Prepare channel's event queue */
340 static int efx_init_eventq(struct efx_channel *channel)
342 struct efx_nic *efx = channel->efx;
345 EFX_WARN_ON_PARANOID(channel->eventq_init);
347 netif_dbg(efx, drv, efx->net_dev,
348 "chan %d init event queue\n", channel->channel);
350 rc = efx_nic_init_eventq(channel);
352 efx->type->push_irq_moderation(channel);
353 channel->eventq_read_ptr = 0;
354 channel->eventq_init = true;
359 /* Enable event queue processing and NAPI */
360 static void efx_start_eventq(struct efx_channel *channel)
362 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
363 "chan %d start event queue\n", channel->channel);
365 /* Make sure the NAPI handler sees the enabled flag set */
366 channel->enabled = true;
369 napi_enable(&channel->napi_str);
370 efx_nic_eventq_read_ack(channel);
373 /* Disable event queue processing and NAPI */
374 static void efx_stop_eventq(struct efx_channel *channel)
376 if (!channel->enabled)
379 napi_disable(&channel->napi_str);
380 channel->enabled = false;
383 static void efx_fini_eventq(struct efx_channel *channel)
385 if (!channel->eventq_init)
388 netif_dbg(channel->efx, drv, channel->efx->net_dev,
389 "chan %d fini event queue\n", channel->channel);
391 efx_nic_fini_eventq(channel);
392 channel->eventq_init = false;
395 static void efx_remove_eventq(struct efx_channel *channel)
397 netif_dbg(channel->efx, drv, channel->efx->net_dev,
398 "chan %d remove event queue\n", channel->channel);
400 efx_nic_remove_eventq(channel);
403 /**************************************************************************
407 *************************************************************************/
409 /* Allocate and initialise a channel structure. */
410 static struct efx_channel *
411 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
413 struct efx_channel *channel;
414 struct efx_rx_queue *rx_queue;
415 struct efx_tx_queue *tx_queue;
418 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
423 channel->channel = i;
424 channel->type = &efx_default_channel_type;
426 for (j = 0; j < EFX_TXQ_TYPES; j++) {
427 tx_queue = &channel->tx_queue[j];
429 tx_queue->queue = i * EFX_TXQ_TYPES + j;
430 tx_queue->channel = channel;
433 rx_queue = &channel->rx_queue;
435 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
436 (unsigned long)rx_queue);
441 /* Allocate and initialise a channel structure, copying parameters
442 * (but not resources) from an old channel structure.
444 static struct efx_channel *
445 efx_copy_channel(const struct efx_channel *old_channel)
447 struct efx_channel *channel;
448 struct efx_rx_queue *rx_queue;
449 struct efx_tx_queue *tx_queue;
452 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
456 *channel = *old_channel;
458 channel->napi_dev = NULL;
459 memset(&channel->eventq, 0, sizeof(channel->eventq));
461 for (j = 0; j < EFX_TXQ_TYPES; j++) {
462 tx_queue = &channel->tx_queue[j];
463 if (tx_queue->channel)
464 tx_queue->channel = channel;
465 tx_queue->buffer = NULL;
466 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
469 rx_queue = &channel->rx_queue;
470 rx_queue->buffer = NULL;
471 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
472 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
473 (unsigned long)rx_queue);
478 static int efx_probe_channel(struct efx_channel *channel)
480 struct efx_tx_queue *tx_queue;
481 struct efx_rx_queue *rx_queue;
484 netif_dbg(channel->efx, probe, channel->efx->net_dev,
485 "creating channel %d\n", channel->channel);
487 rc = channel->type->pre_probe(channel);
491 rc = efx_probe_eventq(channel);
495 efx_for_each_channel_tx_queue(tx_queue, channel) {
496 rc = efx_probe_tx_queue(tx_queue);
501 efx_for_each_channel_rx_queue(rx_queue, channel) {
502 rc = efx_probe_rx_queue(rx_queue);
510 efx_remove_channel(channel);
515 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
517 struct efx_nic *efx = channel->efx;
521 number = channel->channel;
522 if (efx->tx_channel_offset == 0) {
524 } else if (channel->channel < efx->tx_channel_offset) {
528 number -= efx->tx_channel_offset;
530 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
533 static void efx_set_channel_names(struct efx_nic *efx)
535 struct efx_channel *channel;
537 efx_for_each_channel(channel, efx)
538 channel->type->get_name(channel,
539 efx->msi_context[channel->channel].name,
540 sizeof(efx->msi_context[0].name));
543 static int efx_probe_channels(struct efx_nic *efx)
545 struct efx_channel *channel;
548 /* Restart special buffer allocation */
549 efx->next_buffer_table = 0;
551 /* Probe channels in reverse, so that any 'extra' channels
552 * use the start of the buffer table. This allows the traffic
553 * channels to be resized without moving them or wasting the
554 * entries before them.
556 efx_for_each_channel_rev(channel, efx) {
557 rc = efx_probe_channel(channel);
559 netif_err(efx, probe, efx->net_dev,
560 "failed to create channel %d\n",
565 efx_set_channel_names(efx);
570 efx_remove_channels(efx);
574 /* Channels are shutdown and reinitialised whilst the NIC is running
575 * to propagate configuration changes (mtu, checksum offload), or
576 * to clear hardware error conditions
578 static void efx_start_datapath(struct efx_nic *efx)
580 bool old_rx_scatter = efx->rx_scatter;
581 struct efx_tx_queue *tx_queue;
582 struct efx_rx_queue *rx_queue;
583 struct efx_channel *channel;
586 /* Calculate the rx buffer allocation parameters required to
587 * support the current MTU, including padding for header
588 * alignment and overruns.
590 efx->rx_dma_len = (efx->rx_prefix_size +
591 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
592 efx->type->rx_buffer_padding);
593 rx_buf_len = (sizeof(struct efx_rx_page_state) +
594 efx->rx_ip_align + efx->rx_dma_len);
595 if (rx_buf_len <= PAGE_SIZE) {
596 efx->rx_scatter = efx->type->always_rx_scatter;
597 efx->rx_buffer_order = 0;
598 } else if (efx->type->can_rx_scatter) {
599 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
600 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
601 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
602 EFX_RX_BUF_ALIGNMENT) >
604 efx->rx_scatter = true;
605 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
606 efx->rx_buffer_order = 0;
608 efx->rx_scatter = false;
609 efx->rx_buffer_order = get_order(rx_buf_len);
612 efx_rx_config_page_split(efx);
613 if (efx->rx_buffer_order)
614 netif_dbg(efx, drv, efx->net_dev,
615 "RX buf len=%u; page order=%u batch=%u\n",
616 efx->rx_dma_len, efx->rx_buffer_order,
617 efx->rx_pages_per_batch);
619 netif_dbg(efx, drv, efx->net_dev,
620 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
621 efx->rx_dma_len, efx->rx_page_buf_step,
622 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
624 /* RX filters may also have scatter-enabled flags */
625 if (efx->rx_scatter != old_rx_scatter)
626 efx->type->filter_update_rx_scatter(efx);
628 /* We must keep at least one descriptor in a TX ring empty.
629 * We could avoid this when the queue size does not exactly
630 * match the hardware ring size, but it's not that important.
631 * Therefore we stop the queue when one more skb might fill
632 * the ring completely. We wake it when half way back to
635 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
636 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
638 /* Initialise the channels */
639 efx_for_each_channel(channel, efx) {
640 efx_for_each_channel_tx_queue(tx_queue, channel) {
641 efx_init_tx_queue(tx_queue);
642 atomic_inc(&efx->active_queues);
645 efx_for_each_channel_rx_queue(rx_queue, channel) {
646 efx_init_rx_queue(rx_queue);
647 atomic_inc(&efx->active_queues);
648 efx_stop_eventq(channel);
649 efx_fast_push_rx_descriptors(rx_queue, false);
650 efx_start_eventq(channel);
653 WARN_ON(channel->rx_pkt_n_frags);
656 efx_ptp_start_datapath(efx);
658 if (netif_device_present(efx->net_dev))
659 netif_tx_wake_all_queues(efx->net_dev);
662 static void efx_stop_datapath(struct efx_nic *efx)
664 struct efx_channel *channel;
665 struct efx_tx_queue *tx_queue;
666 struct efx_rx_queue *rx_queue;
669 EFX_ASSERT_RESET_SERIALISED(efx);
670 BUG_ON(efx->port_enabled);
672 efx_ptp_stop_datapath(efx);
675 efx_for_each_channel(channel, efx) {
676 efx_for_each_channel_rx_queue(rx_queue, channel)
677 rx_queue->refill_enabled = false;
680 efx_for_each_channel(channel, efx) {
681 /* RX packet processing is pipelined, so wait for the
682 * NAPI handler to complete. At least event queue 0
683 * might be kept active by non-data events, so don't
684 * use napi_synchronize() but actually disable NAPI
687 if (efx_channel_has_rx_queue(channel)) {
688 efx_stop_eventq(channel);
689 efx_start_eventq(channel);
693 rc = efx->type->fini_dmaq(efx);
694 if (rc && EFX_WORKAROUND_7803(efx)) {
695 /* Schedule a reset to recover from the flush failure. The
696 * descriptor caches reference memory we're about to free,
697 * but falcon_reconfigure_mac_wrapper() won't reconnect
698 * the MACs because of the pending reset.
700 netif_err(efx, drv, efx->net_dev,
701 "Resetting to recover from flush failure\n");
702 efx_schedule_reset(efx, RESET_TYPE_ALL);
704 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
706 netif_dbg(efx, drv, efx->net_dev,
707 "successfully flushed all queues\n");
710 efx_for_each_channel(channel, efx) {
711 efx_for_each_channel_rx_queue(rx_queue, channel)
712 efx_fini_rx_queue(rx_queue);
713 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
714 efx_fini_tx_queue(tx_queue);
718 static void efx_remove_channel(struct efx_channel *channel)
720 struct efx_tx_queue *tx_queue;
721 struct efx_rx_queue *rx_queue;
723 netif_dbg(channel->efx, drv, channel->efx->net_dev,
724 "destroy chan %d\n", channel->channel);
726 efx_for_each_channel_rx_queue(rx_queue, channel)
727 efx_remove_rx_queue(rx_queue);
728 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
729 efx_remove_tx_queue(tx_queue);
730 efx_remove_eventq(channel);
731 channel->type->post_remove(channel);
734 static void efx_remove_channels(struct efx_nic *efx)
736 struct efx_channel *channel;
738 efx_for_each_channel(channel, efx)
739 efx_remove_channel(channel);
743 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
745 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
746 u32 old_rxq_entries, old_txq_entries;
747 unsigned i, next_buffer_table = 0;
750 rc = efx_check_disabled(efx);
754 /* Not all channels should be reallocated. We must avoid
755 * reallocating their buffer table entries.
757 efx_for_each_channel(channel, efx) {
758 struct efx_rx_queue *rx_queue;
759 struct efx_tx_queue *tx_queue;
761 if (channel->type->copy)
763 next_buffer_table = max(next_buffer_table,
764 channel->eventq.index +
765 channel->eventq.entries);
766 efx_for_each_channel_rx_queue(rx_queue, channel)
767 next_buffer_table = max(next_buffer_table,
768 rx_queue->rxd.index +
769 rx_queue->rxd.entries);
770 efx_for_each_channel_tx_queue(tx_queue, channel)
771 next_buffer_table = max(next_buffer_table,
772 tx_queue->txd.index +
773 tx_queue->txd.entries);
776 efx_device_detach_sync(efx);
778 efx_soft_disable_interrupts(efx);
780 /* Clone channels (where possible) */
781 memset(other_channel, 0, sizeof(other_channel));
782 for (i = 0; i < efx->n_channels; i++) {
783 channel = efx->channel[i];
784 if (channel->type->copy)
785 channel = channel->type->copy(channel);
790 other_channel[i] = channel;
793 /* Swap entry counts and channel pointers */
794 old_rxq_entries = efx->rxq_entries;
795 old_txq_entries = efx->txq_entries;
796 efx->rxq_entries = rxq_entries;
797 efx->txq_entries = txq_entries;
798 for (i = 0; i < efx->n_channels; i++) {
799 channel = efx->channel[i];
800 efx->channel[i] = other_channel[i];
801 other_channel[i] = channel;
804 /* Restart buffer table allocation */
805 efx->next_buffer_table = next_buffer_table;
807 for (i = 0; i < efx->n_channels; i++) {
808 channel = efx->channel[i];
809 if (!channel->type->copy)
811 rc = efx_probe_channel(channel);
814 efx_init_napi_channel(efx->channel[i]);
818 /* Destroy unused channel structures */
819 for (i = 0; i < efx->n_channels; i++) {
820 channel = other_channel[i];
821 if (channel && channel->type->copy) {
822 efx_fini_napi_channel(channel);
823 efx_remove_channel(channel);
828 rc2 = efx_soft_enable_interrupts(efx);
831 netif_err(efx, drv, efx->net_dev,
832 "unable to restart interrupts on channel reallocation\n");
833 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
836 netif_device_attach(efx->net_dev);
842 efx->rxq_entries = old_rxq_entries;
843 efx->txq_entries = old_txq_entries;
844 for (i = 0; i < efx->n_channels; i++) {
845 channel = efx->channel[i];
846 efx->channel[i] = other_channel[i];
847 other_channel[i] = channel;
852 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
854 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
857 static const struct efx_channel_type efx_default_channel_type = {
858 .pre_probe = efx_channel_dummy_op_int,
859 .post_remove = efx_channel_dummy_op_void,
860 .get_name = efx_get_channel_name,
861 .copy = efx_copy_channel,
862 .keep_eventq = false,
865 int efx_channel_dummy_op_int(struct efx_channel *channel)
870 void efx_channel_dummy_op_void(struct efx_channel *channel)
874 /**************************************************************************
878 **************************************************************************/
880 /* This ensures that the kernel is kept informed (via
881 * netif_carrier_on/off) of the link status, and also maintains the
882 * link status's stop on the port's TX queue.
884 void efx_link_status_changed(struct efx_nic *efx)
886 struct efx_link_state *link_state = &efx->link_state;
888 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
889 * that no events are triggered between unregister_netdev() and the
890 * driver unloading. A more general condition is that NETDEV_CHANGE
891 * can only be generated between NETDEV_UP and NETDEV_DOWN */
892 if (!netif_running(efx->net_dev))
895 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
896 efx->n_link_state_changes++;
899 netif_carrier_on(efx->net_dev);
901 netif_carrier_off(efx->net_dev);
904 /* Status message for kernel log */
906 netif_info(efx, link, efx->net_dev,
907 "link up at %uMbps %s-duplex (MTU %d)\n",
908 link_state->speed, link_state->fd ? "full" : "half",
911 netif_info(efx, link, efx->net_dev, "link down\n");
914 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
916 efx->link_advertising = advertising;
918 if (advertising & ADVERTISED_Pause)
919 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
921 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
922 if (advertising & ADVERTISED_Asym_Pause)
923 efx->wanted_fc ^= EFX_FC_TX;
927 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
929 efx->wanted_fc = wanted_fc;
930 if (efx->link_advertising) {
931 if (wanted_fc & EFX_FC_RX)
932 efx->link_advertising |= (ADVERTISED_Pause |
933 ADVERTISED_Asym_Pause);
935 efx->link_advertising &= ~(ADVERTISED_Pause |
936 ADVERTISED_Asym_Pause);
937 if (wanted_fc & EFX_FC_TX)
938 efx->link_advertising ^= ADVERTISED_Asym_Pause;
942 static void efx_fini_port(struct efx_nic *efx);
944 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
945 * the MAC appropriately. All other PHY configuration changes are pushed
946 * through phy_op->set_settings(), and pushed asynchronously to the MAC
947 * through efx_monitor().
949 * Callers must hold the mac_lock
951 int __efx_reconfigure_port(struct efx_nic *efx)
953 enum efx_phy_mode phy_mode;
956 WARN_ON(!mutex_is_locked(&efx->mac_lock));
958 /* Disable PHY transmit in mac level loopbacks */
959 phy_mode = efx->phy_mode;
960 if (LOOPBACK_INTERNAL(efx))
961 efx->phy_mode |= PHY_MODE_TX_DISABLED;
963 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
965 rc = efx->type->reconfigure_port(efx);
968 efx->phy_mode = phy_mode;
973 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
975 int efx_reconfigure_port(struct efx_nic *efx)
979 EFX_ASSERT_RESET_SERIALISED(efx);
981 mutex_lock(&efx->mac_lock);
982 rc = __efx_reconfigure_port(efx);
983 mutex_unlock(&efx->mac_lock);
988 /* Asynchronous work item for changing MAC promiscuity and multicast
989 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
991 static void efx_mac_work(struct work_struct *data)
993 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
995 mutex_lock(&efx->mac_lock);
996 if (efx->port_enabled)
997 efx->type->reconfigure_mac(efx);
998 mutex_unlock(&efx->mac_lock);
1001 static int efx_probe_port(struct efx_nic *efx)
1005 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1008 efx->phy_mode = PHY_MODE_SPECIAL;
1010 /* Connect up MAC/PHY operations table */
1011 rc = efx->type->probe_port(efx);
1015 /* Initialise MAC address to permanent address */
1016 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1021 static int efx_init_port(struct efx_nic *efx)
1025 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1027 mutex_lock(&efx->mac_lock);
1029 rc = efx->phy_op->init(efx);
1033 efx->port_initialized = true;
1035 /* Reconfigure the MAC before creating dma queues (required for
1036 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1037 efx->type->reconfigure_mac(efx);
1039 /* Ensure the PHY advertises the correct flow control settings */
1040 rc = efx->phy_op->reconfigure(efx);
1044 mutex_unlock(&efx->mac_lock);
1048 efx->phy_op->fini(efx);
1050 mutex_unlock(&efx->mac_lock);
1054 static void efx_start_port(struct efx_nic *efx)
1056 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1057 BUG_ON(efx->port_enabled);
1059 mutex_lock(&efx->mac_lock);
1060 efx->port_enabled = true;
1062 /* Ensure MAC ingress/egress is enabled */
1063 efx->type->reconfigure_mac(efx);
1065 mutex_unlock(&efx->mac_lock);
1068 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1069 * and the async self-test, wait for them to finish and prevent them
1070 * being scheduled again. This doesn't cover online resets, which
1071 * should only be cancelled when removing the device.
1073 static void efx_stop_port(struct efx_nic *efx)
1075 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1077 EFX_ASSERT_RESET_SERIALISED(efx);
1079 mutex_lock(&efx->mac_lock);
1080 efx->port_enabled = false;
1081 mutex_unlock(&efx->mac_lock);
1083 /* Serialise against efx_set_multicast_list() */
1084 netif_addr_lock_bh(efx->net_dev);
1085 netif_addr_unlock_bh(efx->net_dev);
1087 cancel_delayed_work_sync(&efx->monitor_work);
1088 efx_selftest_async_cancel(efx);
1089 cancel_work_sync(&efx->mac_work);
1092 static void efx_fini_port(struct efx_nic *efx)
1094 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1096 if (!efx->port_initialized)
1099 efx->phy_op->fini(efx);
1100 efx->port_initialized = false;
1102 efx->link_state.up = false;
1103 efx_link_status_changed(efx);
1106 static void efx_remove_port(struct efx_nic *efx)
1108 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1110 efx->type->remove_port(efx);
1113 /**************************************************************************
1117 **************************************************************************/
1119 static LIST_HEAD(efx_primary_list);
1120 static LIST_HEAD(efx_unassociated_list);
1122 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1124 return left->type == right->type &&
1125 left->vpd_sn && right->vpd_sn &&
1126 !strcmp(left->vpd_sn, right->vpd_sn);
1129 static void efx_associate(struct efx_nic *efx)
1131 struct efx_nic *other, *next;
1133 if (efx->primary == efx) {
1134 /* Adding primary function; look for secondaries */
1136 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1137 list_add_tail(&efx->node, &efx_primary_list);
1139 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1141 if (efx_same_controller(efx, other)) {
1142 list_del(&other->node);
1143 netif_dbg(other, probe, other->net_dev,
1144 "moving to secondary list of %s %s\n",
1145 pci_name(efx->pci_dev),
1146 efx->net_dev->name);
1147 list_add_tail(&other->node,
1148 &efx->secondary_list);
1149 other->primary = efx;
1153 /* Adding secondary function; look for primary */
1155 list_for_each_entry(other, &efx_primary_list, node) {
1156 if (efx_same_controller(efx, other)) {
1157 netif_dbg(efx, probe, efx->net_dev,
1158 "adding to secondary list of %s %s\n",
1159 pci_name(other->pci_dev),
1160 other->net_dev->name);
1161 list_add_tail(&efx->node,
1162 &other->secondary_list);
1163 efx->primary = other;
1168 netif_dbg(efx, probe, efx->net_dev,
1169 "adding to unassociated list\n");
1170 list_add_tail(&efx->node, &efx_unassociated_list);
1174 static void efx_dissociate(struct efx_nic *efx)
1176 struct efx_nic *other, *next;
1178 list_del(&efx->node);
1179 efx->primary = NULL;
1181 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1182 list_del(&other->node);
1183 netif_dbg(other, probe, other->net_dev,
1184 "moving to unassociated list\n");
1185 list_add_tail(&other->node, &efx_unassociated_list);
1186 other->primary = NULL;
1190 /* This configures the PCI device to enable I/O and DMA. */
1191 static int efx_init_io(struct efx_nic *efx)
1193 struct pci_dev *pci_dev = efx->pci_dev;
1194 dma_addr_t dma_mask = efx->type->max_dma_mask;
1195 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1198 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1200 rc = pci_enable_device(pci_dev);
1202 netif_err(efx, probe, efx->net_dev,
1203 "failed to enable PCI device\n");
1207 pci_set_master(pci_dev);
1209 /* Set the PCI DMA mask. Try all possibilities from our
1210 * genuine mask down to 32 bits, because some architectures
1211 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1212 * masks event though they reject 46 bit masks.
1214 while (dma_mask > 0x7fffffffUL) {
1215 if (dma_supported(&pci_dev->dev, dma_mask)) {
1216 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1223 netif_err(efx, probe, efx->net_dev,
1224 "could not find a suitable DMA mask\n");
1227 netif_dbg(efx, probe, efx->net_dev,
1228 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1230 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1231 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1233 netif_err(efx, probe, efx->net_dev,
1234 "request for memory BAR failed\n");
1238 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1239 if (!efx->membase) {
1240 netif_err(efx, probe, efx->net_dev,
1241 "could not map memory BAR at %llx+%x\n",
1242 (unsigned long long)efx->membase_phys, mem_map_size);
1246 netif_dbg(efx, probe, efx->net_dev,
1247 "memory BAR at %llx+%x (virtual %p)\n",
1248 (unsigned long long)efx->membase_phys, mem_map_size,
1254 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1256 efx->membase_phys = 0;
1258 pci_disable_device(efx->pci_dev);
1263 static void efx_fini_io(struct efx_nic *efx)
1265 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1268 iounmap(efx->membase);
1269 efx->membase = NULL;
1272 if (efx->membase_phys) {
1273 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1274 efx->membase_phys = 0;
1277 pci_disable_device(efx->pci_dev);
1280 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1282 cpumask_var_t thread_mask;
1289 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1290 netif_warn(efx, probe, efx->net_dev,
1291 "RSS disabled due to allocation failure\n");
1296 for_each_online_cpu(cpu) {
1297 if (!cpumask_test_cpu(cpu, thread_mask)) {
1299 cpumask_or(thread_mask, thread_mask,
1300 topology_thread_cpumask(cpu));
1304 free_cpumask_var(thread_mask);
1307 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1308 * table entries that are inaccessible to VFs
1310 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1311 count > efx_vf_size(efx)) {
1312 netif_warn(efx, probe, efx->net_dev,
1313 "Reducing number of RSS channels from %u to %u for "
1314 "VF support. Increase vf-msix-limit to use more "
1315 "channels on the PF.\n",
1316 count, efx_vf_size(efx));
1317 count = efx_vf_size(efx);
1323 /* Probe the number and type of interrupts we are able to obtain, and
1324 * the resulting numbers of channels and RX queues.
1326 static int efx_probe_interrupts(struct efx_nic *efx)
1328 unsigned int extra_channels = 0;
1332 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1333 if (efx->extra_channel_type[i])
1336 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1337 struct msix_entry xentries[EFX_MAX_CHANNELS];
1338 unsigned int n_channels;
1340 n_channels = efx_wanted_parallelism(efx);
1341 if (separate_tx_channels)
1343 n_channels += extra_channels;
1344 n_channels = min(n_channels, efx->max_channels);
1346 for (i = 0; i < n_channels; i++)
1347 xentries[i].entry = i;
1348 rc = pci_enable_msix_range(efx->pci_dev,
1349 xentries, 1, n_channels);
1351 /* Fall back to single channel MSI */
1352 efx->interrupt_mode = EFX_INT_MODE_MSI;
1353 netif_err(efx, drv, efx->net_dev,
1354 "could not enable MSI-X\n");
1355 } else if (rc < n_channels) {
1356 netif_err(efx, drv, efx->net_dev,
1357 "WARNING: Insufficient MSI-X vectors"
1358 " available (%d < %u).\n", rc, n_channels);
1359 netif_err(efx, drv, efx->net_dev,
1360 "WARNING: Performance may be reduced.\n");
1365 efx->n_channels = n_channels;
1366 if (n_channels > extra_channels)
1367 n_channels -= extra_channels;
1368 if (separate_tx_channels) {
1369 efx->n_tx_channels = max(n_channels / 2, 1U);
1370 efx->n_rx_channels = max(n_channels -
1374 efx->n_tx_channels = n_channels;
1375 efx->n_rx_channels = n_channels;
1377 for (i = 0; i < efx->n_channels; i++)
1378 efx_get_channel(efx, i)->irq =
1383 /* Try single interrupt MSI */
1384 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1385 efx->n_channels = 1;
1386 efx->n_rx_channels = 1;
1387 efx->n_tx_channels = 1;
1388 rc = pci_enable_msi(efx->pci_dev);
1390 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1392 netif_err(efx, drv, efx->net_dev,
1393 "could not enable MSI\n");
1394 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1398 /* Assume legacy interrupts */
1399 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1400 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1401 efx->n_rx_channels = 1;
1402 efx->n_tx_channels = 1;
1403 efx->legacy_irq = efx->pci_dev->irq;
1406 /* Assign extra channels if possible */
1407 j = efx->n_channels;
1408 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1409 if (!efx->extra_channel_type[i])
1411 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1412 efx->n_channels <= extra_channels) {
1413 efx->extra_channel_type[i]->handle_no_channel(efx);
1416 efx_get_channel(efx, j)->type =
1417 efx->extra_channel_type[i];
1421 /* RSS might be usable on VFs even if it is disabled on the PF */
1422 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1423 efx->n_rx_channels : efx_vf_size(efx));
1428 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1430 struct efx_channel *channel, *end_channel;
1433 BUG_ON(efx->state == STATE_DISABLED);
1435 efx->irq_soft_enabled = true;
1438 efx_for_each_channel(channel, efx) {
1439 if (!channel->type->keep_eventq) {
1440 rc = efx_init_eventq(channel);
1444 efx_start_eventq(channel);
1447 efx_mcdi_mode_event(efx);
1451 end_channel = channel;
1452 efx_for_each_channel(channel, efx) {
1453 if (channel == end_channel)
1455 efx_stop_eventq(channel);
1456 if (!channel->type->keep_eventq)
1457 efx_fini_eventq(channel);
1463 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1465 struct efx_channel *channel;
1467 if (efx->state == STATE_DISABLED)
1470 efx_mcdi_mode_poll(efx);
1472 efx->irq_soft_enabled = false;
1475 if (efx->legacy_irq)
1476 synchronize_irq(efx->legacy_irq);
1478 efx_for_each_channel(channel, efx) {
1480 synchronize_irq(channel->irq);
1482 efx_stop_eventq(channel);
1483 if (!channel->type->keep_eventq)
1484 efx_fini_eventq(channel);
1487 /* Flush the asynchronous MCDI request queue */
1488 efx_mcdi_flush_async(efx);
1491 static int efx_enable_interrupts(struct efx_nic *efx)
1493 struct efx_channel *channel, *end_channel;
1496 BUG_ON(efx->state == STATE_DISABLED);
1498 if (efx->eeh_disabled_legacy_irq) {
1499 enable_irq(efx->legacy_irq);
1500 efx->eeh_disabled_legacy_irq = false;
1503 efx->type->irq_enable_master(efx);
1505 efx_for_each_channel(channel, efx) {
1506 if (channel->type->keep_eventq) {
1507 rc = efx_init_eventq(channel);
1513 rc = efx_soft_enable_interrupts(efx);
1520 end_channel = channel;
1521 efx_for_each_channel(channel, efx) {
1522 if (channel == end_channel)
1524 if (channel->type->keep_eventq)
1525 efx_fini_eventq(channel);
1528 efx->type->irq_disable_non_ev(efx);
1533 static void efx_disable_interrupts(struct efx_nic *efx)
1535 struct efx_channel *channel;
1537 efx_soft_disable_interrupts(efx);
1539 efx_for_each_channel(channel, efx) {
1540 if (channel->type->keep_eventq)
1541 efx_fini_eventq(channel);
1544 efx->type->irq_disable_non_ev(efx);
1547 static void efx_remove_interrupts(struct efx_nic *efx)
1549 struct efx_channel *channel;
1551 /* Remove MSI/MSI-X interrupts */
1552 efx_for_each_channel(channel, efx)
1554 pci_disable_msi(efx->pci_dev);
1555 pci_disable_msix(efx->pci_dev);
1557 /* Remove legacy interrupt */
1558 efx->legacy_irq = 0;
1561 static void efx_set_channels(struct efx_nic *efx)
1563 struct efx_channel *channel;
1564 struct efx_tx_queue *tx_queue;
1566 efx->tx_channel_offset =
1567 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1569 /* We need to mark which channels really have RX and TX
1570 * queues, and adjust the TX queue numbers if we have separate
1571 * RX-only and TX-only channels.
1573 efx_for_each_channel(channel, efx) {
1574 if (channel->channel < efx->n_rx_channels)
1575 channel->rx_queue.core_index = channel->channel;
1577 channel->rx_queue.core_index = -1;
1579 efx_for_each_channel_tx_queue(tx_queue, channel)
1580 tx_queue->queue -= (efx->tx_channel_offset *
1585 static int efx_probe_nic(struct efx_nic *efx)
1590 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1592 /* Carry out hardware-type specific initialisation */
1593 rc = efx->type->probe(efx);
1597 /* Determine the number of channels and queues by trying to hook
1598 * in MSI-X interrupts. */
1599 rc = efx_probe_interrupts(efx);
1603 efx_set_channels(efx);
1605 rc = efx->type->dimension_resources(efx);
1609 if (efx->n_channels > 1)
1610 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1611 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1612 efx->rx_indir_table[i] =
1613 ethtool_rxfh_indir_default(i, efx->rss_spread);
1615 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1616 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1618 /* Initialise the interrupt moderation settings */
1619 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1625 efx_remove_interrupts(efx);
1627 efx->type->remove(efx);
1631 static void efx_remove_nic(struct efx_nic *efx)
1633 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1635 efx_remove_interrupts(efx);
1636 efx->type->remove(efx);
1639 static int efx_probe_filters(struct efx_nic *efx)
1643 spin_lock_init(&efx->filter_lock);
1645 rc = efx->type->filter_table_probe(efx);
1649 #ifdef CONFIG_RFS_ACCEL
1650 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1651 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters,
1652 sizeof(*efx->rps_flow_id),
1654 if (!efx->rps_flow_id) {
1655 efx->type->filter_table_remove(efx);
1664 static void efx_remove_filters(struct efx_nic *efx)
1666 #ifdef CONFIG_RFS_ACCEL
1667 kfree(efx->rps_flow_id);
1669 efx->type->filter_table_remove(efx);
1672 static void efx_restore_filters(struct efx_nic *efx)
1674 efx->type->filter_table_restore(efx);
1677 /**************************************************************************
1679 * NIC startup/shutdown
1681 *************************************************************************/
1683 static int efx_probe_all(struct efx_nic *efx)
1687 rc = efx_probe_nic(efx);
1689 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1693 rc = efx_probe_port(efx);
1695 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1699 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1700 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1704 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1706 rc = efx_probe_filters(efx);
1708 netif_err(efx, probe, efx->net_dev,
1709 "failed to create filter tables\n");
1713 rc = efx_probe_channels(efx);
1720 efx_remove_filters(efx);
1722 efx_remove_port(efx);
1724 efx_remove_nic(efx);
1729 /* If the interface is supposed to be running but is not, start
1730 * the hardware and software data path, regular activity for the port
1731 * (MAC statistics, link polling, etc.) and schedule the port to be
1732 * reconfigured. Interrupts must already be enabled. This function
1733 * is safe to call multiple times, so long as the NIC is not disabled.
1734 * Requires the RTNL lock.
1736 static void efx_start_all(struct efx_nic *efx)
1738 EFX_ASSERT_RESET_SERIALISED(efx);
1739 BUG_ON(efx->state == STATE_DISABLED);
1741 /* Check that it is appropriate to restart the interface. All
1742 * of these flags are safe to read under just the rtnl lock */
1743 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1747 efx_start_port(efx);
1748 efx_start_datapath(efx);
1750 /* Start the hardware monitor if there is one */
1751 if (efx->type->monitor != NULL)
1752 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1753 efx_monitor_interval);
1755 /* If link state detection is normally event-driven, we have
1756 * to poll now because we could have missed a change
1758 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1759 mutex_lock(&efx->mac_lock);
1760 if (efx->phy_op->poll(efx))
1761 efx_link_status_changed(efx);
1762 mutex_unlock(&efx->mac_lock);
1765 efx->type->start_stats(efx);
1766 efx->type->pull_stats(efx);
1767 spin_lock_bh(&efx->stats_lock);
1768 efx->type->update_stats(efx, NULL, NULL);
1769 spin_unlock_bh(&efx->stats_lock);
1772 /* Quiesce the hardware and software data path, and regular activity
1773 * for the port without bringing the link down. Safe to call multiple
1774 * times with the NIC in almost any state, but interrupts should be
1775 * enabled. Requires the RTNL lock.
1777 static void efx_stop_all(struct efx_nic *efx)
1779 EFX_ASSERT_RESET_SERIALISED(efx);
1781 /* port_enabled can be read safely under the rtnl lock */
1782 if (!efx->port_enabled)
1785 /* update stats before we go down so we can accurately count
1788 efx->type->pull_stats(efx);
1789 spin_lock_bh(&efx->stats_lock);
1790 efx->type->update_stats(efx, NULL, NULL);
1791 spin_unlock_bh(&efx->stats_lock);
1792 efx->type->stop_stats(efx);
1795 /* Stop the kernel transmit interface. This is only valid if
1796 * the device is stopped or detached; otherwise the watchdog
1797 * may fire immediately.
1799 WARN_ON(netif_running(efx->net_dev) &&
1800 netif_device_present(efx->net_dev));
1801 netif_tx_disable(efx->net_dev);
1803 efx_stop_datapath(efx);
1806 static void efx_remove_all(struct efx_nic *efx)
1808 efx_remove_channels(efx);
1809 efx_remove_filters(efx);
1810 efx_remove_port(efx);
1811 efx_remove_nic(efx);
1814 /**************************************************************************
1816 * Interrupt moderation
1818 **************************************************************************/
1820 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1824 if (usecs * 1000 < quantum_ns)
1825 return 1; /* never round down to 0 */
1826 return usecs * 1000 / quantum_ns;
1829 /* Set interrupt moderation parameters */
1830 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1831 unsigned int rx_usecs, bool rx_adaptive,
1832 bool rx_may_override_tx)
1834 struct efx_channel *channel;
1835 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1836 efx->timer_quantum_ns,
1838 unsigned int tx_ticks;
1839 unsigned int rx_ticks;
1841 EFX_ASSERT_RESET_SERIALISED(efx);
1843 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1846 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1847 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1849 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1850 !rx_may_override_tx) {
1851 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1852 "RX and TX IRQ moderation must be equal\n");
1856 efx->irq_rx_adaptive = rx_adaptive;
1857 efx->irq_rx_moderation = rx_ticks;
1858 efx_for_each_channel(channel, efx) {
1859 if (efx_channel_has_rx_queue(channel))
1860 channel->irq_moderation = rx_ticks;
1861 else if (efx_channel_has_tx_queues(channel))
1862 channel->irq_moderation = tx_ticks;
1868 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1869 unsigned int *rx_usecs, bool *rx_adaptive)
1871 /* We must round up when converting ticks to microseconds
1872 * because we round down when converting the other way.
1875 *rx_adaptive = efx->irq_rx_adaptive;
1876 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1877 efx->timer_quantum_ns,
1880 /* If channels are shared between RX and TX, so is IRQ
1881 * moderation. Otherwise, IRQ moderation is the same for all
1882 * TX channels and is not adaptive.
1884 if (efx->tx_channel_offset == 0)
1885 *tx_usecs = *rx_usecs;
1887 *tx_usecs = DIV_ROUND_UP(
1888 efx->channel[efx->tx_channel_offset]->irq_moderation *
1889 efx->timer_quantum_ns,
1893 /**************************************************************************
1897 **************************************************************************/
1899 /* Run periodically off the general workqueue */
1900 static void efx_monitor(struct work_struct *data)
1902 struct efx_nic *efx = container_of(data, struct efx_nic,
1905 netif_vdbg(efx, timer, efx->net_dev,
1906 "hardware monitor executing on CPU %d\n",
1907 raw_smp_processor_id());
1908 BUG_ON(efx->type->monitor == NULL);
1910 /* If the mac_lock is already held then it is likely a port
1911 * reconfiguration is already in place, which will likely do
1912 * most of the work of monitor() anyway. */
1913 if (mutex_trylock(&efx->mac_lock)) {
1914 if (efx->port_enabled)
1915 efx->type->monitor(efx);
1916 mutex_unlock(&efx->mac_lock);
1919 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1920 efx_monitor_interval);
1923 /**************************************************************************
1927 *************************************************************************/
1930 * Context: process, rtnl_lock() held.
1932 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1934 struct efx_nic *efx = netdev_priv(net_dev);
1935 struct mii_ioctl_data *data = if_mii(ifr);
1937 if (cmd == SIOCSHWTSTAMP)
1938 return efx_ptp_set_ts_config(efx, ifr);
1939 if (cmd == SIOCGHWTSTAMP)
1940 return efx_ptp_get_ts_config(efx, ifr);
1942 /* Convert phy_id from older PRTAD/DEVAD format */
1943 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1944 (data->phy_id & 0xfc00) == 0x0400)
1945 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1947 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1950 /**************************************************************************
1954 **************************************************************************/
1956 static void efx_init_napi_channel(struct efx_channel *channel)
1958 struct efx_nic *efx = channel->efx;
1960 channel->napi_dev = efx->net_dev;
1961 netif_napi_add(channel->napi_dev, &channel->napi_str,
1962 efx_poll, napi_weight);
1965 static void efx_init_napi(struct efx_nic *efx)
1967 struct efx_channel *channel;
1969 efx_for_each_channel(channel, efx)
1970 efx_init_napi_channel(channel);
1973 static void efx_fini_napi_channel(struct efx_channel *channel)
1975 if (channel->napi_dev)
1976 netif_napi_del(&channel->napi_str);
1977 channel->napi_dev = NULL;
1980 static void efx_fini_napi(struct efx_nic *efx)
1982 struct efx_channel *channel;
1984 efx_for_each_channel(channel, efx)
1985 efx_fini_napi_channel(channel);
1988 /**************************************************************************
1990 * Kernel netpoll interface
1992 *************************************************************************/
1994 #ifdef CONFIG_NET_POLL_CONTROLLER
1996 /* Although in the common case interrupts will be disabled, this is not
1997 * guaranteed. However, all our work happens inside the NAPI callback,
1998 * so no locking is required.
2000 static void efx_netpoll(struct net_device *net_dev)
2002 struct efx_nic *efx = netdev_priv(net_dev);
2003 struct efx_channel *channel;
2005 efx_for_each_channel(channel, efx)
2006 efx_schedule_channel(channel);
2011 /**************************************************************************
2013 * Kernel net device interface
2015 *************************************************************************/
2017 /* Context: process, rtnl_lock() held. */
2018 static int efx_net_open(struct net_device *net_dev)
2020 struct efx_nic *efx = netdev_priv(net_dev);
2023 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2024 raw_smp_processor_id());
2026 rc = efx_check_disabled(efx);
2029 if (efx->phy_mode & PHY_MODE_SPECIAL)
2031 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2034 /* Notify the kernel of the link state polled during driver load,
2035 * before the monitor starts running */
2036 efx_link_status_changed(efx);
2039 efx_selftest_async_start(efx);
2043 /* Context: process, rtnl_lock() held.
2044 * Note that the kernel will ignore our return code; this method
2045 * should really be a void.
2047 static int efx_net_stop(struct net_device *net_dev)
2049 struct efx_nic *efx = netdev_priv(net_dev);
2051 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2052 raw_smp_processor_id());
2054 /* Stop the device and flush all the channels */
2060 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2061 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
2062 struct rtnl_link_stats64 *stats)
2064 struct efx_nic *efx = netdev_priv(net_dev);
2066 spin_lock_bh(&efx->stats_lock);
2067 efx->type->update_stats(efx, NULL, stats);
2068 spin_unlock_bh(&efx->stats_lock);
2073 /* Context: netif_tx_lock held, BHs disabled. */
2074 static void efx_watchdog(struct net_device *net_dev)
2076 struct efx_nic *efx = netdev_priv(net_dev);
2078 netif_err(efx, tx_err, efx->net_dev,
2079 "TX stuck with port_enabled=%d: resetting channels\n",
2082 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2086 /* Context: process, rtnl_lock() held. */
2087 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2089 struct efx_nic *efx = netdev_priv(net_dev);
2092 rc = efx_check_disabled(efx);
2095 if (new_mtu > EFX_MAX_MTU)
2098 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2100 efx_device_detach_sync(efx);
2103 mutex_lock(&efx->mac_lock);
2104 net_dev->mtu = new_mtu;
2105 efx->type->reconfigure_mac(efx);
2106 mutex_unlock(&efx->mac_lock);
2109 netif_device_attach(efx->net_dev);
2113 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2115 struct efx_nic *efx = netdev_priv(net_dev);
2116 struct sockaddr *addr = data;
2117 u8 *new_addr = addr->sa_data;
2119 if (!is_valid_ether_addr(new_addr)) {
2120 netif_err(efx, drv, efx->net_dev,
2121 "invalid ethernet MAC address requested: %pM\n",
2123 return -EADDRNOTAVAIL;
2126 ether_addr_copy(net_dev->dev_addr, new_addr);
2127 efx_sriov_mac_address_changed(efx);
2129 /* Reconfigure the MAC */
2130 mutex_lock(&efx->mac_lock);
2131 efx->type->reconfigure_mac(efx);
2132 mutex_unlock(&efx->mac_lock);
2137 /* Context: netif_addr_lock held, BHs disabled. */
2138 static void efx_set_rx_mode(struct net_device *net_dev)
2140 struct efx_nic *efx = netdev_priv(net_dev);
2142 if (efx->port_enabled)
2143 queue_work(efx->workqueue, &efx->mac_work);
2144 /* Otherwise efx_start_port() will do this */
2147 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2149 struct efx_nic *efx = netdev_priv(net_dev);
2151 /* If disabling RX n-tuple filtering, clear existing filters */
2152 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2153 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2158 static const struct net_device_ops efx_farch_netdev_ops = {
2159 .ndo_open = efx_net_open,
2160 .ndo_stop = efx_net_stop,
2161 .ndo_get_stats64 = efx_net_stats,
2162 .ndo_tx_timeout = efx_watchdog,
2163 .ndo_start_xmit = efx_hard_start_xmit,
2164 .ndo_validate_addr = eth_validate_addr,
2165 .ndo_do_ioctl = efx_ioctl,
2166 .ndo_change_mtu = efx_change_mtu,
2167 .ndo_set_mac_address = efx_set_mac_address,
2168 .ndo_set_rx_mode = efx_set_rx_mode,
2169 .ndo_set_features = efx_set_features,
2170 #ifdef CONFIG_SFC_SRIOV
2171 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2172 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2173 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2174 .ndo_get_vf_config = efx_sriov_get_vf_config,
2176 #ifdef CONFIG_NET_POLL_CONTROLLER
2177 .ndo_poll_controller = efx_netpoll,
2179 .ndo_setup_tc = efx_setup_tc,
2180 #ifdef CONFIG_RFS_ACCEL
2181 .ndo_rx_flow_steer = efx_filter_rfs,
2185 static const struct net_device_ops efx_ef10_netdev_ops = {
2186 .ndo_open = efx_net_open,
2187 .ndo_stop = efx_net_stop,
2188 .ndo_get_stats64 = efx_net_stats,
2189 .ndo_tx_timeout = efx_watchdog,
2190 .ndo_start_xmit = efx_hard_start_xmit,
2191 .ndo_validate_addr = eth_validate_addr,
2192 .ndo_do_ioctl = efx_ioctl,
2193 .ndo_change_mtu = efx_change_mtu,
2194 .ndo_set_mac_address = efx_set_mac_address,
2195 .ndo_set_rx_mode = efx_set_rx_mode,
2196 .ndo_set_features = efx_set_features,
2197 #ifdef CONFIG_NET_POLL_CONTROLLER
2198 .ndo_poll_controller = efx_netpoll,
2200 #ifdef CONFIG_RFS_ACCEL
2201 .ndo_rx_flow_steer = efx_filter_rfs,
2205 static void efx_update_name(struct efx_nic *efx)
2207 strcpy(efx->name, efx->net_dev->name);
2208 efx_mtd_rename(efx);
2209 efx_set_channel_names(efx);
2212 static int efx_netdev_event(struct notifier_block *this,
2213 unsigned long event, void *ptr)
2215 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2217 if ((net_dev->netdev_ops == &efx_farch_netdev_ops ||
2218 net_dev->netdev_ops == &efx_ef10_netdev_ops) &&
2219 event == NETDEV_CHANGENAME)
2220 efx_update_name(netdev_priv(net_dev));
2225 static struct notifier_block efx_netdev_notifier = {
2226 .notifier_call = efx_netdev_event,
2230 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2232 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2233 return sprintf(buf, "%d\n", efx->phy_type);
2235 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2237 static int efx_register_netdev(struct efx_nic *efx)
2239 struct net_device *net_dev = efx->net_dev;
2240 struct efx_channel *channel;
2243 net_dev->watchdog_timeo = 5 * HZ;
2244 net_dev->irq = efx->pci_dev->irq;
2245 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
2246 net_dev->netdev_ops = &efx_ef10_netdev_ops;
2247 net_dev->priv_flags |= IFF_UNICAST_FLT;
2249 net_dev->netdev_ops = &efx_farch_netdev_ops;
2251 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2252 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2256 /* Enable resets to be scheduled and check whether any were
2257 * already requested. If so, the NIC is probably hosed so we
2260 efx->state = STATE_READY;
2261 smp_mb(); /* ensure we change state before checking reset_pending */
2262 if (efx->reset_pending) {
2263 netif_err(efx, probe, efx->net_dev,
2264 "aborting probe due to scheduled reset\n");
2269 rc = dev_alloc_name(net_dev, net_dev->name);
2272 efx_update_name(efx);
2274 /* Always start with carrier off; PHY events will detect the link */
2275 netif_carrier_off(net_dev);
2277 rc = register_netdevice(net_dev);
2281 efx_for_each_channel(channel, efx) {
2282 struct efx_tx_queue *tx_queue;
2283 efx_for_each_channel_tx_queue(tx_queue, channel)
2284 efx_init_tx_queue_core_txq(tx_queue);
2291 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2293 netif_err(efx, drv, efx->net_dev,
2294 "failed to init net dev attributes\n");
2295 goto fail_registered;
2302 efx_dissociate(efx);
2303 unregister_netdevice(net_dev);
2305 efx->state = STATE_UNINIT;
2307 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2311 static void efx_unregister_netdev(struct efx_nic *efx)
2316 BUG_ON(netdev_priv(efx->net_dev) != efx);
2318 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2319 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2322 unregister_netdevice(efx->net_dev);
2323 efx->state = STATE_UNINIT;
2327 /**************************************************************************
2329 * Device reset and suspend
2331 **************************************************************************/
2333 /* Tears down the entire software state and most of the hardware state
2335 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2337 EFX_ASSERT_RESET_SERIALISED(efx);
2339 if (method == RESET_TYPE_MCDI_TIMEOUT)
2340 efx->type->prepare_flr(efx);
2343 efx_disable_interrupts(efx);
2345 mutex_lock(&efx->mac_lock);
2346 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2347 efx->phy_op->fini(efx);
2348 efx->type->fini(efx);
2351 /* This function will always ensure that the locks acquired in
2352 * efx_reset_down() are released. A failure return code indicates
2353 * that we were unable to reinitialise the hardware, and the
2354 * driver should be disabled. If ok is false, then the rx and tx
2355 * engines are not restarted, pending a RESET_DISABLE. */
2356 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2360 EFX_ASSERT_RESET_SERIALISED(efx);
2362 if (method == RESET_TYPE_MCDI_TIMEOUT)
2363 efx->type->finish_flr(efx);
2365 /* Ensure that SRAM is initialised even if we're disabling the device */
2366 rc = efx->type->init(efx);
2368 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2375 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2376 rc = efx->phy_op->init(efx);
2379 if (efx->phy_op->reconfigure(efx))
2380 netif_err(efx, drv, efx->net_dev,
2381 "could not restore PHY settings\n");
2384 rc = efx_enable_interrupts(efx);
2387 efx_restore_filters(efx);
2388 efx_sriov_reset(efx);
2390 mutex_unlock(&efx->mac_lock);
2397 efx->port_initialized = false;
2399 mutex_unlock(&efx->mac_lock);
2404 /* Reset the NIC using the specified method. Note that the reset may
2405 * fail, in which case the card will be left in an unusable state.
2407 * Caller must hold the rtnl_lock.
2409 int efx_reset(struct efx_nic *efx, enum reset_type method)
2414 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2415 RESET_TYPE(method));
2417 efx_device_detach_sync(efx);
2418 efx_reset_down(efx, method);
2420 rc = efx->type->reset(efx, method);
2422 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2426 /* Clear flags for the scopes we covered. We assume the NIC and
2427 * driver are now quiescent so that there is no race here.
2429 if (method < RESET_TYPE_MAX_METHOD)
2430 efx->reset_pending &= -(1 << (method + 1));
2431 else /* it doesn't fit into the well-ordered scope hierarchy */
2432 __clear_bit(method, &efx->reset_pending);
2434 /* Reinitialise bus-mastering, which may have been turned off before
2435 * the reset was scheduled. This is still appropriate, even in the
2436 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2437 * can respond to requests. */
2438 pci_set_master(efx->pci_dev);
2441 /* Leave device stopped if necessary */
2443 method == RESET_TYPE_DISABLE ||
2444 method == RESET_TYPE_RECOVER_OR_DISABLE;
2445 rc2 = efx_reset_up(efx, method, !disabled);
2453 dev_close(efx->net_dev);
2454 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2455 efx->state = STATE_DISABLED;
2457 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2458 netif_device_attach(efx->net_dev);
2463 /* Try recovery mechanisms.
2464 * For now only EEH is supported.
2465 * Returns 0 if the recovery mechanisms are unsuccessful.
2466 * Returns a non-zero value otherwise.
2468 int efx_try_recovery(struct efx_nic *efx)
2471 /* A PCI error can occur and not be seen by EEH because nothing
2472 * happens on the PCI bus. In this case the driver may fail and
2473 * schedule a 'recover or reset', leading to this recovery handler.
2474 * Manually call the eeh failure check function.
2476 struct eeh_dev *eehdev =
2477 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2479 if (eeh_dev_check_failure(eehdev)) {
2480 /* The EEH mechanisms will handle the error and reset the
2481 * device if necessary.
2489 static void efx_wait_for_bist_end(struct efx_nic *efx)
2493 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2494 if (efx_mcdi_poll_reboot(efx))
2496 msleep(BIST_WAIT_DELAY_MS);
2499 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2501 /* Either way unset the BIST flag. If we found no reboot we probably
2502 * won't recover, but we should try.
2504 efx->mc_bist_for_other_fn = false;
2507 /* The worker thread exists so that code that cannot sleep can
2508 * schedule a reset for later.
2510 static void efx_reset_work(struct work_struct *data)
2512 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2513 unsigned long pending;
2514 enum reset_type method;
2516 pending = ACCESS_ONCE(efx->reset_pending);
2517 method = fls(pending) - 1;
2519 if (method == RESET_TYPE_MC_BIST)
2520 efx_wait_for_bist_end(efx);
2522 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2523 method == RESET_TYPE_RECOVER_OR_ALL) &&
2524 efx_try_recovery(efx))
2532 /* We checked the state in efx_schedule_reset() but it may
2533 * have changed by now. Now that we have the RTNL lock,
2534 * it cannot change again.
2536 if (efx->state == STATE_READY)
2537 (void)efx_reset(efx, method);
2542 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2544 enum reset_type method;
2546 if (efx->state == STATE_RECOVERY) {
2547 netif_dbg(efx, drv, efx->net_dev,
2548 "recovering: skip scheduling %s reset\n",
2554 case RESET_TYPE_INVISIBLE:
2555 case RESET_TYPE_ALL:
2556 case RESET_TYPE_RECOVER_OR_ALL:
2557 case RESET_TYPE_WORLD:
2558 case RESET_TYPE_DISABLE:
2559 case RESET_TYPE_RECOVER_OR_DISABLE:
2560 case RESET_TYPE_MC_BIST:
2561 case RESET_TYPE_MCDI_TIMEOUT:
2563 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2564 RESET_TYPE(method));
2567 method = efx->type->map_reset_reason(type);
2568 netif_dbg(efx, drv, efx->net_dev,
2569 "scheduling %s reset for %s\n",
2570 RESET_TYPE(method), RESET_TYPE(type));
2574 set_bit(method, &efx->reset_pending);
2575 smp_mb(); /* ensure we change reset_pending before checking state */
2577 /* If we're not READY then just leave the flags set as the cue
2578 * to abort probing or reschedule the reset later.
2580 if (ACCESS_ONCE(efx->state) != STATE_READY)
2583 /* efx_process_channel() will no longer read events once a
2584 * reset is scheduled. So switch back to poll'd MCDI completions. */
2585 efx_mcdi_mode_poll(efx);
2587 queue_work(reset_workqueue, &efx->reset_work);
2590 /**************************************************************************
2592 * List of NICs we support
2594 **************************************************************************/
2596 /* PCI device ID table */
2597 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2598 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2599 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2600 .driver_data = (unsigned long) &falcon_a1_nic_type},
2601 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2602 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2603 .driver_data = (unsigned long) &falcon_b0_nic_type},
2604 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2605 .driver_data = (unsigned long) &siena_a0_nic_type},
2606 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2607 .driver_data = (unsigned long) &siena_a0_nic_type},
2608 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2609 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2610 {0} /* end of list */
2613 /**************************************************************************
2615 * Dummy PHY/MAC operations
2617 * Can be used for some unimplemented operations
2618 * Needed so all function pointers are valid and do not have to be tested
2621 **************************************************************************/
2622 int efx_port_dummy_op_int(struct efx_nic *efx)
2626 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2628 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2633 static const struct efx_phy_operations efx_dummy_phy_operations = {
2634 .init = efx_port_dummy_op_int,
2635 .reconfigure = efx_port_dummy_op_int,
2636 .poll = efx_port_dummy_op_poll,
2637 .fini = efx_port_dummy_op_void,
2640 /**************************************************************************
2644 **************************************************************************/
2646 /* This zeroes out and then fills in the invariants in a struct
2647 * efx_nic (including all sub-structures).
2649 static int efx_init_struct(struct efx_nic *efx,
2650 struct pci_dev *pci_dev, struct net_device *net_dev)
2654 /* Initialise common structures */
2655 INIT_LIST_HEAD(&efx->node);
2656 INIT_LIST_HEAD(&efx->secondary_list);
2657 spin_lock_init(&efx->biu_lock);
2658 #ifdef CONFIG_SFC_MTD
2659 INIT_LIST_HEAD(&efx->mtd_list);
2661 INIT_WORK(&efx->reset_work, efx_reset_work);
2662 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2663 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2664 efx->pci_dev = pci_dev;
2665 efx->msg_enable = debug;
2666 efx->state = STATE_UNINIT;
2667 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2669 efx->net_dev = net_dev;
2670 efx->rx_prefix_size = efx->type->rx_prefix_size;
2672 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
2673 efx->rx_packet_hash_offset =
2674 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
2675 efx->rx_packet_ts_offset =
2676 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
2677 spin_lock_init(&efx->stats_lock);
2678 mutex_init(&efx->mac_lock);
2679 efx->phy_op = &efx_dummy_phy_operations;
2680 efx->mdio.dev = net_dev;
2681 INIT_WORK(&efx->mac_work, efx_mac_work);
2682 init_waitqueue_head(&efx->flush_wq);
2684 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2685 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2686 if (!efx->channel[i])
2688 efx->msi_context[i].efx = efx;
2689 efx->msi_context[i].index = i;
2692 /* Higher numbered interrupt modes are less capable! */
2693 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2696 /* Would be good to use the net_dev name, but we're too early */
2697 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2699 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2700 if (!efx->workqueue)
2706 efx_fini_struct(efx);
2710 static void efx_fini_struct(struct efx_nic *efx)
2714 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2715 kfree(efx->channel[i]);
2719 if (efx->workqueue) {
2720 destroy_workqueue(efx->workqueue);
2721 efx->workqueue = NULL;
2725 /**************************************************************************
2729 **************************************************************************/
2731 /* Main body of final NIC shutdown code
2732 * This is called only at module unload (or hotplug removal).
2734 static void efx_pci_remove_main(struct efx_nic *efx)
2736 /* Flush reset_work. It can no longer be scheduled since we
2739 BUG_ON(efx->state == STATE_READY);
2740 cancel_work_sync(&efx->reset_work);
2742 efx_disable_interrupts(efx);
2743 efx_nic_fini_interrupt(efx);
2745 efx->type->fini(efx);
2747 efx_remove_all(efx);
2750 /* Final NIC shutdown
2751 * This is called only at module unload (or hotplug removal).
2753 static void efx_pci_remove(struct pci_dev *pci_dev)
2755 struct efx_nic *efx;
2757 efx = pci_get_drvdata(pci_dev);
2761 /* Mark the NIC as fini, then stop the interface */
2763 efx_dissociate(efx);
2764 dev_close(efx->net_dev);
2765 efx_disable_interrupts(efx);
2768 efx_sriov_fini(efx);
2769 efx_unregister_netdev(efx);
2771 efx_mtd_remove(efx);
2773 efx_pci_remove_main(efx);
2776 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2778 efx_fini_struct(efx);
2779 free_netdev(efx->net_dev);
2781 pci_disable_pcie_error_reporting(pci_dev);
2784 /* NIC VPD information
2785 * Called during probe to display the part number of the
2786 * installed NIC. VPD is potentially very large but this should
2787 * always appear within the first 512 bytes.
2789 #define SFC_VPD_LEN 512
2790 static void efx_probe_vpd_strings(struct efx_nic *efx)
2792 struct pci_dev *dev = efx->pci_dev;
2793 char vpd_data[SFC_VPD_LEN];
2795 int ro_start, ro_size, i, j;
2797 /* Get the vpd data from the device */
2798 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2799 if (vpd_size <= 0) {
2800 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2804 /* Get the Read only section */
2805 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2807 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2811 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
2813 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2814 if (i + j > vpd_size)
2817 /* Get the Part number */
2818 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2820 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2824 j = pci_vpd_info_field_size(&vpd_data[i]);
2825 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2826 if (i + j > vpd_size) {
2827 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2831 netif_info(efx, drv, efx->net_dev,
2832 "Part Number : %.*s\n", j, &vpd_data[i]);
2834 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
2836 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
2838 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
2842 j = pci_vpd_info_field_size(&vpd_data[i]);
2843 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2844 if (i + j > vpd_size) {
2845 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
2849 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
2853 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
2857 /* Main body of NIC initialisation
2858 * This is called at module load (or hotplug insertion, theoretically).
2860 static int efx_pci_probe_main(struct efx_nic *efx)
2864 /* Do start-of-day initialisation */
2865 rc = efx_probe_all(efx);
2871 rc = efx->type->init(efx);
2873 netif_err(efx, probe, efx->net_dev,
2874 "failed to initialise NIC\n");
2878 rc = efx_init_port(efx);
2880 netif_err(efx, probe, efx->net_dev,
2881 "failed to initialise port\n");
2885 rc = efx_nic_init_interrupt(efx);
2888 rc = efx_enable_interrupts(efx);
2895 efx_nic_fini_interrupt(efx);
2899 efx->type->fini(efx);
2902 efx_remove_all(efx);
2907 /* NIC initialisation
2909 * This is called at module load (or hotplug insertion,
2910 * theoretically). It sets up PCI mappings, resets the NIC,
2911 * sets up and registers the network devices with the kernel and hooks
2912 * the interrupt service routine. It does not prepare the device for
2913 * transmission; this is left to the first time one of the network
2914 * interfaces is brought up (i.e. efx_net_open).
2916 static int efx_pci_probe(struct pci_dev *pci_dev,
2917 const struct pci_device_id *entry)
2919 struct net_device *net_dev;
2920 struct efx_nic *efx;
2923 /* Allocate and initialise a struct net_device and struct efx_nic */
2924 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2928 efx = netdev_priv(net_dev);
2929 efx->type = (const struct efx_nic_type *) entry->driver_data;
2930 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2931 NETIF_F_HIGHDMA | NETIF_F_TSO |
2933 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2934 net_dev->features |= NETIF_F_TSO6;
2935 /* Mask for features that also apply to VLAN devices */
2936 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2937 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2939 /* All offloads can be toggled */
2940 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2941 pci_set_drvdata(pci_dev, efx);
2942 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2943 rc = efx_init_struct(efx, pci_dev, net_dev);
2947 netif_info(efx, probe, efx->net_dev,
2948 "Solarflare NIC detected\n");
2950 efx_probe_vpd_strings(efx);
2952 /* Set up basic I/O (BAR mappings etc) */
2953 rc = efx_init_io(efx);
2957 rc = efx_pci_probe_main(efx);
2961 rc = efx_register_netdev(efx);
2965 rc = efx_sriov_init(efx);
2967 netif_err(efx, probe, efx->net_dev,
2968 "SR-IOV can't be enabled rc %d\n", rc);
2970 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2972 /* Try to create MTDs, but allow this to fail */
2974 rc = efx_mtd_probe(efx);
2977 netif_warn(efx, probe, efx->net_dev,
2978 "failed to create MTDs (%d)\n", rc);
2980 rc = pci_enable_pcie_error_reporting(pci_dev);
2981 if (rc && rc != -EINVAL)
2982 netif_warn(efx, probe, efx->net_dev,
2983 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2988 efx_pci_remove_main(efx);
2992 efx_fini_struct(efx);
2995 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2996 free_netdev(net_dev);
3000 static int efx_pm_freeze(struct device *dev)
3002 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3006 if (efx->state != STATE_DISABLED) {
3007 efx->state = STATE_UNINIT;
3009 efx_device_detach_sync(efx);
3012 efx_disable_interrupts(efx);
3020 static int efx_pm_thaw(struct device *dev)
3023 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
3027 if (efx->state != STATE_DISABLED) {
3028 rc = efx_enable_interrupts(efx);
3032 mutex_lock(&efx->mac_lock);
3033 efx->phy_op->reconfigure(efx);
3034 mutex_unlock(&efx->mac_lock);
3038 netif_device_attach(efx->net_dev);
3040 efx->state = STATE_READY;
3042 efx->type->resume_wol(efx);
3047 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3048 queue_work(reset_workqueue, &efx->reset_work);
3058 static int efx_pm_poweroff(struct device *dev)
3060 struct pci_dev *pci_dev = to_pci_dev(dev);
3061 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3063 efx->type->fini(efx);
3065 efx->reset_pending = 0;
3067 pci_save_state(pci_dev);
3068 return pci_set_power_state(pci_dev, PCI_D3hot);
3071 /* Used for both resume and restore */
3072 static int efx_pm_resume(struct device *dev)
3074 struct pci_dev *pci_dev = to_pci_dev(dev);
3075 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3078 rc = pci_set_power_state(pci_dev, PCI_D0);
3081 pci_restore_state(pci_dev);
3082 rc = pci_enable_device(pci_dev);
3085 pci_set_master(efx->pci_dev);
3086 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3089 rc = efx->type->init(efx);
3092 rc = efx_pm_thaw(dev);
3096 static int efx_pm_suspend(struct device *dev)
3101 rc = efx_pm_poweroff(dev);
3107 static const struct dev_pm_ops efx_pm_ops = {
3108 .suspend = efx_pm_suspend,
3109 .resume = efx_pm_resume,
3110 .freeze = efx_pm_freeze,
3111 .thaw = efx_pm_thaw,
3112 .poweroff = efx_pm_poweroff,
3113 .restore = efx_pm_resume,
3116 /* A PCI error affecting this device was detected.
3117 * At this point MMIO and DMA may be disabled.
3118 * Stop the software path and request a slot reset.
3120 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3121 enum pci_channel_state state)
3123 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3124 struct efx_nic *efx = pci_get_drvdata(pdev);
3126 if (state == pci_channel_io_perm_failure)
3127 return PCI_ERS_RESULT_DISCONNECT;
3131 if (efx->state != STATE_DISABLED) {
3132 efx->state = STATE_RECOVERY;
3133 efx->reset_pending = 0;
3135 efx_device_detach_sync(efx);
3138 efx_disable_interrupts(efx);
3140 status = PCI_ERS_RESULT_NEED_RESET;
3142 /* If the interface is disabled we don't want to do anything
3145 status = PCI_ERS_RESULT_RECOVERED;
3150 pci_disable_device(pdev);
3155 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
3156 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3158 struct efx_nic *efx = pci_get_drvdata(pdev);
3159 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3162 if (pci_enable_device(pdev)) {
3163 netif_err(efx, hw, efx->net_dev,
3164 "Cannot re-enable PCI device after reset.\n");
3165 status = PCI_ERS_RESULT_DISCONNECT;
3168 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
3170 netif_err(efx, hw, efx->net_dev,
3171 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3172 /* Non-fatal error. Continue. */
3178 /* Perform the actual reset and resume I/O operations. */
3179 static void efx_io_resume(struct pci_dev *pdev)
3181 struct efx_nic *efx = pci_get_drvdata(pdev);
3186 if (efx->state == STATE_DISABLED)
3189 rc = efx_reset(efx, RESET_TYPE_ALL);
3191 netif_err(efx, hw, efx->net_dev,
3192 "efx_reset failed after PCI error (%d)\n", rc);
3194 efx->state = STATE_READY;
3195 netif_dbg(efx, hw, efx->net_dev,
3196 "Done resetting and resuming IO after PCI error.\n");
3203 /* For simplicity and reliability, we always require a slot reset and try to
3204 * reset the hardware when a pci error affecting the device is detected.
3205 * We leave both the link_reset and mmio_enabled callback unimplemented:
3206 * with our request for slot reset the mmio_enabled callback will never be
3207 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3209 static struct pci_error_handlers efx_err_handlers = {
3210 .error_detected = efx_io_error_detected,
3211 .slot_reset = efx_io_slot_reset,
3212 .resume = efx_io_resume,
3215 static struct pci_driver efx_pci_driver = {
3216 .name = KBUILD_MODNAME,
3217 .id_table = efx_pci_table,
3218 .probe = efx_pci_probe,
3219 .remove = efx_pci_remove,
3220 .driver.pm = &efx_pm_ops,
3221 .err_handler = &efx_err_handlers,
3224 /**************************************************************************
3226 * Kernel module interface
3228 *************************************************************************/
3230 module_param(interrupt_mode, uint, 0444);
3231 MODULE_PARM_DESC(interrupt_mode,
3232 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3234 static int __init efx_init_module(void)
3238 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3240 rc = register_netdevice_notifier(&efx_netdev_notifier);
3244 rc = efx_init_sriov();
3248 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3249 if (!reset_workqueue) {
3254 rc = pci_register_driver(&efx_pci_driver);
3261 destroy_workqueue(reset_workqueue);
3265 unregister_netdevice_notifier(&efx_netdev_notifier);
3270 static void __exit efx_exit_module(void)
3272 printk(KERN_INFO "Solarflare NET driver unloading\n");
3274 pci_unregister_driver(&efx_pci_driver);
3275 destroy_workqueue(reset_workqueue);
3277 unregister_netdevice_notifier(&efx_netdev_notifier);
3281 module_init(efx_init_module);
3282 module_exit(efx_exit_module);
3284 MODULE_AUTHOR("Solarflare Communications and "
3285 "Michael Brown <mbrown@fensystems.co.uk>");
3286 MODULE_DESCRIPTION("Solarflare network driver");
3287 MODULE_LICENSE("GPL");
3288 MODULE_DEVICE_TABLE(pci, efx_pci_table);