1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34 #include <linux/crc32.h>
35 #include <linux/clk.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/sched.h>
49 #include <linux/timer.h>
50 #include <linux/bug.h>
51 #include <linux/bitops.h>
52 #include <linux/irq.h>
54 #include <linux/swab.h>
55 #include <linux/phy.h>
56 #include <linux/smsc911x.h>
57 #include <linux/device.h>
59 #include <linux/of_device.h>
60 #include <linux/of_gpio.h>
61 #include <linux/of_net.h>
64 #define SMSC_CHIPNAME "smsc911x"
65 #define SMSC_MDIONAME "smsc911x-mdio"
66 #define SMSC_DRV_VERSION "2008-10-21"
68 MODULE_LICENSE("GPL");
69 MODULE_VERSION(SMSC_DRV_VERSION);
70 MODULE_ALIAS("platform:smsc911x");
73 static int debug = 16;
78 module_param(debug, int, 0);
79 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
86 void (*rx_readfifo)(struct smsc911x_data *pdata,
87 unsigned int *buf, unsigned int wordcount);
88 void (*tx_writefifo)(struct smsc911x_data *pdata,
89 unsigned int *buf, unsigned int wordcount);
92 #define SMSC911X_NUM_SUPPLIES 2
94 struct smsc911x_data {
99 /* used to decide which workarounds apply */
100 unsigned int generation;
102 /* device configuration (copied from platform_data during probe) */
103 struct smsc911x_platform_config config;
105 /* This needs to be acquired before calling any of below:
106 * smsc911x_mac_read(), smsc911x_mac_write()
110 /* spinlock to ensure register accesses are serialised */
113 struct phy_device *phy_dev;
114 struct mii_bus *mii_bus;
115 int phy_irq[PHY_MAX_ADDR];
116 unsigned int using_extphy;
121 unsigned int gpio_setting;
122 unsigned int gpio_orig_setting;
123 struct net_device *dev;
124 struct napi_struct napi;
126 unsigned int software_irq_signal;
128 #ifdef USE_PHY_WORK_AROUND
129 #define MIN_PACKET_SIZE (64)
130 char loopback_tx_pkt[MIN_PACKET_SIZE];
131 char loopback_rx_pkt[MIN_PACKET_SIZE];
132 unsigned int resetcount;
135 /* Members for Multicast filter workaround */
136 unsigned int multicast_update_pending;
137 unsigned int set_bits_mask;
138 unsigned int clear_bits_mask;
142 /* register access functions */
143 const struct smsc911x_ops *ops;
146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
152 /* Easy access to information */
153 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
155 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
157 if (pdata->config.flags & SMSC911X_USE_32BIT)
158 return readl(pdata->ioaddr + reg);
160 if (pdata->config.flags & SMSC911X_USE_16BIT)
161 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
162 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
169 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
171 if (pdata->config.flags & SMSC911X_USE_32BIT)
172 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
174 if (pdata->config.flags & SMSC911X_USE_16BIT)
175 return (readw(pdata->ioaddr +
176 __smsc_shift(pdata, reg)) & 0xFFFF) |
177 ((readw(pdata->ioaddr +
178 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
184 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
189 spin_lock_irqsave(&pdata->dev_lock, flags);
190 data = pdata->ops->reg_read(pdata, reg);
191 spin_unlock_irqrestore(&pdata->dev_lock, flags);
196 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
199 if (pdata->config.flags & SMSC911X_USE_32BIT) {
200 writel(val, pdata->ioaddr + reg);
204 if (pdata->config.flags & SMSC911X_USE_16BIT) {
205 writew(val & 0xFFFF, pdata->ioaddr + reg);
206 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
214 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
216 if (pdata->config.flags & SMSC911X_USE_32BIT) {
217 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
221 if (pdata->config.flags & SMSC911X_USE_16BIT) {
223 pdata->ioaddr + __smsc_shift(pdata, reg));
224 writew((val >> 16) & 0xFFFF,
225 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
232 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
237 spin_lock_irqsave(&pdata->dev_lock, flags);
238 pdata->ops->reg_write(pdata, reg, val);
239 spin_unlock_irqrestore(&pdata->dev_lock, flags);
242 /* Writes a packet to the TX_DATA_FIFO */
244 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
245 unsigned int wordcount)
249 spin_lock_irqsave(&pdata->dev_lock, flags);
251 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
253 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
258 if (pdata->config.flags & SMSC911X_USE_32BIT) {
259 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
263 if (pdata->config.flags & SMSC911X_USE_16BIT) {
265 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
271 spin_unlock_irqrestore(&pdata->dev_lock, flags);
274 /* Writes a packet to the TX_DATA_FIFO - shifted version */
276 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
277 unsigned int wordcount)
281 spin_lock_irqsave(&pdata->dev_lock, flags);
283 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
285 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
290 if (pdata->config.flags & SMSC911X_USE_32BIT) {
291 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
292 TX_DATA_FIFO), buf, wordcount);
296 if (pdata->config.flags & SMSC911X_USE_16BIT) {
298 __smsc911x_reg_write_shift(pdata,
299 TX_DATA_FIFO, *buf++);
305 spin_unlock_irqrestore(&pdata->dev_lock, flags);
308 /* Reads a packet out of the RX_DATA_FIFO */
310 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
311 unsigned int wordcount)
315 spin_lock_irqsave(&pdata->dev_lock, flags);
317 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
319 *buf++ = swab32(__smsc911x_reg_read(pdata,
324 if (pdata->config.flags & SMSC911X_USE_32BIT) {
325 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
329 if (pdata->config.flags & SMSC911X_USE_16BIT) {
331 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
337 spin_unlock_irqrestore(&pdata->dev_lock, flags);
340 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
342 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
343 unsigned int wordcount)
347 spin_lock_irqsave(&pdata->dev_lock, flags);
349 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
351 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
356 if (pdata->config.flags & SMSC911X_USE_32BIT) {
357 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
358 RX_DATA_FIFO), buf, wordcount);
362 if (pdata->config.flags & SMSC911X_USE_16BIT) {
364 *buf++ = __smsc911x_reg_read_shift(pdata,
371 spin_unlock_irqrestore(&pdata->dev_lock, flags);
375 * enable regulator and clock resources.
377 static int smsc911x_enable_resources(struct platform_device *pdev)
379 struct net_device *ndev = platform_get_drvdata(pdev);
380 struct smsc911x_data *pdata = netdev_priv(ndev);
383 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
386 netdev_err(ndev, "failed to enable regulators %d\n",
389 if (!IS_ERR(pdata->clk)) {
390 ret = clk_prepare_enable(pdata->clk);
392 netdev_err(ndev, "failed to enable clock %d\n", ret);
399 * disable resources, currently just regulators.
401 static int smsc911x_disable_resources(struct platform_device *pdev)
403 struct net_device *ndev = platform_get_drvdata(pdev);
404 struct smsc911x_data *pdata = netdev_priv(ndev);
407 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
410 if (!IS_ERR(pdata->clk))
411 clk_disable_unprepare(pdata->clk);
417 * Request resources, currently just regulators.
419 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
420 * these are not always-on we need to request regulators to be turned on
421 * before we can try to access the device registers.
423 static int smsc911x_request_resources(struct platform_device *pdev)
425 struct net_device *ndev = platform_get_drvdata(pdev);
426 struct smsc911x_data *pdata = netdev_priv(ndev);
429 /* Request regulators */
430 pdata->supplies[0].supply = "vdd33a";
431 pdata->supplies[1].supply = "vddvario";
432 ret = regulator_bulk_get(&pdev->dev,
433 ARRAY_SIZE(pdata->supplies),
436 netdev_err(ndev, "couldn't get regulators %d\n",
440 pdata->clk = clk_get(&pdev->dev, NULL);
441 if (IS_ERR(pdata->clk))
442 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
443 PTR_ERR(pdata->clk));
449 * Free resources, currently just regulators.
452 static void smsc911x_free_resources(struct platform_device *pdev)
454 struct net_device *ndev = platform_get_drvdata(pdev);
455 struct smsc911x_data *pdata = netdev_priv(ndev);
457 /* Free regulators */
458 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
462 if (!IS_ERR(pdata->clk)) {
468 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
469 * and smsc911x_mac_write, so assumes mac_lock is held */
470 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
475 SMSC_ASSERT_MAC_LOCK(pdata);
477 for (i = 0; i < 40; i++) {
478 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
479 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
482 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
483 "MAC_CSR_CMD: 0x%08X", val);
487 /* Fetches a MAC register value. Assumes mac_lock is acquired */
488 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
492 SMSC_ASSERT_MAC_LOCK(pdata);
494 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
495 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
496 SMSC_WARN(pdata, hw, "MAC busy at entry");
500 /* Send the MAC cmd */
501 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
502 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
504 /* Workaround for hardware read-after-write restriction */
505 temp = smsc911x_reg_read(pdata, BYTE_TEST);
507 /* Wait for the read to complete */
508 if (likely(smsc911x_mac_complete(pdata) == 0))
509 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
511 SMSC_WARN(pdata, hw, "MAC busy after read");
515 /* Set a mac register, mac_lock must be acquired before calling */
516 static void smsc911x_mac_write(struct smsc911x_data *pdata,
517 unsigned int offset, u32 val)
521 SMSC_ASSERT_MAC_LOCK(pdata);
523 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
524 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
526 "smsc911x_mac_write failed, MAC busy at entry");
530 /* Send data to write */
531 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
533 /* Write the actual data */
534 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
535 MAC_CSR_CMD_CSR_BUSY_));
537 /* Workaround for hardware read-after-write restriction */
538 temp = smsc911x_reg_read(pdata, BYTE_TEST);
540 /* Wait for the write to complete */
541 if (likely(smsc911x_mac_complete(pdata) == 0))
544 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
547 /* Get a phy register */
548 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
550 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
555 spin_lock_irqsave(&pdata->mac_lock, flags);
557 /* Confirm MII not busy */
558 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
559 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
564 /* Set the address, index & direction (read from PHY) */
565 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
566 smsc911x_mac_write(pdata, MII_ACC, addr);
568 /* Wait for read to complete w/ timeout */
569 for (i = 0; i < 100; i++)
570 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
571 reg = smsc911x_mac_read(pdata, MII_DATA);
575 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
579 spin_unlock_irqrestore(&pdata->mac_lock, flags);
583 /* Set a phy register */
584 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
587 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
592 spin_lock_irqsave(&pdata->mac_lock, flags);
594 /* Confirm MII not busy */
595 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
596 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
601 /* Put the data to write in the MAC */
602 smsc911x_mac_write(pdata, MII_DATA, val);
604 /* Set the address, index & direction (write to PHY) */
605 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
607 smsc911x_mac_write(pdata, MII_ACC, addr);
609 /* Wait for write to complete w/ timeout */
610 for (i = 0; i < 100; i++)
611 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
616 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
620 spin_unlock_irqrestore(&pdata->mac_lock, flags);
624 /* Switch to external phy. Assumes tx and rx are stopped. */
625 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
627 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
629 /* Disable phy clocks to the MAC */
630 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
631 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
632 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
633 udelay(10); /* Enough time for clocks to stop */
635 /* Switch to external phy */
636 hwcfg |= HW_CFG_EXT_PHY_EN_;
637 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
639 /* Enable phy clocks to the MAC */
640 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
641 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
642 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
643 udelay(10); /* Enough time for clocks to restart */
645 hwcfg |= HW_CFG_SMI_SEL_;
646 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
649 /* Autodetects and enables external phy if present on supported chips.
650 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
651 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
652 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
654 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
656 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
657 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
658 pdata->using_extphy = 0;
659 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
660 SMSC_TRACE(pdata, hw, "Forcing external PHY");
661 smsc911x_phy_enable_external(pdata);
662 pdata->using_extphy = 1;
663 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
664 SMSC_TRACE(pdata, hw,
665 "HW_CFG EXT_PHY_DET set, using external PHY");
666 smsc911x_phy_enable_external(pdata);
667 pdata->using_extphy = 1;
669 SMSC_TRACE(pdata, hw,
670 "HW_CFG EXT_PHY_DET clear, using internal PHY");
671 pdata->using_extphy = 0;
675 /* Fetches a tx status out of the status fifo */
676 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
678 unsigned int result =
679 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
682 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
687 /* Fetches the next rx status */
688 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
690 unsigned int result =
691 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
694 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
699 #ifdef USE_PHY_WORK_AROUND
700 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
707 for (tries = 0; tries < 10; tries++) {
708 unsigned int txcmd_a;
709 unsigned int txcmd_b;
711 unsigned int pktlength;
714 /* Zero-out rx packet memory */
715 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
717 /* Write tx packet to 118 */
718 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
719 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
720 txcmd_a |= MIN_PACKET_SIZE;
722 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
724 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
725 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
727 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
728 wrsz = MIN_PACKET_SIZE + 3;
729 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
732 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
734 /* Wait till transmit is done */
738 status = smsc911x_tx_get_txstatus(pdata);
739 } while ((i--) && (!status));
743 "Failed to transmit during loopback test");
746 if (status & TX_STS_ES_) {
748 "Transmit encountered errors during loopback test");
752 /* Wait till receive is done */
756 status = smsc911x_rx_get_rxstatus(pdata);
757 } while ((i--) && (!status));
761 "Failed to receive during loopback test");
764 if (status & RX_STS_ES_) {
766 "Receive encountered errors during loopback test");
770 pktlength = ((status & 0x3FFF0000UL) >> 16);
771 bufp = (ulong)pdata->loopback_rx_pkt;
772 rdsz = pktlength + 3;
773 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
776 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
778 if (pktlength != (MIN_PACKET_SIZE + 4)) {
779 SMSC_WARN(pdata, hw, "Unexpected packet size "
780 "during loop back test, size=%d, will retry",
785 for (j = 0; j < MIN_PACKET_SIZE; j++) {
786 if (pdata->loopback_tx_pkt[j]
787 != pdata->loopback_rx_pkt[j]) {
793 SMSC_TRACE(pdata, hw, "Successfully verified "
797 SMSC_WARN(pdata, hw, "Data mismatch "
798 "during loop back test, will retry");
806 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
808 struct phy_device *phy_dev = pdata->phy_dev;
810 unsigned int i = 100000;
813 BUG_ON(!phy_dev->bus);
815 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
816 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
819 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
821 } while ((i--) && (temp & BMCR_RESET));
823 if (temp & BMCR_RESET) {
824 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
827 /* Extra delay required because the phy may not be completed with
828 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
829 * enough delay but using 1ms here to be safe */
835 static int smsc911x_phy_loopbacktest(struct net_device *dev)
837 struct smsc911x_data *pdata = netdev_priv(dev);
838 struct phy_device *phy_dev = pdata->phy_dev;
843 /* Initialise tx packet using broadcast destination address */
844 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
846 /* Use incrementing source address */
847 for (i = 6; i < 12; i++)
848 pdata->loopback_tx_pkt[i] = (char)i;
850 /* Set length type field */
851 pdata->loopback_tx_pkt[12] = 0x00;
852 pdata->loopback_tx_pkt[13] = 0x00;
854 for (i = 14; i < MIN_PACKET_SIZE; i++)
855 pdata->loopback_tx_pkt[i] = (char)i;
857 val = smsc911x_reg_read(pdata, HW_CFG);
858 val &= HW_CFG_TX_FIF_SZ_;
860 smsc911x_reg_write(pdata, HW_CFG, val);
862 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
863 smsc911x_reg_write(pdata, RX_CFG,
864 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
866 for (i = 0; i < 10; i++) {
867 /* Set PHY to 10/FD, no ANEG, and loopback mode */
868 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
869 BMCR_LOOPBACK | BMCR_FULLDPLX);
871 /* Enable MAC tx/rx, FD */
872 spin_lock_irqsave(&pdata->mac_lock, flags);
873 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
874 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
875 spin_unlock_irqrestore(&pdata->mac_lock, flags);
877 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
884 spin_lock_irqsave(&pdata->mac_lock, flags);
885 smsc911x_mac_write(pdata, MAC_CR, 0);
886 spin_unlock_irqrestore(&pdata->mac_lock, flags);
888 smsc911x_phy_reset(pdata);
892 spin_lock_irqsave(&pdata->mac_lock, flags);
893 smsc911x_mac_write(pdata, MAC_CR, 0);
894 spin_unlock_irqrestore(&pdata->mac_lock, flags);
896 /* Cancel PHY loopback mode */
897 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
899 smsc911x_reg_write(pdata, TX_CFG, 0);
900 smsc911x_reg_write(pdata, RX_CFG, 0);
904 #endif /* USE_PHY_WORK_AROUND */
906 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
908 struct phy_device *phy_dev = pdata->phy_dev;
909 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
913 if (phy_dev->duplex == DUPLEX_FULL) {
914 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
915 u16 rmtadv = phy_read(phy_dev, MII_LPA);
916 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
918 if (cap & FLOW_CTRL_RX)
923 if (cap & FLOW_CTRL_TX)
928 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
929 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
930 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
932 SMSC_TRACE(pdata, hw, "half duplex");
937 spin_lock_irqsave(&pdata->mac_lock, flags);
938 smsc911x_mac_write(pdata, FLOW, flow);
939 spin_unlock_irqrestore(&pdata->mac_lock, flags);
941 smsc911x_reg_write(pdata, AFC_CFG, afc);
944 /* Update link mode if anything has changed. Called periodically when the
945 * PHY is in polling mode, even if nothing has changed. */
946 static void smsc911x_phy_adjust_link(struct net_device *dev)
948 struct smsc911x_data *pdata = netdev_priv(dev);
949 struct phy_device *phy_dev = pdata->phy_dev;
953 if (phy_dev->duplex != pdata->last_duplex) {
955 SMSC_TRACE(pdata, hw, "duplex state has changed");
957 spin_lock_irqsave(&pdata->mac_lock, flags);
958 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
959 if (phy_dev->duplex) {
960 SMSC_TRACE(pdata, hw,
961 "configuring for full duplex mode");
962 mac_cr |= MAC_CR_FDPX_;
964 SMSC_TRACE(pdata, hw,
965 "configuring for half duplex mode");
966 mac_cr &= ~MAC_CR_FDPX_;
968 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
969 spin_unlock_irqrestore(&pdata->mac_lock, flags);
971 smsc911x_phy_update_flowcontrol(pdata);
972 pdata->last_duplex = phy_dev->duplex;
975 carrier = netif_carrier_ok(dev);
976 if (carrier != pdata->last_carrier) {
977 SMSC_TRACE(pdata, hw, "carrier state has changed");
979 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
980 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
981 (!pdata->using_extphy)) {
982 /* Restore original GPIO configuration */
983 pdata->gpio_setting = pdata->gpio_orig_setting;
984 smsc911x_reg_write(pdata, GPIO_CFG,
985 pdata->gpio_setting);
988 SMSC_TRACE(pdata, hw, "configuring for no carrier");
989 /* Check global setting that LED1
990 * usage is 10/100 indicator */
991 pdata->gpio_setting = smsc911x_reg_read(pdata,
993 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
994 (!pdata->using_extphy)) {
995 /* Force 10/100 LED off, after saving
996 * original GPIO configuration */
997 pdata->gpio_orig_setting = pdata->gpio_setting;
999 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1000 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1001 | GPIO_CFG_GPIODIR0_
1002 | GPIO_CFG_GPIOD0_);
1003 smsc911x_reg_write(pdata, GPIO_CFG,
1004 pdata->gpio_setting);
1007 pdata->last_carrier = carrier;
1011 static int smsc911x_mii_probe(struct net_device *dev)
1013 struct smsc911x_data *pdata = netdev_priv(dev);
1014 struct phy_device *phydev = NULL;
1017 /* find the first phy */
1018 phydev = phy_find_first(pdata->mii_bus);
1020 netdev_err(dev, "no PHY found\n");
1024 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1025 phydev->addr, phydev->phy_id);
1027 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1028 pdata->config.phy_interface);
1031 netdev_err(dev, "Could not attach to PHY\n");
1036 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1037 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1039 /* mask with MAC supported features */
1040 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1041 SUPPORTED_Asym_Pause);
1042 phydev->advertising = phydev->supported;
1044 pdata->phy_dev = phydev;
1045 pdata->last_duplex = -1;
1046 pdata->last_carrier = -1;
1048 #ifdef USE_PHY_WORK_AROUND
1049 if (smsc911x_phy_loopbacktest(dev) < 0) {
1050 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1053 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1054 #endif /* USE_PHY_WORK_AROUND */
1056 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1060 static int smsc911x_mii_init(struct platform_device *pdev,
1061 struct net_device *dev)
1063 struct smsc911x_data *pdata = netdev_priv(dev);
1064 int err = -ENXIO, i;
1066 pdata->mii_bus = mdiobus_alloc();
1067 if (!pdata->mii_bus) {
1072 pdata->mii_bus->name = SMSC_MDIONAME;
1073 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1074 pdev->name, pdev->id);
1075 pdata->mii_bus->priv = pdata;
1076 pdata->mii_bus->read = smsc911x_mii_read;
1077 pdata->mii_bus->write = smsc911x_mii_write;
1078 pdata->mii_bus->irq = pdata->phy_irq;
1079 for (i = 0; i < PHY_MAX_ADDR; ++i)
1080 pdata->mii_bus->irq[i] = PHY_POLL;
1082 pdata->mii_bus->parent = &pdev->dev;
1084 switch (pdata->idrev & 0xFFFF0000) {
1089 /* External PHY supported, try to autodetect */
1090 smsc911x_phy_initialise_external(pdata);
1093 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1094 "using internal PHY");
1095 pdata->using_extphy = 0;
1099 if (!pdata->using_extphy) {
1100 /* Mask all PHYs except ID 1 (internal) */
1101 pdata->mii_bus->phy_mask = ~(1 << 1);
1104 if (mdiobus_register(pdata->mii_bus)) {
1105 SMSC_WARN(pdata, probe, "Error registering mii bus");
1106 goto err_out_free_bus_2;
1109 if (smsc911x_mii_probe(dev) < 0) {
1110 SMSC_WARN(pdata, probe, "Error registering mii bus");
1111 goto err_out_unregister_bus_3;
1116 err_out_unregister_bus_3:
1117 mdiobus_unregister(pdata->mii_bus);
1119 mdiobus_free(pdata->mii_bus);
1124 /* Gets the number of tx statuses in the fifo */
1125 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1127 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1128 & TX_FIFO_INF_TSUSED_) >> 16;
1131 /* Reads tx statuses and increments counters where necessary */
1132 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1134 struct smsc911x_data *pdata = netdev_priv(dev);
1135 unsigned int tx_stat;
1137 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1138 if (unlikely(tx_stat & 0x80000000)) {
1139 /* In this driver the packet tag is used as the packet
1140 * length. Since a packet length can never reach the
1141 * size of 0x8000, this bit is reserved. It is worth
1142 * noting that the "reserved bit" in the warning above
1143 * does not reference a hardware defined reserved bit
1144 * but rather a driver defined one.
1146 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1148 if (unlikely(tx_stat & TX_STS_ES_)) {
1149 dev->stats.tx_errors++;
1151 dev->stats.tx_packets++;
1152 dev->stats.tx_bytes += (tx_stat >> 16);
1154 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1155 dev->stats.collisions += 16;
1156 dev->stats.tx_aborted_errors += 1;
1158 dev->stats.collisions +=
1159 ((tx_stat >> 3) & 0xF);
1161 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1162 dev->stats.tx_carrier_errors += 1;
1163 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1164 dev->stats.collisions++;
1165 dev->stats.tx_aborted_errors++;
1171 /* Increments the Rx error counters */
1173 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1177 if (unlikely(rxstat & RX_STS_ES_)) {
1178 dev->stats.rx_errors++;
1179 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1180 dev->stats.rx_crc_errors++;
1184 if (likely(!crc_err)) {
1185 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1186 (rxstat & RX_STS_LENGTH_ERR_)))
1187 dev->stats.rx_length_errors++;
1188 if (rxstat & RX_STS_MCAST_)
1189 dev->stats.multicast++;
1193 /* Quickly dumps bad packets */
1195 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1197 if (likely(pktwords >= 4)) {
1198 unsigned int timeout = 500;
1200 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1203 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1204 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1206 if (unlikely(timeout == 0))
1207 SMSC_WARN(pdata, hw, "Timed out waiting for "
1208 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1212 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1216 /* NAPI poll function */
1217 static int smsc911x_poll(struct napi_struct *napi, int budget)
1219 struct smsc911x_data *pdata =
1220 container_of(napi, struct smsc911x_data, napi);
1221 struct net_device *dev = pdata->dev;
1224 while (npackets < budget) {
1225 unsigned int pktlength;
1226 unsigned int pktwords;
1227 struct sk_buff *skb;
1228 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1232 /* We processed all packets available. Tell NAPI it can
1233 * stop polling then re-enable rx interrupts */
1234 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1235 napi_complete(napi);
1236 temp = smsc911x_reg_read(pdata, INT_EN);
1237 temp |= INT_EN_RSFL_EN_;
1238 smsc911x_reg_write(pdata, INT_EN, temp);
1242 /* Count packet for NAPI scheduling, even if it has an error.
1243 * Error packets still require cycles to discard */
1246 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1247 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1248 smsc911x_rx_counterrors(dev, rxstat);
1250 if (unlikely(rxstat & RX_STS_ES_)) {
1251 SMSC_WARN(pdata, rx_err,
1252 "Discarding packet with error bit set");
1253 /* Packet has an error, discard it and continue with
1255 smsc911x_rx_fastforward(pdata, pktwords);
1256 dev->stats.rx_dropped++;
1260 skb = netdev_alloc_skb(dev, pktwords << 2);
1261 if (unlikely(!skb)) {
1262 SMSC_WARN(pdata, rx_err,
1263 "Unable to allocate skb for rx packet");
1264 /* Drop the packet and stop this polling iteration */
1265 smsc911x_rx_fastforward(pdata, pktwords);
1266 dev->stats.rx_dropped++;
1270 pdata->ops->rx_readfifo(pdata,
1271 (unsigned int *)skb->data, pktwords);
1273 /* Align IP on 16B boundary */
1274 skb_reserve(skb, NET_IP_ALIGN);
1275 skb_put(skb, pktlength - 4);
1276 skb->protocol = eth_type_trans(skb, dev);
1277 skb_checksum_none_assert(skb);
1278 netif_receive_skb(skb);
1280 /* Update counters */
1281 dev->stats.rx_packets++;
1282 dev->stats.rx_bytes += (pktlength - 4);
1285 /* Return total received packets */
1289 /* Returns hash bit number for given MAC address
1291 * 01 00 5E 00 00 01 -> returns bit number 31 */
1292 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1294 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1297 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1299 /* Performs the multicast & mac_cr update. This is called when
1300 * safe on the current hardware, and with the mac_lock held */
1301 unsigned int mac_cr;
1303 SMSC_ASSERT_MAC_LOCK(pdata);
1305 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1306 mac_cr |= pdata->set_bits_mask;
1307 mac_cr &= ~(pdata->clear_bits_mask);
1308 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1309 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1310 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1311 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1312 mac_cr, pdata->hashhi, pdata->hashlo);
1315 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1317 unsigned int mac_cr;
1319 /* This function is only called for older LAN911x devices
1320 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1321 * be modified during Rx - newer devices immediately update the
1324 * This is called from interrupt context */
1326 spin_lock(&pdata->mac_lock);
1328 /* Check Rx has stopped */
1329 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1330 SMSC_WARN(pdata, drv, "Rx not stopped");
1332 /* Perform the update - safe to do now Rx has stopped */
1333 smsc911x_rx_multicast_update(pdata);
1336 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1337 mac_cr |= MAC_CR_RXEN_;
1338 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1340 pdata->multicast_update_pending = 0;
1342 spin_unlock(&pdata->mac_lock);
1345 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1349 if (!pdata->phy_dev)
1352 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1355 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1359 /* Only disable if energy detect mode is already enabled */
1360 if (rc & MII_LAN83C185_EDPWRDOWN) {
1361 /* Disable energy detect mode for this SMSC Transceivers */
1362 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1363 rc & (~MII_LAN83C185_EDPWRDOWN));
1366 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1376 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1380 if (!pdata->phy_dev)
1383 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1386 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1390 /* Only enable if energy detect mode is already disabled */
1391 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1393 /* Enable energy detect mode for this SMSC Transceivers */
1394 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1395 rc | MII_LAN83C185_EDPWRDOWN);
1398 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1407 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1409 unsigned int timeout;
1414 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1415 * are initialized in a Energy Detect Power-Down mode that prevents
1416 * the MAC chip to be software reseted. So we have to wakeup the PHY
1419 if (pdata->generation == 4) {
1420 ret = smsc911x_phy_disable_energy_detect(pdata);
1423 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1428 /* Reset the LAN911x */
1429 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1433 temp = smsc911x_reg_read(pdata, HW_CFG);
1434 } while ((--timeout) && (temp & HW_CFG_SRST_));
1436 if (unlikely(temp & HW_CFG_SRST_)) {
1437 SMSC_WARN(pdata, drv, "Failed to complete reset");
1441 if (pdata->generation == 4) {
1442 ret = smsc911x_phy_enable_energy_detect(pdata);
1445 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1453 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1455 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1457 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1458 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1459 (dev_addr[1] << 8) | dev_addr[0];
1461 SMSC_ASSERT_MAC_LOCK(pdata);
1463 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1464 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1467 static void smsc911x_disable_irq_chip(struct net_device *dev)
1469 struct smsc911x_data *pdata = netdev_priv(dev);
1471 smsc911x_reg_write(pdata, INT_EN, 0);
1472 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1475 static int smsc911x_open(struct net_device *dev)
1477 struct smsc911x_data *pdata = netdev_priv(dev);
1478 unsigned int timeout;
1480 unsigned int intcfg;
1482 /* if the phy is not yet registered, retry later*/
1483 if (!pdata->phy_dev) {
1484 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1488 /* Reset the LAN911x */
1489 if (smsc911x_soft_reset(pdata)) {
1490 SMSC_WARN(pdata, hw, "soft reset failed");
1494 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1495 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1497 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1498 spin_lock_irq(&pdata->mac_lock);
1499 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1500 spin_unlock_irq(&pdata->mac_lock);
1502 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1504 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1509 if (unlikely(timeout == 0))
1510 SMSC_WARN(pdata, ifup,
1511 "Timed out waiting for EEPROM busy bit to clear");
1513 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1515 /* The soft reset above cleared the device's MAC address,
1516 * restore it from local copy (set in probe) */
1517 spin_lock_irq(&pdata->mac_lock);
1518 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1519 spin_unlock_irq(&pdata->mac_lock);
1521 /* Initialise irqs, but leave all sources disabled */
1522 smsc911x_disable_irq_chip(dev);
1524 /* Set interrupt deassertion to 100uS */
1525 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1527 if (pdata->config.irq_polarity) {
1528 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1529 intcfg |= INT_CFG_IRQ_POL_;
1531 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1534 if (pdata->config.irq_type) {
1535 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1536 intcfg |= INT_CFG_IRQ_TYPE_;
1538 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1541 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1543 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1544 pdata->software_irq_signal = 0;
1547 temp = smsc911x_reg_read(pdata, INT_EN);
1548 temp |= INT_EN_SW_INT_EN_;
1549 smsc911x_reg_write(pdata, INT_EN, temp);
1553 if (pdata->software_irq_signal)
1558 if (!pdata->software_irq_signal) {
1559 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1563 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1566 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1567 (unsigned long)pdata->ioaddr, dev->irq);
1569 /* Reset the last known duplex and carrier */
1570 pdata->last_duplex = -1;
1571 pdata->last_carrier = -1;
1573 /* Bring the PHY up */
1574 phy_start(pdata->phy_dev);
1576 temp = smsc911x_reg_read(pdata, HW_CFG);
1577 /* Preserve TX FIFO size and external PHY configuration */
1578 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1580 smsc911x_reg_write(pdata, HW_CFG, temp);
1582 temp = smsc911x_reg_read(pdata, FIFO_INT);
1583 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1584 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1585 smsc911x_reg_write(pdata, FIFO_INT, temp);
1587 /* set RX Data offset to 2 bytes for alignment */
1588 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1590 /* enable NAPI polling before enabling RX interrupts */
1591 napi_enable(&pdata->napi);
1593 temp = smsc911x_reg_read(pdata, INT_EN);
1594 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1595 smsc911x_reg_write(pdata, INT_EN, temp);
1597 spin_lock_irq(&pdata->mac_lock);
1598 temp = smsc911x_mac_read(pdata, MAC_CR);
1599 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1600 smsc911x_mac_write(pdata, MAC_CR, temp);
1601 spin_unlock_irq(&pdata->mac_lock);
1603 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1605 netif_start_queue(dev);
1609 /* Entry point for stopping the interface */
1610 static int smsc911x_stop(struct net_device *dev)
1612 struct smsc911x_data *pdata = netdev_priv(dev);
1615 /* Disable all device interrupts */
1616 temp = smsc911x_reg_read(pdata, INT_CFG);
1617 temp &= ~INT_CFG_IRQ_EN_;
1618 smsc911x_reg_write(pdata, INT_CFG, temp);
1620 /* Stop Tx and Rx polling */
1621 netif_stop_queue(dev);
1622 napi_disable(&pdata->napi);
1624 /* At this point all Rx and Tx activity is stopped */
1625 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1626 smsc911x_tx_update_txcounters(dev);
1628 /* Bring the PHY down */
1630 phy_stop(pdata->phy_dev);
1632 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1636 /* Entry point for transmitting a packet */
1637 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1639 struct smsc911x_data *pdata = netdev_priv(dev);
1640 unsigned int freespace;
1641 unsigned int tx_cmd_a;
1642 unsigned int tx_cmd_b;
1647 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1649 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1650 SMSC_WARN(pdata, tx_err,
1651 "Tx data fifo low, space available: %d", freespace);
1653 /* Word alignment adjustment */
1654 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1655 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1656 tx_cmd_a |= (unsigned int)skb->len;
1658 tx_cmd_b = ((unsigned int)skb->len) << 16;
1659 tx_cmd_b |= (unsigned int)skb->len;
1661 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1662 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1664 bufp = (ulong)skb->data & (~0x3);
1665 wrsz = (u32)skb->len + 3;
1666 wrsz += (u32)((ulong)skb->data & 0x3);
1669 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1670 freespace -= (skb->len + 32);
1671 skb_tx_timestamp(skb);
1672 dev_consume_skb_any(skb);
1674 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1675 smsc911x_tx_update_txcounters(dev);
1677 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1678 netif_stop_queue(dev);
1679 temp = smsc911x_reg_read(pdata, FIFO_INT);
1682 smsc911x_reg_write(pdata, FIFO_INT, temp);
1685 return NETDEV_TX_OK;
1688 /* Entry point for getting status counters */
1689 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1691 struct smsc911x_data *pdata = netdev_priv(dev);
1692 smsc911x_tx_update_txcounters(dev);
1693 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1697 /* Entry point for setting addressing modes */
1698 static void smsc911x_set_multicast_list(struct net_device *dev)
1700 struct smsc911x_data *pdata = netdev_priv(dev);
1701 unsigned long flags;
1703 if (dev->flags & IFF_PROMISC) {
1704 /* Enabling promiscuous mode */
1705 pdata->set_bits_mask = MAC_CR_PRMS_;
1706 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1709 } else if (dev->flags & IFF_ALLMULTI) {
1710 /* Enabling all multicast mode */
1711 pdata->set_bits_mask = MAC_CR_MCPAS_;
1712 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1715 } else if (!netdev_mc_empty(dev)) {
1716 /* Enabling specific multicast addresses */
1717 unsigned int hash_high = 0;
1718 unsigned int hash_low = 0;
1719 struct netdev_hw_addr *ha;
1721 pdata->set_bits_mask = MAC_CR_HPFILT_;
1722 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1724 netdev_for_each_mc_addr(ha, dev) {
1725 unsigned int bitnum = smsc911x_hash(ha->addr);
1726 unsigned int mask = 0x01 << (bitnum & 0x1F);
1734 pdata->hashhi = hash_high;
1735 pdata->hashlo = hash_low;
1737 /* Enabling local MAC address only */
1738 pdata->set_bits_mask = 0;
1739 pdata->clear_bits_mask =
1740 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1745 spin_lock_irqsave(&pdata->mac_lock, flags);
1747 if (pdata->generation <= 1) {
1748 /* Older hardware revision - cannot change these flags while
1750 if (!pdata->multicast_update_pending) {
1752 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1753 pdata->multicast_update_pending = 1;
1755 /* Request the hardware to stop, then perform the
1756 * update when we get an RX_STOP interrupt */
1757 temp = smsc911x_mac_read(pdata, MAC_CR);
1758 temp &= ~(MAC_CR_RXEN_);
1759 smsc911x_mac_write(pdata, MAC_CR, temp);
1761 /* There is another update pending, this should now
1762 * use the newer values */
1765 /* Newer hardware revision - can write immediately */
1766 smsc911x_rx_multicast_update(pdata);
1769 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1772 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1774 struct net_device *dev = dev_id;
1775 struct smsc911x_data *pdata = netdev_priv(dev);
1776 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1777 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1778 int serviced = IRQ_NONE;
1781 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1782 temp = smsc911x_reg_read(pdata, INT_EN);
1783 temp &= (~INT_EN_SW_INT_EN_);
1784 smsc911x_reg_write(pdata, INT_EN, temp);
1785 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1786 pdata->software_irq_signal = 1;
1788 serviced = IRQ_HANDLED;
1791 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1792 /* Called when there is a multicast update scheduled and
1793 * it is now safe to complete the update */
1794 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1795 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1796 if (pdata->multicast_update_pending)
1797 smsc911x_rx_multicast_update_workaround(pdata);
1798 serviced = IRQ_HANDLED;
1801 if (intsts & inten & INT_STS_TDFA_) {
1802 temp = smsc911x_reg_read(pdata, FIFO_INT);
1803 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1804 smsc911x_reg_write(pdata, FIFO_INT, temp);
1805 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1806 netif_wake_queue(dev);
1807 serviced = IRQ_HANDLED;
1810 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1811 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1812 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1813 serviced = IRQ_HANDLED;
1816 if (likely(intsts & inten & INT_STS_RSFL_)) {
1817 if (likely(napi_schedule_prep(&pdata->napi))) {
1818 /* Disable Rx interrupts */
1819 temp = smsc911x_reg_read(pdata, INT_EN);
1820 temp &= (~INT_EN_RSFL_EN_);
1821 smsc911x_reg_write(pdata, INT_EN, temp);
1822 /* Schedule a NAPI poll */
1823 __napi_schedule(&pdata->napi);
1825 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1827 serviced = IRQ_HANDLED;
1833 #ifdef CONFIG_NET_POLL_CONTROLLER
1834 static void smsc911x_poll_controller(struct net_device *dev)
1836 disable_irq(dev->irq);
1837 smsc911x_irqhandler(0, dev);
1838 enable_irq(dev->irq);
1840 #endif /* CONFIG_NET_POLL_CONTROLLER */
1842 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1844 struct smsc911x_data *pdata = netdev_priv(dev);
1845 struct sockaddr *addr = p;
1847 /* On older hardware revisions we cannot change the mac address
1848 * registers while receiving data. Newer devices can safely change
1849 * this at any time. */
1850 if (pdata->generation <= 1 && netif_running(dev))
1853 if (!is_valid_ether_addr(addr->sa_data))
1854 return -EADDRNOTAVAIL;
1856 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1858 spin_lock_irq(&pdata->mac_lock);
1859 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1860 spin_unlock_irq(&pdata->mac_lock);
1862 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1867 /* Standard ioctls for mii-tool */
1868 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1870 struct smsc911x_data *pdata = netdev_priv(dev);
1872 if (!netif_running(dev) || !pdata->phy_dev)
1875 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1879 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1881 struct smsc911x_data *pdata = netdev_priv(dev);
1885 return phy_ethtool_gset(pdata->phy_dev, cmd);
1889 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1891 struct smsc911x_data *pdata = netdev_priv(dev);
1893 return phy_ethtool_sset(pdata->phy_dev, cmd);
1896 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1897 struct ethtool_drvinfo *info)
1899 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1900 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1901 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1902 sizeof(info->bus_info));
1905 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1907 struct smsc911x_data *pdata = netdev_priv(dev);
1909 return phy_start_aneg(pdata->phy_dev);
1912 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1914 struct smsc911x_data *pdata = netdev_priv(dev);
1915 return pdata->msg_enable;
1918 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1920 struct smsc911x_data *pdata = netdev_priv(dev);
1921 pdata->msg_enable = level;
1924 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1926 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1931 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1934 struct smsc911x_data *pdata = netdev_priv(dev);
1935 struct phy_device *phy_dev = pdata->phy_dev;
1936 unsigned long flags;
1941 regs->version = pdata->idrev;
1942 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1943 data[j++] = smsc911x_reg_read(pdata, i);
1945 for (i = MAC_CR; i <= WUCSR; i++) {
1946 spin_lock_irqsave(&pdata->mac_lock, flags);
1947 data[j++] = smsc911x_mac_read(pdata, i);
1948 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1951 for (i = 0; i <= 31; i++)
1952 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1955 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1957 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1958 temp &= ~GPIO_CFG_EEPR_EN_;
1959 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1963 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1968 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1969 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1970 SMSC_WARN(pdata, drv, "Busy at start");
1974 e2cmd = op | E2P_CMD_EPC_BUSY_;
1975 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1979 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1980 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1983 SMSC_TRACE(pdata, drv, "TIMED OUT");
1987 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1988 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1995 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1996 u8 address, u8 *data)
1998 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2001 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2002 ret = smsc911x_eeprom_send_cmd(pdata, op);
2005 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2010 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2011 u8 address, u8 data)
2013 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2017 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2018 ret = smsc911x_eeprom_send_cmd(pdata, op);
2021 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2022 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2024 /* Workaround for hardware read-after-write restriction */
2025 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2027 ret = smsc911x_eeprom_send_cmd(pdata, op);
2033 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2035 return SMSC911X_EEPROM_SIZE;
2038 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2039 struct ethtool_eeprom *eeprom, u8 *data)
2041 struct smsc911x_data *pdata = netdev_priv(dev);
2042 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2046 smsc911x_eeprom_enable_access(pdata);
2048 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2049 for (i = 0; i < len; i++) {
2050 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2057 memcpy(data, &eeprom_data[eeprom->offset], len);
2062 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2063 struct ethtool_eeprom *eeprom, u8 *data)
2066 struct smsc911x_data *pdata = netdev_priv(dev);
2068 smsc911x_eeprom_enable_access(pdata);
2069 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2070 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2071 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2073 /* Single byte write, according to man page */
2079 static const struct ethtool_ops smsc911x_ethtool_ops = {
2080 .get_settings = smsc911x_ethtool_getsettings,
2081 .set_settings = smsc911x_ethtool_setsettings,
2082 .get_link = ethtool_op_get_link,
2083 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2084 .nway_reset = smsc911x_ethtool_nwayreset,
2085 .get_msglevel = smsc911x_ethtool_getmsglevel,
2086 .set_msglevel = smsc911x_ethtool_setmsglevel,
2087 .get_regs_len = smsc911x_ethtool_getregslen,
2088 .get_regs = smsc911x_ethtool_getregs,
2089 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2090 .get_eeprom = smsc911x_ethtool_get_eeprom,
2091 .set_eeprom = smsc911x_ethtool_set_eeprom,
2092 .get_ts_info = ethtool_op_get_ts_info,
2095 static const struct net_device_ops smsc911x_netdev_ops = {
2096 .ndo_open = smsc911x_open,
2097 .ndo_stop = smsc911x_stop,
2098 .ndo_start_xmit = smsc911x_hard_start_xmit,
2099 .ndo_get_stats = smsc911x_get_stats,
2100 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2101 .ndo_do_ioctl = smsc911x_do_ioctl,
2102 .ndo_change_mtu = eth_change_mtu,
2103 .ndo_validate_addr = eth_validate_addr,
2104 .ndo_set_mac_address = smsc911x_set_mac_address,
2105 #ifdef CONFIG_NET_POLL_CONTROLLER
2106 .ndo_poll_controller = smsc911x_poll_controller,
2110 /* copies the current mac address from hardware to dev->dev_addr */
2111 static void smsc911x_read_mac_address(struct net_device *dev)
2113 struct smsc911x_data *pdata = netdev_priv(dev);
2114 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2115 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2117 dev->dev_addr[0] = (u8)(mac_low32);
2118 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2119 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2120 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2121 dev->dev_addr[4] = (u8)(mac_high16);
2122 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2125 /* Initializing private device structures, only called from probe */
2126 static int smsc911x_init(struct net_device *dev)
2128 struct smsc911x_data *pdata = netdev_priv(dev);
2129 unsigned int byte_test, mask;
2130 unsigned int to = 100;
2132 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2133 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2134 (unsigned long)pdata->ioaddr);
2135 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2136 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2138 spin_lock_init(&pdata->dev_lock);
2139 spin_lock_init(&pdata->mac_lock);
2141 if (pdata->ioaddr == NULL) {
2142 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2147 * poll the READY bit in PMT_CTRL. Any other access to the device is
2148 * forbidden while this bit isn't set. Try for 100ms
2150 * Note that this test is done before the WORD_SWAP register is
2151 * programmed. So in some configurations the READY bit is at 16 before
2152 * WORD_SWAP is written to. This issue is worked around by waiting
2153 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2155 * SMSC has confirmed that checking bit 16 (marked as reserved in
2156 * the datasheet) is fine since these bits "will either never be set
2157 * or can only go high after READY does (so also indicate the device
2161 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2162 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2166 netdev_err(dev, "Device not READY in 100ms aborting\n");
2170 /* Check byte ordering */
2171 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2172 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2173 if (byte_test == 0x43218765) {
2174 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2175 "applying WORD_SWAP");
2176 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2178 /* 1 dummy read of BYTE_TEST is needed after a write to
2179 * WORD_SWAP before its contents are valid */
2180 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2182 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2185 if (byte_test != 0x87654321) {
2186 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2187 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2188 SMSC_WARN(pdata, probe,
2189 "top 16 bits equal to bottom 16 bits");
2190 SMSC_TRACE(pdata, probe,
2191 "This may mean the chip is set "
2192 "for 32 bit while the bus is reading 16 bit");
2197 /* Default generation to zero (all workarounds apply) */
2198 pdata->generation = 0;
2200 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2201 switch (pdata->idrev & 0xFFFF0000) {
2207 /* LAN911[5678] family */
2208 pdata->generation = pdata->idrev & 0x0000FFFF;
2215 /* LAN921[5678] family */
2216 pdata->generation = 3;
2223 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2224 pdata->generation = 4;
2228 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2233 SMSC_TRACE(pdata, probe,
2234 "LAN911x identified, idrev: 0x%08X, generation: %d",
2235 pdata->idrev, pdata->generation);
2237 if (pdata->generation == 0)
2238 SMSC_WARN(pdata, probe,
2239 "This driver is not intended for this chip revision");
2241 /* workaround for platforms without an eeprom, where the mac address
2242 * is stored elsewhere and set by the bootloader. This saves the
2243 * mac address before resetting the device */
2244 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2245 spin_lock_irq(&pdata->mac_lock);
2246 smsc911x_read_mac_address(dev);
2247 spin_unlock_irq(&pdata->mac_lock);
2250 /* Reset the LAN911x */
2251 if (smsc911x_soft_reset(pdata))
2254 dev->flags |= IFF_MULTICAST;
2255 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2256 dev->netdev_ops = &smsc911x_netdev_ops;
2257 dev->ethtool_ops = &smsc911x_ethtool_ops;
2262 static int smsc911x_drv_remove(struct platform_device *pdev)
2264 struct net_device *dev;
2265 struct smsc911x_data *pdata;
2266 struct resource *res;
2268 dev = platform_get_drvdata(pdev);
2270 pdata = netdev_priv(dev);
2272 BUG_ON(!pdata->ioaddr);
2273 BUG_ON(!pdata->phy_dev);
2275 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2277 phy_disconnect(pdata->phy_dev);
2278 pdata->phy_dev = NULL;
2279 mdiobus_unregister(pdata->mii_bus);
2280 mdiobus_free(pdata->mii_bus);
2282 unregister_netdev(dev);
2283 free_irq(dev->irq, dev);
2284 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2287 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2289 release_mem_region(res->start, resource_size(res));
2291 iounmap(pdata->ioaddr);
2293 (void)smsc911x_disable_resources(pdev);
2294 smsc911x_free_resources(pdev);
2301 /* standard register acces */
2302 static const struct smsc911x_ops standard_smsc911x_ops = {
2303 .reg_read = __smsc911x_reg_read,
2304 .reg_write = __smsc911x_reg_write,
2305 .rx_readfifo = smsc911x_rx_readfifo,
2306 .tx_writefifo = smsc911x_tx_writefifo,
2309 /* shifted register access */
2310 static const struct smsc911x_ops shifted_smsc911x_ops = {
2311 .reg_read = __smsc911x_reg_read_shift,
2312 .reg_write = __smsc911x_reg_write_shift,
2313 .rx_readfifo = smsc911x_rx_readfifo_shift,
2314 .tx_writefifo = smsc911x_tx_writefifo_shift,
2318 static int smsc911x_probe_config_dt(struct smsc911x_platform_config *config,
2319 struct device_node *np)
2327 config->phy_interface = of_get_phy_mode(np);
2329 mac = of_get_mac_address(np);
2331 memcpy(config->mac, mac, ETH_ALEN);
2333 of_property_read_u32(np, "reg-shift", &config->shift);
2335 of_property_read_u32(np, "reg-io-width", &width);
2337 config->flags |= SMSC911X_USE_32BIT;
2339 config->flags |= SMSC911X_USE_16BIT;
2341 if (of_get_property(np, "smsc,irq-active-high", NULL))
2342 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2344 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2345 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2347 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2348 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2350 if (of_get_property(np, "smsc,force-external-phy", NULL))
2351 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2353 if (of_get_property(np, "smsc,save-mac-address", NULL))
2354 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2359 static inline int smsc911x_probe_config_dt(
2360 struct smsc911x_platform_config *config,
2361 struct device_node *np)
2365 #endif /* CONFIG_OF */
2367 static int smsc911x_drv_probe(struct platform_device *pdev)
2369 struct device_node *np = pdev->dev.of_node;
2370 struct net_device *dev;
2371 struct smsc911x_data *pdata;
2372 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2373 struct resource *res, *irq_res;
2374 unsigned int intcfg = 0;
2375 int res_size, irq_flags;
2378 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2381 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2383 pr_warn("Could not allocate resource\n");
2387 res_size = resource_size(res);
2389 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2391 pr_warn("Could not allocate irq resource\n");
2396 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2401 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2404 goto out_release_io_1;
2407 SET_NETDEV_DEV(dev, &pdev->dev);
2409 pdata = netdev_priv(dev);
2410 dev->irq = irq_res->start;
2411 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2412 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2415 pdata->msg_enable = ((1 << debug) - 1);
2417 platform_set_drvdata(pdev, dev);
2419 retval = smsc911x_request_resources(pdev);
2421 goto out_request_resources_fail;
2423 retval = smsc911x_enable_resources(pdev);
2425 goto out_enable_resources_fail;
2427 if (pdata->ioaddr == NULL) {
2428 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2430 goto out_disable_resources;
2433 retval = smsc911x_probe_config_dt(&pdata->config, np);
2434 if (retval && config) {
2435 /* copy config parameters across to pdata */
2436 memcpy(&pdata->config, config, sizeof(pdata->config));
2441 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2442 goto out_disable_resources;
2445 /* assume standard, non-shifted, access to HW registers */
2446 pdata->ops = &standard_smsc911x_ops;
2447 /* apply the right access if shifting is needed */
2448 if (pdata->config.shift)
2449 pdata->ops = &shifted_smsc911x_ops;
2451 retval = smsc911x_init(dev);
2453 goto out_disable_resources;
2455 /* configure irq polarity and type before connecting isr */
2456 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2457 intcfg |= INT_CFG_IRQ_POL_;
2459 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2460 intcfg |= INT_CFG_IRQ_TYPE_;
2462 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2464 /* Ensure interrupts are globally disabled before connecting ISR */
2465 smsc911x_disable_irq_chip(dev);
2467 retval = request_irq(dev->irq, smsc911x_irqhandler,
2468 irq_flags | IRQF_SHARED, dev->name, dev);
2470 SMSC_WARN(pdata, probe,
2471 "Unable to claim requested irq: %d", dev->irq);
2472 goto out_disable_resources;
2475 netif_carrier_off(dev);
2477 retval = register_netdev(dev);
2479 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2482 SMSC_TRACE(pdata, probe,
2483 "Network interface: \"%s\"", dev->name);
2486 retval = smsc911x_mii_init(pdev, dev);
2488 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2489 goto out_unregister_netdev_5;
2492 spin_lock_irq(&pdata->mac_lock);
2494 /* Check if mac address has been specified when bringing interface up */
2495 if (is_valid_ether_addr(dev->dev_addr)) {
2496 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2497 SMSC_TRACE(pdata, probe,
2498 "MAC Address is specified by configuration");
2499 } else if (is_valid_ether_addr(pdata->config.mac)) {
2500 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2501 SMSC_TRACE(pdata, probe,
2502 "MAC Address specified by platform data");
2504 /* Try reading mac address from device. if EEPROM is present
2505 * it will already have been set */
2508 if (is_valid_ether_addr(dev->dev_addr)) {
2509 /* eeprom values are valid so use them */
2510 SMSC_TRACE(pdata, probe,
2511 "Mac Address is read from LAN911x EEPROM");
2513 /* eeprom values are invalid, generate random MAC */
2514 eth_hw_addr_random(dev);
2515 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2516 SMSC_TRACE(pdata, probe,
2517 "MAC Address is set to eth_random_addr");
2521 spin_unlock_irq(&pdata->mac_lock);
2523 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2527 out_unregister_netdev_5:
2528 unregister_netdev(dev);
2530 free_irq(dev->irq, dev);
2531 out_disable_resources:
2532 (void)smsc911x_disable_resources(pdev);
2533 out_enable_resources_fail:
2534 smsc911x_free_resources(pdev);
2535 out_request_resources_fail:
2536 iounmap(pdata->ioaddr);
2539 release_mem_region(res->start, resource_size(res));
2545 /* This implementation assumes the devices remains powered on its VDDVARIO
2546 * pins during suspend. */
2548 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2550 static int smsc911x_suspend(struct device *dev)
2552 struct net_device *ndev = dev_get_drvdata(dev);
2553 struct smsc911x_data *pdata = netdev_priv(ndev);
2555 /* enable wake on LAN, energy detection and the external PME
2557 smsc911x_reg_write(pdata, PMT_CTRL,
2558 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2559 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2564 static int smsc911x_resume(struct device *dev)
2566 struct net_device *ndev = dev_get_drvdata(dev);
2567 struct smsc911x_data *pdata = netdev_priv(ndev);
2568 unsigned int to = 100;
2570 /* Note 3.11 from the datasheet:
2571 * "When the LAN9220 is in a power saving state, a write of any
2572 * data to the BYTE_TEST register will wake-up the device."
2574 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2576 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2577 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2579 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2582 return (to == 0) ? -EIO : 0;
2585 static const struct dev_pm_ops smsc911x_pm_ops = {
2586 .suspend = smsc911x_suspend,
2587 .resume = smsc911x_resume,
2590 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2593 #define SMSC911X_PM_OPS NULL
2597 static const struct of_device_id smsc911x_dt_ids[] = {
2598 { .compatible = "smsc,lan9115", },
2601 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2604 static struct platform_driver smsc911x_driver = {
2605 .probe = smsc911x_drv_probe,
2606 .remove = smsc911x_drv_remove,
2608 .name = SMSC_CHIPNAME,
2609 .owner = THIS_MODULE,
2610 .pm = SMSC911X_PM_OPS,
2611 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2615 /* Entry point for loading the module */
2616 static int __init smsc911x_init_module(void)
2619 return platform_driver_register(&smsc911x_driver);
2622 /* entry point for unloading the module */
2623 static void __exit smsc911x_cleanup_module(void)
2625 platform_driver_unregister(&smsc911x_driver);
2628 module_init(smsc911x_init_module);
2629 module_exit(smsc911x_cleanup_module);