drivers/net/usb/r8152.c

   1 /*
   2  *  Copyright (c) 2013 Realtek Semiconductor Corp. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * version 2 as published by the Free Software Foundation.
   7  *
   8  */
   9
  10 #include <linux/init.h>
  11 #include <linux/signal.h>
  12 #include <linux/slab.h>
  13 #include <linux/module.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/etherdevice.h>
  16 #include <linux/mii.h>
  17 #include <linux/ethtool.h>
  18 #include <linux/usb.h>
  19 #include <linux/crc32.h>
  20 #include <linux/if_vlan.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/list.h>
  23 #include <linux/ip.h>
  24 #include <linux/ipv6.h>
  25
  26 /* Version Information */
  27 #define DRIVER_VERSION "v1.01.0 (2013/08/12)"
  28 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
  29 #define DRIVER_DESC "Realtek RTL8152 Based USB 2.0 Ethernet Adapters"
  30 #define MODULENAME "r8152"
  31
  32 #define R8152_PHY_ID            32
  33
  34 #define PLA_IDR                 0xc000
  35 #define PLA_RCR                 0xc010
  36 #define PLA_RMS                 0xc016
  37 #define PLA_RXFIFO_CTRL0        0xc0a0
  38 #define PLA_RXFIFO_CTRL1        0xc0a4
  39 #define PLA_RXFIFO_CTRL2        0xc0a8
  40 #define PLA_FMC                 0xc0b4
  41 #define PLA_CFG_WOL             0xc0b6
  42 #define PLA_MAR                 0xcd00
  43 #define PAL_BDC_CR              0xd1a0
  44 #define PLA_LEDSEL              0xdd90
  45 #define PLA_LED_FEATURE         0xdd92
  46 #define PLA_PHYAR               0xde00
  47 #define PLA_GPHY_INTR_IMR       0xe022
  48 #define PLA_EEE_CR              0xe040
  49 #define PLA_EEEP_CR             0xe080
  50 #define PLA_MAC_PWR_CTRL        0xe0c0
  51 #define PLA_TCR0                0xe610
  52 #define PLA_TCR1                0xe612
  53 #define PLA_TXFIFO_CTRL         0xe618
  54 #define PLA_RSTTELLY            0xe800
  55 #define PLA_CR                  0xe813
  56 #define PLA_CRWECR              0xe81c
  57 #define PLA_CONFIG5             0xe822
  58 #define PLA_PHY_PWR             0xe84c
  59 #define PLA_OOB_CTRL            0xe84f
  60 #define PLA_CPCR                0xe854
  61 #define PLA_MISC_0              0xe858
  62 #define PLA_MISC_1              0xe85a
  63 #define PLA_OCP_GPHY_BASE       0xe86c
  64 #define PLA_TELLYCNT            0xe890
  65 #define PLA_SFF_STS_7           0xe8de
  66 #define PLA_PHYSTATUS           0xe908
  67 #define PLA_BP_BA               0xfc26
  68 #define PLA_BP_0                0xfc28
  69 #define PLA_BP_1                0xfc2a
  70 #define PLA_BP_2                0xfc2c
  71 #define PLA_BP_3                0xfc2e
  72 #define PLA_BP_4                0xfc30
  73 #define PLA_BP_5                0xfc32
  74 #define PLA_BP_6                0xfc34
  75 #define PLA_BP_7                0xfc36
  76
  77 #define USB_DEV_STAT            0xb808
  78 #define USB_USB_CTRL            0xd406
  79 #define USB_PHY_CTRL            0xd408
  80 #define USB_TX_AGG              0xd40a
  81 #define USB_RX_BUF_TH           0xd40c
  82 #define USB_USB_TIMER           0xd428
  83 #define USB_PM_CTRL_STATUS      0xd432
  84 #define USB_TX_DMA              0xd434
  85 #define USB_UPS_CTRL            0xd800
  86 #define USB_BP_BA               0xfc26
  87 #define USB_BP_0                0xfc28
  88 #define USB_BP_1                0xfc2a
  89 #define USB_BP_2                0xfc2c
  90 #define USB_BP_3                0xfc2e
  91 #define USB_BP_4                0xfc30
  92 #define USB_BP_5                0xfc32
  93 #define USB_BP_6                0xfc34
  94 #define USB_BP_7                0xfc36
  95
  96 /* OCP Registers */
  97 #define OCP_ALDPS_CONFIG        0x2010
  98 #define OCP_EEE_CONFIG1         0x2080
  99 #define OCP_EEE_CONFIG2         0x2092
 100 #define OCP_EEE_CONFIG3         0x2094
 101 #define OCP_EEE_AR              0xa41a
 102 #define OCP_EEE_DATA            0xa41c
 103
 104 /* PLA_RCR */
 105 #define RCR_AAP                 0x00000001
 106 #define RCR_APM                 0x00000002
 107 #define RCR_AM                  0x00000004
 108 #define RCR_AB                  0x00000008
 109 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
 110
 111 /* PLA_RXFIFO_CTRL0 */
 112 #define RXFIFO_THR1_NORMAL      0x00080002
 113 #define RXFIFO_THR1_OOB         0x01800003
 114
 115 /* PLA_RXFIFO_CTRL1 */
 116 #define RXFIFO_THR2_FULL        0x00000060
 117 #define RXFIFO_THR2_HIGH        0x00000038
 118 #define RXFIFO_THR2_OOB         0x0000004a
 119
 120 /* PLA_RXFIFO_CTRL2 */
 121 #define RXFIFO_THR3_FULL        0x00000078
 122 #define RXFIFO_THR3_HIGH        0x00000048
 123 #define RXFIFO_THR3_OOB         0x0000005a
 124
 125 /* PLA_TXFIFO_CTRL */
 126 #define TXFIFO_THR_NORMAL       0x00400008
 127
 128 /* PLA_FMC */
 129 #define FMC_FCR_MCU_EN          0x0001
 130
 131 /* PLA_EEEP_CR */
 132 #define EEEP_CR_EEEP_TX         0x0002
 133
 134 /* PLA_TCR0 */
 135 #define TCR0_TX_EMPTY           0x0800
 136 #define TCR0_AUTO_FIFO          0x0080
 137
 138 /* PLA_TCR1 */
 139 #define VERSION_MASK            0x7cf0
 140
 141 /* PLA_CR */
 142 #define CR_RST                  0x10
 143 #define CR_RE                   0x08
 144 #define CR_TE                   0x04
 145
 146 /* PLA_CRWECR */
 147 #define CRWECR_NORAML           0x00
 148 #define CRWECR_CONFIG           0xc0
 149
 150 /* PLA_OOB_CTRL */
 151 #define NOW_IS_OOB              0x80
 152 #define TXFIFO_EMPTY            0x20
 153 #define RXFIFO_EMPTY            0x10
 154 #define LINK_LIST_READY         0x02
 155 #define DIS_MCU_CLROOB          0x01
 156 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
 157
 158 /* PLA_MISC_1 */
 159 #define RXDY_GATED_EN           0x0008
 160
 161 /* PLA_SFF_STS_7 */
 162 #define RE_INIT_LL              0x8000
 163 #define MCU_BORW_EN             0x4000
 164
 165 /* PLA_CPCR */
 166 #define CPCR_RX_VLAN            0x0040
 167
 168 /* PLA_CFG_WOL */
 169 #define MAGIC_EN                0x0001
 170
 171 /* PAL_BDC_CR */
 172 #define ALDPS_PROXY_MODE        0x0001
 173
 174 /* PLA_CONFIG5 */
 175 #define LAN_WAKE_EN             0x0002
 176
 177 /* PLA_LED_FEATURE */
 178 #define LED_MODE_MASK           0x0700
 179
 180 /* PLA_PHY_PWR */
 181 #define TX_10M_IDLE_EN          0x0080
 182 #define PFM_PWM_SWITCH          0x0040
 183
 184 /* PLA_MAC_PWR_CTRL */
 185 #define D3_CLK_GATED_EN         0x00004000
 186 #define MCU_CLK_RATIO           0x07010f07
 187 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
 188
 189 /* PLA_GPHY_INTR_IMR */
 190 #define GPHY_STS_MSK            0x0001
 191 #define SPEED_DOWN_MSK          0x0002
 192 #define SPDWN_RXDV_MSK          0x0004
 193 #define SPDWN_LINKCHG_MSK       0x0008
 194
 195 /* PLA_PHYAR */
 196 #define PHYAR_FLAG              0x80000000
 197
 198 /* PLA_EEE_CR */
 199 #define EEE_RX_EN               0x0001
 200 #define EEE_TX_EN               0x0002
 201
 202 /* USB_DEV_STAT */
 203 #define STAT_SPEED_MASK         0x0006
 204 #define STAT_SPEED_HIGH         0x0000
 205 #define STAT_SPEED_FULL         0x0001
 206
 207 /* USB_TX_AGG */
 208 #define TX_AGG_MAX_THRESHOLD    0x03
 209
 210 /* USB_RX_BUF_TH */
 211 #define RX_BUF_THR              0x7a120180
 212
 213 /* USB_TX_DMA */
 214 #define TEST_MODE_DISABLE       0x00000001
 215 #define TX_SIZE_ADJUST1         0x00000100
 216
 217 /* USB_UPS_CTRL */
 218 #define POWER_CUT               0x0100
 219
 220 /* USB_PM_CTRL_STATUS */
 221 #define RWSUME_INDICATE         0x0001
 222
 223 /* USB_USB_CTRL */
 224 #define RX_AGG_DISABLE          0x0010
 225
 226 /* OCP_ALDPS_CONFIG */
 227 #define ENPWRSAVE               0x8000
 228 #define ENPDNPS                 0x0200
 229 #define LINKENA                 0x0100
 230 #define DIS_SDSAVE              0x0010
 231
 232 /* OCP_EEE_CONFIG1 */
 233 #define RG_TXLPI_MSK_HFDUP      0x8000
 234 #define RG_MATCLR_EN            0x4000
 235 #define EEE_10_CAP              0x2000
 236 #define EEE_NWAY_EN             0x1000
 237 #define TX_QUIET_EN             0x0200
 238 #define RX_QUIET_EN             0x0100
 239 #define SDRISETIME              0x0010  /* bit 4 ~ 6 */
 240 #define RG_RXLPI_MSK_HFDUP      0x0008
 241 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
 242
 243 /* OCP_EEE_CONFIG2 */
 244 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
 245 #define RG_DACQUIET_EN          0x0400
 246 #define RG_LDVQUIET_EN          0x0200
 247 #define RG_CKRSEL               0x0020
 248 #define RG_EEEPRG_EN            0x0010
 249
 250 /* OCP_EEE_CONFIG3 */
 251 #define FST_SNR_EYE_R           0x1500  /* bit 7 ~ 15 */
 252 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
 253 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
 254
 255 /* OCP_EEE_AR */
 256 /* bit[15:14] function */
 257 #define FUN_ADDR                0x0000
 258 #define FUN_DATA                0x4000
 259 /* bit[4:0] device addr */
 260 #define DEVICE_ADDR             0x0007
 261
 262 /* OCP_EEE_DATA */
 263 #define EEE_ADDR                0x003C
 264 #define EEE_DATA                0x0002
 265
 266 enum rtl_register_content {
 267         _100bps         = 0x08,
 268         _10bps          = 0x04,
 269         LINK_STATUS     = 0x02,
 270         FULL_DUP        = 0x01,
 271 };
 272
 273 #define RTL8152_MAX_TX          10
 274 #define RTL8152_MAX_RX          10
 275 #define INTBUFSIZE              2
 276
 277 #define INTR_LINK               0x0004
 278
 279 #define RTL8152_REQT_READ       0xc0
 280 #define RTL8152_REQT_WRITE      0x40
 281 #define RTL8152_REQ_GET_REGS    0x05
 282 #define RTL8152_REQ_SET_REGS    0x05
 283
 284 #define BYTE_EN_DWORD           0xff
 285 #define BYTE_EN_WORD            0x33
 286 #define BYTE_EN_BYTE            0x11
 287 #define BYTE_EN_SIX_BYTES       0x3f
 288 #define BYTE_EN_START_MASK      0x0f
 289 #define BYTE_EN_END_MASK        0xf0
 290
 291 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
 292 #define RTL8152_TX_TIMEOUT      (HZ)
 293
 294 /* rtl8152 flags */
 295 enum rtl8152_flags {
 296         RTL8152_UNPLUG = 0,
 297         RTL8152_SET_RX_MODE,
 298         WORK_ENABLE,
 299         RTL8152_LINK_CHG,
 300 };
 301
 302 /* Define these values to match your device */
 303 #define VENDOR_ID_REALTEK               0x0bda
 304 #define PRODUCT_ID_RTL8152              0x8152
 305
 306 #define MCU_TYPE_PLA                    0x0100
 307 #define MCU_TYPE_USB                    0x0000
 308
 309 struct rx_desc {
 310         u32 opts1;
 311 #define RX_LEN_MASK                     0x7fff
 312         u32 opts2;
 313         u32 opts3;
 314         u32 opts4;
 315         u32 opts5;
 316         u32 opts6;
 317 };
 318
 319 struct tx_desc {
 320         u32 opts1;
 321 #define TX_FS                   (1 << 31) /* First segment of a packet */
 322 #define TX_LS                   (1 << 30) /* Final segment of a packet */
 323 #define TX_LEN_MASK             0x3ffff
 324
 325         u32 opts2;
 326 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
 327 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
 328 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
 329 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
 330 };
 331
 332 struct r8152;
 333
 334 struct rx_agg {
 335         struct list_head list;
 336         struct urb *urb;
 337         struct r8152 *context;
 338         void *buffer;
 339         void *head;
 340 };
 341
 342 struct tx_agg {
 343         struct list_head list;
 344         struct urb *urb;
 345         struct r8152 *context;
 346         void *buffer;
 347         void *head;
 348         u32 skb_num;
 349         u32 skb_len;
 350 };
 351
 352 struct r8152 {
 353         unsigned long flags;
 354         struct usb_device *udev;
 355         struct tasklet_struct tl;
 356         struct usb_interface *intf;
 357         struct net_device *netdev;
 358         struct urb *intr_urb;
 359         struct tx_agg tx_info[RTL8152_MAX_TX];
 360         struct rx_agg rx_info[RTL8152_MAX_RX];
 361         struct list_head rx_done, tx_free;
 362         struct sk_buff_head tx_queue;
 363         spinlock_t rx_lock, tx_lock;
 364         struct delayed_work schedule;
 365         struct mii_if_info mii;
 366         int intr_interval;
 367         u32 msg_enable;
 368         u16 ocp_base;
 369         u8 *intr_buff;
 370         u8 version;
 371         u8 speed;
 372 };
 373
 374 enum rtl_version {
 375         RTL_VER_UNKNOWN = 0,
 376         RTL_VER_01,
 377         RTL_VER_02
 378 };
 379
 380 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 381  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
 382  */
 383 static const int multicast_filter_limit = 32;
 384 static unsigned int rx_buf_sz = 16384;
 385
 386 static
 387 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 388 {
 389         int ret;
 390         void *tmp;
 391
 392         tmp = kmalloc(size, GFP_KERNEL);
 393         if (!tmp)
 394                 return -ENOMEM;
 395
 396         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
 397                                RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
 398                                value, index, tmp, size, 500);
 399
 400         memcpy(data, tmp, size);
 401         kfree(tmp);
 402
 403         return ret;
 404 }
 405
 406 static
 407 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
 408 {
 409         int ret;
 410         void *tmp;
 411
 412         tmp = kmalloc(size, GFP_KERNEL);
 413         if (!tmp)
 414                 return -ENOMEM;
 415
 416         memcpy(tmp, data, size);
 417
 418         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
 419                                RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
 420                                value, index, tmp, size, 500);
 421
 422         kfree(tmp);
 423         return ret;
 424 }
 425
 426 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
 427                                 void *data, u16 type)
 428 {
 429         u16     limit = 64;
 430         int     ret = 0;
 431
 432         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 433                 return -ENODEV;
 434
 435         /* both size and indix must be 4 bytes align */
 436         if ((size & 3) || !size || (index & 3) || !data)
 437                 return -EPERM;
 438
 439         if ((u32)index + (u32)size > 0xffff)
 440                 return -EPERM;
 441
 442         while (size) {
 443                 if (size > limit) {
 444                         ret = get_registers(tp, index, type, limit, data);
 445                         if (ret < 0)
 446                                 break;
 447
 448                         index += limit;
 449                         data += limit;
 450                         size -= limit;
 451                 } else {
 452                         ret = get_registers(tp, index, type, size, data);
 453                         if (ret < 0)
 454                                 break;
 455
 456                         index += size;
 457                         data += size;
 458                         size = 0;
 459                         break;
 460                 }
 461         }
 462
 463         return ret;
 464 }
 465
 466 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
 467                                 u16 size, void *data, u16 type)
 468 {
 469         int     ret;
 470         u16     byteen_start, byteen_end, byen;
 471         u16     limit = 512;
 472
 473         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 474                 return -ENODEV;
 475
 476         /* both size and indix must be 4 bytes align */
 477         if ((size & 3) || !size || (index & 3) || !data)
 478                 return -EPERM;
 479
 480         if ((u32)index + (u32)size > 0xffff)
 481                 return -EPERM;
 482
 483         byteen_start = byteen & BYTE_EN_START_MASK;
 484         byteen_end = byteen & BYTE_EN_END_MASK;
 485
 486         byen = byteen_start | (byteen_start << 4);
 487         ret = set_registers(tp, index, type | byen, 4, data);
 488         if (ret < 0)
 489                 goto error1;
 490
 491         index += 4;
 492         data += 4;
 493         size -= 4;
 494
 495         if (size) {
 496                 size -= 4;
 497
 498                 while (size) {
 499                         if (size > limit) {
 500                                 ret = set_registers(tp, index,
 501                                         type | BYTE_EN_DWORD,
 502                                         limit, data);
 503                                 if (ret < 0)
 504                                         goto error1;
 505
 506                                 index += limit;
 507                                 data += limit;
 508                                 size -= limit;
 509                         } else {
 510                                 ret = set_registers(tp, index,
 511                                         type | BYTE_EN_DWORD,
 512                                         size, data);
 513                                 if (ret < 0)
 514                                         goto error1;
 515
 516                                 index += size;
 517                                 data += size;
 518                                 size = 0;
 519                                 break;
 520                         }
 521                 }
 522
 523                 byen = byteen_end | (byteen_end >> 4);
 524                 ret = set_registers(tp, index, type | byen, 4, data);
 525                 if (ret < 0)
 526                         goto error1;
 527         }
 528
 529 error1:
 530         return ret;
 531 }
 532
 533 static inline
 534 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 535 {
 536         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
 537 }
 538
 539 static inline
 540 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 541 {
 542         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
 543 }
 544
 545 static inline
 546 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
 547 {
 548         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
 549 }
 550
 551 static inline
 552 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
 553 {
 554         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
 555 }
 556
 557 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
 558 {
 559         __le32 data;
 560
 561         generic_ocp_read(tp, index, sizeof(data), &data, type);
 562
 563         return __le32_to_cpu(data);
 564 }
 565
 566 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
 567 {
 568         __le32 tmp = __cpu_to_le32(data);
 569
 570         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
 571 }
 572
 573 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
 574 {
 575         u32 data;
 576         __le32 tmp;
 577         u8 shift = index & 2;
 578
 579         index &= ~3;
 580
 581         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 582
 583         data = __le32_to_cpu(tmp);
 584         data >>= (shift * 8);
 585         data &= 0xffff;
 586
 587         return (u16)data;
 588 }
 589
 590 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
 591 {
 592         u32 mask = 0xffff;
 593         __le32 tmp;
 594         u16 byen = BYTE_EN_WORD;
 595         u8 shift = index & 2;
 596
 597         data &= mask;
 598
 599         if (index & 2) {
 600                 byen <<= shift;
 601                 mask <<= (shift * 8);
 602                 data <<= (shift * 8);
 603                 index &= ~3;
 604         }
 605
 606         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 607
 608         data |= __le32_to_cpu(tmp) & ~mask;
 609         tmp = __cpu_to_le32(data);
 610
 611         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 612 }
 613
 614 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
 615 {
 616         u32 data;
 617         __le32 tmp;
 618         u8 shift = index & 3;
 619
 620         index &= ~3;
 621
 622         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 623
 624         data = __le32_to_cpu(tmp);
 625         data >>= (shift * 8);
 626         data &= 0xff;
 627
 628         return (u8)data;
 629 }
 630
 631 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
 632 {
 633         u32 mask = 0xff;
 634         __le32 tmp;
 635         u16 byen = BYTE_EN_BYTE;
 636         u8 shift = index & 3;
 637
 638         data &= mask;
 639
 640         if (index & 3) {
 641                 byen <<= shift;
 642                 mask <<= (shift * 8);
 643                 data <<= (shift * 8);
 644                 index &= ~3;
 645         }
 646
 647         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
 648
 649         data |= __le32_to_cpu(tmp) & ~mask;
 650         tmp = __cpu_to_le32(data);
 651
 652         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
 653 }
 654
 655 static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
 656 {
 657         u32     ocp_data;
 658         int     i;
 659
 660         ocp_data = PHYAR_FLAG | ((reg_addr & 0x1f) << 16) |
 661                    (value & 0xffff);
 662
 663         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
 664
 665         for (i = 20; i > 0; i--) {
 666                 udelay(25);
 667                 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
 668                 if (!(ocp_data & PHYAR_FLAG))
 669                         break;
 670         }
 671         udelay(20);
 672 }
 673
 674 static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
 675 {
 676         u32     ocp_data;
 677         int     i;
 678
 679         ocp_data = (reg_addr & 0x1f) << 16;
 680         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_PHYAR, ocp_data);
 681
 682         for (i = 20; i > 0; i--) {
 683                 udelay(25);
 684                 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_PHYAR);
 685                 if (ocp_data & PHYAR_FLAG)
 686                         break;
 687         }
 688         udelay(20);
 689
 690         if (!(ocp_data & PHYAR_FLAG))
 691                 return -EAGAIN;
 692
 693         return (u16)(ocp_data & 0xffff);
 694 }
 695
 696 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
 697 {
 698         struct r8152 *tp = netdev_priv(netdev);
 699
 700         if (phy_id != R8152_PHY_ID)
 701                 return -EINVAL;
 702
 703         return r8152_mdio_read(tp, reg);
 704 }
 705
 706 static
 707 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
 708 {
 709         struct r8152 *tp = netdev_priv(netdev);
 710
 711         if (phy_id != R8152_PHY_ID)
 712                 return;
 713
 714         r8152_mdio_write(tp, reg, val);
 715 }
 716
 717 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
 718 {
 719         u16 ocp_base, ocp_index;
 720
 721         ocp_base = addr & 0xf000;
 722         if (ocp_base != tp->ocp_base) {
 723                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
 724                 tp->ocp_base = ocp_base;
 725         }
 726
 727         ocp_index = (addr & 0x0fff) | 0xb000;
 728         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
 729 }
 730
 731 static
 732 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
 733
 734 static inline void set_ethernet_addr(struct r8152 *tp)
 735 {
 736         struct net_device *dev = tp->netdev;
 737         u8 node_id[8] = {0};
 738
 739         if (pla_ocp_read(tp, PLA_IDR, sizeof(node_id), node_id) < 0)
 740                 netif_notice(tp, probe, dev, "inet addr fail\n");
 741         else {
 742                 memcpy(dev->dev_addr, node_id, dev->addr_len);
 743                 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
 744         }
 745 }
 746
 747 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
 748 {
 749         struct r8152 *tp = netdev_priv(netdev);
 750         struct sockaddr *addr = p;
 751
 752         if (!is_valid_ether_addr(addr->sa_data))
 753                 return -EADDRNOTAVAIL;
 754
 755         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
 756
 757         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
 758         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
 759         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
 760
 761         return 0;
 762 }
 763
 764 static struct net_device_stats *rtl8152_get_stats(struct net_device *dev)
 765 {
 766         return &dev->stats;
 767 }
 768
 769 static void read_bulk_callback(struct urb *urb)
 770 {
 771         struct net_device *netdev;
 772         unsigned long flags;
 773         int status = urb->status;
 774         struct rx_agg *agg;
 775         struct r8152 *tp;
 776         int result;
 777
 778         agg = urb->context;
 779         if (!agg)
 780                 return;
 781
 782         tp = agg->context;
 783         if (!tp)
 784                 return;
 785
 786         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 787                 return;
 788
 789         if (!test_bit(WORK_ENABLE, &tp->flags))
 790                 return;
 791
 792         netdev = tp->netdev;
 793         if (!netif_carrier_ok(netdev))
 794                 return;
 795
 796         switch (status) {
 797         case 0:
 798                 if (urb->actual_length < ETH_ZLEN)
 799                         break;
 800
 801                 spin_lock_irqsave(&tp->rx_lock, flags);
 802                 list_add_tail(&agg->list, &tp->rx_done);
 803                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 804                 tasklet_schedule(&tp->tl);
 805                 return;
 806         case -ESHUTDOWN:
 807                 set_bit(RTL8152_UNPLUG, &tp->flags);
 808                 netif_device_detach(tp->netdev);
 809                 return;
 810         case -ENOENT:
 811                 return; /* the urb is in unlink state */
 812         case -ETIME:
 813                 pr_warn_ratelimited("may be reset is needed?..\n");
 814                 break;
 815         default:
 816                 pr_warn_ratelimited("Rx status %d\n", status);
 817                 break;
 818         }
 819
 820         result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
 821         if (result == -ENODEV) {
 822                 netif_device_detach(tp->netdev);
 823         } else if (result) {
 824                 spin_lock_irqsave(&tp->rx_lock, flags);
 825                 list_add_tail(&agg->list, &tp->rx_done);
 826                 spin_unlock_irqrestore(&tp->rx_lock, flags);
 827                 tasklet_schedule(&tp->tl);
 828         }
 829 }
 830
 831 static void write_bulk_callback(struct urb *urb)
 832 {
 833         struct net_device_stats *stats;
 834         unsigned long flags;
 835         struct tx_agg *agg;
 836         struct r8152 *tp;
 837         int status = urb->status;
 838
 839         agg = urb->context;
 840         if (!agg)
 841                 return;
 842
 843         tp = agg->context;
 844         if (!tp)
 845                 return;
 846
 847         stats = rtl8152_get_stats(tp->netdev);
 848         if (status) {
 849                 pr_warn_ratelimited("Tx status %d\n", status);
 850                 stats->tx_errors += agg->skb_num;
 851         } else {
 852                 stats->tx_packets += agg->skb_num;
 853                 stats->tx_bytes += agg->skb_len;
 854         }
 855
 856         spin_lock_irqsave(&tp->tx_lock, flags);
 857         list_add_tail(&agg->list, &tp->tx_free);
 858         spin_unlock_irqrestore(&tp->tx_lock, flags);
 859
 860         if (!netif_carrier_ok(tp->netdev))
 861                 return;
 862
 863         if (!test_bit(WORK_ENABLE, &tp->flags))
 864                 return;
 865
 866         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 867                 return;
 868
 869         if (!skb_queue_empty(&tp->tx_queue))
 870                 tasklet_schedule(&tp->tl);
 871 }
 872
 873 static void intr_callback(struct urb *urb)
 874 {
 875         struct r8152 *tp;
 876         __u16 *d;
 877         int status = urb->status;
 878         int res;
 879
 880         tp = urb->context;
 881         if (!tp)
 882                 return;
 883
 884         if (!test_bit(WORK_ENABLE, &tp->flags))
 885                 return;
 886
 887         if (test_bit(RTL8152_UNPLUG, &tp->flags))
 888                 return;
 889
 890         switch (status) {
 891         case 0:                 /* success */
 892                 break;
 893         case -ECONNRESET:       /* unlink */
 894         case -ESHUTDOWN:
 895                 netif_device_detach(tp->netdev);
 896         case -ENOENT:
 897                 return;
 898         case -EOVERFLOW:
 899                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
 900                 goto resubmit;
 901         /* -EPIPE:  should clear the halt */
 902         default:
 903                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
 904                 goto resubmit;
 905         }
 906
 907         d = urb->transfer_buffer;
 908         if (INTR_LINK & __le16_to_cpu(d[0])) {
 909                 if (!(tp->speed & LINK_STATUS)) {
 910                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 911                         schedule_delayed_work(&tp->schedule, 0);
 912                 }
 913         } else {
 914                 if (tp->speed & LINK_STATUS) {
 915                         set_bit(RTL8152_LINK_CHG, &tp->flags);
 916                         schedule_delayed_work(&tp->schedule, 0);
 917                 }
 918         }
 919
 920 resubmit:
 921         res = usb_submit_urb(urb, GFP_ATOMIC);
 922         if (res == -ENODEV)
 923                 netif_device_detach(tp->netdev);
 924         else if (res)
 925                 netif_err(tp, intr, tp->netdev,
 926                         "can't resubmit intr, status %d\n", res);
 927 }
 928
 929 static inline void *rx_agg_align(void *data)
 930 {
 931         return (void *)ALIGN((uintptr_t)data, 8);
 932 }
 933
 934 static inline void *tx_agg_align(void *data)
 935 {
 936         return (void *)ALIGN((uintptr_t)data, 4);
 937 }
 938
 939 static void free_all_mem(struct r8152 *tp)
 940 {
 941         int i;
 942
 943         for (i = 0; i < RTL8152_MAX_RX; i++) {
 944                 if (tp->rx_info[i].urb) {
 945                         usb_free_urb(tp->rx_info[i].urb);
 946                         tp->rx_info[i].urb = NULL;
 947                 }
 948
 949                 if (tp->rx_info[i].buffer) {
 950                         kfree(tp->rx_info[i].buffer);
 951                         tp->rx_info[i].buffer = NULL;
 952                         tp->rx_info[i].head = NULL;
 953                 }
 954         }
 955
 956         for (i = 0; i < RTL8152_MAX_TX; i++) {
 957                 if (tp->tx_info[i].urb) {
 958                         usb_free_urb(tp->tx_info[i].urb);
 959                         tp->tx_info[i].urb = NULL;
 960                 }
 961
 962                 if (tp->tx_info[i].buffer) {
 963                         kfree(tp->tx_info[i].buffer);
 964                         tp->tx_info[i].buffer = NULL;
 965                         tp->tx_info[i].head = NULL;
 966                 }
 967         }
 968
 969         if (tp->intr_urb) {
 970                 usb_free_urb(tp->intr_urb);
 971                 tp->intr_urb = NULL;
 972         }
 973
 974         if (tp->intr_buff) {
 975                 kfree(tp->intr_buff);
 976                 tp->intr_buff = NULL;
 977         }
 978 }
 979
 980 static int alloc_all_mem(struct r8152 *tp)
 981 {
 982         struct net_device *netdev = tp->netdev;
 983         struct usb_interface *intf = tp->intf;
 984         struct usb_host_interface *alt = intf->cur_altsetting;
 985         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
 986         struct urb *urb;
 987         int node, i;
 988         u8 *buf;
 989
 990         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
 991
 992         spin_lock_init(&tp->rx_lock);
 993         spin_lock_init(&tp->tx_lock);
 994         INIT_LIST_HEAD(&tp->rx_done);
 995         INIT_LIST_HEAD(&tp->tx_free);
 996         skb_queue_head_init(&tp->tx_queue);
 997
 998         for (i = 0; i < RTL8152_MAX_RX; i++) {
 999                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1000                 if (!buf)
1001                         goto err1;
1002
1003                 if (buf != rx_agg_align(buf)) {
1004                         kfree(buf);
1005                         buf = kmalloc_node(rx_buf_sz + 8, GFP_KERNEL, node);
1006                         if (!buf)
1007                                 goto err1;
1008                 }
1009
1010                 urb = usb_alloc_urb(0, GFP_KERNEL);
1011                 if (!urb) {
1012                         kfree(buf);
1013                         goto err1;
1014                 }
1015
1016                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1017                 tp->rx_info[i].context = tp;
1018                 tp->rx_info[i].urb = urb;
1019                 tp->rx_info[i].buffer = buf;
1020                 tp->rx_info[i].head = rx_agg_align(buf);
1021         }
1022
1023         for (i = 0; i < RTL8152_MAX_TX; i++) {
1024                 buf = kmalloc_node(rx_buf_sz, GFP_KERNEL, node);
1025                 if (!buf)
1026                         goto err1;
1027
1028                 if (buf != tx_agg_align(buf)) {
1029                         kfree(buf);
1030                         buf = kmalloc_node(rx_buf_sz + 4, GFP_KERNEL, node);
1031                         if (!buf)
1032                                 goto err1;
1033                 }
1034
1035                 urb = usb_alloc_urb(0, GFP_KERNEL);
1036                 if (!urb) {
1037                         kfree(buf);
1038                         goto err1;
1039                 }
1040
1041                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1042                 tp->tx_info[i].context = tp;
1043                 tp->tx_info[i].urb = urb;
1044                 tp->tx_info[i].buffer = buf;
1045                 tp->tx_info[i].head = tx_agg_align(buf);
1046
1047                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1048         }
1049
1050         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1051         if (!tp->intr_urb)
1052                 goto err1;
1053
1054         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1055         if (!tp->intr_buff)
1056                 goto err1;
1057
1058         tp->intr_interval = (int)ep_intr->desc.bInterval;
1059         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1060                      tp->intr_buff, INTBUFSIZE, intr_callback,
1061                      tp, tp->intr_interval);
1062
1063         return 0;
1064
1065 err1:
1066         free_all_mem(tp);
1067         return -ENOMEM;
1068 }
1069
1070 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1071 {
1072         struct tx_agg *agg = NULL;
1073         unsigned long flags;
1074
1075         spin_lock_irqsave(&tp->tx_lock, flags);
1076         if (!list_empty(&tp->tx_free)) {
1077                 struct list_head *cursor;
1078
1079                 cursor = tp->tx_free.next;
1080                 list_del_init(cursor);
1081                 agg = list_entry(cursor, struct tx_agg, list);
1082         }
1083         spin_unlock_irqrestore(&tp->tx_lock, flags);
1084
1085         return agg;
1086 }
1087
1088 static void
1089 r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc, struct sk_buff *skb)
1090 {
1091         memset(desc, 0, sizeof(*desc));
1092
1093         desc->opts1 = cpu_to_le32((skb->len & TX_LEN_MASK) | TX_FS | TX_LS);
1094
1095         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1096                 __be16 protocol;
1097                 u8 ip_protocol;
1098                 u32 opts2 = 0;
1099
1100                 if (skb->protocol == htons(ETH_P_8021Q))
1101                         protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1102                 else
1103                         protocol = skb->protocol;
1104
1105                 switch (protocol) {
1106                 case htons(ETH_P_IP):
1107                         opts2 |= IPV4_CS;
1108                         ip_protocol = ip_hdr(skb)->protocol;
1109                         break;
1110
1111                 case htons(ETH_P_IPV6):
1112                         opts2 |= IPV6_CS;
1113                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1114                         break;
1115
1116                 default:
1117                         ip_protocol = IPPROTO_RAW;
1118                         break;
1119                 }
1120
1121                 if (ip_protocol == IPPROTO_TCP) {
1122                         opts2 |= TCP_CS;
1123                         opts2 |= (skb_transport_offset(skb) & 0x7fff) << 17;
1124                 } else if (ip_protocol == IPPROTO_UDP) {
1125                         opts2 |= UDP_CS;
1126                 } else {
1127                         WARN_ON_ONCE(1);
1128                 }
1129
1130                 desc->opts2 = cpu_to_le32(opts2);
1131         }
1132 }
1133
1134 static void rx_bottom(struct r8152 *tp)
1135 {
1136         struct net_device_stats *stats;
1137         struct net_device *netdev;
1138         struct rx_agg *agg;
1139         struct rx_desc *rx_desc;
1140         unsigned long flags;
1141         struct list_head *cursor, *next;
1142         struct sk_buff *skb;
1143         struct urb *urb;
1144         unsigned pkt_len;
1145         int len_used;
1146         u8 *rx_data;
1147         int ret;
1148
1149         netdev = tp->netdev;
1150
1151         stats = rtl8152_get_stats(netdev);
1152
1153         spin_lock_irqsave(&tp->rx_lock, flags);
1154         list_for_each_safe(cursor, next, &tp->rx_done) {
1155                 list_del_init(cursor);
1156                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1157
1158                 agg = list_entry(cursor, struct rx_agg, list);
1159                 urb = agg->urb;
1160                 if (urb->actual_length < ETH_ZLEN)
1161                         goto submit;
1162
1163                 len_used = 0;
1164                 rx_desc = agg->head;
1165                 rx_data = agg->head;
1166                 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1167                 len_used += sizeof(struct rx_desc) + pkt_len;
1168
1169                 while (urb->actual_length >= len_used) {
1170                         if (pkt_len < ETH_ZLEN)
1171                                 break;
1172
1173                         pkt_len -= 4; /* CRC */
1174                         rx_data += sizeof(struct rx_desc);
1175
1176                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1177                         if (!skb) {
1178                                 stats->rx_dropped++;
1179                                 break;
1180                         }
1181                         memcpy(skb->data, rx_data, pkt_len);
1182                         skb_put(skb, pkt_len);
1183                         skb->protocol = eth_type_trans(skb, netdev);
1184                         netif_rx(skb);
1185                         stats->rx_packets++;
1186                         stats->rx_bytes += pkt_len;
1187
1188                         rx_data = rx_agg_align(rx_data + pkt_len + 4);
1189                         rx_desc = (struct rx_desc *)rx_data;
1190                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1191                         len_used = (int)(rx_data - (u8 *)agg->head);
1192                         len_used += sizeof(struct rx_desc) + pkt_len;
1193                 }
1194
1195 submit:
1196                 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1197                 spin_lock_irqsave(&tp->rx_lock, flags);
1198                 if (ret && ret != -ENODEV) {
1199                         list_add_tail(&agg->list, next);
1200                         tasklet_schedule(&tp->tl);
1201                 }
1202         }
1203         spin_unlock_irqrestore(&tp->rx_lock, flags);
1204 }
1205
1206 static void tx_bottom(struct r8152 *tp)
1207 {
1208         struct net_device_stats *stats;
1209         struct net_device *netdev;
1210         struct tx_agg *agg;
1211         unsigned long flags;
1212         u32 remain, total;
1213         u8 *tx_data;
1214         int res;
1215
1216         netdev = tp->netdev;
1217
1218 next_agg:
1219         agg = NULL;
1220         if (skb_queue_empty(&tp->tx_queue))
1221                 return;
1222
1223         agg = r8152_get_tx_agg(tp);
1224         if (!agg)
1225                 return;
1226
1227         tx_data = agg->head;
1228         agg->skb_num = agg->skb_len = 0;
1229         remain = rx_buf_sz - sizeof(struct tx_desc);
1230         total = 0;
1231
1232         while (remain >= ETH_ZLEN) {
1233                 struct tx_desc *tx_desc;
1234                 struct sk_buff *skb;
1235                 unsigned int len;
1236
1237                 skb = skb_dequeue(&tp->tx_queue);
1238                 if (!skb)
1239                         break;
1240
1241                 len = skb->len;
1242                 if (remain < len) {
1243                         skb_queue_head(&tp->tx_queue, skb);
1244                         break;
1245                 }
1246
1247                 tx_data = tx_agg_align(tx_data);
1248                 tx_desc = (struct tx_desc *)tx_data;
1249                 tx_data += sizeof(*tx_desc);
1250
1251                 r8152_tx_csum(tp, tx_desc, skb);
1252                 memcpy(tx_data, skb->data, len);
1253                 agg->skb_num++;
1254                 agg->skb_len += len;
1255                 dev_kfree_skb_any(skb);
1256
1257                 tx_data += len;
1258                 remain = rx_buf_sz - sizeof(*tx_desc) -
1259                          (u32)(tx_agg_align(tx_data) - agg->head);
1260         }
1261
1262         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1263                           agg->head, (int)(tx_data - (u8 *)agg->head),
1264                           (usb_complete_t)write_bulk_callback, agg);
1265         res = usb_submit_urb(agg->urb, GFP_ATOMIC);
1266
1267         stats = rtl8152_get_stats(netdev);
1268
1269         if (res) {
1270                 /* Can we get/handle EPIPE here? */
1271                 if (res == -ENODEV) {
1272                         netif_device_detach(netdev);
1273                 } else {
1274                         netif_warn(tp, tx_err, netdev,
1275                                    "failed tx_urb %d\n", res);
1276                         stats->tx_dropped += agg->skb_num;
1277                         spin_lock_irqsave(&tp->tx_lock, flags);
1278                         list_add_tail(&agg->list, &tp->tx_free);
1279                         spin_unlock_irqrestore(&tp->tx_lock, flags);
1280                 }
1281                 return;
1282         }
1283         goto next_agg;
1284 }
1285
1286 static void bottom_half(unsigned long data)
1287 {
1288         struct r8152 *tp;
1289
1290         tp = (struct r8152 *)data;
1291
1292         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1293                 return;
1294
1295         if (!test_bit(WORK_ENABLE, &tp->flags))
1296                 return;
1297
1298         if (!netif_carrier_ok(tp->netdev))
1299                 return;
1300
1301         rx_bottom(tp);
1302         tx_bottom(tp);
1303 }
1304
1305 static
1306 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1307 {
1308         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1309                       agg->head, rx_buf_sz,
1310                       (usb_complete_t)read_bulk_callback, agg);
1311
1312         return usb_submit_urb(agg->urb, mem_flags);
1313 }
1314
1315 static void rtl8152_tx_timeout(struct net_device *netdev)
1316 {
1317         struct r8152 *tp = netdev_priv(netdev);
1318         int i;
1319
1320         netif_warn(tp, tx_err, netdev, "Tx timeout.\n");
1321         for (i = 0; i < RTL8152_MAX_TX; i++)
1322                 usb_unlink_urb(tp->tx_info[i].urb);
1323 }
1324
1325 static void rtl8152_set_rx_mode(struct net_device *netdev)
1326 {
1327         struct r8152 *tp = netdev_priv(netdev);
1328
1329         if (tp->speed & LINK_STATUS) {
1330                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1331                 schedule_delayed_work(&tp->schedule, 0);
1332         }
1333 }
1334
1335 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1336 {
1337         struct r8152 *tp = netdev_priv(netdev);
1338         u32 mc_filter[2];       /* Multicast hash filter */
1339         __le32 tmp[2];
1340         u32 ocp_data;
1341
1342         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1343         netif_stop_queue(netdev);
1344         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1345         ocp_data &= ~RCR_ACPT_ALL;
1346         ocp_data |= RCR_AB | RCR_APM;
1347
1348         if (netdev->flags & IFF_PROMISC) {
1349                 /* Unconditionally log net taps. */
1350                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1351                 ocp_data |= RCR_AM | RCR_AAP;
1352                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1353         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1354                    (netdev->flags & IFF_ALLMULTI)) {
1355                 /* Too many to filter perfectly -- accept all multicasts. */
1356                 ocp_data |= RCR_AM;
1357                 mc_filter[1] = mc_filter[0] = 0xffffffff;
1358         } else {
1359                 struct netdev_hw_addr *ha;
1360
1361                 mc_filter[1] = mc_filter[0] = 0;
1362                 netdev_for_each_mc_addr(ha, netdev) {
1363                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1364                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1365                         ocp_data |= RCR_AM;
1366                 }
1367         }
1368
1369         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1370         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1371
1372         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1373         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1374         netif_wake_queue(netdev);
1375 }
1376
1377 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1378                                             struct net_device *netdev)
1379 {
1380         struct r8152 *tp = netdev_priv(netdev);
1381         struct net_device_stats *stats = rtl8152_get_stats(netdev);
1382         unsigned long flags;
1383         struct tx_agg *agg = NULL;
1384         struct tx_desc *tx_desc;
1385         unsigned int len;
1386         u8 *tx_data;
1387         int res;
1388
1389         skb_tx_timestamp(skb);
1390
1391         /* If tx_queue is not empty, it means at least one previous packt */
1392         /* is waiting for sending. Don't send current one before it.      */
1393         if (skb_queue_empty(&tp->tx_queue))
1394                 agg = r8152_get_tx_agg(tp);
1395
1396         if (!agg) {
1397                 skb_queue_tail(&tp->tx_queue, skb);
1398                 return NETDEV_TX_OK;
1399         }
1400
1401         tx_desc = (struct tx_desc *)agg->head;
1402         tx_data = agg->head + sizeof(*tx_desc);
1403         agg->skb_num = agg->skb_len = 0;
1404
1405         len = skb->len;
1406         r8152_tx_csum(tp, tx_desc, skb);
1407         memcpy(tx_data, skb->data, len);
1408         dev_kfree_skb_any(skb);
1409         agg->skb_num++;
1410         agg->skb_len += len;
1411         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1412                           agg->head, len + sizeof(*tx_desc),
1413                           (usb_complete_t)write_bulk_callback, agg);
1414         res = usb_submit_urb(agg->urb, GFP_ATOMIC);
1415         if (res) {
1416                 /* Can we get/handle EPIPE here? */
1417                 if (res == -ENODEV) {
1418                         netif_device_detach(tp->netdev);
1419                 } else {
1420                         netif_warn(tp, tx_err, netdev,
1421                                    "failed tx_urb %d\n", res);
1422                         stats->tx_dropped++;
1423                         spin_lock_irqsave(&tp->tx_lock, flags);
1424                         list_add_tail(&agg->list, &tp->tx_free);
1425                         spin_unlock_irqrestore(&tp->tx_lock, flags);
1426                 }
1427         }
1428
1429         return NETDEV_TX_OK;
1430 }
1431
1432 static void r8152b_reset_packet_filter(struct r8152 *tp)
1433 {
1434         u32     ocp_data;
1435
1436         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1437         ocp_data &= ~FMC_FCR_MCU_EN;
1438         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1439         ocp_data |= FMC_FCR_MCU_EN;
1440         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1441 }
1442
1443 static void rtl8152_nic_reset(struct r8152 *tp)
1444 {
1445         int     i;
1446
1447         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1448
1449         for (i = 0; i < 1000; i++) {
1450                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1451                         break;
1452                 udelay(100);
1453         }
1454 }
1455
1456 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1457 {
1458         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1459 }
1460
1461 static int rtl8152_enable(struct r8152 *tp)
1462 {
1463         u32 ocp_data;
1464         int i, ret;
1465         u8 speed;
1466
1467         speed = rtl8152_get_speed(tp);
1468         if (speed & _10bps) {
1469                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1470                 ocp_data |= EEEP_CR_EEEP_TX;
1471                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1472         } else {
1473                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1474                 ocp_data &= ~EEEP_CR_EEEP_TX;
1475                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1476         }
1477
1478         r8152b_reset_packet_filter(tp);
1479
1480         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
1481         ocp_data |= CR_RE | CR_TE;
1482         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
1483
1484         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1485         ocp_data &= ~RXDY_GATED_EN;
1486         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1487
1488         INIT_LIST_HEAD(&tp->rx_done);
1489         ret = 0;
1490         for (i = 0; i < RTL8152_MAX_RX; i++) {
1491                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1492                 ret |= r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1493         }
1494
1495         return ret;
1496 }
1497
1498 static void rtl8152_disable(struct r8152 *tp)
1499 {
1500         struct net_device_stats *stats = rtl8152_get_stats(tp->netdev);
1501         struct sk_buff *skb;
1502         u32 ocp_data;
1503         int i;
1504
1505         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1506         ocp_data &= ~RCR_ACPT_ALL;
1507         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1508
1509         while ((skb = skb_dequeue(&tp->tx_queue))) {
1510                 dev_kfree_skb(skb);
1511                 stats->tx_dropped++;
1512         }
1513
1514         for (i = 0; i < RTL8152_MAX_TX; i++)
1515                 usb_kill_urb(tp->tx_info[i].urb);
1516
1517         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1518         ocp_data |= RXDY_GATED_EN;
1519         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1520
1521         for (i = 0; i < 1000; i++) {
1522                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1523                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
1524                         break;
1525                 mdelay(1);
1526         }
1527
1528         for (i = 0; i < 1000; i++) {
1529                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
1530                         break;
1531                 mdelay(1);
1532         }
1533
1534         for (i = 0; i < RTL8152_MAX_RX; i++)
1535                 usb_kill_urb(tp->rx_info[i].urb);
1536
1537         rtl8152_nic_reset(tp);
1538 }
1539
1540 static void r8152b_exit_oob(struct r8152 *tp)
1541 {
1542         u32     ocp_data;
1543         int     i;
1544
1545         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1546         ocp_data &= ~RCR_ACPT_ALL;
1547         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1548
1549         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1550         ocp_data |= RXDY_GATED_EN;
1551         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1552
1553         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1554         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
1555
1556         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1557         ocp_data &= ~NOW_IS_OOB;
1558         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1559
1560         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1561         ocp_data &= ~MCU_BORW_EN;
1562         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1563
1564         for (i = 0; i < 1000; i++) {
1565                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1566                 if (ocp_data & LINK_LIST_READY)
1567                         break;
1568                 mdelay(1);
1569         }
1570
1571         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1572         ocp_data |= RE_INIT_LL;
1573         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1574
1575         for (i = 0; i < 1000; i++) {
1576                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1577                 if (ocp_data & LINK_LIST_READY)
1578                         break;
1579                 mdelay(1);
1580         }
1581
1582         rtl8152_nic_reset(tp);
1583
1584         /* rx share fifo credit full threshold */
1585         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
1586
1587         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_DEV_STAT);
1588         ocp_data &= STAT_SPEED_MASK;
1589         if (ocp_data == STAT_SPEED_FULL) {
1590                 /* rx share fifo credit near full threshold */
1591                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1592                                 RXFIFO_THR2_FULL);
1593                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1594                                 RXFIFO_THR3_FULL);
1595         } else {
1596                 /* rx share fifo credit near full threshold */
1597                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
1598                                 RXFIFO_THR2_HIGH);
1599                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
1600                                 RXFIFO_THR3_HIGH);
1601         }
1602
1603         /* TX share fifo free credit full threshold */
1604         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
1605
1606         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
1607         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_BUF_THR);
1608         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
1609                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
1610
1611         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1612         ocp_data &= ~CPCR_RX_VLAN;
1613         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1614
1615         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1616
1617         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
1618         ocp_data |= TCR0_AUTO_FIFO;
1619         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
1620 }
1621
1622 static void r8152b_enter_oob(struct r8152 *tp)
1623 {
1624         u32     ocp_data;
1625         int     i;
1626
1627         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1628         ocp_data &= ~NOW_IS_OOB;
1629         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1630
1631         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
1632         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
1633         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
1634
1635         rtl8152_disable(tp);
1636
1637         for (i = 0; i < 1000; i++) {
1638                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1639                 if (ocp_data & LINK_LIST_READY)
1640                         break;
1641                 mdelay(1);
1642         }
1643
1644         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
1645         ocp_data |= RE_INIT_LL;
1646         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
1647
1648         for (i = 0; i < 1000; i++) {
1649                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1650                 if (ocp_data & LINK_LIST_READY)
1651                         break;
1652                 mdelay(1);
1653         }
1654
1655         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
1656
1657         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
1658         ocp_data |= MAGIC_EN;
1659         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
1660
1661         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
1662         ocp_data |= CPCR_RX_VLAN;
1663         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
1664
1665         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
1666         ocp_data |= ALDPS_PROXY_MODE;
1667         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
1668
1669         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
1670         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
1671         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
1672
1673         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5, LAN_WAKE_EN);
1674
1675         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1676         ocp_data &= ~RXDY_GATED_EN;
1677         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1678
1679         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1680         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
1681         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1682 }
1683
1684 static void r8152b_disable_aldps(struct r8152 *tp)
1685 {
1686         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
1687         msleep(20);
1688 }
1689
1690 static inline void r8152b_enable_aldps(struct r8152 *tp)
1691 {
1692         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
1693                                             LINKENA | DIS_SDSAVE);
1694 }
1695
1696 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
1697 {
1698         u16 bmcr, anar;
1699         int ret = 0;
1700
1701         cancel_delayed_work_sync(&tp->schedule);
1702         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1703         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
1704                   ADVERTISE_100HALF | ADVERTISE_100FULL);
1705
1706         if (autoneg == AUTONEG_DISABLE) {
1707                 if (speed == SPEED_10) {
1708                         bmcr = 0;
1709                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1710                 } else if (speed == SPEED_100) {
1711                         bmcr = BMCR_SPEED100;
1712                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1713                 } else {
1714                         ret = -EINVAL;
1715                         goto out;
1716                 }
1717
1718                 if (duplex == DUPLEX_FULL)
1719                         bmcr |= BMCR_FULLDPLX;
1720         } else {
1721                 if (speed == SPEED_10) {
1722                         if (duplex == DUPLEX_FULL)
1723                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1724                         else
1725                                 anar |= ADVERTISE_10HALF;
1726                 } else if (speed == SPEED_100) {
1727                         if (duplex == DUPLEX_FULL) {
1728                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
1729                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
1730                         } else {
1731                                 anar |= ADVERTISE_10HALF;
1732                                 anar |= ADVERTISE_100HALF;
1733                         }
1734                 } else {
1735                         ret = -EINVAL;
1736                         goto out;
1737                 }
1738
1739                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
1740         }
1741
1742         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1743         r8152_mdio_write(tp, MII_BMCR, bmcr);
1744
1745 out:
1746
1747         return ret;
1748 }
1749
1750 static void rtl8152_down(struct r8152 *tp)
1751 {
1752         u32     ocp_data;
1753
1754         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1755         ocp_data &= ~POWER_CUT;
1756         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1757
1758         r8152b_disable_aldps(tp);
1759         r8152b_enter_oob(tp);
1760         r8152b_enable_aldps(tp);
1761 }
1762
1763 static void set_carrier(struct r8152 *tp)
1764 {
1765         struct net_device *netdev = tp->netdev;
1766         u8 speed;
1767
1768         clear_bit(RTL8152_LINK_CHG, &tp->flags);
1769         speed = rtl8152_get_speed(tp);
1770
1771         if (speed & LINK_STATUS) {
1772                 if (!(tp->speed & LINK_STATUS)) {
1773                         rtl8152_enable(tp);
1774                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1775                         netif_carrier_on(netdev);
1776                 }
1777         } else {
1778                 if (tp->speed & LINK_STATUS) {
1779                         netif_carrier_off(netdev);
1780                         tasklet_disable(&tp->tl);
1781                         rtl8152_disable(tp);
1782                         tasklet_enable(&tp->tl);
1783                 }
1784         }
1785         tp->speed = speed;
1786 }
1787
1788 static void rtl_work_func_t(struct work_struct *work)
1789 {
1790         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
1791
1792         if (!test_bit(WORK_ENABLE, &tp->flags))
1793                 goto out1;
1794
1795         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1796                 goto out1;
1797
1798         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
1799                 set_carrier(tp);
1800
1801         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
1802                 _rtl8152_set_rx_mode(tp->netdev);
1803
1804 out1:
1805         return;
1806 }
1807
1808 static int rtl8152_open(struct net_device *netdev)
1809 {
1810         struct r8152 *tp = netdev_priv(netdev);
1811         int res = 0;
1812
1813         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1814         if (res) {
1815                 if (res == -ENODEV)
1816                         netif_device_detach(tp->netdev);
1817                 netif_warn(tp, ifup, netdev,
1818                         "intr_urb submit failed: %d\n", res);
1819                 return res;
1820         }
1821
1822         rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1823         tp->speed = 0;
1824         netif_carrier_off(netdev);
1825         netif_start_queue(netdev);
1826         set_bit(WORK_ENABLE, &tp->flags);
1827
1828         return res;
1829 }
1830
1831 static int rtl8152_close(struct net_device *netdev)
1832 {
1833         struct r8152 *tp = netdev_priv(netdev);
1834         int res = 0;
1835
1836         usb_kill_urb(tp->intr_urb);
1837         clear_bit(WORK_ENABLE, &tp->flags);
1838         cancel_delayed_work_sync(&tp->schedule);
1839         netif_stop_queue(netdev);
1840         tasklet_disable(&tp->tl);
1841         rtl8152_disable(tp);
1842         tasklet_enable(&tp->tl);
1843
1844         return res;
1845 }
1846
1847 static void rtl_clear_bp(struct r8152 *tp)
1848 {
1849         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
1850         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_2, 0);
1851         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_4, 0);
1852         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_6, 0);
1853         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_0, 0);
1854         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_2, 0);
1855         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_4, 0);
1856         ocp_write_dword(tp, MCU_TYPE_USB, USB_BP_6, 0);
1857         mdelay(3);
1858         ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_BA, 0);
1859         ocp_write_word(tp, MCU_TYPE_USB, USB_BP_BA, 0);
1860 }
1861
1862 static void r8152b_enable_eee(struct r8152 *tp)
1863 {
1864         u32     ocp_data;
1865
1866         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
1867         ocp_data |= EEE_RX_EN | EEE_TX_EN;
1868         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
1869         ocp_reg_write(tp, OCP_EEE_CONFIG1, RG_TXLPI_MSK_HFDUP | RG_MATCLR_EN |
1870                                            EEE_10_CAP | EEE_NWAY_EN |
1871                                            TX_QUIET_EN | RX_QUIET_EN |
1872                                            SDRISETIME | RG_RXLPI_MSK_HFDUP |
1873                                            SDFALLTIME);
1874         ocp_reg_write(tp, OCP_EEE_CONFIG2, RG_LPIHYS_NUM | RG_DACQUIET_EN |
1875                                            RG_LDVQUIET_EN | RG_CKRSEL |
1876                                            RG_EEEPRG_EN);
1877         ocp_reg_write(tp, OCP_EEE_CONFIG3, FST_SNR_EYE_R | RG_LFS_SEL | MSK_PH);
1878         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | DEVICE_ADDR);
1879         ocp_reg_write(tp, OCP_EEE_DATA, EEE_ADDR);
1880         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | DEVICE_ADDR);
1881         ocp_reg_write(tp, OCP_EEE_DATA, EEE_DATA);
1882         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
1883 }
1884
1885 static void r8152b_enable_fc(struct r8152 *tp)
1886 {
1887         u16 anar;
1888
1889         anar = r8152_mdio_read(tp, MII_ADVERTISE);
1890         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
1891         r8152_mdio_write(tp, MII_ADVERTISE, anar);
1892 }
1893
1894 static void r8152b_hw_phy_cfg(struct r8152 *tp)
1895 {
1896         r8152_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
1897         r8152b_disable_aldps(tp);
1898 }
1899
1900 static void r8152b_init(struct r8152 *tp)
1901 {
1902         u32 ocp_data;
1903         int i;
1904
1905         rtl_clear_bp(tp);
1906
1907         if (tp->version == RTL_VER_01) {
1908                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
1909                 ocp_data &= ~LED_MODE_MASK;
1910                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
1911         }
1912
1913         r8152b_hw_phy_cfg(tp);
1914
1915         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
1916         ocp_data &= ~POWER_CUT;
1917         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
1918
1919         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
1920         ocp_data &= ~RWSUME_INDICATE;
1921         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
1922
1923         r8152b_exit_oob(tp);
1924
1925         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
1926         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
1927         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
1928         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
1929         ocp_data &= ~MCU_CLK_RATIO_MASK;
1930         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
1931         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
1932         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
1933                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
1934         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
1935
1936         r8152b_enable_eee(tp);
1937         r8152b_enable_aldps(tp);
1938         r8152b_enable_fc(tp);
1939
1940         r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
1941                                        BMCR_ANRESTART);
1942         for (i = 0; i < 100; i++) {
1943                 udelay(100);
1944                 if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET))
1945                         break;
1946         }
1947
1948         /* enable rx aggregation */
1949         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
1950         ocp_data &= ~RX_AGG_DISABLE;
1951         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
1952 }
1953
1954 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
1955 {
1956         struct r8152 *tp = usb_get_intfdata(intf);
1957
1958         netif_device_detach(tp->netdev);
1959
1960         if (netif_running(tp->netdev)) {
1961                 clear_bit(WORK_ENABLE, &tp->flags);
1962                 usb_kill_urb(tp->intr_urb);
1963                 cancel_delayed_work_sync(&tp->schedule);
1964                 tasklet_disable(&tp->tl);
1965         }
1966
1967         rtl8152_down(tp);
1968
1969         return 0;
1970 }
1971
1972 static int rtl8152_resume(struct usb_interface *intf)
1973 {
1974         struct r8152 *tp = usb_get_intfdata(intf);
1975
1976         r8152b_init(tp);
1977         netif_device_attach(tp->netdev);
1978         if (netif_running(tp->netdev)) {
1979                 rtl8152_set_speed(tp, AUTONEG_ENABLE, SPEED_100, DUPLEX_FULL);
1980                 tp->speed = 0;
1981                 netif_carrier_off(tp->netdev);
1982                 set_bit(WORK_ENABLE, &tp->flags);
1983                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
1984                 tasklet_enable(&tp->tl);
1985         }
1986
1987         return 0;
1988 }
1989
1990 static void rtl8152_get_drvinfo(struct net_device *netdev,
1991                                 struct ethtool_drvinfo *info)
1992 {
1993         struct r8152 *tp = netdev_priv(netdev);
1994
1995         strncpy(info->driver, MODULENAME, ETHTOOL_BUSINFO_LEN);
1996         strncpy(info->version, DRIVER_VERSION, ETHTOOL_BUSINFO_LEN);
1997         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
1998 }
1999
2000 static
2001 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
2002 {
2003         struct r8152 *tp = netdev_priv(netdev);
2004
2005         if (!tp->mii.mdio_read)
2006                 return -EOPNOTSUPP;
2007
2008         return mii_ethtool_gset(&tp->mii, cmd);
2009 }
2010
2011 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2012 {
2013         struct r8152 *tp = netdev_priv(dev);
2014
2015         return rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
2016 }
2017
2018 static struct ethtool_ops ops = {
2019         .get_drvinfo = rtl8152_get_drvinfo,
2020         .get_settings = rtl8152_get_settings,
2021         .set_settings = rtl8152_set_settings,
2022         .get_link = ethtool_op_get_link,
2023 };
2024
2025 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2026 {
2027         struct r8152 *tp = netdev_priv(netdev);
2028         struct mii_ioctl_data *data = if_mii(rq);
2029         int res = 0;
2030
2031         switch (cmd) {
2032         case SIOCGMIIPHY:
2033                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
2034                 break;
2035
2036         case SIOCGMIIREG:
2037                 data->val_out = r8152_mdio_read(tp, data->reg_num);
2038                 break;
2039
2040         case SIOCSMIIREG:
2041                 if (!capable(CAP_NET_ADMIN)) {
2042                         res = -EPERM;
2043                         break;
2044                 }
2045                 r8152_mdio_write(tp, data->reg_num, data->val_in);
2046                 break;
2047
2048         default:
2049                 res = -EOPNOTSUPP;
2050         }
2051
2052         return res;
2053 }
2054
2055 static const struct net_device_ops rtl8152_netdev_ops = {
2056         .ndo_open               = rtl8152_open,
2057         .ndo_stop               = rtl8152_close,
2058         .ndo_do_ioctl           = rtl8152_ioctl,
2059         .ndo_start_xmit         = rtl8152_start_xmit,
2060         .ndo_tx_timeout         = rtl8152_tx_timeout,
2061         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
2062         .ndo_set_mac_address    = rtl8152_set_mac_address,
2063
2064         .ndo_change_mtu         = eth_change_mtu,
2065         .ndo_validate_addr      = eth_validate_addr,
2066 };
2067
2068 static void r8152b_get_version(struct r8152 *tp)
2069 {
2070         u32     ocp_data;
2071         u16     version;
2072
2073         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
2074         version = (u16)(ocp_data & VERSION_MASK);
2075
2076         switch (version) {
2077         case 0x4c00:
2078                 tp->version = RTL_VER_01;
2079                 break;
2080         case 0x4c10:
2081                 tp->version = RTL_VER_02;
2082                 break;
2083         default:
2084                 netif_info(tp, probe, tp->netdev,
2085                            "Unknown version 0x%04x\n", version);
2086                 break;
2087         }
2088 }
2089
2090 static int rtl8152_probe(struct usb_interface *intf,
2091                          const struct usb_device_id *id)
2092 {
2093         struct usb_device *udev = interface_to_usbdev(intf);
2094         struct r8152 *tp;
2095         struct net_device *netdev;
2096         int ret;
2097
2098         if (udev->actconfig->desc.bConfigurationValue != 1) {
2099                 usb_driver_set_configuration(udev, 1);
2100                 return -ENODEV;
2101         }
2102
2103         netdev = alloc_etherdev(sizeof(struct r8152));
2104         if (!netdev) {
2105                 dev_err(&intf->dev, "Out of memory");
2106                 return -ENOMEM;
2107         }
2108
2109         SET_NETDEV_DEV(netdev, &intf->dev);
2110         tp = netdev_priv(netdev);
2111         tp->msg_enable = 0x7FFF;
2112
2113         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
2114         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
2115
2116         tp->udev = udev;
2117         tp->netdev = netdev;
2118         tp->intf = intf;
2119         netdev->netdev_ops = &rtl8152_netdev_ops;
2120         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
2121
2122         netdev->features |= NETIF_F_IP_CSUM;
2123         netdev->hw_features = NETIF_F_IP_CSUM;
2124         SET_ETHTOOL_OPS(netdev, &ops);
2125
2126         tp->mii.dev = netdev;
2127         tp->mii.mdio_read = read_mii_word;
2128         tp->mii.mdio_write = write_mii_word;
2129         tp->mii.phy_id_mask = 0x3f;
2130         tp->mii.reg_num_mask = 0x1f;
2131         tp->mii.phy_id = R8152_PHY_ID;
2132         tp->mii.supports_gmii = 0;
2133
2134         r8152b_get_version(tp);
2135         r8152b_init(tp);
2136         set_ethernet_addr(tp);
2137
2138         ret = alloc_all_mem(tp);
2139         if (ret)
2140                 goto out;
2141
2142         usb_set_intfdata(intf, tp);
2143
2144         ret = register_netdev(netdev);
2145         if (ret != 0) {
2146                 netif_err(tp, probe, netdev, "couldn't register the device");
2147                 goto out1;
2148         }
2149
2150         netif_info(tp, probe, netdev, "%s", DRIVER_VERSION);
2151
2152         return 0;
2153
2154 out1:
2155         usb_set_intfdata(intf, NULL);
2156 out:
2157         free_netdev(netdev);
2158         return ret;
2159 }
2160
2161 static void rtl8152_unload(struct r8152 *tp)
2162 {
2163         u32     ocp_data;
2164
2165         if (tp->version != RTL_VER_01) {
2166                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2167                 ocp_data |= POWER_CUT;
2168                 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2169         }
2170
2171         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2172         ocp_data &= ~RWSUME_INDICATE;
2173         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2174 }
2175
2176 static void rtl8152_disconnect(struct usb_interface *intf)
2177 {
2178         struct r8152 *tp = usb_get_intfdata(intf);
2179
2180         usb_set_intfdata(intf, NULL);
2181         if (tp) {
2182                 set_bit(RTL8152_UNPLUG, &tp->flags);
2183                 tasklet_kill(&tp->tl);
2184                 unregister_netdev(tp->netdev);
2185                 rtl8152_unload(tp);
2186                 free_all_mem(tp);
2187                 free_netdev(tp->netdev);
2188         }
2189 }
2190
2191 /* table of devices that work with this driver */
2192 static struct usb_device_id rtl8152_table[] = {
2193         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
2194         {}
2195 };
2196
2197 MODULE_DEVICE_TABLE(usb, rtl8152_table);
2198
2199 static struct usb_driver rtl8152_driver = {
2200         .name =         MODULENAME,
2201         .id_table =     rtl8152_table,
2202         .probe =        rtl8152_probe,
2203         .disconnect =   rtl8152_disconnect,
2204         .suspend =      rtl8152_suspend,
2205         .resume =       rtl8152_resume,
2206         .reset_resume = rtl8152_resume,
2207 };
2208
2209 module_usb_driver(rtl8152_driver);
2210
2211 MODULE_AUTHOR(DRIVER_AUTHOR);
2212 MODULE_DESCRIPTION(DRIVER_DESC);
2213 MODULE_LICENSE("GPL");