2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
504 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505 sizeof(struct rx_desc) + RX_ALIGN)
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK 0x0bda
520 #define VENDOR_ID_MICROSOFT 0x045e
521 #define VENDOR_ID_SAMSUNG 0x04e8
522 #define VENDOR_ID_LENOVO 0x17ef
523 #define VENDOR_ID_NVIDIA 0x0955
525 #define MCU_TYPE_PLA 0x0100
526 #define MCU_TYPE_USB 0x0000
528 struct tally_counter {
535 __le32 tx_one_collision;
536 __le32 tx_multi_collision;
546 #define RX_LEN_MASK 0x7fff
549 #define RD_UDP_CS BIT(23)
550 #define RD_TCP_CS BIT(22)
551 #define RD_IPV6_CS BIT(20)
552 #define RD_IPV4_CS BIT(19)
555 #define IPF BIT(23) /* IP checksum fail */
556 #define UDPF BIT(22) /* UDP checksum fail */
557 #define TCPF BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG BIT(16)
567 #define TX_FS BIT(31) /* First segment of a packet */
568 #define TX_LS BIT(30) /* Final segment of a packet */
569 #define GTSENDV4 BIT(28)
570 #define GTSENDV6 BIT(27)
571 #define GTTCPHO_SHIFT 18
572 #define GTTCPHO_MAX 0x7fU
573 #define TX_LEN_MAX 0x3ffffU
576 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
581 #define MSS_MAX 0x7ffU
582 #define TCPHO_SHIFT 17
583 #define TCPHO_MAX 0x7ffU
584 #define TX_VLAN_TAG BIT(16)
590 struct list_head list;
592 struct r8152 *context;
598 struct list_head list;
600 struct r8152 *context;
609 struct usb_device *udev;
610 struct napi_struct napi;
611 struct usb_interface *intf;
612 struct net_device *netdev;
613 struct urb *intr_urb;
614 struct tx_agg tx_info[RTL8152_MAX_TX];
615 struct rx_agg rx_info[RTL8152_MAX_RX];
616 struct list_head rx_done, tx_free;
617 struct sk_buff_head tx_queue, rx_queue;
618 spinlock_t rx_lock, tx_lock;
619 struct delayed_work schedule, hw_phy_work;
620 struct mii_if_info mii;
621 struct mutex control; /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623 struct notifier_block pm_notifier;
627 void (*init)(struct r8152 *);
628 int (*enable)(struct r8152 *);
629 void (*disable)(struct r8152 *);
630 void (*up)(struct r8152 *);
631 void (*down)(struct r8152 *);
632 void (*unload)(struct r8152 *);
633 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635 bool (*in_nway)(struct r8152 *);
636 void (*hw_phy_cfg)(struct r8152 *);
637 void (*autosuspend_en)(struct r8152 *tp, bool enable);
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
676 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
677 VLAN_ETH_HLEN - VLAN_HLEN)
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
685 tmp = kmalloc(size, GFP_KERNEL);
689 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691 value, index, tmp, size, 500);
693 memcpy(data, tmp, size);
700 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
705 tmp = kmemdup(data, size, GFP_KERNEL);
709 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
710 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
711 value, index, tmp, size, 500);
718 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
719 void *data, u16 type)
724 if (test_bit(RTL8152_UNPLUG, &tp->flags))
727 /* both size and indix must be 4 bytes align */
728 if ((size & 3) || !size || (index & 3) || !data)
731 if ((u32)index + (u32)size > 0xffff)
736 ret = get_registers(tp, index, type, limit, data);
744 ret = get_registers(tp, index, type, size, data);
756 set_bit(RTL8152_UNPLUG, &tp->flags);
761 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
762 u16 size, void *data, u16 type)
765 u16 byteen_start, byteen_end, byen;
768 if (test_bit(RTL8152_UNPLUG, &tp->flags))
771 /* both size and indix must be 4 bytes align */
772 if ((size & 3) || !size || (index & 3) || !data)
775 if ((u32)index + (u32)size > 0xffff)
778 byteen_start = byteen & BYTE_EN_START_MASK;
779 byteen_end = byteen & BYTE_EN_END_MASK;
781 byen = byteen_start | (byteen_start << 4);
782 ret = set_registers(tp, index, type | byen, 4, data);
795 ret = set_registers(tp, index,
796 type | BYTE_EN_DWORD,
805 ret = set_registers(tp, index,
806 type | BYTE_EN_DWORD,
818 byen = byteen_end | (byteen_end >> 4);
819 ret = set_registers(tp, index, type | byen, 4, data);
826 set_bit(RTL8152_UNPLUG, &tp->flags);
832 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
834 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
838 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
840 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
844 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
846 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
849 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
853 generic_ocp_read(tp, index, sizeof(data), &data, type);
855 return __le32_to_cpu(data);
858 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
860 __le32 tmp = __cpu_to_le32(data);
862 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
865 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
869 u8 shift = index & 2;
873 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
875 data = __le32_to_cpu(tmp);
876 data >>= (shift * 8);
882 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
886 u16 byen = BYTE_EN_WORD;
887 u8 shift = index & 2;
893 mask <<= (shift * 8);
894 data <<= (shift * 8);
898 tmp = __cpu_to_le32(data);
900 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
903 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
907 u8 shift = index & 3;
911 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
913 data = __le32_to_cpu(tmp);
914 data >>= (shift * 8);
920 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
924 u16 byen = BYTE_EN_BYTE;
925 u8 shift = index & 3;
931 mask <<= (shift * 8);
932 data <<= (shift * 8);
936 tmp = __cpu_to_le32(data);
938 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
941 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
943 u16 ocp_base, ocp_index;
945 ocp_base = addr & 0xf000;
946 if (ocp_base != tp->ocp_base) {
947 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
948 tp->ocp_base = ocp_base;
951 ocp_index = (addr & 0x0fff) | 0xb000;
952 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
955 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
957 u16 ocp_base, ocp_index;
959 ocp_base = addr & 0xf000;
960 if (ocp_base != tp->ocp_base) {
961 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
962 tp->ocp_base = ocp_base;
965 ocp_index = (addr & 0x0fff) | 0xb000;
966 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
969 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
971 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
974 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
976 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
979 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
981 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
982 ocp_reg_write(tp, OCP_SRAM_DATA, data);
985 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
987 struct r8152 *tp = netdev_priv(netdev);
990 if (test_bit(RTL8152_UNPLUG, &tp->flags))
993 if (phy_id != R8152_PHY_ID)
996 ret = r8152_mdio_read(tp, reg);
1002 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1004 struct r8152 *tp = netdev_priv(netdev);
1006 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1009 if (phy_id != R8152_PHY_ID)
1012 r8152_mdio_write(tp, reg, val);
1016 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1018 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1020 struct r8152 *tp = netdev_priv(netdev);
1021 struct sockaddr *addr = p;
1022 int ret = -EADDRNOTAVAIL;
1024 if (!is_valid_ether_addr(addr->sa_data))
1027 ret = usb_autopm_get_interface(tp->intf);
1031 mutex_lock(&tp->control);
1033 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1035 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1036 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1037 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1039 mutex_unlock(&tp->control);
1041 usb_autopm_put_interface(tp->intf);
1046 /* Devices containing RTL8153-AD can support a persistent
1047 * host system provided MAC address.
1048 * Examples of this are Dell TB15 and Dell WD15 docks
1050 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1053 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1054 union acpi_object *obj;
1057 unsigned char buf[6];
1059 /* test for -AD variant of RTL8153 */
1060 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1061 if ((ocp_data & AD_MASK) != 0x1000)
1064 /* test for MAC address pass-through bit */
1065 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1066 if ((ocp_data & PASS_THRU_MASK) != 1)
1069 /* returns _AUXMAC_#AABBCCDDEEFF# */
1070 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1071 obj = (union acpi_object *)buffer.pointer;
1072 if (!ACPI_SUCCESS(status))
1074 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1075 netif_warn(tp, probe, tp->netdev,
1076 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1077 obj->type, obj->string.length);
1080 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1081 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1082 netif_warn(tp, probe, tp->netdev,
1083 "Invalid header when reading pass-thru MAC addr\n");
1086 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1087 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1088 netif_warn(tp, probe, tp->netdev,
1089 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1094 memcpy(sa->sa_data, buf, 6);
1095 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1096 netif_info(tp, probe, tp->netdev,
1097 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1104 static int set_ethernet_addr(struct r8152 *tp)
1106 struct net_device *dev = tp->netdev;
1110 if (tp->version == RTL_VER_01) {
1111 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1113 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1114 * or system doesn't provide valid _SB.AMAC this will be
1115 * be expected to non-zero
1117 ret = vendor_mac_passthru_addr_read(tp, &sa);
1119 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1123 netif_err(tp, probe, dev, "Get ether addr fail\n");
1124 } else if (!is_valid_ether_addr(sa.sa_data)) {
1125 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1127 eth_hw_addr_random(dev);
1128 ether_addr_copy(sa.sa_data, dev->dev_addr);
1129 ret = rtl8152_set_mac_address(dev, &sa);
1130 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1133 if (tp->version == RTL_VER_01)
1134 ether_addr_copy(dev->dev_addr, sa.sa_data);
1136 ret = rtl8152_set_mac_address(dev, &sa);
1142 static void read_bulk_callback(struct urb *urb)
1144 struct net_device *netdev;
1145 int status = urb->status;
1157 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1160 if (!test_bit(WORK_ENABLE, &tp->flags))
1163 netdev = tp->netdev;
1165 /* When link down, the driver would cancel all bulks. */
1166 /* This avoid the re-submitting bulk */
1167 if (!netif_carrier_ok(netdev))
1170 usb_mark_last_busy(tp->udev);
1174 if (urb->actual_length < ETH_ZLEN)
1177 spin_lock(&tp->rx_lock);
1178 list_add_tail(&agg->list, &tp->rx_done);
1179 spin_unlock(&tp->rx_lock);
1180 napi_schedule(&tp->napi);
1183 set_bit(RTL8152_UNPLUG, &tp->flags);
1184 netif_device_detach(tp->netdev);
1187 return; /* the urb is in unlink state */
1189 if (net_ratelimit())
1190 netdev_warn(netdev, "maybe reset is needed?\n");
1193 if (net_ratelimit())
1194 netdev_warn(netdev, "Rx status %d\n", status);
1198 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1201 static void write_bulk_callback(struct urb *urb)
1203 struct net_device_stats *stats;
1204 struct net_device *netdev;
1207 int status = urb->status;
1217 netdev = tp->netdev;
1218 stats = &netdev->stats;
1220 if (net_ratelimit())
1221 netdev_warn(netdev, "Tx status %d\n", status);
1222 stats->tx_errors += agg->skb_num;
1224 stats->tx_packets += agg->skb_num;
1225 stats->tx_bytes += agg->skb_len;
1228 spin_lock(&tp->tx_lock);
1229 list_add_tail(&agg->list, &tp->tx_free);
1230 spin_unlock(&tp->tx_lock);
1232 usb_autopm_put_interface_async(tp->intf);
1234 if (!netif_carrier_ok(netdev))
1237 if (!test_bit(WORK_ENABLE, &tp->flags))
1240 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1243 if (!skb_queue_empty(&tp->tx_queue))
1244 napi_schedule(&tp->napi);
1247 static void intr_callback(struct urb *urb)
1251 int status = urb->status;
1258 if (!test_bit(WORK_ENABLE, &tp->flags))
1261 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1265 case 0: /* success */
1267 case -ECONNRESET: /* unlink */
1269 netif_device_detach(tp->netdev);
1272 netif_info(tp, intr, tp->netdev,
1273 "Stop submitting intr, status %d\n", status);
1276 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1278 /* -EPIPE: should clear the halt */
1280 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1284 d = urb->transfer_buffer;
1285 if (INTR_LINK & __le16_to_cpu(d[0])) {
1286 if (!netif_carrier_ok(tp->netdev)) {
1287 set_bit(RTL8152_LINK_CHG, &tp->flags);
1288 schedule_delayed_work(&tp->schedule, 0);
1291 if (netif_carrier_ok(tp->netdev)) {
1292 netif_stop_queue(tp->netdev);
1293 set_bit(RTL8152_LINK_CHG, &tp->flags);
1294 schedule_delayed_work(&tp->schedule, 0);
1299 res = usb_submit_urb(urb, GFP_ATOMIC);
1300 if (res == -ENODEV) {
1301 set_bit(RTL8152_UNPLUG, &tp->flags);
1302 netif_device_detach(tp->netdev);
1304 netif_err(tp, intr, tp->netdev,
1305 "can't resubmit intr, status %d\n", res);
1309 static inline void *rx_agg_align(void *data)
1311 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1314 static inline void *tx_agg_align(void *data)
1316 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1319 static void free_all_mem(struct r8152 *tp)
1323 for (i = 0; i < RTL8152_MAX_RX; i++) {
1324 usb_free_urb(tp->rx_info[i].urb);
1325 tp->rx_info[i].urb = NULL;
1327 kfree(tp->rx_info[i].buffer);
1328 tp->rx_info[i].buffer = NULL;
1329 tp->rx_info[i].head = NULL;
1332 for (i = 0; i < RTL8152_MAX_TX; i++) {
1333 usb_free_urb(tp->tx_info[i].urb);
1334 tp->tx_info[i].urb = NULL;
1336 kfree(tp->tx_info[i].buffer);
1337 tp->tx_info[i].buffer = NULL;
1338 tp->tx_info[i].head = NULL;
1341 usb_free_urb(tp->intr_urb);
1342 tp->intr_urb = NULL;
1344 kfree(tp->intr_buff);
1345 tp->intr_buff = NULL;
1348 static int alloc_all_mem(struct r8152 *tp)
1350 struct net_device *netdev = tp->netdev;
1351 struct usb_interface *intf = tp->intf;
1352 struct usb_host_interface *alt = intf->cur_altsetting;
1353 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1358 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1360 spin_lock_init(&tp->rx_lock);
1361 spin_lock_init(&tp->tx_lock);
1362 INIT_LIST_HEAD(&tp->tx_free);
1363 INIT_LIST_HEAD(&tp->rx_done);
1364 skb_queue_head_init(&tp->tx_queue);
1365 skb_queue_head_init(&tp->rx_queue);
1367 for (i = 0; i < RTL8152_MAX_RX; i++) {
1368 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1372 if (buf != rx_agg_align(buf)) {
1374 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1380 urb = usb_alloc_urb(0, GFP_KERNEL);
1386 INIT_LIST_HEAD(&tp->rx_info[i].list);
1387 tp->rx_info[i].context = tp;
1388 tp->rx_info[i].urb = urb;
1389 tp->rx_info[i].buffer = buf;
1390 tp->rx_info[i].head = rx_agg_align(buf);
1393 for (i = 0; i < RTL8152_MAX_TX; i++) {
1394 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1398 if (buf != tx_agg_align(buf)) {
1400 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1406 urb = usb_alloc_urb(0, GFP_KERNEL);
1412 INIT_LIST_HEAD(&tp->tx_info[i].list);
1413 tp->tx_info[i].context = tp;
1414 tp->tx_info[i].urb = urb;
1415 tp->tx_info[i].buffer = buf;
1416 tp->tx_info[i].head = tx_agg_align(buf);
1418 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1421 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1425 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1429 tp->intr_interval = (int)ep_intr->desc.bInterval;
1430 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1431 tp->intr_buff, INTBUFSIZE, intr_callback,
1432 tp, tp->intr_interval);
1441 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1443 struct tx_agg *agg = NULL;
1444 unsigned long flags;
1446 if (list_empty(&tp->tx_free))
1449 spin_lock_irqsave(&tp->tx_lock, flags);
1450 if (!list_empty(&tp->tx_free)) {
1451 struct list_head *cursor;
1453 cursor = tp->tx_free.next;
1454 list_del_init(cursor);
1455 agg = list_entry(cursor, struct tx_agg, list);
1457 spin_unlock_irqrestore(&tp->tx_lock, flags);
1462 /* r8152_csum_workaround()
1463 * The hw limites the value the transport offset. When the offset is out of the
1464 * range, calculate the checksum by sw.
1466 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1467 struct sk_buff_head *list)
1469 if (skb_shinfo(skb)->gso_size) {
1470 netdev_features_t features = tp->netdev->features;
1471 struct sk_buff_head seg_list;
1472 struct sk_buff *segs, *nskb;
1474 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1475 segs = skb_gso_segment(skb, features);
1476 if (IS_ERR(segs) || !segs)
1479 __skb_queue_head_init(&seg_list);
1485 __skb_queue_tail(&seg_list, nskb);
1488 skb_queue_splice(&seg_list, list);
1490 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1491 if (skb_checksum_help(skb) < 0)
1494 __skb_queue_head(list, skb);
1496 struct net_device_stats *stats;
1499 stats = &tp->netdev->stats;
1500 stats->tx_dropped++;
1505 /* msdn_giant_send_check()
1506 * According to the document of microsoft, the TCP Pseudo Header excludes the
1507 * packet length for IPv6 TCP large packets.
1509 static int msdn_giant_send_check(struct sk_buff *skb)
1511 const struct ipv6hdr *ipv6h;
1515 ret = skb_cow_head(skb, 0);
1519 ipv6h = ipv6_hdr(skb);
1523 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1528 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1530 if (skb_vlan_tag_present(skb)) {
1533 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1534 desc->opts2 |= cpu_to_le32(opts2);
1538 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1540 u32 opts2 = le32_to_cpu(desc->opts2);
1542 if (opts2 & RX_VLAN_TAG)
1543 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1544 swab16(opts2 & 0xffff));
1547 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1548 struct sk_buff *skb, u32 len, u32 transport_offset)
1550 u32 mss = skb_shinfo(skb)->gso_size;
1551 u32 opts1, opts2 = 0;
1552 int ret = TX_CSUM_SUCCESS;
1554 WARN_ON_ONCE(len > TX_LEN_MAX);
1556 opts1 = len | TX_FS | TX_LS;
1559 if (transport_offset > GTTCPHO_MAX) {
1560 netif_warn(tp, tx_err, tp->netdev,
1561 "Invalid transport offset 0x%x for TSO\n",
1567 switch (vlan_get_protocol(skb)) {
1568 case htons(ETH_P_IP):
1572 case htons(ETH_P_IPV6):
1573 if (msdn_giant_send_check(skb)) {
1585 opts1 |= transport_offset << GTTCPHO_SHIFT;
1586 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1587 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1590 if (transport_offset > TCPHO_MAX) {
1591 netif_warn(tp, tx_err, tp->netdev,
1592 "Invalid transport offset 0x%x\n",
1598 switch (vlan_get_protocol(skb)) {
1599 case htons(ETH_P_IP):
1601 ip_protocol = ip_hdr(skb)->protocol;
1604 case htons(ETH_P_IPV6):
1606 ip_protocol = ipv6_hdr(skb)->nexthdr;
1610 ip_protocol = IPPROTO_RAW;
1614 if (ip_protocol == IPPROTO_TCP)
1616 else if (ip_protocol == IPPROTO_UDP)
1621 opts2 |= transport_offset << TCPHO_SHIFT;
1624 desc->opts2 = cpu_to_le32(opts2);
1625 desc->opts1 = cpu_to_le32(opts1);
1631 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1633 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1637 __skb_queue_head_init(&skb_head);
1638 spin_lock(&tx_queue->lock);
1639 skb_queue_splice_init(tx_queue, &skb_head);
1640 spin_unlock(&tx_queue->lock);
1642 tx_data = agg->head;
1645 remain = agg_buf_sz;
1647 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1648 struct tx_desc *tx_desc;
1649 struct sk_buff *skb;
1653 skb = __skb_dequeue(&skb_head);
1657 len = skb->len + sizeof(*tx_desc);
1660 __skb_queue_head(&skb_head, skb);
1664 tx_data = tx_agg_align(tx_data);
1665 tx_desc = (struct tx_desc *)tx_data;
1667 offset = (u32)skb_transport_offset(skb);
1669 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1670 r8152_csum_workaround(tp, skb, &skb_head);
1674 rtl_tx_vlan_tag(tx_desc, skb);
1676 tx_data += sizeof(*tx_desc);
1679 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1680 struct net_device_stats *stats = &tp->netdev->stats;
1682 stats->tx_dropped++;
1683 dev_kfree_skb_any(skb);
1684 tx_data -= sizeof(*tx_desc);
1689 agg->skb_len += len;
1692 dev_kfree_skb_any(skb);
1694 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1697 if (!skb_queue_empty(&skb_head)) {
1698 spin_lock(&tx_queue->lock);
1699 skb_queue_splice(&skb_head, tx_queue);
1700 spin_unlock(&tx_queue->lock);
1703 netif_tx_lock(tp->netdev);
1705 if (netif_queue_stopped(tp->netdev) &&
1706 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1707 netif_wake_queue(tp->netdev);
1709 netif_tx_unlock(tp->netdev);
1711 ret = usb_autopm_get_interface_async(tp->intf);
1715 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1716 agg->head, (int)(tx_data - (u8 *)agg->head),
1717 (usb_complete_t)write_bulk_callback, agg);
1719 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1721 usb_autopm_put_interface_async(tp->intf);
1727 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1729 u8 checksum = CHECKSUM_NONE;
1732 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1735 opts2 = le32_to_cpu(rx_desc->opts2);
1736 opts3 = le32_to_cpu(rx_desc->opts3);
1738 if (opts2 & RD_IPV4_CS) {
1740 checksum = CHECKSUM_NONE;
1741 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1742 checksum = CHECKSUM_NONE;
1743 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1744 checksum = CHECKSUM_NONE;
1746 checksum = CHECKSUM_UNNECESSARY;
1747 } else if (opts2 & RD_IPV6_CS) {
1748 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1749 checksum = CHECKSUM_UNNECESSARY;
1750 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1751 checksum = CHECKSUM_UNNECESSARY;
1758 static int rx_bottom(struct r8152 *tp, int budget)
1760 unsigned long flags;
1761 struct list_head *cursor, *next, rx_queue;
1762 int ret = 0, work_done = 0;
1763 struct napi_struct *napi = &tp->napi;
1765 if (!skb_queue_empty(&tp->rx_queue)) {
1766 while (work_done < budget) {
1767 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1768 struct net_device *netdev = tp->netdev;
1769 struct net_device_stats *stats = &netdev->stats;
1770 unsigned int pkt_len;
1776 napi_gro_receive(napi, skb);
1778 stats->rx_packets++;
1779 stats->rx_bytes += pkt_len;
1783 if (list_empty(&tp->rx_done))
1786 INIT_LIST_HEAD(&rx_queue);
1787 spin_lock_irqsave(&tp->rx_lock, flags);
1788 list_splice_init(&tp->rx_done, &rx_queue);
1789 spin_unlock_irqrestore(&tp->rx_lock, flags);
1791 list_for_each_safe(cursor, next, &rx_queue) {
1792 struct rx_desc *rx_desc;
1798 list_del_init(cursor);
1800 agg = list_entry(cursor, struct rx_agg, list);
1802 if (urb->actual_length < ETH_ZLEN)
1805 rx_desc = agg->head;
1806 rx_data = agg->head;
1807 len_used += sizeof(struct rx_desc);
1809 while (urb->actual_length > len_used) {
1810 struct net_device *netdev = tp->netdev;
1811 struct net_device_stats *stats = &netdev->stats;
1812 unsigned int pkt_len;
1813 struct sk_buff *skb;
1815 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1816 if (pkt_len < ETH_ZLEN)
1819 len_used += pkt_len;
1820 if (urb->actual_length < len_used)
1823 pkt_len -= CRC_SIZE;
1824 rx_data += sizeof(struct rx_desc);
1826 skb = napi_alloc_skb(napi, pkt_len);
1828 stats->rx_dropped++;
1832 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1833 memcpy(skb->data, rx_data, pkt_len);
1834 skb_put(skb, pkt_len);
1835 skb->protocol = eth_type_trans(skb, netdev);
1836 rtl_rx_vlan_tag(rx_desc, skb);
1837 if (work_done < budget) {
1838 napi_gro_receive(napi, skb);
1840 stats->rx_packets++;
1841 stats->rx_bytes += pkt_len;
1843 __skb_queue_tail(&tp->rx_queue, skb);
1847 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1848 rx_desc = (struct rx_desc *)rx_data;
1849 len_used = (int)(rx_data - (u8 *)agg->head);
1850 len_used += sizeof(struct rx_desc);
1855 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1857 urb->actual_length = 0;
1858 list_add_tail(&agg->list, next);
1862 if (!list_empty(&rx_queue)) {
1863 spin_lock_irqsave(&tp->rx_lock, flags);
1864 list_splice_tail(&rx_queue, &tp->rx_done);
1865 spin_unlock_irqrestore(&tp->rx_lock, flags);
1872 static void tx_bottom(struct r8152 *tp)
1879 if (skb_queue_empty(&tp->tx_queue))
1882 agg = r8152_get_tx_agg(tp);
1886 res = r8152_tx_agg_fill(tp, agg);
1888 struct net_device *netdev = tp->netdev;
1890 if (res == -ENODEV) {
1891 set_bit(RTL8152_UNPLUG, &tp->flags);
1892 netif_device_detach(netdev);
1894 struct net_device_stats *stats = &netdev->stats;
1895 unsigned long flags;
1897 netif_warn(tp, tx_err, netdev,
1898 "failed tx_urb %d\n", res);
1899 stats->tx_dropped += agg->skb_num;
1901 spin_lock_irqsave(&tp->tx_lock, flags);
1902 list_add_tail(&agg->list, &tp->tx_free);
1903 spin_unlock_irqrestore(&tp->tx_lock, flags);
1909 static void bottom_half(struct r8152 *tp)
1911 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1914 if (!test_bit(WORK_ENABLE, &tp->flags))
1917 /* When link down, the driver would cancel all bulks. */
1918 /* This avoid the re-submitting bulk */
1919 if (!netif_carrier_ok(tp->netdev))
1922 clear_bit(SCHEDULE_NAPI, &tp->flags);
1927 static int r8152_poll(struct napi_struct *napi, int budget)
1929 struct r8152 *tp = container_of(napi, struct r8152, napi);
1932 work_done = rx_bottom(tp, budget);
1935 if (work_done < budget) {
1936 napi_complete(napi);
1937 if (!list_empty(&tp->rx_done))
1938 napi_schedule(napi);
1939 else if (!skb_queue_empty(&tp->tx_queue) &&
1940 !list_empty(&tp->tx_free))
1941 napi_schedule(napi);
1948 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1952 /* The rx would be stopped, so skip submitting */
1953 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1954 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1957 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1958 agg->head, agg_buf_sz,
1959 (usb_complete_t)read_bulk_callback, agg);
1961 ret = usb_submit_urb(agg->urb, mem_flags);
1962 if (ret == -ENODEV) {
1963 set_bit(RTL8152_UNPLUG, &tp->flags);
1964 netif_device_detach(tp->netdev);
1966 struct urb *urb = agg->urb;
1967 unsigned long flags;
1969 urb->actual_length = 0;
1970 spin_lock_irqsave(&tp->rx_lock, flags);
1971 list_add_tail(&agg->list, &tp->rx_done);
1972 spin_unlock_irqrestore(&tp->rx_lock, flags);
1974 netif_err(tp, rx_err, tp->netdev,
1975 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1977 napi_schedule(&tp->napi);
1983 static void rtl_drop_queued_tx(struct r8152 *tp)
1985 struct net_device_stats *stats = &tp->netdev->stats;
1986 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1987 struct sk_buff *skb;
1989 if (skb_queue_empty(tx_queue))
1992 __skb_queue_head_init(&skb_head);
1993 spin_lock_bh(&tx_queue->lock);
1994 skb_queue_splice_init(tx_queue, &skb_head);
1995 spin_unlock_bh(&tx_queue->lock);
1997 while ((skb = __skb_dequeue(&skb_head))) {
1999 stats->tx_dropped++;
2003 static void rtl8152_tx_timeout(struct net_device *netdev)
2005 struct r8152 *tp = netdev_priv(netdev);
2007 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2009 usb_queue_reset_device(tp->intf);
2012 static void rtl8152_set_rx_mode(struct net_device *netdev)
2014 struct r8152 *tp = netdev_priv(netdev);
2016 if (netif_carrier_ok(netdev)) {
2017 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2018 schedule_delayed_work(&tp->schedule, 0);
2022 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2024 struct r8152 *tp = netdev_priv(netdev);
2025 u32 mc_filter[2]; /* Multicast hash filter */
2029 netif_stop_queue(netdev);
2030 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2031 ocp_data &= ~RCR_ACPT_ALL;
2032 ocp_data |= RCR_AB | RCR_APM;
2034 if (netdev->flags & IFF_PROMISC) {
2035 /* Unconditionally log net taps. */
2036 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2037 ocp_data |= RCR_AM | RCR_AAP;
2038 mc_filter[1] = 0xffffffff;
2039 mc_filter[0] = 0xffffffff;
2040 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2041 (netdev->flags & IFF_ALLMULTI)) {
2042 /* Too many to filter perfectly -- accept all multicasts. */
2044 mc_filter[1] = 0xffffffff;
2045 mc_filter[0] = 0xffffffff;
2047 struct netdev_hw_addr *ha;
2051 netdev_for_each_mc_addr(ha, netdev) {
2052 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2054 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2059 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2060 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2062 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2063 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2064 netif_wake_queue(netdev);
2067 static netdev_features_t
2068 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2069 netdev_features_t features)
2071 u32 mss = skb_shinfo(skb)->gso_size;
2072 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2073 int offset = skb_transport_offset(skb);
2075 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2076 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2077 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2078 features &= ~NETIF_F_GSO_MASK;
2083 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2084 struct net_device *netdev)
2086 struct r8152 *tp = netdev_priv(netdev);
2088 skb_tx_timestamp(skb);
2090 skb_queue_tail(&tp->tx_queue, skb);
2092 if (!list_empty(&tp->tx_free)) {
2093 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2094 set_bit(SCHEDULE_NAPI, &tp->flags);
2095 schedule_delayed_work(&tp->schedule, 0);
2097 usb_mark_last_busy(tp->udev);
2098 napi_schedule(&tp->napi);
2100 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2101 netif_stop_queue(netdev);
2104 return NETDEV_TX_OK;
2107 static void r8152b_reset_packet_filter(struct r8152 *tp)
2111 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2112 ocp_data &= ~FMC_FCR_MCU_EN;
2113 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2114 ocp_data |= FMC_FCR_MCU_EN;
2115 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2118 static void rtl8152_nic_reset(struct r8152 *tp)
2122 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2124 for (i = 0; i < 1000; i++) {
2125 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2127 usleep_range(100, 400);
2131 static void set_tx_qlen(struct r8152 *tp)
2133 struct net_device *netdev = tp->netdev;
2135 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2136 sizeof(struct tx_desc));
2139 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2141 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2144 static void rtl_set_eee_plus(struct r8152 *tp)
2149 speed = rtl8152_get_speed(tp);
2150 if (speed & _10bps) {
2151 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2152 ocp_data |= EEEP_CR_EEEP_TX;
2153 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2155 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2156 ocp_data &= ~EEEP_CR_EEEP_TX;
2157 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2161 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2165 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2167 ocp_data |= RXDY_GATED_EN;
2169 ocp_data &= ~RXDY_GATED_EN;
2170 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2173 static int rtl_start_rx(struct r8152 *tp)
2177 INIT_LIST_HEAD(&tp->rx_done);
2178 for (i = 0; i < RTL8152_MAX_RX; i++) {
2179 INIT_LIST_HEAD(&tp->rx_info[i].list);
2180 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2185 if (ret && ++i < RTL8152_MAX_RX) {
2186 struct list_head rx_queue;
2187 unsigned long flags;
2189 INIT_LIST_HEAD(&rx_queue);
2192 struct rx_agg *agg = &tp->rx_info[i++];
2193 struct urb *urb = agg->urb;
2195 urb->actual_length = 0;
2196 list_add_tail(&agg->list, &rx_queue);
2197 } while (i < RTL8152_MAX_RX);
2199 spin_lock_irqsave(&tp->rx_lock, flags);
2200 list_splice_tail(&rx_queue, &tp->rx_done);
2201 spin_unlock_irqrestore(&tp->rx_lock, flags);
2207 static int rtl_stop_rx(struct r8152 *tp)
2211 for (i = 0; i < RTL8152_MAX_RX; i++)
2212 usb_kill_urb(tp->rx_info[i].urb);
2214 while (!skb_queue_empty(&tp->rx_queue))
2215 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2220 static int rtl_enable(struct r8152 *tp)
2224 r8152b_reset_packet_filter(tp);
2226 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2227 ocp_data |= CR_RE | CR_TE;
2228 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2230 rxdy_gated_en(tp, false);
2235 static int rtl8152_enable(struct r8152 *tp)
2237 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2241 rtl_set_eee_plus(tp);
2243 return rtl_enable(tp);
2246 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2248 u32 ocp_data = tp->coalesce / 8;
2250 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2253 static void r8153_set_rx_early_size(struct r8152 *tp)
2255 u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2257 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2260 static int rtl8153_enable(struct r8152 *tp)
2262 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2265 usb_disable_lpm(tp->udev);
2267 rtl_set_eee_plus(tp);
2268 r8153_set_rx_early_timeout(tp);
2269 r8153_set_rx_early_size(tp);
2271 return rtl_enable(tp);
2274 static void rtl_disable(struct r8152 *tp)
2279 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2280 rtl_drop_queued_tx(tp);
2284 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2285 ocp_data &= ~RCR_ACPT_ALL;
2286 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2288 rtl_drop_queued_tx(tp);
2290 for (i = 0; i < RTL8152_MAX_TX; i++)
2291 usb_kill_urb(tp->tx_info[i].urb);
2293 rxdy_gated_en(tp, true);
2295 for (i = 0; i < 1000; i++) {
2296 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2299 usleep_range(1000, 2000);
2302 for (i = 0; i < 1000; i++) {
2303 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2305 usleep_range(1000, 2000);
2310 rtl8152_nic_reset(tp);
2313 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2317 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2319 ocp_data |= POWER_CUT;
2321 ocp_data &= ~POWER_CUT;
2322 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2324 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2325 ocp_data &= ~RESUME_INDICATE;
2326 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2329 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2333 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2335 ocp_data |= CPCR_RX_VLAN;
2337 ocp_data &= ~CPCR_RX_VLAN;
2338 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2341 static int rtl8152_set_features(struct net_device *dev,
2342 netdev_features_t features)
2344 netdev_features_t changed = features ^ dev->features;
2345 struct r8152 *tp = netdev_priv(dev);
2348 ret = usb_autopm_get_interface(tp->intf);
2352 mutex_lock(&tp->control);
2354 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2355 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2356 rtl_rx_vlan_en(tp, true);
2358 rtl_rx_vlan_en(tp, false);
2361 mutex_unlock(&tp->control);
2363 usb_autopm_put_interface(tp->intf);
2369 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2371 static u32 __rtl_get_wol(struct r8152 *tp)
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2377 if (ocp_data & LINK_ON_WAKE_EN)
2378 wolopts |= WAKE_PHY;
2380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2381 if (ocp_data & UWF_EN)
2382 wolopts |= WAKE_UCAST;
2383 if (ocp_data & BWF_EN)
2384 wolopts |= WAKE_BCAST;
2385 if (ocp_data & MWF_EN)
2386 wolopts |= WAKE_MCAST;
2388 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2389 if (ocp_data & MAGIC_EN)
2390 wolopts |= WAKE_MAGIC;
2395 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2399 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2401 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2402 ocp_data &= ~LINK_ON_WAKE_EN;
2403 if (wolopts & WAKE_PHY)
2404 ocp_data |= LINK_ON_WAKE_EN;
2405 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2407 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2408 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2409 if (wolopts & WAKE_UCAST)
2411 if (wolopts & WAKE_BCAST)
2413 if (wolopts & WAKE_MCAST)
2415 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2417 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2419 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2420 ocp_data &= ~MAGIC_EN;
2421 if (wolopts & WAKE_MAGIC)
2422 ocp_data |= MAGIC_EN;
2423 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2425 if (wolopts & WAKE_ANY)
2426 device_set_wakeup_enable(&tp->udev->dev, true);
2428 device_set_wakeup_enable(&tp->udev->dev, false);
2431 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2436 memset(u1u2, 0xff, sizeof(u1u2));
2438 memset(u1u2, 0x00, sizeof(u1u2));
2440 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2443 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2447 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2448 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2449 ocp_data |= U2P3_ENABLE;
2451 ocp_data &= ~U2P3_ENABLE;
2452 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2455 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2459 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2461 ocp_data |= PWR_EN | PHASE2_EN;
2463 ocp_data &= ~(PWR_EN | PHASE2_EN);
2464 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2466 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2467 ocp_data &= ~PCUT_STATUS;
2468 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2471 static bool rtl_can_wakeup(struct r8152 *tp)
2473 struct usb_device *udev = tp->udev;
2475 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2478 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2483 __rtl_set_wol(tp, WAKE_ANY);
2485 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2487 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2488 ocp_data |= LINK_OFF_WAKE_EN;
2489 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2491 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2495 __rtl_set_wol(tp, tp->saved_wolopts);
2497 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2499 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2500 ocp_data &= ~LINK_OFF_WAKE_EN;
2501 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2503 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2507 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2509 rtl_runtime_suspend_enable(tp, enable);
2512 r8153_u1u2en(tp, false);
2513 r8153_u2p3en(tp, false);
2515 r8153_u2p3en(tp, true);
2516 r8153_u1u2en(tp, true);
2520 static void r8153_teredo_off(struct r8152 *tp)
2524 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2525 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2526 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2528 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2529 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2530 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2533 static void rtl_reset_bmu(struct r8152 *tp)
2537 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2538 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2539 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2540 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2541 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2544 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2547 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2548 LINKENA | DIS_SDSAVE);
2550 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2556 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2558 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2559 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2560 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2563 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2567 r8152_mmd_indirect(tp, dev, reg);
2568 data = ocp_reg_read(tp, OCP_EEE_DATA);
2569 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2574 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2576 r8152_mmd_indirect(tp, dev, reg);
2577 ocp_reg_write(tp, OCP_EEE_DATA, data);
2578 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2581 static void r8152_eee_en(struct r8152 *tp, bool enable)
2583 u16 config1, config2, config3;
2586 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2587 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2588 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2589 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2592 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2593 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2594 config1 |= sd_rise_time(1);
2595 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2596 config3 |= fast_snr(42);
2598 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2599 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2601 config1 |= sd_rise_time(7);
2602 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2603 config3 |= fast_snr(511);
2606 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2607 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2608 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2609 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2612 static void r8152b_enable_eee(struct r8152 *tp)
2614 r8152_eee_en(tp, true);
2615 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2618 static void r8152b_enable_fc(struct r8152 *tp)
2622 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2623 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2624 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2627 static void rtl8152_disable(struct r8152 *tp)
2629 r8152_aldps_en(tp, false);
2631 r8152_aldps_en(tp, true);
2634 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2636 r8152b_enable_eee(tp);
2637 r8152_aldps_en(tp, true);
2638 r8152b_enable_fc(tp);
2640 set_bit(PHY_RESET, &tp->flags);
2643 static void r8152b_exit_oob(struct r8152 *tp)
2648 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2649 ocp_data &= ~RCR_ACPT_ALL;
2650 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2652 rxdy_gated_en(tp, true);
2653 r8153_teredo_off(tp);
2654 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2655 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2657 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2658 ocp_data &= ~NOW_IS_OOB;
2659 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2661 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2662 ocp_data &= ~MCU_BORW_EN;
2663 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2665 for (i = 0; i < 1000; i++) {
2666 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2667 if (ocp_data & LINK_LIST_READY)
2669 usleep_range(1000, 2000);
2672 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2673 ocp_data |= RE_INIT_LL;
2674 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2676 for (i = 0; i < 1000; i++) {
2677 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2678 if (ocp_data & LINK_LIST_READY)
2680 usleep_range(1000, 2000);
2683 rtl8152_nic_reset(tp);
2685 /* rx share fifo credit full threshold */
2686 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2688 if (tp->udev->speed == USB_SPEED_FULL ||
2689 tp->udev->speed == USB_SPEED_LOW) {
2690 /* rx share fifo credit near full threshold */
2691 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2693 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2696 /* rx share fifo credit near full threshold */
2697 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2699 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2703 /* TX share fifo free credit full threshold */
2704 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2706 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2707 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2708 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2709 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2711 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2713 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2715 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2716 ocp_data |= TCR0_AUTO_FIFO;
2717 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2720 static void r8152b_enter_oob(struct r8152 *tp)
2725 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2726 ocp_data &= ~NOW_IS_OOB;
2727 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2729 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2730 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2731 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2735 for (i = 0; i < 1000; i++) {
2736 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2737 if (ocp_data & LINK_LIST_READY)
2739 usleep_range(1000, 2000);
2742 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2743 ocp_data |= RE_INIT_LL;
2744 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2746 for (i = 0; i < 1000; i++) {
2747 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2748 if (ocp_data & LINK_LIST_READY)
2750 usleep_range(1000, 2000);
2753 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2755 rtl_rx_vlan_en(tp, true);
2757 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2758 ocp_data |= ALDPS_PROXY_MODE;
2759 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2761 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2762 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2763 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2765 rxdy_gated_en(tp, false);
2767 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2768 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2769 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2772 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2776 data = ocp_reg_read(tp, OCP_POWER_CFG);
2779 ocp_reg_write(tp, OCP_POWER_CFG, data);
2782 ocp_reg_write(tp, OCP_POWER_CFG, data);
2787 static void r8153_eee_en(struct r8152 *tp, bool enable)
2792 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2793 config = ocp_reg_read(tp, OCP_EEE_CFG);
2796 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2799 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2800 config &= ~EEE10_EN;
2803 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2804 ocp_reg_write(tp, OCP_EEE_CFG, config);
2807 static void r8153_hw_phy_cfg(struct r8152 *tp)
2812 /* disable ALDPS before updating the PHY parameters */
2813 r8153_aldps_en(tp, false);
2815 /* disable EEE before updating the PHY parameters */
2816 r8153_eee_en(tp, false);
2817 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2819 if (tp->version == RTL_VER_03) {
2820 data = ocp_reg_read(tp, OCP_EEE_CFG);
2821 data &= ~CTAP_SHORT_EN;
2822 ocp_reg_write(tp, OCP_EEE_CFG, data);
2825 data = ocp_reg_read(tp, OCP_POWER_CFG);
2826 data |= EEE_CLKDIV_EN;
2827 ocp_reg_write(tp, OCP_POWER_CFG, data);
2829 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2830 data |= EN_10M_BGOFF;
2831 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2832 data = ocp_reg_read(tp, OCP_POWER_CFG);
2833 data |= EN_10M_PLLOFF;
2834 ocp_reg_write(tp, OCP_POWER_CFG, data);
2835 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2837 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2838 ocp_data |= PFM_PWM_SWITCH;
2839 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2841 /* Enable LPF corner auto tune */
2842 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2844 /* Adjust 10M Amplitude */
2845 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2846 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2848 r8153_eee_en(tp, true);
2849 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2851 r8153_aldps_en(tp, true);
2852 r8152b_enable_fc(tp);
2854 set_bit(PHY_RESET, &tp->flags);
2857 static void r8153_first_init(struct r8152 *tp)
2862 rxdy_gated_en(tp, true);
2863 r8153_teredo_off(tp);
2865 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2866 ocp_data &= ~RCR_ACPT_ALL;
2867 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2869 rtl8152_nic_reset(tp);
2872 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2873 ocp_data &= ~NOW_IS_OOB;
2874 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2876 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2877 ocp_data &= ~MCU_BORW_EN;
2878 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2880 for (i = 0; i < 1000; i++) {
2881 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2882 if (ocp_data & LINK_LIST_READY)
2884 usleep_range(1000, 2000);
2887 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2888 ocp_data |= RE_INIT_LL;
2889 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2891 for (i = 0; i < 1000; i++) {
2892 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2893 if (ocp_data & LINK_LIST_READY)
2895 usleep_range(1000, 2000);
2898 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2900 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2901 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2902 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2904 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2905 ocp_data |= TCR0_AUTO_FIFO;
2906 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2908 rtl8152_nic_reset(tp);
2910 /* rx share fifo credit full threshold */
2911 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2912 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2913 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2914 /* TX share fifo free credit full threshold */
2915 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2917 /* rx aggregation */
2918 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2919 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2920 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2923 static void r8153_enter_oob(struct r8152 *tp)
2928 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2929 ocp_data &= ~NOW_IS_OOB;
2930 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2935 for (i = 0; i < 1000; i++) {
2936 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2937 if (ocp_data & LINK_LIST_READY)
2939 usleep_range(1000, 2000);
2942 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2943 ocp_data |= RE_INIT_LL;
2944 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2946 for (i = 0; i < 1000; i++) {
2947 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2948 if (ocp_data & LINK_LIST_READY)
2950 usleep_range(1000, 2000);
2953 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2954 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2956 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2957 ocp_data &= ~TEREDO_WAKE_MASK;
2958 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2960 rtl_rx_vlan_en(tp, true);
2962 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2963 ocp_data |= ALDPS_PROXY_MODE;
2964 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2966 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2967 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2968 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2970 rxdy_gated_en(tp, false);
2972 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2973 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2974 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2977 static void rtl8153_disable(struct r8152 *tp)
2979 r8153_aldps_en(tp, false);
2982 r8153_aldps_en(tp, true);
2983 usb_enable_lpm(tp->udev);
2986 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2988 u16 bmcr, anar, gbcr;
2991 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2992 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2993 ADVERTISE_100HALF | ADVERTISE_100FULL);
2994 if (tp->mii.supports_gmii) {
2995 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2996 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3001 if (autoneg == AUTONEG_DISABLE) {
3002 if (speed == SPEED_10) {
3004 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3005 } else if (speed == SPEED_100) {
3006 bmcr = BMCR_SPEED100;
3007 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3008 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3009 bmcr = BMCR_SPEED1000;
3010 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3016 if (duplex == DUPLEX_FULL)
3017 bmcr |= BMCR_FULLDPLX;
3019 if (speed == SPEED_10) {
3020 if (duplex == DUPLEX_FULL)
3021 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3023 anar |= ADVERTISE_10HALF;
3024 } else if (speed == SPEED_100) {
3025 if (duplex == DUPLEX_FULL) {
3026 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3027 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3029 anar |= ADVERTISE_10HALF;
3030 anar |= ADVERTISE_100HALF;
3032 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3033 if (duplex == DUPLEX_FULL) {
3034 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3035 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3036 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3038 anar |= ADVERTISE_10HALF;
3039 anar |= ADVERTISE_100HALF;
3040 gbcr |= ADVERTISE_1000HALF;
3047 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3050 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3053 if (tp->mii.supports_gmii)
3054 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3056 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3057 r8152_mdio_write(tp, MII_BMCR, bmcr);
3059 if (bmcr & BMCR_RESET) {
3062 for (i = 0; i < 50; i++) {
3064 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3073 static void rtl8152_up(struct r8152 *tp)
3075 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3078 r8152_aldps_en(tp, false);
3079 r8152b_exit_oob(tp);
3080 r8152_aldps_en(tp, true);
3083 static void rtl8152_down(struct r8152 *tp)
3085 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3086 rtl_drop_queued_tx(tp);
3090 r8152_power_cut_en(tp, false);
3091 r8152_aldps_en(tp, false);
3092 r8152b_enter_oob(tp);
3093 r8152_aldps_en(tp, true);
3096 static void rtl8153_up(struct r8152 *tp)
3098 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3101 r8153_u1u2en(tp, false);
3102 r8153_aldps_en(tp, false);
3103 r8153_first_init(tp);
3104 r8153_aldps_en(tp, true);
3105 r8153_u2p3en(tp, true);
3106 r8153_u1u2en(tp, true);
3107 usb_enable_lpm(tp->udev);
3110 static void rtl8153_down(struct r8152 *tp)
3112 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3113 rtl_drop_queued_tx(tp);
3117 r8153_u1u2en(tp, false);
3118 r8153_u2p3en(tp, false);
3119 r8153_power_cut_en(tp, false);
3120 r8153_aldps_en(tp, false);
3121 r8153_enter_oob(tp);
3122 r8153_aldps_en(tp, true);
3125 static bool rtl8152_in_nway(struct r8152 *tp)
3129 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3130 tp->ocp_base = 0x2000;
3131 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3132 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3134 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3135 if (nway_state & 0xc000)
3141 static bool rtl8153_in_nway(struct r8152 *tp)
3143 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3145 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3151 static void set_carrier(struct r8152 *tp)
3153 struct net_device *netdev = tp->netdev;
3154 struct napi_struct *napi = &tp->napi;
3157 speed = rtl8152_get_speed(tp);
3159 if (speed & LINK_STATUS) {
3160 if (!netif_carrier_ok(netdev)) {
3161 tp->rtl_ops.enable(tp);
3162 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3163 netif_stop_queue(netdev);
3165 netif_carrier_on(netdev);
3167 napi_enable(&tp->napi);
3168 netif_wake_queue(netdev);
3169 netif_info(tp, link, netdev, "carrier on\n");
3170 } else if (netif_queue_stopped(netdev) &&
3171 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3172 netif_wake_queue(netdev);
3175 if (netif_carrier_ok(netdev)) {
3176 netif_carrier_off(netdev);
3178 tp->rtl_ops.disable(tp);
3180 netif_info(tp, link, netdev, "carrier off\n");
3185 static void rtl_work_func_t(struct work_struct *work)
3187 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3189 /* If the device is unplugged or !netif_running(), the workqueue
3190 * doesn't need to wake the device, and could return directly.
3192 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3195 if (usb_autopm_get_interface(tp->intf) < 0)
3198 if (!test_bit(WORK_ENABLE, &tp->flags))
3201 if (!mutex_trylock(&tp->control)) {
3202 schedule_delayed_work(&tp->schedule, 0);
3206 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3209 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3210 _rtl8152_set_rx_mode(tp->netdev);
3212 /* don't schedule napi before linking */
3213 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3214 netif_carrier_ok(tp->netdev))
3215 napi_schedule(&tp->napi);
3217 mutex_unlock(&tp->control);
3220 usb_autopm_put_interface(tp->intf);
3223 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3225 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3227 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3230 if (usb_autopm_get_interface(tp->intf) < 0)
3233 mutex_lock(&tp->control);
3235 tp->rtl_ops.hw_phy_cfg(tp);
3237 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3239 mutex_unlock(&tp->control);
3241 usb_autopm_put_interface(tp->intf);
3244 #ifdef CONFIG_PM_SLEEP
3245 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3248 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3251 case PM_HIBERNATION_PREPARE:
3252 case PM_SUSPEND_PREPARE:
3253 usb_autopm_get_interface(tp->intf);
3256 case PM_POST_HIBERNATION:
3257 case PM_POST_SUSPEND:
3258 usb_autopm_put_interface(tp->intf);
3261 case PM_POST_RESTORE:
3262 case PM_RESTORE_PREPARE:
3271 static int rtl8152_open(struct net_device *netdev)
3273 struct r8152 *tp = netdev_priv(netdev);
3276 res = alloc_all_mem(tp);
3280 res = usb_autopm_get_interface(tp->intf);
3284 mutex_lock(&tp->control);
3288 netif_carrier_off(netdev);
3289 netif_start_queue(netdev);
3290 set_bit(WORK_ENABLE, &tp->flags);
3292 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3295 netif_device_detach(tp->netdev);
3296 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3300 napi_enable(&tp->napi);
3302 mutex_unlock(&tp->control);
3304 usb_autopm_put_interface(tp->intf);
3305 #ifdef CONFIG_PM_SLEEP
3306 tp->pm_notifier.notifier_call = rtl_notifier;
3307 register_pm_notifier(&tp->pm_notifier);
3312 mutex_unlock(&tp->control);
3313 usb_autopm_put_interface(tp->intf);
3320 static int rtl8152_close(struct net_device *netdev)
3322 struct r8152 *tp = netdev_priv(netdev);
3325 #ifdef CONFIG_PM_SLEEP
3326 unregister_pm_notifier(&tp->pm_notifier);
3328 napi_disable(&tp->napi);
3329 clear_bit(WORK_ENABLE, &tp->flags);
3330 usb_kill_urb(tp->intr_urb);
3331 cancel_delayed_work_sync(&tp->schedule);
3332 netif_stop_queue(netdev);
3334 res = usb_autopm_get_interface(tp->intf);
3335 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3336 rtl_drop_queued_tx(tp);
3339 mutex_lock(&tp->control);
3341 tp->rtl_ops.down(tp);
3343 mutex_unlock(&tp->control);
3345 usb_autopm_put_interface(tp->intf);
3353 static void rtl_tally_reset(struct r8152 *tp)
3357 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3358 ocp_data |= TALLY_RESET;
3359 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3362 static void r8152b_init(struct r8152 *tp)
3367 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3370 data = r8152_mdio_read(tp, MII_BMCR);
3371 if (data & BMCR_PDOWN) {
3372 data &= ~BMCR_PDOWN;
3373 r8152_mdio_write(tp, MII_BMCR, data);
3376 r8152_aldps_en(tp, false);
3378 if (tp->version == RTL_VER_01) {
3379 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3380 ocp_data &= ~LED_MODE_MASK;
3381 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3384 r8152_power_cut_en(tp, false);
3386 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3387 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3388 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3389 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3390 ocp_data &= ~MCU_CLK_RATIO_MASK;
3391 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3392 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3393 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3394 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3395 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3397 rtl_tally_reset(tp);
3399 /* enable rx aggregation */
3400 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3401 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3402 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3405 static void r8153_init(struct r8152 *tp)
3411 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3414 r8153_u1u2en(tp, false);
3416 for (i = 0; i < 500; i++) {
3417 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3423 for (i = 0; i < 500; i++) {
3424 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3425 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3430 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3431 tp->version == RTL_VER_05)
3432 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3434 data = r8152_mdio_read(tp, MII_BMCR);
3435 if (data & BMCR_PDOWN) {
3436 data &= ~BMCR_PDOWN;
3437 r8152_mdio_write(tp, MII_BMCR, data);
3440 for (i = 0; i < 500; i++) {
3441 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3442 if (ocp_data == PHY_STAT_LAN_ON)
3447 usb_disable_lpm(tp->udev);
3448 r8153_u2p3en(tp, false);
3450 if (tp->version == RTL_VER_04) {
3451 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3452 ocp_data &= ~pwd_dn_scale_mask;
3453 ocp_data |= pwd_dn_scale(96);
3454 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3456 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3457 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3458 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3459 } else if (tp->version == RTL_VER_05) {
3460 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3461 ocp_data &= ~ECM_ALDPS;
3462 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3464 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3465 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3466 ocp_data &= ~DYNAMIC_BURST;
3468 ocp_data |= DYNAMIC_BURST;
3469 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3470 } else if (tp->version == RTL_VER_06) {
3471 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3472 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3473 ocp_data &= ~DYNAMIC_BURST;
3475 ocp_data |= DYNAMIC_BURST;
3476 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3479 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3480 ocp_data |= EP4_FULL_FC;
3481 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3483 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3484 ocp_data &= ~TIMER11_EN;
3485 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3487 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3488 ocp_data &= ~LED_MODE_MASK;
3489 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3491 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3492 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3493 ocp_data |= LPM_TIMER_500MS;
3495 ocp_data |= LPM_TIMER_500US;
3496 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3498 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3499 ocp_data &= ~SEN_VAL_MASK;
3500 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3501 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3503 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3505 r8153_power_cut_en(tp, false);
3506 r8153_u1u2en(tp, true);
3508 /* MAC clock speed down */
3509 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3510 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3511 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3512 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3514 rtl_tally_reset(tp);
3515 r8153_u2p3en(tp, true);
3518 static int rtl8152_pre_reset(struct usb_interface *intf)
3520 struct r8152 *tp = usb_get_intfdata(intf);
3521 struct net_device *netdev;
3526 netdev = tp->netdev;
3527 if (!netif_running(netdev))
3530 netif_stop_queue(netdev);
3531 napi_disable(&tp->napi);
3532 clear_bit(WORK_ENABLE, &tp->flags);
3533 usb_kill_urb(tp->intr_urb);
3534 cancel_delayed_work_sync(&tp->schedule);
3535 if (netif_carrier_ok(netdev)) {
3536 mutex_lock(&tp->control);
3537 tp->rtl_ops.disable(tp);
3538 mutex_unlock(&tp->control);
3544 static int rtl8152_post_reset(struct usb_interface *intf)
3546 struct r8152 *tp = usb_get_intfdata(intf);
3547 struct net_device *netdev;
3552 netdev = tp->netdev;
3553 if (!netif_running(netdev))
3556 set_bit(WORK_ENABLE, &tp->flags);
3557 if (netif_carrier_ok(netdev)) {
3558 mutex_lock(&tp->control);
3559 tp->rtl_ops.enable(tp);
3561 rtl8152_set_rx_mode(netdev);
3562 mutex_unlock(&tp->control);
3565 napi_enable(&tp->napi);
3566 netif_wake_queue(netdev);
3567 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3569 if (!list_empty(&tp->rx_done))
3570 napi_schedule(&tp->napi);
3575 static bool delay_autosuspend(struct r8152 *tp)
3577 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3578 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3580 /* This means a linking change occurs and the driver doesn't detect it,
3581 * yet. If the driver has disabled tx/rx and hw is linking on, the
3582 * device wouldn't wake up by receiving any packet.
3584 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3587 /* If the linking down is occurred by nway, the device may miss the
3588 * linking change event. And it wouldn't wake when linking on.
3590 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3592 else if (!skb_queue_empty(&tp->tx_queue))
3598 static int rtl8152_runtime_suspend(struct r8152 *tp)
3600 struct net_device *netdev = tp->netdev;
3603 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3604 smp_mb__after_atomic();
3606 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3609 if (delay_autosuspend(tp)) {
3610 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3611 smp_mb__after_atomic();
3616 if (netif_carrier_ok(netdev)) {
3619 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3620 ocp_data = rcr & ~RCR_ACPT_ALL;
3621 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3622 rxdy_gated_en(tp, true);
3623 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3625 if (!(ocp_data & RXFIFO_EMPTY)) {
3626 rxdy_gated_en(tp, false);
3627 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3628 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3629 smp_mb__after_atomic();
3635 clear_bit(WORK_ENABLE, &tp->flags);
3636 usb_kill_urb(tp->intr_urb);
3638 tp->rtl_ops.autosuspend_en(tp, true);
3640 if (netif_carrier_ok(netdev)) {
3641 struct napi_struct *napi = &tp->napi;
3645 rxdy_gated_en(tp, false);
3646 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3655 static int rtl8152_system_suspend(struct r8152 *tp)
3657 struct net_device *netdev = tp->netdev;
3660 netif_device_detach(netdev);
3662 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3663 struct napi_struct *napi = &tp->napi;
3665 clear_bit(WORK_ENABLE, &tp->flags);
3666 usb_kill_urb(tp->intr_urb);
3668 cancel_delayed_work_sync(&tp->schedule);
3669 tp->rtl_ops.down(tp);
3676 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3678 struct r8152 *tp = usb_get_intfdata(intf);
3681 mutex_lock(&tp->control);
3683 if (PMSG_IS_AUTO(message))
3684 ret = rtl8152_runtime_suspend(tp);
3686 ret = rtl8152_system_suspend(tp);
3688 mutex_unlock(&tp->control);
3693 static int rtl8152_resume(struct usb_interface *intf)
3695 struct r8152 *tp = usb_get_intfdata(intf);
3696 struct net_device *netdev = tp->netdev;
3698 mutex_lock(&tp->control);
3700 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3701 tp->rtl_ops.init(tp);
3702 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3703 netif_device_attach(netdev);
3706 if (netif_running(netdev) && netdev->flags & IFF_UP) {
3707 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3708 struct napi_struct *napi = &tp->napi;
3710 tp->rtl_ops.autosuspend_en(tp, false);
3712 set_bit(WORK_ENABLE, &tp->flags);
3713 if (netif_carrier_ok(netdev)) {
3714 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3717 netif_carrier_off(netdev);
3718 tp->rtl_ops.disable(tp);
3719 netif_info(tp, link, netdev,
3724 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3725 smp_mb__after_atomic();
3726 if (!list_empty(&tp->rx_done))
3727 napi_schedule(&tp->napi);
3730 netif_carrier_off(netdev);
3731 set_bit(WORK_ENABLE, &tp->flags);
3733 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3734 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3735 if (netdev->flags & IFF_UP)
3736 tp->rtl_ops.autosuspend_en(tp, false);
3737 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3740 mutex_unlock(&tp->control);
3745 static int rtl8152_reset_resume(struct usb_interface *intf)
3747 struct r8152 *tp = usb_get_intfdata(intf);
3749 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3750 return rtl8152_resume(intf);
3753 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3755 struct r8152 *tp = netdev_priv(dev);
3757 if (usb_autopm_get_interface(tp->intf) < 0)
3760 if (!rtl_can_wakeup(tp)) {
3764 mutex_lock(&tp->control);
3765 wol->supported = WAKE_ANY;
3766 wol->wolopts = __rtl_get_wol(tp);
3767 mutex_unlock(&tp->control);
3770 usb_autopm_put_interface(tp->intf);
3773 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3775 struct r8152 *tp = netdev_priv(dev);
3778 if (!rtl_can_wakeup(tp))
3781 ret = usb_autopm_get_interface(tp->intf);
3785 mutex_lock(&tp->control);
3787 __rtl_set_wol(tp, wol->wolopts);
3788 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3790 mutex_unlock(&tp->control);
3792 usb_autopm_put_interface(tp->intf);
3798 static u32 rtl8152_get_msglevel(struct net_device *dev)
3800 struct r8152 *tp = netdev_priv(dev);
3802 return tp->msg_enable;
3805 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3807 struct r8152 *tp = netdev_priv(dev);
3809 tp->msg_enable = value;
3812 static void rtl8152_get_drvinfo(struct net_device *netdev,
3813 struct ethtool_drvinfo *info)
3815 struct r8152 *tp = netdev_priv(netdev);
3817 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3818 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3819 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3823 int rtl8152_get_link_ksettings(struct net_device *netdev,
3824 struct ethtool_link_ksettings *cmd)
3826 struct r8152 *tp = netdev_priv(netdev);
3829 if (!tp->mii.mdio_read)
3832 ret = usb_autopm_get_interface(tp->intf);
3836 mutex_lock(&tp->control);
3838 mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3840 mutex_unlock(&tp->control);
3842 usb_autopm_put_interface(tp->intf);
3848 static int rtl8152_set_link_ksettings(struct net_device *dev,
3849 const struct ethtool_link_ksettings *cmd)
3851 struct r8152 *tp = netdev_priv(dev);
3854 ret = usb_autopm_get_interface(tp->intf);
3858 mutex_lock(&tp->control);
3860 ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3863 tp->autoneg = cmd->base.autoneg;
3864 tp->speed = cmd->base.speed;
3865 tp->duplex = cmd->base.duplex;
3868 mutex_unlock(&tp->control);
3870 usb_autopm_put_interface(tp->intf);
3876 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3883 "tx_single_collisions",
3884 "tx_multi_collisions",
3892 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3896 return ARRAY_SIZE(rtl8152_gstrings);
3902 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3903 struct ethtool_stats *stats, u64 *data)
3905 struct r8152 *tp = netdev_priv(dev);
3906 struct tally_counter tally;
3908 if (usb_autopm_get_interface(tp->intf) < 0)
3911 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3913 usb_autopm_put_interface(tp->intf);
3915 data[0] = le64_to_cpu(tally.tx_packets);
3916 data[1] = le64_to_cpu(tally.rx_packets);
3917 data[2] = le64_to_cpu(tally.tx_errors);
3918 data[3] = le32_to_cpu(tally.rx_errors);
3919 data[4] = le16_to_cpu(tally.rx_missed);
3920 data[5] = le16_to_cpu(tally.align_errors);
3921 data[6] = le32_to_cpu(tally.tx_one_collision);
3922 data[7] = le32_to_cpu(tally.tx_multi_collision);
3923 data[8] = le64_to_cpu(tally.rx_unicast);
3924 data[9] = le64_to_cpu(tally.rx_broadcast);
3925 data[10] = le32_to_cpu(tally.rx_multicast);
3926 data[11] = le16_to_cpu(tally.tx_aborted);
3927 data[12] = le16_to_cpu(tally.tx_underrun);
3930 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3932 switch (stringset) {
3934 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3939 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3941 u32 ocp_data, lp, adv, supported = 0;
3944 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3945 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3947 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3948 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3950 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3951 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3953 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3954 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3956 eee->eee_enabled = !!ocp_data;
3957 eee->eee_active = !!(supported & adv & lp);
3958 eee->supported = supported;
3959 eee->advertised = adv;
3960 eee->lp_advertised = lp;
3965 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3967 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3969 r8152_eee_en(tp, eee->eee_enabled);
3971 if (!eee->eee_enabled)
3974 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3979 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3981 u32 ocp_data, lp, adv, supported = 0;
3984 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3985 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3987 val = ocp_reg_read(tp, OCP_EEE_ADV);
3988 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3990 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3991 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3993 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3994 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3996 eee->eee_enabled = !!ocp_data;
3997 eee->eee_active = !!(supported & adv & lp);
3998 eee->supported = supported;
3999 eee->advertised = adv;
4000 eee->lp_advertised = lp;
4005 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4007 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4009 r8153_eee_en(tp, eee->eee_enabled);
4011 if (!eee->eee_enabled)
4014 ocp_reg_write(tp, OCP_EEE_ADV, val);
4020 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4022 struct r8152 *tp = netdev_priv(net);
4025 ret = usb_autopm_get_interface(tp->intf);
4029 mutex_lock(&tp->control);
4031 ret = tp->rtl_ops.eee_get(tp, edata);
4033 mutex_unlock(&tp->control);
4035 usb_autopm_put_interface(tp->intf);
4042 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4044 struct r8152 *tp = netdev_priv(net);
4047 ret = usb_autopm_get_interface(tp->intf);
4051 mutex_lock(&tp->control);
4053 ret = tp->rtl_ops.eee_set(tp, edata);
4055 ret = mii_nway_restart(&tp->mii);
4057 mutex_unlock(&tp->control);
4059 usb_autopm_put_interface(tp->intf);
4065 static int rtl8152_nway_reset(struct net_device *dev)
4067 struct r8152 *tp = netdev_priv(dev);
4070 ret = usb_autopm_get_interface(tp->intf);
4074 mutex_lock(&tp->control);
4076 ret = mii_nway_restart(&tp->mii);
4078 mutex_unlock(&tp->control);
4080 usb_autopm_put_interface(tp->intf);
4086 static int rtl8152_get_coalesce(struct net_device *netdev,
4087 struct ethtool_coalesce *coalesce)
4089 struct r8152 *tp = netdev_priv(netdev);
4091 switch (tp->version) {
4099 coalesce->rx_coalesce_usecs = tp->coalesce;
4104 static int rtl8152_set_coalesce(struct net_device *netdev,
4105 struct ethtool_coalesce *coalesce)
4107 struct r8152 *tp = netdev_priv(netdev);
4110 switch (tp->version) {
4118 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4121 ret = usb_autopm_get_interface(tp->intf);
4125 mutex_lock(&tp->control);
4127 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4128 tp->coalesce = coalesce->rx_coalesce_usecs;
4130 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4131 r8153_set_rx_early_timeout(tp);
4134 mutex_unlock(&tp->control);
4136 usb_autopm_put_interface(tp->intf);
4141 static const struct ethtool_ops ops = {
4142 .get_drvinfo = rtl8152_get_drvinfo,
4143 .get_link = ethtool_op_get_link,
4144 .nway_reset = rtl8152_nway_reset,
4145 .get_msglevel = rtl8152_get_msglevel,
4146 .set_msglevel = rtl8152_set_msglevel,
4147 .get_wol = rtl8152_get_wol,
4148 .set_wol = rtl8152_set_wol,
4149 .get_strings = rtl8152_get_strings,
4150 .get_sset_count = rtl8152_get_sset_count,
4151 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4152 .get_coalesce = rtl8152_get_coalesce,
4153 .set_coalesce = rtl8152_set_coalesce,
4154 .get_eee = rtl_ethtool_get_eee,
4155 .set_eee = rtl_ethtool_set_eee,
4156 .get_link_ksettings = rtl8152_get_link_ksettings,
4157 .set_link_ksettings = rtl8152_set_link_ksettings,
4160 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4162 struct r8152 *tp = netdev_priv(netdev);
4163 struct mii_ioctl_data *data = if_mii(rq);
4166 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4169 res = usb_autopm_get_interface(tp->intf);
4175 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4179 mutex_lock(&tp->control);
4180 data->val_out = r8152_mdio_read(tp, data->reg_num);
4181 mutex_unlock(&tp->control);
4185 if (!capable(CAP_NET_ADMIN)) {
4189 mutex_lock(&tp->control);
4190 r8152_mdio_write(tp, data->reg_num, data->val_in);
4191 mutex_unlock(&tp->control);
4198 usb_autopm_put_interface(tp->intf);
4204 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4206 struct r8152 *tp = netdev_priv(dev);
4209 switch (tp->version) {
4218 ret = usb_autopm_get_interface(tp->intf);
4222 mutex_lock(&tp->control);
4226 if (netif_running(dev)) {
4227 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4229 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4231 if (netif_carrier_ok(dev))
4232 r8153_set_rx_early_size(tp);
4235 mutex_unlock(&tp->control);
4237 usb_autopm_put_interface(tp->intf);
4242 static const struct net_device_ops rtl8152_netdev_ops = {
4243 .ndo_open = rtl8152_open,
4244 .ndo_stop = rtl8152_close,
4245 .ndo_do_ioctl = rtl8152_ioctl,
4246 .ndo_start_xmit = rtl8152_start_xmit,
4247 .ndo_tx_timeout = rtl8152_tx_timeout,
4248 .ndo_set_features = rtl8152_set_features,
4249 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4250 .ndo_set_mac_address = rtl8152_set_mac_address,
4251 .ndo_change_mtu = rtl8152_change_mtu,
4252 .ndo_validate_addr = eth_validate_addr,
4253 .ndo_features_check = rtl8152_features_check,
4256 static void rtl8152_unload(struct r8152 *tp)
4258 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4261 if (tp->version != RTL_VER_01)
4262 r8152_power_cut_en(tp, true);
4265 static void rtl8153_unload(struct r8152 *tp)
4267 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4270 r8153_power_cut_en(tp, false);
4273 static int rtl_ops_init(struct r8152 *tp)
4275 struct rtl_ops *ops = &tp->rtl_ops;
4278 switch (tp->version) {
4281 ops->init = r8152b_init;
4282 ops->enable = rtl8152_enable;
4283 ops->disable = rtl8152_disable;
4284 ops->up = rtl8152_up;
4285 ops->down = rtl8152_down;
4286 ops->unload = rtl8152_unload;
4287 ops->eee_get = r8152_get_eee;
4288 ops->eee_set = r8152_set_eee;
4289 ops->in_nway = rtl8152_in_nway;
4290 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4291 ops->autosuspend_en = rtl_runtime_suspend_enable;
4298 ops->init = r8153_init;
4299 ops->enable = rtl8153_enable;
4300 ops->disable = rtl8153_disable;
4301 ops->up = rtl8153_up;
4302 ops->down = rtl8153_down;
4303 ops->unload = rtl8153_unload;
4304 ops->eee_get = r8153_get_eee;
4305 ops->eee_set = r8153_set_eee;
4306 ops->in_nway = rtl8153_in_nway;
4307 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4308 ops->autosuspend_en = rtl8153_runtime_enable;
4313 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4320 static u8 rtl_get_version(struct usb_interface *intf)
4322 struct usb_device *udev = interface_to_usbdev(intf);
4328 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4332 ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4333 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4334 PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4336 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4342 version = RTL_VER_01;
4345 version = RTL_VER_02;
4348 version = RTL_VER_03;
4351 version = RTL_VER_04;
4354 version = RTL_VER_05;
4357 version = RTL_VER_06;
4360 version = RTL_VER_UNKNOWN;
4361 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4368 static int rtl8152_probe(struct usb_interface *intf,
4369 const struct usb_device_id *id)
4371 struct usb_device *udev = interface_to_usbdev(intf);
4372 u8 version = rtl_get_version(intf);
4374 struct net_device *netdev;
4377 if (version == RTL_VER_UNKNOWN)
4380 if (udev->actconfig->desc.bConfigurationValue != 1) {
4381 usb_driver_set_configuration(udev, 1);
4385 usb_reset_device(udev);
4386 netdev = alloc_etherdev(sizeof(struct r8152));
4388 dev_err(&intf->dev, "Out of memory\n");
4392 SET_NETDEV_DEV(netdev, &intf->dev);
4393 tp = netdev_priv(netdev);
4394 tp->msg_enable = 0x7FFF;
4397 tp->netdev = netdev;
4399 tp->version = version;
4404 tp->mii.supports_gmii = 0;
4407 tp->mii.supports_gmii = 1;
4411 ret = rtl_ops_init(tp);
4415 mutex_init(&tp->control);
4416 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4417 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4419 netdev->netdev_ops = &rtl8152_netdev_ops;
4420 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4422 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4423 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4424 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4425 NETIF_F_HW_VLAN_CTAG_TX;
4426 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4427 NETIF_F_TSO | NETIF_F_FRAGLIST |
4428 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4429 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4430 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4431 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4432 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4434 if (tp->version == RTL_VER_01) {
4435 netdev->features &= ~NETIF_F_RXCSUM;
4436 netdev->hw_features &= ~NETIF_F_RXCSUM;
4439 netdev->ethtool_ops = &ops;
4440 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4442 /* MTU range: 68 - 1500 or 9194 */
4443 netdev->min_mtu = ETH_MIN_MTU;
4444 switch (tp->version) {
4447 netdev->max_mtu = ETH_DATA_LEN;
4450 netdev->max_mtu = RTL8153_MAX_MTU;
4454 tp->mii.dev = netdev;
4455 tp->mii.mdio_read = read_mii_word;
4456 tp->mii.mdio_write = write_mii_word;
4457 tp->mii.phy_id_mask = 0x3f;
4458 tp->mii.reg_num_mask = 0x1f;
4459 tp->mii.phy_id = R8152_PHY_ID;
4461 switch (udev->speed) {
4462 case USB_SPEED_SUPER:
4463 case USB_SPEED_SUPER_PLUS:
4464 tp->coalesce = COALESCE_SUPER;
4466 case USB_SPEED_HIGH:
4467 tp->coalesce = COALESCE_HIGH;
4470 tp->coalesce = COALESCE_SLOW;
4474 tp->autoneg = AUTONEG_ENABLE;
4475 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4476 tp->duplex = DUPLEX_FULL;
4478 intf->needs_remote_wakeup = 1;
4480 tp->rtl_ops.init(tp);
4481 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4482 set_ethernet_addr(tp);
4484 usb_set_intfdata(intf, tp);
4485 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4487 ret = register_netdev(netdev);
4489 netif_err(tp, probe, netdev, "couldn't register the device\n");
4493 if (!rtl_can_wakeup(tp))
4494 __rtl_set_wol(tp, 0);
4496 tp->saved_wolopts = __rtl_get_wol(tp);
4497 if (tp->saved_wolopts)
4498 device_set_wakeup_enable(&udev->dev, true);
4500 device_set_wakeup_enable(&udev->dev, false);
4502 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4507 netif_napi_del(&tp->napi);
4508 usb_set_intfdata(intf, NULL);
4510 free_netdev(netdev);
4514 static void rtl8152_disconnect(struct usb_interface *intf)
4516 struct r8152 *tp = usb_get_intfdata(intf);
4518 usb_set_intfdata(intf, NULL);
4520 struct usb_device *udev = tp->udev;
4522 if (udev->state == USB_STATE_NOTATTACHED)
4523 set_bit(RTL8152_UNPLUG, &tp->flags);
4525 netif_napi_del(&tp->napi);
4526 unregister_netdev(tp->netdev);
4527 cancel_delayed_work_sync(&tp->hw_phy_work);
4528 tp->rtl_ops.unload(tp);
4529 free_netdev(tp->netdev);
4533 #define REALTEK_USB_DEVICE(vend, prod) \
4534 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4535 USB_DEVICE_ID_MATCH_INT_CLASS, \
4536 .idVendor = (vend), \
4537 .idProduct = (prod), \
4538 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4541 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4542 USB_DEVICE_ID_MATCH_DEVICE, \
4543 .idVendor = (vend), \
4544 .idProduct = (prod), \
4545 .bInterfaceClass = USB_CLASS_COMM, \
4546 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4547 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4549 /* table of devices that work with this driver */
4550 static struct usb_device_id rtl8152_table[] = {
4551 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4552 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4553 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4554 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4555 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4556 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4557 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
4558 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
4559 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4560 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
4561 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
4562 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4566 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4568 static struct usb_driver rtl8152_driver = {
4570 .id_table = rtl8152_table,
4571 .probe = rtl8152_probe,
4572 .disconnect = rtl8152_disconnect,
4573 .suspend = rtl8152_suspend,
4574 .resume = rtl8152_resume,
4575 .reset_resume = rtl8152_reset_resume,
4576 .pre_reset = rtl8152_pre_reset,
4577 .post_reset = rtl8152_post_reset,
4578 .supports_autosuspend = 1,
4579 .disable_hub_initiated_lpm = 1,
4582 module_usb_driver(rtl8152_driver);
4584 MODULE_AUTHOR(DRIVER_AUTHOR);
4585 MODULE_DESCRIPTION(DRIVER_DESC);
4586 MODULE_LICENSE("GPL");
4587 MODULE_VERSION(DRIVER_VERSION);