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[karo-tx-linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
30
31 /* Information for net-next */
32 #define NETNEXT_VERSION         "08"
33
34 /* Information for net */
35 #define NET_VERSION             "9"
36
37 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
41
42 #define R8152_PHY_ID            32
43
44 #define PLA_IDR                 0xc000
45 #define PLA_RCR                 0xc010
46 #define PLA_RMS                 0xc016
47 #define PLA_RXFIFO_CTRL0        0xc0a0
48 #define PLA_RXFIFO_CTRL1        0xc0a4
49 #define PLA_RXFIFO_CTRL2        0xc0a8
50 #define PLA_DMY_REG0            0xc0b0
51 #define PLA_FMC                 0xc0b4
52 #define PLA_CFG_WOL             0xc0b6
53 #define PLA_TEREDO_CFG          0xc0bc
54 #define PLA_MAR                 0xcd00
55 #define PLA_BACKUP              0xd000
56 #define PAL_BDC_CR              0xd1a0
57 #define PLA_TEREDO_TIMER        0xd2cc
58 #define PLA_REALWOW_TIMER       0xd2e8
59 #define PLA_LEDSEL              0xdd90
60 #define PLA_LED_FEATURE         0xdd92
61 #define PLA_PHYAR               0xde00
62 #define PLA_BOOT_CTRL           0xe004
63 #define PLA_GPHY_INTR_IMR       0xe022
64 #define PLA_EEE_CR              0xe040
65 #define PLA_EEEP_CR             0xe080
66 #define PLA_MAC_PWR_CTRL        0xe0c0
67 #define PLA_MAC_PWR_CTRL2       0xe0ca
68 #define PLA_MAC_PWR_CTRL3       0xe0cc
69 #define PLA_MAC_PWR_CTRL4       0xe0ce
70 #define PLA_WDT6_CTRL           0xe428
71 #define PLA_TCR0                0xe610
72 #define PLA_TCR1                0xe612
73 #define PLA_MTPS                0xe615
74 #define PLA_TXFIFO_CTRL         0xe618
75 #define PLA_RSTTALLY            0xe800
76 #define PLA_CR                  0xe813
77 #define PLA_CRWECR              0xe81c
78 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5             0xe822
81 #define PLA_PHY_PWR             0xe84c
82 #define PLA_OOB_CTRL            0xe84f
83 #define PLA_CPCR                0xe854
84 #define PLA_MISC_0              0xe858
85 #define PLA_MISC_1              0xe85a
86 #define PLA_OCP_GPHY_BASE       0xe86c
87 #define PLA_TALLYCNT            0xe890
88 #define PLA_SFF_STS_7           0xe8de
89 #define PLA_PHYSTATUS           0xe908
90 #define PLA_BP_BA               0xfc26
91 #define PLA_BP_0                0xfc28
92 #define PLA_BP_1                0xfc2a
93 #define PLA_BP_2                0xfc2c
94 #define PLA_BP_3                0xfc2e
95 #define PLA_BP_4                0xfc30
96 #define PLA_BP_5                0xfc32
97 #define PLA_BP_6                0xfc34
98 #define PLA_BP_7                0xfc36
99 #define PLA_BP_EN               0xfc38
100
101 #define USB_USB2PHY             0xb41e
102 #define USB_SSPHYLINK2          0xb428
103 #define USB_U2P3_CTRL           0xb460
104 #define USB_CSR_DUMMY1          0xb464
105 #define USB_CSR_DUMMY2          0xb466
106 #define USB_DEV_STAT            0xb808
107 #define USB_CONNECT_TIMER       0xcbf8
108 #define USB_BURST_SIZE          0xcfc0
109 #define USB_USB_CTRL            0xd406
110 #define USB_PHY_CTRL            0xd408
111 #define USB_TX_AGG              0xd40a
112 #define USB_RX_BUF_TH           0xd40c
113 #define USB_USB_TIMER           0xd428
114 #define USB_RX_EARLY_TIMEOUT    0xd42c
115 #define USB_RX_EARLY_SIZE       0xd42e
116 #define USB_PM_CTRL_STATUS      0xd432
117 #define USB_TX_DMA              0xd434
118 #define USB_TOLERANCE           0xd490
119 #define USB_LPM_CTRL            0xd41a
120 #define USB_BMU_RESET           0xd4b0
121 #define USB_UPS_CTRL            0xd800
122 #define USB_MISC_0              0xd81a
123 #define USB_POWER_CUT           0xd80a
124 #define USB_AFE_CTRL2           0xd824
125 #define USB_WDT11_CTRL          0xe43c
126 #define USB_BP_BA               0xfc26
127 #define USB_BP_0                0xfc28
128 #define USB_BP_1                0xfc2a
129 #define USB_BP_2                0xfc2c
130 #define USB_BP_3                0xfc2e
131 #define USB_BP_4                0xfc30
132 #define USB_BP_5                0xfc32
133 #define USB_BP_6                0xfc34
134 #define USB_BP_7                0xfc36
135 #define USB_BP_EN               0xfc38
136
137 /* OCP Registers */
138 #define OCP_ALDPS_CONFIG        0x2010
139 #define OCP_EEE_CONFIG1         0x2080
140 #define OCP_EEE_CONFIG2         0x2092
141 #define OCP_EEE_CONFIG3         0x2094
142 #define OCP_BASE_MII            0xa400
143 #define OCP_EEE_AR              0xa41a
144 #define OCP_EEE_DATA            0xa41c
145 #define OCP_PHY_STATUS          0xa420
146 #define OCP_POWER_CFG           0xa430
147 #define OCP_EEE_CFG             0xa432
148 #define OCP_SRAM_ADDR           0xa436
149 #define OCP_SRAM_DATA           0xa438
150 #define OCP_DOWN_SPEED          0xa442
151 #define OCP_EEE_ABLE            0xa5c4
152 #define OCP_EEE_ADV             0xa5d0
153 #define OCP_EEE_LPABLE          0xa5d2
154 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
155 #define OCP_ADC_CFG             0xbc06
156
157 /* SRAM Register */
158 #define SRAM_LPF_CFG            0x8012
159 #define SRAM_10M_AMP1           0x8080
160 #define SRAM_10M_AMP2           0x8082
161 #define SRAM_IMPEDANCE          0x8084
162
163 /* PLA_RCR */
164 #define RCR_AAP                 0x00000001
165 #define RCR_APM                 0x00000002
166 #define RCR_AM                  0x00000004
167 #define RCR_AB                  0x00000008
168 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL      0x00080002
172 #define RXFIFO_THR1_OOB         0x01800003
173
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL        0x00000060
176 #define RXFIFO_THR2_HIGH        0x00000038
177 #define RXFIFO_THR2_OOB         0x0000004a
178 #define RXFIFO_THR2_NORMAL      0x00a0
179
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL        0x00000078
182 #define RXFIFO_THR3_HIGH        0x00000048
183 #define RXFIFO_THR3_OOB         0x0000005a
184 #define RXFIFO_THR3_NORMAL      0x0110
185
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL       0x00400008
188 #define TXFIFO_THR_NORMAL2      0x01000008
189
190 /* PLA_DMY_REG0 */
191 #define ECM_ALDPS               0x0002
192
193 /* PLA_FMC */
194 #define FMC_FCR_MCU_EN          0x0001
195
196 /* PLA_EEEP_CR */
197 #define EEEP_CR_EEEP_TX         0x0002
198
199 /* PLA_WDT6_CTRL */
200 #define WDT6_SET_MODE           0x0010
201
202 /* PLA_TCR0 */
203 #define TCR0_TX_EMPTY           0x0800
204 #define TCR0_AUTO_FIFO          0x0080
205
206 /* PLA_TCR1 */
207 #define VERSION_MASK            0x7cf0
208
209 /* PLA_MTPS */
210 #define MTPS_JUMBO              (12 * 1024 / 64)
211 #define MTPS_DEFAULT            (6 * 1024 / 64)
212
213 /* PLA_RSTTALLY */
214 #define TALLY_RESET             0x0001
215
216 /* PLA_CR */
217 #define CR_RST                  0x10
218 #define CR_RE                   0x08
219 #define CR_TE                   0x04
220
221 /* PLA_CRWECR */
222 #define CRWECR_NORAML           0x00
223 #define CRWECR_CONFIG           0xc0
224
225 /* PLA_OOB_CTRL */
226 #define NOW_IS_OOB              0x80
227 #define TXFIFO_EMPTY            0x20
228 #define RXFIFO_EMPTY            0x10
229 #define LINK_LIST_READY         0x02
230 #define DIS_MCU_CLROOB          0x01
231 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
232
233 /* PLA_MISC_1 */
234 #define RXDY_GATED_EN           0x0008
235
236 /* PLA_SFF_STS_7 */
237 #define RE_INIT_LL              0x8000
238 #define MCU_BORW_EN             0x4000
239
240 /* PLA_CPCR */
241 #define CPCR_RX_VLAN            0x0040
242
243 /* PLA_CFG_WOL */
244 #define MAGIC_EN                0x0001
245
246 /* PLA_TEREDO_CFG */
247 #define TEREDO_SEL              0x8000
248 #define TEREDO_WAKE_MASK        0x7f00
249 #define TEREDO_RS_EVENT_MASK    0x00fe
250 #define OOB_TEREDO_EN           0x0001
251
252 /* PAL_BDC_CR */
253 #define ALDPS_PROXY_MODE        0x0001
254
255 /* PLA_CONFIG34 */
256 #define LINK_ON_WAKE_EN         0x0010
257 #define LINK_OFF_WAKE_EN        0x0008
258
259 /* PLA_CONFIG5 */
260 #define BWF_EN                  0x0040
261 #define MWF_EN                  0x0020
262 #define UWF_EN                  0x0010
263 #define LAN_WAKE_EN             0x0002
264
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK           0x0700
267
268 /* PLA_PHY_PWR */
269 #define TX_10M_IDLE_EN          0x0080
270 #define PFM_PWM_SWITCH          0x0040
271
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN         0x00004000
274 #define MCU_CLK_RATIO           0x07010f07
275 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO       0x0f87
277
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO         0x8007
280
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN      0x0100
283 #define SUSPEND_SPDWN_EN        0x0004
284 #define U1U2_SPDWN_EN           0x0002
285 #define L1_SPDWN_EN             0x0001
286
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN        0x1000
289 #define RXDV_SPDWN_EN           0x0800
290 #define TX10MIDLE_EN            0x0100
291 #define TP100_SPDWN_EN          0x0020
292 #define TP500_SPDWN_EN          0x0010
293 #define TP1000_SPDWN_EN         0x0008
294 #define EEE_SPDWN_EN            0x0001
295
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK            0x0001
298 #define SPEED_DOWN_MSK          0x0002
299 #define SPDWN_RXDV_MSK          0x0004
300 #define SPDWN_LINKCHG_MSK       0x0008
301
302 /* PLA_PHYAR */
303 #define PHYAR_FLAG              0x80000000
304
305 /* PLA_EEE_CR */
306 #define EEE_RX_EN               0x0001
307 #define EEE_TX_EN               0x0002
308
309 /* PLA_BOOT_CTRL */
310 #define AUTOLOAD_DONE           0x0002
311
312 /* USB_USB2PHY */
313 #define USB2PHY_SUSPEND         0x0001
314 #define USB2PHY_L1              0x0002
315
316 /* USB_SSPHYLINK2 */
317 #define pwd_dn_scale_mask       0x3ffe
318 #define pwd_dn_scale(x)         ((x) << 1)
319
320 /* USB_CSR_DUMMY1 */
321 #define DYNAMIC_BURST           0x0001
322
323 /* USB_CSR_DUMMY2 */
324 #define EP4_FULL_FC             0x0001
325
326 /* USB_DEV_STAT */
327 #define STAT_SPEED_MASK         0x0006
328 #define STAT_SPEED_HIGH         0x0000
329 #define STAT_SPEED_FULL         0x0002
330
331 /* USB_TX_AGG */
332 #define TX_AGG_MAX_THRESHOLD    0x03
333
334 /* USB_RX_BUF_TH */
335 #define RX_THR_SUPPER           0x0c350180
336 #define RX_THR_HIGH             0x7a120180
337 #define RX_THR_SLOW             0xffff0180
338
339 /* USB_TX_DMA */
340 #define TEST_MODE_DISABLE       0x00000001
341 #define TX_SIZE_ADJUST1         0x00000100
342
343 /* USB_BMU_RESET */
344 #define BMU_RESET_EP_IN         0x01
345 #define BMU_RESET_EP_OUT        0x02
346
347 /* USB_UPS_CTRL */
348 #define POWER_CUT               0x0100
349
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE         0x0001
352
353 /* USB_USB_CTRL */
354 #define RX_AGG_DISABLE          0x0010
355 #define RX_ZERO_EN              0x0080
356
357 /* USB_U2P3_CTRL */
358 #define U2P3_ENABLE             0x0001
359
360 /* USB_POWER_CUT */
361 #define PWR_EN                  0x0001
362 #define PHASE2_EN               0x0008
363
364 /* USB_MISC_0 */
365 #define PCUT_STATUS             0x0001
366
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER           85000U
369 #define COALESCE_HIGH           250000U
370 #define COALESCE_SLOW           524280U
371
372 /* USB_WDT11_CTRL */
373 #define TIMER11_EN              0x0001
374
375 /* USB_LPM_CTRL */
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK          0x0c
380 #define LPM_TIMER_500MS         0x04    /* 500 ms */
381 #define LPM_TIMER_500US         0x0c    /* 500 us */
382 #define ROK_EXIT_LPM            0x02
383
384 /* USB_AFE_CTRL2 */
385 #define SEN_VAL_MASK            0xf800
386 #define SEN_VAL_NORMAL          0xa000
387 #define SEL_RXIDLE              0x0100
388
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE               0x8000
391 #define ENPDNPS                 0x0200
392 #define LINKENA                 0x0100
393 #define DIS_SDSAVE              0x0010
394
395 /* OCP_PHY_STATUS */
396 #define PHY_STAT_MASK           0x0007
397 #define PHY_STAT_LAN_ON         3
398 #define PHY_STAT_PWRDN          5
399
400 /* OCP_POWER_CFG */
401 #define EEE_CLKDIV_EN           0x8000
402 #define EN_ALDPS                0x0004
403 #define EN_10M_PLLOFF           0x0001
404
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP      0x8000
407 #define RG_MATCLR_EN            0x4000
408 #define EEE_10_CAP              0x2000
409 #define EEE_NWAY_EN             0x1000
410 #define TX_QUIET_EN             0x0200
411 #define RX_QUIET_EN             0x0100
412 #define sd_rise_time_mask       0x0070
413 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP      0x0008
415 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
416
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN          0x0400
420 #define RG_LDVQUIET_EN          0x0200
421 #define RG_CKRSEL               0x0020
422 #define RG_EEEPRG_EN            0x0010
423
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask           0xff80
426 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
427 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
428 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
429
430 /* OCP_EEE_AR */
431 /* bit[15:14] function */
432 #define FUN_ADDR                0x0000
433 #define FUN_DATA                0x4000
434 /* bit[4:0] device addr */
435
436 /* OCP_EEE_CFG */
437 #define CTAP_SHORT_EN           0x0040
438 #define EEE10_EN                0x0010
439
440 /* OCP_DOWN_SPEED */
441 #define EN_10M_BGOFF            0x0080
442
443 /* OCP_PHY_STATE */
444 #define TXDIS_STATE             0x01
445 #define ABD_STATE               0x02
446
447 /* OCP_ADC_CFG */
448 #define CKADSEL_L               0x0100
449 #define ADC_EN                  0x0080
450 #define EN_EMI_L                0x0040
451
452 /* SRAM_LPF_CFG */
453 #define LPF_AUTO_TUNE           0x8000
454
455 /* SRAM_10M_AMP1 */
456 #define GDAC_IB_UPALL           0x0008
457
458 /* SRAM_10M_AMP2 */
459 #define AMP_DN                  0x0200
460
461 /* SRAM_IMPEDANCE */
462 #define RX_DRIVING_MASK         0x6000
463
464 /* MAC PASSTHRU */
465 #define AD_MASK                 0xfee0
466 #define EFUSE                   0xcfdb
467 #define PASS_THRU_MASK          0x1
468
469 enum rtl_register_content {
470         _1000bps        = 0x10,
471         _100bps         = 0x08,
472         _10bps          = 0x04,
473         LINK_STATUS     = 0x02,
474         FULL_DUP        = 0x01,
475 };
476
477 #define RTL8152_MAX_TX          4
478 #define RTL8152_MAX_RX          10
479 #define INTBUFSIZE              2
480 #define CRC_SIZE                4
481 #define TX_ALIGN                4
482 #define RX_ALIGN                8
483
484 #define INTR_LINK               0x0004
485
486 #define RTL8152_REQT_READ       0xc0
487 #define RTL8152_REQT_WRITE      0x40
488 #define RTL8152_REQ_GET_REGS    0x05
489 #define RTL8152_REQ_SET_REGS    0x05
490
491 #define BYTE_EN_DWORD           0xff
492 #define BYTE_EN_WORD            0x33
493 #define BYTE_EN_BYTE            0x11
494 #define BYTE_EN_SIX_BYTES       0x3f
495 #define BYTE_EN_START_MASK      0x0f
496 #define BYTE_EN_END_MASK        0xf0
497
498 #define RTL8153_MAX_PACKET      9216 /* 9K */
499 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS             RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT      (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT     64
504 #define rx_reserved_size(x)     ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505                                  sizeof(struct rx_desc) + RX_ALIGN)
506
507 /* rtl8152 flags */
508 enum rtl8152_flags {
509         RTL8152_UNPLUG = 0,
510         RTL8152_SET_RX_MODE,
511         WORK_ENABLE,
512         RTL8152_LINK_CHG,
513         SELECTIVE_SUSPEND,
514         PHY_RESET,
515         SCHEDULE_NAPI,
516 };
517
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK               0x0bda
520 #define VENDOR_ID_MICROSOFT             0x045e
521 #define VENDOR_ID_SAMSUNG               0x04e8
522 #define VENDOR_ID_LENOVO                0x17ef
523 #define VENDOR_ID_NVIDIA                0x0955
524
525 #define MCU_TYPE_PLA                    0x0100
526 #define MCU_TYPE_USB                    0x0000
527
528 struct tally_counter {
529         __le64  tx_packets;
530         __le64  rx_packets;
531         __le64  tx_errors;
532         __le32  rx_errors;
533         __le16  rx_missed;
534         __le16  align_errors;
535         __le32  tx_one_collision;
536         __le32  tx_multi_collision;
537         __le64  rx_unicast;
538         __le64  rx_broadcast;
539         __le32  rx_multicast;
540         __le16  tx_aborted;
541         __le16  tx_underrun;
542 };
543
544 struct rx_desc {
545         __le32 opts1;
546 #define RX_LEN_MASK                     0x7fff
547
548         __le32 opts2;
549 #define RD_UDP_CS                       BIT(23)
550 #define RD_TCP_CS                       BIT(22)
551 #define RD_IPV6_CS                      BIT(20)
552 #define RD_IPV4_CS                      BIT(19)
553
554         __le32 opts3;
555 #define IPF                             BIT(23) /* IP checksum fail */
556 #define UDPF                            BIT(22) /* UDP checksum fail */
557 #define TCPF                            BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG                     BIT(16)
559
560         __le32 opts4;
561         __le32 opts5;
562         __le32 opts6;
563 };
564
565 struct tx_desc {
566         __le32 opts1;
567 #define TX_FS                   BIT(31) /* First segment of a packet */
568 #define TX_LS                   BIT(30) /* Final segment of a packet */
569 #define GTSENDV4                BIT(28)
570 #define GTSENDV6                BIT(27)
571 #define GTTCPHO_SHIFT           18
572 #define GTTCPHO_MAX             0x7fU
573 #define TX_LEN_MAX              0x3ffffU
574
575         __le32 opts2;
576 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
580 #define MSS_SHIFT               17
581 #define MSS_MAX                 0x7ffU
582 #define TCPHO_SHIFT             17
583 #define TCPHO_MAX               0x7ffU
584 #define TX_VLAN_TAG             BIT(16)
585 };
586
587 struct r8152;
588
589 struct rx_agg {
590         struct list_head list;
591         struct urb *urb;
592         struct r8152 *context;
593         void *buffer;
594         void *head;
595 };
596
597 struct tx_agg {
598         struct list_head list;
599         struct urb *urb;
600         struct r8152 *context;
601         void *buffer;
602         void *head;
603         u32 skb_num;
604         u32 skb_len;
605 };
606
607 struct r8152 {
608         unsigned long flags;
609         struct usb_device *udev;
610         struct napi_struct napi;
611         struct usb_interface *intf;
612         struct net_device *netdev;
613         struct urb *intr_urb;
614         struct tx_agg tx_info[RTL8152_MAX_TX];
615         struct rx_agg rx_info[RTL8152_MAX_RX];
616         struct list_head rx_done, tx_free;
617         struct sk_buff_head tx_queue, rx_queue;
618         spinlock_t rx_lock, tx_lock;
619         struct delayed_work schedule, hw_phy_work;
620         struct mii_if_info mii;
621         struct mutex control;   /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623         struct notifier_block pm_notifier;
624 #endif
625
626         struct rtl_ops {
627                 void (*init)(struct r8152 *);
628                 int (*enable)(struct r8152 *);
629                 void (*disable)(struct r8152 *);
630                 void (*up)(struct r8152 *);
631                 void (*down)(struct r8152 *);
632                 void (*unload)(struct r8152 *);
633                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635                 bool (*in_nway)(struct r8152 *);
636                 void (*hw_phy_cfg)(struct r8152 *);
637                 void (*autosuspend_en)(struct r8152 *tp, bool enable);
638         } rtl_ops;
639
640         int intr_interval;
641         u32 saved_wolopts;
642         u32 msg_enable;
643         u32 tx_qlen;
644         u32 coalesce;
645         u16 ocp_base;
646         u16 speed;
647         u8 *intr_buff;
648         u8 version;
649         u8 duplex;
650         u8 autoneg;
651 };
652
653 enum rtl_version {
654         RTL_VER_UNKNOWN = 0,
655         RTL_VER_01,
656         RTL_VER_02,
657         RTL_VER_03,
658         RTL_VER_04,
659         RTL_VER_05,
660         RTL_VER_06,
661         RTL_VER_MAX
662 };
663
664 enum tx_csum_stat {
665         TX_CSUM_SUCCESS = 0,
666         TX_CSUM_TSO,
667         TX_CSUM_NONE
668 };
669
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
672  */
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
675
676 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
677                                  VLAN_ETH_HLEN - VLAN_HLEN)
678
679 static
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
681 {
682         int ret;
683         void *tmp;
684
685         tmp = kmalloc(size, GFP_KERNEL);
686         if (!tmp)
687                 return -ENOMEM;
688
689         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691                               value, index, tmp, size, 500);
692
693         memcpy(data, tmp, size);
694         kfree(tmp);
695
696         return ret;
697 }
698
699 static
700 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
701 {
702         int ret;
703         void *tmp;
704
705         tmp = kmemdup(data, size, GFP_KERNEL);
706         if (!tmp)
707                 return -ENOMEM;
708
709         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
710                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
711                               value, index, tmp, size, 500);
712
713         kfree(tmp);
714
715         return ret;
716 }
717
718 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
719                             void *data, u16 type)
720 {
721         u16 limit = 64;
722         int ret = 0;
723
724         if (test_bit(RTL8152_UNPLUG, &tp->flags))
725                 return -ENODEV;
726
727         /* both size and indix must be 4 bytes align */
728         if ((size & 3) || !size || (index & 3) || !data)
729                 return -EPERM;
730
731         if ((u32)index + (u32)size > 0xffff)
732                 return -EPERM;
733
734         while (size) {
735                 if (size > limit) {
736                         ret = get_registers(tp, index, type, limit, data);
737                         if (ret < 0)
738                                 break;
739
740                         index += limit;
741                         data += limit;
742                         size -= limit;
743                 } else {
744                         ret = get_registers(tp, index, type, size, data);
745                         if (ret < 0)
746                                 break;
747
748                         index += size;
749                         data += size;
750                         size = 0;
751                         break;
752                 }
753         }
754
755         if (ret == -ENODEV)
756                 set_bit(RTL8152_UNPLUG, &tp->flags);
757
758         return ret;
759 }
760
761 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
762                              u16 size, void *data, u16 type)
763 {
764         int ret;
765         u16 byteen_start, byteen_end, byen;
766         u16 limit = 512;
767
768         if (test_bit(RTL8152_UNPLUG, &tp->flags))
769                 return -ENODEV;
770
771         /* both size and indix must be 4 bytes align */
772         if ((size & 3) || !size || (index & 3) || !data)
773                 return -EPERM;
774
775         if ((u32)index + (u32)size > 0xffff)
776                 return -EPERM;
777
778         byteen_start = byteen & BYTE_EN_START_MASK;
779         byteen_end = byteen & BYTE_EN_END_MASK;
780
781         byen = byteen_start | (byteen_start << 4);
782         ret = set_registers(tp, index, type | byen, 4, data);
783         if (ret < 0)
784                 goto error1;
785
786         index += 4;
787         data += 4;
788         size -= 4;
789
790         if (size) {
791                 size -= 4;
792
793                 while (size) {
794                         if (size > limit) {
795                                 ret = set_registers(tp, index,
796                                                     type | BYTE_EN_DWORD,
797                                                     limit, data);
798                                 if (ret < 0)
799                                         goto error1;
800
801                                 index += limit;
802                                 data += limit;
803                                 size -= limit;
804                         } else {
805                                 ret = set_registers(tp, index,
806                                                     type | BYTE_EN_DWORD,
807                                                     size, data);
808                                 if (ret < 0)
809                                         goto error1;
810
811                                 index += size;
812                                 data += size;
813                                 size = 0;
814                                 break;
815                         }
816                 }
817
818                 byen = byteen_end | (byteen_end >> 4);
819                 ret = set_registers(tp, index, type | byen, 4, data);
820                 if (ret < 0)
821                         goto error1;
822         }
823
824 error1:
825         if (ret == -ENODEV)
826                 set_bit(RTL8152_UNPLUG, &tp->flags);
827
828         return ret;
829 }
830
831 static inline
832 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
833 {
834         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
835 }
836
837 static inline
838 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
839 {
840         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
841 }
842
843 static inline
844 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
845 {
846         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
847 }
848
849 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
850 {
851         __le32 data;
852
853         generic_ocp_read(tp, index, sizeof(data), &data, type);
854
855         return __le32_to_cpu(data);
856 }
857
858 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
859 {
860         __le32 tmp = __cpu_to_le32(data);
861
862         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
863 }
864
865 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
866 {
867         u32 data;
868         __le32 tmp;
869         u8 shift = index & 2;
870
871         index &= ~3;
872
873         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
874
875         data = __le32_to_cpu(tmp);
876         data >>= (shift * 8);
877         data &= 0xffff;
878
879         return (u16)data;
880 }
881
882 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
883 {
884         u32 mask = 0xffff;
885         __le32 tmp;
886         u16 byen = BYTE_EN_WORD;
887         u8 shift = index & 2;
888
889         data &= mask;
890
891         if (index & 2) {
892                 byen <<= shift;
893                 mask <<= (shift * 8);
894                 data <<= (shift * 8);
895                 index &= ~3;
896         }
897
898         tmp = __cpu_to_le32(data);
899
900         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
901 }
902
903 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
904 {
905         u32 data;
906         __le32 tmp;
907         u8 shift = index & 3;
908
909         index &= ~3;
910
911         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
912
913         data = __le32_to_cpu(tmp);
914         data >>= (shift * 8);
915         data &= 0xff;
916
917         return (u8)data;
918 }
919
920 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
921 {
922         u32 mask = 0xff;
923         __le32 tmp;
924         u16 byen = BYTE_EN_BYTE;
925         u8 shift = index & 3;
926
927         data &= mask;
928
929         if (index & 3) {
930                 byen <<= shift;
931                 mask <<= (shift * 8);
932                 data <<= (shift * 8);
933                 index &= ~3;
934         }
935
936         tmp = __cpu_to_le32(data);
937
938         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
939 }
940
941 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
942 {
943         u16 ocp_base, ocp_index;
944
945         ocp_base = addr & 0xf000;
946         if (ocp_base != tp->ocp_base) {
947                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
948                 tp->ocp_base = ocp_base;
949         }
950
951         ocp_index = (addr & 0x0fff) | 0xb000;
952         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
953 }
954
955 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
956 {
957         u16 ocp_base, ocp_index;
958
959         ocp_base = addr & 0xf000;
960         if (ocp_base != tp->ocp_base) {
961                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
962                 tp->ocp_base = ocp_base;
963         }
964
965         ocp_index = (addr & 0x0fff) | 0xb000;
966         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
967 }
968
969 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
970 {
971         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
972 }
973
974 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
975 {
976         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
977 }
978
979 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
980 {
981         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
982         ocp_reg_write(tp, OCP_SRAM_DATA, data);
983 }
984
985 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
986 {
987         struct r8152 *tp = netdev_priv(netdev);
988         int ret;
989
990         if (test_bit(RTL8152_UNPLUG, &tp->flags))
991                 return -ENODEV;
992
993         if (phy_id != R8152_PHY_ID)
994                 return -EINVAL;
995
996         ret = r8152_mdio_read(tp, reg);
997
998         return ret;
999 }
1000
1001 static
1002 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1003 {
1004         struct r8152 *tp = netdev_priv(netdev);
1005
1006         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1007                 return;
1008
1009         if (phy_id != R8152_PHY_ID)
1010                 return;
1011
1012         r8152_mdio_write(tp, reg, val);
1013 }
1014
1015 static int
1016 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1017
1018 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1019 {
1020         struct r8152 *tp = netdev_priv(netdev);
1021         struct sockaddr *addr = p;
1022         int ret = -EADDRNOTAVAIL;
1023
1024         if (!is_valid_ether_addr(addr->sa_data))
1025                 goto out1;
1026
1027         ret = usb_autopm_get_interface(tp->intf);
1028         if (ret < 0)
1029                 goto out1;
1030
1031         mutex_lock(&tp->control);
1032
1033         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1034
1035         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1036         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1037         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1038
1039         mutex_unlock(&tp->control);
1040
1041         usb_autopm_put_interface(tp->intf);
1042 out1:
1043         return ret;
1044 }
1045
1046 /* Devices containing RTL8153-AD can support a persistent
1047  * host system provided MAC address.
1048  * Examples of this are Dell TB15 and Dell WD15 docks
1049  */
1050 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1051 {
1052         acpi_status status;
1053         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1054         union acpi_object *obj;
1055         int ret = -EINVAL;
1056         u32 ocp_data;
1057         unsigned char buf[6];
1058
1059         /* test for -AD variant of RTL8153 */
1060         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1061         if ((ocp_data & AD_MASK) != 0x1000)
1062                 return -ENODEV;
1063
1064         /* test for MAC address pass-through bit */
1065         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1066         if ((ocp_data & PASS_THRU_MASK) != 1)
1067                 return -ENODEV;
1068
1069         /* returns _AUXMAC_#AABBCCDDEEFF# */
1070         status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1071         obj = (union acpi_object *)buffer.pointer;
1072         if (!ACPI_SUCCESS(status))
1073                 return -ENODEV;
1074         if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1075                 netif_warn(tp, probe, tp->netdev,
1076                            "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1077                            obj->type, obj->string.length);
1078                 goto amacout;
1079         }
1080         if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1081             strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1082                 netif_warn(tp, probe, tp->netdev,
1083                            "Invalid header when reading pass-thru MAC addr\n");
1084                 goto amacout;
1085         }
1086         ret = hex2bin(buf, obj->string.pointer + 9, 6);
1087         if (!(ret == 0 && is_valid_ether_addr(buf))) {
1088                 netif_warn(tp, probe, tp->netdev,
1089                            "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1090                            ret, buf);
1091                 ret = -EINVAL;
1092                 goto amacout;
1093         }
1094         memcpy(sa->sa_data, buf, 6);
1095         ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1096         netif_info(tp, probe, tp->netdev,
1097                    "Using pass-thru MAC addr %pM\n", sa->sa_data);
1098
1099 amacout:
1100         kfree(obj);
1101         return ret;
1102 }
1103
1104 static int set_ethernet_addr(struct r8152 *tp)
1105 {
1106         struct net_device *dev = tp->netdev;
1107         struct sockaddr sa;
1108         int ret;
1109
1110         if (tp->version == RTL_VER_01) {
1111                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1112         } else {
1113                 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1114                  * or system doesn't provide valid _SB.AMAC this will be
1115                  * be expected to non-zero
1116                  */
1117                 ret = vendor_mac_passthru_addr_read(tp, &sa);
1118                 if (ret < 0)
1119                         ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1120         }
1121
1122         if (ret < 0) {
1123                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1124         } else if (!is_valid_ether_addr(sa.sa_data)) {
1125                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1126                           sa.sa_data);
1127                 eth_hw_addr_random(dev);
1128                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1129                 ret = rtl8152_set_mac_address(dev, &sa);
1130                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1131                            sa.sa_data);
1132         } else {
1133                 if (tp->version == RTL_VER_01)
1134                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1135                 else
1136                         ret = rtl8152_set_mac_address(dev, &sa);
1137         }
1138
1139         return ret;
1140 }
1141
1142 static void read_bulk_callback(struct urb *urb)
1143 {
1144         struct net_device *netdev;
1145         int status = urb->status;
1146         struct rx_agg *agg;
1147         struct r8152 *tp;
1148
1149         agg = urb->context;
1150         if (!agg)
1151                 return;
1152
1153         tp = agg->context;
1154         if (!tp)
1155                 return;
1156
1157         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1158                 return;
1159
1160         if (!test_bit(WORK_ENABLE, &tp->flags))
1161                 return;
1162
1163         netdev = tp->netdev;
1164
1165         /* When link down, the driver would cancel all bulks. */
1166         /* This avoid the re-submitting bulk */
1167         if (!netif_carrier_ok(netdev))
1168                 return;
1169
1170         usb_mark_last_busy(tp->udev);
1171
1172         switch (status) {
1173         case 0:
1174                 if (urb->actual_length < ETH_ZLEN)
1175                         break;
1176
1177                 spin_lock(&tp->rx_lock);
1178                 list_add_tail(&agg->list, &tp->rx_done);
1179                 spin_unlock(&tp->rx_lock);
1180                 napi_schedule(&tp->napi);
1181                 return;
1182         case -ESHUTDOWN:
1183                 set_bit(RTL8152_UNPLUG, &tp->flags);
1184                 netif_device_detach(tp->netdev);
1185                 return;
1186         case -ENOENT:
1187                 return; /* the urb is in unlink state */
1188         case -ETIME:
1189                 if (net_ratelimit())
1190                         netdev_warn(netdev, "maybe reset is needed?\n");
1191                 break;
1192         default:
1193                 if (net_ratelimit())
1194                         netdev_warn(netdev, "Rx status %d\n", status);
1195                 break;
1196         }
1197
1198         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1199 }
1200
1201 static void write_bulk_callback(struct urb *urb)
1202 {
1203         struct net_device_stats *stats;
1204         struct net_device *netdev;
1205         struct tx_agg *agg;
1206         struct r8152 *tp;
1207         int status = urb->status;
1208
1209         agg = urb->context;
1210         if (!agg)
1211                 return;
1212
1213         tp = agg->context;
1214         if (!tp)
1215                 return;
1216
1217         netdev = tp->netdev;
1218         stats = &netdev->stats;
1219         if (status) {
1220                 if (net_ratelimit())
1221                         netdev_warn(netdev, "Tx status %d\n", status);
1222                 stats->tx_errors += agg->skb_num;
1223         } else {
1224                 stats->tx_packets += agg->skb_num;
1225                 stats->tx_bytes += agg->skb_len;
1226         }
1227
1228         spin_lock(&tp->tx_lock);
1229         list_add_tail(&agg->list, &tp->tx_free);
1230         spin_unlock(&tp->tx_lock);
1231
1232         usb_autopm_put_interface_async(tp->intf);
1233
1234         if (!netif_carrier_ok(netdev))
1235                 return;
1236
1237         if (!test_bit(WORK_ENABLE, &tp->flags))
1238                 return;
1239
1240         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1241                 return;
1242
1243         if (!skb_queue_empty(&tp->tx_queue))
1244                 napi_schedule(&tp->napi);
1245 }
1246
1247 static void intr_callback(struct urb *urb)
1248 {
1249         struct r8152 *tp;
1250         __le16 *d;
1251         int status = urb->status;
1252         int res;
1253
1254         tp = urb->context;
1255         if (!tp)
1256                 return;
1257
1258         if (!test_bit(WORK_ENABLE, &tp->flags))
1259                 return;
1260
1261         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1262                 return;
1263
1264         switch (status) {
1265         case 0:                 /* success */
1266                 break;
1267         case -ECONNRESET:       /* unlink */
1268         case -ESHUTDOWN:
1269                 netif_device_detach(tp->netdev);
1270         case -ENOENT:
1271         case -EPROTO:
1272                 netif_info(tp, intr, tp->netdev,
1273                            "Stop submitting intr, status %d\n", status);
1274                 return;
1275         case -EOVERFLOW:
1276                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1277                 goto resubmit;
1278         /* -EPIPE:  should clear the halt */
1279         default:
1280                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1281                 goto resubmit;
1282         }
1283
1284         d = urb->transfer_buffer;
1285         if (INTR_LINK & __le16_to_cpu(d[0])) {
1286                 if (!netif_carrier_ok(tp->netdev)) {
1287                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1288                         schedule_delayed_work(&tp->schedule, 0);
1289                 }
1290         } else {
1291                 if (netif_carrier_ok(tp->netdev)) {
1292                         netif_stop_queue(tp->netdev);
1293                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1294                         schedule_delayed_work(&tp->schedule, 0);
1295                 }
1296         }
1297
1298 resubmit:
1299         res = usb_submit_urb(urb, GFP_ATOMIC);
1300         if (res == -ENODEV) {
1301                 set_bit(RTL8152_UNPLUG, &tp->flags);
1302                 netif_device_detach(tp->netdev);
1303         } else if (res) {
1304                 netif_err(tp, intr, tp->netdev,
1305                           "can't resubmit intr, status %d\n", res);
1306         }
1307 }
1308
1309 static inline void *rx_agg_align(void *data)
1310 {
1311         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1312 }
1313
1314 static inline void *tx_agg_align(void *data)
1315 {
1316         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1317 }
1318
1319 static void free_all_mem(struct r8152 *tp)
1320 {
1321         int i;
1322
1323         for (i = 0; i < RTL8152_MAX_RX; i++) {
1324                 usb_free_urb(tp->rx_info[i].urb);
1325                 tp->rx_info[i].urb = NULL;
1326
1327                 kfree(tp->rx_info[i].buffer);
1328                 tp->rx_info[i].buffer = NULL;
1329                 tp->rx_info[i].head = NULL;
1330         }
1331
1332         for (i = 0; i < RTL8152_MAX_TX; i++) {
1333                 usb_free_urb(tp->tx_info[i].urb);
1334                 tp->tx_info[i].urb = NULL;
1335
1336                 kfree(tp->tx_info[i].buffer);
1337                 tp->tx_info[i].buffer = NULL;
1338                 tp->tx_info[i].head = NULL;
1339         }
1340
1341         usb_free_urb(tp->intr_urb);
1342         tp->intr_urb = NULL;
1343
1344         kfree(tp->intr_buff);
1345         tp->intr_buff = NULL;
1346 }
1347
1348 static int alloc_all_mem(struct r8152 *tp)
1349 {
1350         struct net_device *netdev = tp->netdev;
1351         struct usb_interface *intf = tp->intf;
1352         struct usb_host_interface *alt = intf->cur_altsetting;
1353         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1354         struct urb *urb;
1355         int node, i;
1356         u8 *buf;
1357
1358         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1359
1360         spin_lock_init(&tp->rx_lock);
1361         spin_lock_init(&tp->tx_lock);
1362         INIT_LIST_HEAD(&tp->tx_free);
1363         INIT_LIST_HEAD(&tp->rx_done);
1364         skb_queue_head_init(&tp->tx_queue);
1365         skb_queue_head_init(&tp->rx_queue);
1366
1367         for (i = 0; i < RTL8152_MAX_RX; i++) {
1368                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1369                 if (!buf)
1370                         goto err1;
1371
1372                 if (buf != rx_agg_align(buf)) {
1373                         kfree(buf);
1374                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1375                                            node);
1376                         if (!buf)
1377                                 goto err1;
1378                 }
1379
1380                 urb = usb_alloc_urb(0, GFP_KERNEL);
1381                 if (!urb) {
1382                         kfree(buf);
1383                         goto err1;
1384                 }
1385
1386                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1387                 tp->rx_info[i].context = tp;
1388                 tp->rx_info[i].urb = urb;
1389                 tp->rx_info[i].buffer = buf;
1390                 tp->rx_info[i].head = rx_agg_align(buf);
1391         }
1392
1393         for (i = 0; i < RTL8152_MAX_TX; i++) {
1394                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1395                 if (!buf)
1396                         goto err1;
1397
1398                 if (buf != tx_agg_align(buf)) {
1399                         kfree(buf);
1400                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1401                                            node);
1402                         if (!buf)
1403                                 goto err1;
1404                 }
1405
1406                 urb = usb_alloc_urb(0, GFP_KERNEL);
1407                 if (!urb) {
1408                         kfree(buf);
1409                         goto err1;
1410                 }
1411
1412                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1413                 tp->tx_info[i].context = tp;
1414                 tp->tx_info[i].urb = urb;
1415                 tp->tx_info[i].buffer = buf;
1416                 tp->tx_info[i].head = tx_agg_align(buf);
1417
1418                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1419         }
1420
1421         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1422         if (!tp->intr_urb)
1423                 goto err1;
1424
1425         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1426         if (!tp->intr_buff)
1427                 goto err1;
1428
1429         tp->intr_interval = (int)ep_intr->desc.bInterval;
1430         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1431                          tp->intr_buff, INTBUFSIZE, intr_callback,
1432                          tp, tp->intr_interval);
1433
1434         return 0;
1435
1436 err1:
1437         free_all_mem(tp);
1438         return -ENOMEM;
1439 }
1440
1441 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1442 {
1443         struct tx_agg *agg = NULL;
1444         unsigned long flags;
1445
1446         if (list_empty(&tp->tx_free))
1447                 return NULL;
1448
1449         spin_lock_irqsave(&tp->tx_lock, flags);
1450         if (!list_empty(&tp->tx_free)) {
1451                 struct list_head *cursor;
1452
1453                 cursor = tp->tx_free.next;
1454                 list_del_init(cursor);
1455                 agg = list_entry(cursor, struct tx_agg, list);
1456         }
1457         spin_unlock_irqrestore(&tp->tx_lock, flags);
1458
1459         return agg;
1460 }
1461
1462 /* r8152_csum_workaround()
1463  * The hw limites the value the transport offset. When the offset is out of the
1464  * range, calculate the checksum by sw.
1465  */
1466 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1467                                   struct sk_buff_head *list)
1468 {
1469         if (skb_shinfo(skb)->gso_size) {
1470                 netdev_features_t features = tp->netdev->features;
1471                 struct sk_buff_head seg_list;
1472                 struct sk_buff *segs, *nskb;
1473
1474                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1475                 segs = skb_gso_segment(skb, features);
1476                 if (IS_ERR(segs) || !segs)
1477                         goto drop;
1478
1479                 __skb_queue_head_init(&seg_list);
1480
1481                 do {
1482                         nskb = segs;
1483                         segs = segs->next;
1484                         nskb->next = NULL;
1485                         __skb_queue_tail(&seg_list, nskb);
1486                 } while (segs);
1487
1488                 skb_queue_splice(&seg_list, list);
1489                 dev_kfree_skb(skb);
1490         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1491                 if (skb_checksum_help(skb) < 0)
1492                         goto drop;
1493
1494                 __skb_queue_head(list, skb);
1495         } else {
1496                 struct net_device_stats *stats;
1497
1498 drop:
1499                 stats = &tp->netdev->stats;
1500                 stats->tx_dropped++;
1501                 dev_kfree_skb(skb);
1502         }
1503 }
1504
1505 /* msdn_giant_send_check()
1506  * According to the document of microsoft, the TCP Pseudo Header excludes the
1507  * packet length for IPv6 TCP large packets.
1508  */
1509 static int msdn_giant_send_check(struct sk_buff *skb)
1510 {
1511         const struct ipv6hdr *ipv6h;
1512         struct tcphdr *th;
1513         int ret;
1514
1515         ret = skb_cow_head(skb, 0);
1516         if (ret)
1517                 return ret;
1518
1519         ipv6h = ipv6_hdr(skb);
1520         th = tcp_hdr(skb);
1521
1522         th->check = 0;
1523         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1524
1525         return ret;
1526 }
1527
1528 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1529 {
1530         if (skb_vlan_tag_present(skb)) {
1531                 u32 opts2;
1532
1533                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1534                 desc->opts2 |= cpu_to_le32(opts2);
1535         }
1536 }
1537
1538 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1539 {
1540         u32 opts2 = le32_to_cpu(desc->opts2);
1541
1542         if (opts2 & RX_VLAN_TAG)
1543                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1544                                        swab16(opts2 & 0xffff));
1545 }
1546
1547 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1548                          struct sk_buff *skb, u32 len, u32 transport_offset)
1549 {
1550         u32 mss = skb_shinfo(skb)->gso_size;
1551         u32 opts1, opts2 = 0;
1552         int ret = TX_CSUM_SUCCESS;
1553
1554         WARN_ON_ONCE(len > TX_LEN_MAX);
1555
1556         opts1 = len | TX_FS | TX_LS;
1557
1558         if (mss) {
1559                 if (transport_offset > GTTCPHO_MAX) {
1560                         netif_warn(tp, tx_err, tp->netdev,
1561                                    "Invalid transport offset 0x%x for TSO\n",
1562                                    transport_offset);
1563                         ret = TX_CSUM_TSO;
1564                         goto unavailable;
1565                 }
1566
1567                 switch (vlan_get_protocol(skb)) {
1568                 case htons(ETH_P_IP):
1569                         opts1 |= GTSENDV4;
1570                         break;
1571
1572                 case htons(ETH_P_IPV6):
1573                         if (msdn_giant_send_check(skb)) {
1574                                 ret = TX_CSUM_TSO;
1575                                 goto unavailable;
1576                         }
1577                         opts1 |= GTSENDV6;
1578                         break;
1579
1580                 default:
1581                         WARN_ON_ONCE(1);
1582                         break;
1583                 }
1584
1585                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1586                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1587         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1588                 u8 ip_protocol;
1589
1590                 if (transport_offset > TCPHO_MAX) {
1591                         netif_warn(tp, tx_err, tp->netdev,
1592                                    "Invalid transport offset 0x%x\n",
1593                                    transport_offset);
1594                         ret = TX_CSUM_NONE;
1595                         goto unavailable;
1596                 }
1597
1598                 switch (vlan_get_protocol(skb)) {
1599                 case htons(ETH_P_IP):
1600                         opts2 |= IPV4_CS;
1601                         ip_protocol = ip_hdr(skb)->protocol;
1602                         break;
1603
1604                 case htons(ETH_P_IPV6):
1605                         opts2 |= IPV6_CS;
1606                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1607                         break;
1608
1609                 default:
1610                         ip_protocol = IPPROTO_RAW;
1611                         break;
1612                 }
1613
1614                 if (ip_protocol == IPPROTO_TCP)
1615                         opts2 |= TCP_CS;
1616                 else if (ip_protocol == IPPROTO_UDP)
1617                         opts2 |= UDP_CS;
1618                 else
1619                         WARN_ON_ONCE(1);
1620
1621                 opts2 |= transport_offset << TCPHO_SHIFT;
1622         }
1623
1624         desc->opts2 = cpu_to_le32(opts2);
1625         desc->opts1 = cpu_to_le32(opts1);
1626
1627 unavailable:
1628         return ret;
1629 }
1630
1631 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1632 {
1633         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1634         int remain, ret;
1635         u8 *tx_data;
1636
1637         __skb_queue_head_init(&skb_head);
1638         spin_lock(&tx_queue->lock);
1639         skb_queue_splice_init(tx_queue, &skb_head);
1640         spin_unlock(&tx_queue->lock);
1641
1642         tx_data = agg->head;
1643         agg->skb_num = 0;
1644         agg->skb_len = 0;
1645         remain = agg_buf_sz;
1646
1647         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1648                 struct tx_desc *tx_desc;
1649                 struct sk_buff *skb;
1650                 unsigned int len;
1651                 u32 offset;
1652
1653                 skb = __skb_dequeue(&skb_head);
1654                 if (!skb)
1655                         break;
1656
1657                 len = skb->len + sizeof(*tx_desc);
1658
1659                 if (len > remain) {
1660                         __skb_queue_head(&skb_head, skb);
1661                         break;
1662                 }
1663
1664                 tx_data = tx_agg_align(tx_data);
1665                 tx_desc = (struct tx_desc *)tx_data;
1666
1667                 offset = (u32)skb_transport_offset(skb);
1668
1669                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1670                         r8152_csum_workaround(tp, skb, &skb_head);
1671                         continue;
1672                 }
1673
1674                 rtl_tx_vlan_tag(tx_desc, skb);
1675
1676                 tx_data += sizeof(*tx_desc);
1677
1678                 len = skb->len;
1679                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1680                         struct net_device_stats *stats = &tp->netdev->stats;
1681
1682                         stats->tx_dropped++;
1683                         dev_kfree_skb_any(skb);
1684                         tx_data -= sizeof(*tx_desc);
1685                         continue;
1686                 }
1687
1688                 tx_data += len;
1689                 agg->skb_len += len;
1690                 agg->skb_num++;
1691
1692                 dev_kfree_skb_any(skb);
1693
1694                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1695         }
1696
1697         if (!skb_queue_empty(&skb_head)) {
1698                 spin_lock(&tx_queue->lock);
1699                 skb_queue_splice(&skb_head, tx_queue);
1700                 spin_unlock(&tx_queue->lock);
1701         }
1702
1703         netif_tx_lock(tp->netdev);
1704
1705         if (netif_queue_stopped(tp->netdev) &&
1706             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1707                 netif_wake_queue(tp->netdev);
1708
1709         netif_tx_unlock(tp->netdev);
1710
1711         ret = usb_autopm_get_interface_async(tp->intf);
1712         if (ret < 0)
1713                 goto out_tx_fill;
1714
1715         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1716                           agg->head, (int)(tx_data - (u8 *)agg->head),
1717                           (usb_complete_t)write_bulk_callback, agg);
1718
1719         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1720         if (ret < 0)
1721                 usb_autopm_put_interface_async(tp->intf);
1722
1723 out_tx_fill:
1724         return ret;
1725 }
1726
1727 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1728 {
1729         u8 checksum = CHECKSUM_NONE;
1730         u32 opts2, opts3;
1731
1732         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1733                 goto return_result;
1734
1735         opts2 = le32_to_cpu(rx_desc->opts2);
1736         opts3 = le32_to_cpu(rx_desc->opts3);
1737
1738         if (opts2 & RD_IPV4_CS) {
1739                 if (opts3 & IPF)
1740                         checksum = CHECKSUM_NONE;
1741                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1742                         checksum = CHECKSUM_NONE;
1743                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1744                         checksum = CHECKSUM_NONE;
1745                 else
1746                         checksum = CHECKSUM_UNNECESSARY;
1747         } else if (opts2 & RD_IPV6_CS) {
1748                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1749                         checksum = CHECKSUM_UNNECESSARY;
1750                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1751                         checksum = CHECKSUM_UNNECESSARY;
1752         }
1753
1754 return_result:
1755         return checksum;
1756 }
1757
1758 static int rx_bottom(struct r8152 *tp, int budget)
1759 {
1760         unsigned long flags;
1761         struct list_head *cursor, *next, rx_queue;
1762         int ret = 0, work_done = 0;
1763         struct napi_struct *napi = &tp->napi;
1764
1765         if (!skb_queue_empty(&tp->rx_queue)) {
1766                 while (work_done < budget) {
1767                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1768                         struct net_device *netdev = tp->netdev;
1769                         struct net_device_stats *stats = &netdev->stats;
1770                         unsigned int pkt_len;
1771
1772                         if (!skb)
1773                                 break;
1774
1775                         pkt_len = skb->len;
1776                         napi_gro_receive(napi, skb);
1777                         work_done++;
1778                         stats->rx_packets++;
1779                         stats->rx_bytes += pkt_len;
1780                 }
1781         }
1782
1783         if (list_empty(&tp->rx_done))
1784                 goto out1;
1785
1786         INIT_LIST_HEAD(&rx_queue);
1787         spin_lock_irqsave(&tp->rx_lock, flags);
1788         list_splice_init(&tp->rx_done, &rx_queue);
1789         spin_unlock_irqrestore(&tp->rx_lock, flags);
1790
1791         list_for_each_safe(cursor, next, &rx_queue) {
1792                 struct rx_desc *rx_desc;
1793                 struct rx_agg *agg;
1794                 int len_used = 0;
1795                 struct urb *urb;
1796                 u8 *rx_data;
1797
1798                 list_del_init(cursor);
1799
1800                 agg = list_entry(cursor, struct rx_agg, list);
1801                 urb = agg->urb;
1802                 if (urb->actual_length < ETH_ZLEN)
1803                         goto submit;
1804
1805                 rx_desc = agg->head;
1806                 rx_data = agg->head;
1807                 len_used += sizeof(struct rx_desc);
1808
1809                 while (urb->actual_length > len_used) {
1810                         struct net_device *netdev = tp->netdev;
1811                         struct net_device_stats *stats = &netdev->stats;
1812                         unsigned int pkt_len;
1813                         struct sk_buff *skb;
1814
1815                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1816                         if (pkt_len < ETH_ZLEN)
1817                                 break;
1818
1819                         len_used += pkt_len;
1820                         if (urb->actual_length < len_used)
1821                                 break;
1822
1823                         pkt_len -= CRC_SIZE;
1824                         rx_data += sizeof(struct rx_desc);
1825
1826                         skb = napi_alloc_skb(napi, pkt_len);
1827                         if (!skb) {
1828                                 stats->rx_dropped++;
1829                                 goto find_next_rx;
1830                         }
1831
1832                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1833                         memcpy(skb->data, rx_data, pkt_len);
1834                         skb_put(skb, pkt_len);
1835                         skb->protocol = eth_type_trans(skb, netdev);
1836                         rtl_rx_vlan_tag(rx_desc, skb);
1837                         if (work_done < budget) {
1838                                 napi_gro_receive(napi, skb);
1839                                 work_done++;
1840                                 stats->rx_packets++;
1841                                 stats->rx_bytes += pkt_len;
1842                         } else {
1843                                 __skb_queue_tail(&tp->rx_queue, skb);
1844                         }
1845
1846 find_next_rx:
1847                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1848                         rx_desc = (struct rx_desc *)rx_data;
1849                         len_used = (int)(rx_data - (u8 *)agg->head);
1850                         len_used += sizeof(struct rx_desc);
1851                 }
1852
1853 submit:
1854                 if (!ret) {
1855                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1856                 } else {
1857                         urb->actual_length = 0;
1858                         list_add_tail(&agg->list, next);
1859                 }
1860         }
1861
1862         if (!list_empty(&rx_queue)) {
1863                 spin_lock_irqsave(&tp->rx_lock, flags);
1864                 list_splice_tail(&rx_queue, &tp->rx_done);
1865                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1866         }
1867
1868 out1:
1869         return work_done;
1870 }
1871
1872 static void tx_bottom(struct r8152 *tp)
1873 {
1874         int res;
1875
1876         do {
1877                 struct tx_agg *agg;
1878
1879                 if (skb_queue_empty(&tp->tx_queue))
1880                         break;
1881
1882                 agg = r8152_get_tx_agg(tp);
1883                 if (!agg)
1884                         break;
1885
1886                 res = r8152_tx_agg_fill(tp, agg);
1887                 if (res) {
1888                         struct net_device *netdev = tp->netdev;
1889
1890                         if (res == -ENODEV) {
1891                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1892                                 netif_device_detach(netdev);
1893                         } else {
1894                                 struct net_device_stats *stats = &netdev->stats;
1895                                 unsigned long flags;
1896
1897                                 netif_warn(tp, tx_err, netdev,
1898                                            "failed tx_urb %d\n", res);
1899                                 stats->tx_dropped += agg->skb_num;
1900
1901                                 spin_lock_irqsave(&tp->tx_lock, flags);
1902                                 list_add_tail(&agg->list, &tp->tx_free);
1903                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1904                         }
1905                 }
1906         } while (res == 0);
1907 }
1908
1909 static void bottom_half(struct r8152 *tp)
1910 {
1911         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1912                 return;
1913
1914         if (!test_bit(WORK_ENABLE, &tp->flags))
1915                 return;
1916
1917         /* When link down, the driver would cancel all bulks. */
1918         /* This avoid the re-submitting bulk */
1919         if (!netif_carrier_ok(tp->netdev))
1920                 return;
1921
1922         clear_bit(SCHEDULE_NAPI, &tp->flags);
1923
1924         tx_bottom(tp);
1925 }
1926
1927 static int r8152_poll(struct napi_struct *napi, int budget)
1928 {
1929         struct r8152 *tp = container_of(napi, struct r8152, napi);
1930         int work_done;
1931
1932         work_done = rx_bottom(tp, budget);
1933         bottom_half(tp);
1934
1935         if (work_done < budget) {
1936                 napi_complete(napi);
1937                 if (!list_empty(&tp->rx_done))
1938                         napi_schedule(napi);
1939                 else if (!skb_queue_empty(&tp->tx_queue) &&
1940                          !list_empty(&tp->tx_free))
1941                         napi_schedule(napi);
1942         }
1943
1944         return work_done;
1945 }
1946
1947 static
1948 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1949 {
1950         int ret;
1951
1952         /* The rx would be stopped, so skip submitting */
1953         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1954             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1955                 return 0;
1956
1957         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1958                           agg->head, agg_buf_sz,
1959                           (usb_complete_t)read_bulk_callback, agg);
1960
1961         ret = usb_submit_urb(agg->urb, mem_flags);
1962         if (ret == -ENODEV) {
1963                 set_bit(RTL8152_UNPLUG, &tp->flags);
1964                 netif_device_detach(tp->netdev);
1965         } else if (ret) {
1966                 struct urb *urb = agg->urb;
1967                 unsigned long flags;
1968
1969                 urb->actual_length = 0;
1970                 spin_lock_irqsave(&tp->rx_lock, flags);
1971                 list_add_tail(&agg->list, &tp->rx_done);
1972                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1973
1974                 netif_err(tp, rx_err, tp->netdev,
1975                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1976
1977                 napi_schedule(&tp->napi);
1978         }
1979
1980         return ret;
1981 }
1982
1983 static void rtl_drop_queued_tx(struct r8152 *tp)
1984 {
1985         struct net_device_stats *stats = &tp->netdev->stats;
1986         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1987         struct sk_buff *skb;
1988
1989         if (skb_queue_empty(tx_queue))
1990                 return;
1991
1992         __skb_queue_head_init(&skb_head);
1993         spin_lock_bh(&tx_queue->lock);
1994         skb_queue_splice_init(tx_queue, &skb_head);
1995         spin_unlock_bh(&tx_queue->lock);
1996
1997         while ((skb = __skb_dequeue(&skb_head))) {
1998                 dev_kfree_skb(skb);
1999                 stats->tx_dropped++;
2000         }
2001 }
2002
2003 static void rtl8152_tx_timeout(struct net_device *netdev)
2004 {
2005         struct r8152 *tp = netdev_priv(netdev);
2006
2007         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2008
2009         usb_queue_reset_device(tp->intf);
2010 }
2011
2012 static void rtl8152_set_rx_mode(struct net_device *netdev)
2013 {
2014         struct r8152 *tp = netdev_priv(netdev);
2015
2016         if (netif_carrier_ok(netdev)) {
2017                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2018                 schedule_delayed_work(&tp->schedule, 0);
2019         }
2020 }
2021
2022 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2023 {
2024         struct r8152 *tp = netdev_priv(netdev);
2025         u32 mc_filter[2];       /* Multicast hash filter */
2026         __le32 tmp[2];
2027         u32 ocp_data;
2028
2029         netif_stop_queue(netdev);
2030         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2031         ocp_data &= ~RCR_ACPT_ALL;
2032         ocp_data |= RCR_AB | RCR_APM;
2033
2034         if (netdev->flags & IFF_PROMISC) {
2035                 /* Unconditionally log net taps. */
2036                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2037                 ocp_data |= RCR_AM | RCR_AAP;
2038                 mc_filter[1] = 0xffffffff;
2039                 mc_filter[0] = 0xffffffff;
2040         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2041                    (netdev->flags & IFF_ALLMULTI)) {
2042                 /* Too many to filter perfectly -- accept all multicasts. */
2043                 ocp_data |= RCR_AM;
2044                 mc_filter[1] = 0xffffffff;
2045                 mc_filter[0] = 0xffffffff;
2046         } else {
2047                 struct netdev_hw_addr *ha;
2048
2049                 mc_filter[1] = 0;
2050                 mc_filter[0] = 0;
2051                 netdev_for_each_mc_addr(ha, netdev) {
2052                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2053
2054                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2055                         ocp_data |= RCR_AM;
2056                 }
2057         }
2058
2059         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2060         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2061
2062         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2063         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2064         netif_wake_queue(netdev);
2065 }
2066
2067 static netdev_features_t
2068 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2069                        netdev_features_t features)
2070 {
2071         u32 mss = skb_shinfo(skb)->gso_size;
2072         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2073         int offset = skb_transport_offset(skb);
2074
2075         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2076                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2077         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2078                 features &= ~NETIF_F_GSO_MASK;
2079
2080         return features;
2081 }
2082
2083 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2084                                       struct net_device *netdev)
2085 {
2086         struct r8152 *tp = netdev_priv(netdev);
2087
2088         skb_tx_timestamp(skb);
2089
2090         skb_queue_tail(&tp->tx_queue, skb);
2091
2092         if (!list_empty(&tp->tx_free)) {
2093                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2094                         set_bit(SCHEDULE_NAPI, &tp->flags);
2095                         schedule_delayed_work(&tp->schedule, 0);
2096                 } else {
2097                         usb_mark_last_busy(tp->udev);
2098                         napi_schedule(&tp->napi);
2099                 }
2100         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2101                 netif_stop_queue(netdev);
2102         }
2103
2104         return NETDEV_TX_OK;
2105 }
2106
2107 static void r8152b_reset_packet_filter(struct r8152 *tp)
2108 {
2109         u32     ocp_data;
2110
2111         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2112         ocp_data &= ~FMC_FCR_MCU_EN;
2113         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2114         ocp_data |= FMC_FCR_MCU_EN;
2115         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2116 }
2117
2118 static void rtl8152_nic_reset(struct r8152 *tp)
2119 {
2120         int     i;
2121
2122         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2123
2124         for (i = 0; i < 1000; i++) {
2125                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2126                         break;
2127                 usleep_range(100, 400);
2128         }
2129 }
2130
2131 static void set_tx_qlen(struct r8152 *tp)
2132 {
2133         struct net_device *netdev = tp->netdev;
2134
2135         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2136                                     sizeof(struct tx_desc));
2137 }
2138
2139 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2140 {
2141         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2142 }
2143
2144 static void rtl_set_eee_plus(struct r8152 *tp)
2145 {
2146         u32 ocp_data;
2147         u8 speed;
2148
2149         speed = rtl8152_get_speed(tp);
2150         if (speed & _10bps) {
2151                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2152                 ocp_data |= EEEP_CR_EEEP_TX;
2153                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2154         } else {
2155                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2156                 ocp_data &= ~EEEP_CR_EEEP_TX;
2157                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2158         }
2159 }
2160
2161 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2162 {
2163         u32 ocp_data;
2164
2165         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2166         if (enable)
2167                 ocp_data |= RXDY_GATED_EN;
2168         else
2169                 ocp_data &= ~RXDY_GATED_EN;
2170         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2171 }
2172
2173 static int rtl_start_rx(struct r8152 *tp)
2174 {
2175         int i, ret = 0;
2176
2177         INIT_LIST_HEAD(&tp->rx_done);
2178         for (i = 0; i < RTL8152_MAX_RX; i++) {
2179                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2180                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2181                 if (ret)
2182                         break;
2183         }
2184
2185         if (ret && ++i < RTL8152_MAX_RX) {
2186                 struct list_head rx_queue;
2187                 unsigned long flags;
2188
2189                 INIT_LIST_HEAD(&rx_queue);
2190
2191                 do {
2192                         struct rx_agg *agg = &tp->rx_info[i++];
2193                         struct urb *urb = agg->urb;
2194
2195                         urb->actual_length = 0;
2196                         list_add_tail(&agg->list, &rx_queue);
2197                 } while (i < RTL8152_MAX_RX);
2198
2199                 spin_lock_irqsave(&tp->rx_lock, flags);
2200                 list_splice_tail(&rx_queue, &tp->rx_done);
2201                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2202         }
2203
2204         return ret;
2205 }
2206
2207 static int rtl_stop_rx(struct r8152 *tp)
2208 {
2209         int i;
2210
2211         for (i = 0; i < RTL8152_MAX_RX; i++)
2212                 usb_kill_urb(tp->rx_info[i].urb);
2213
2214         while (!skb_queue_empty(&tp->rx_queue))
2215                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2216
2217         return 0;
2218 }
2219
2220 static int rtl_enable(struct r8152 *tp)
2221 {
2222         u32 ocp_data;
2223
2224         r8152b_reset_packet_filter(tp);
2225
2226         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2227         ocp_data |= CR_RE | CR_TE;
2228         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2229
2230         rxdy_gated_en(tp, false);
2231
2232         return 0;
2233 }
2234
2235 static int rtl8152_enable(struct r8152 *tp)
2236 {
2237         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2238                 return -ENODEV;
2239
2240         set_tx_qlen(tp);
2241         rtl_set_eee_plus(tp);
2242
2243         return rtl_enable(tp);
2244 }
2245
2246 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2247 {
2248         u32 ocp_data = tp->coalesce / 8;
2249
2250         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2251 }
2252
2253 static void r8153_set_rx_early_size(struct r8152 *tp)
2254 {
2255         u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2256
2257         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2258 }
2259
2260 static int rtl8153_enable(struct r8152 *tp)
2261 {
2262         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2263                 return -ENODEV;
2264
2265         usb_disable_lpm(tp->udev);
2266         set_tx_qlen(tp);
2267         rtl_set_eee_plus(tp);
2268         r8153_set_rx_early_timeout(tp);
2269         r8153_set_rx_early_size(tp);
2270
2271         return rtl_enable(tp);
2272 }
2273
2274 static void rtl_disable(struct r8152 *tp)
2275 {
2276         u32 ocp_data;
2277         int i;
2278
2279         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2280                 rtl_drop_queued_tx(tp);
2281                 return;
2282         }
2283
2284         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2285         ocp_data &= ~RCR_ACPT_ALL;
2286         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2287
2288         rtl_drop_queued_tx(tp);
2289
2290         for (i = 0; i < RTL8152_MAX_TX; i++)
2291                 usb_kill_urb(tp->tx_info[i].urb);
2292
2293         rxdy_gated_en(tp, true);
2294
2295         for (i = 0; i < 1000; i++) {
2296                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2297                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2298                         break;
2299                 usleep_range(1000, 2000);
2300         }
2301
2302         for (i = 0; i < 1000; i++) {
2303                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2304                         break;
2305                 usleep_range(1000, 2000);
2306         }
2307
2308         rtl_stop_rx(tp);
2309
2310         rtl8152_nic_reset(tp);
2311 }
2312
2313 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2314 {
2315         u32 ocp_data;
2316
2317         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2318         if (enable)
2319                 ocp_data |= POWER_CUT;
2320         else
2321                 ocp_data &= ~POWER_CUT;
2322         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2323
2324         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2325         ocp_data &= ~RESUME_INDICATE;
2326         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2327 }
2328
2329 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2330 {
2331         u32 ocp_data;
2332
2333         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2334         if (enable)
2335                 ocp_data |= CPCR_RX_VLAN;
2336         else
2337                 ocp_data &= ~CPCR_RX_VLAN;
2338         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2339 }
2340
2341 static int rtl8152_set_features(struct net_device *dev,
2342                                 netdev_features_t features)
2343 {
2344         netdev_features_t changed = features ^ dev->features;
2345         struct r8152 *tp = netdev_priv(dev);
2346         int ret;
2347
2348         ret = usb_autopm_get_interface(tp->intf);
2349         if (ret < 0)
2350                 goto out;
2351
2352         mutex_lock(&tp->control);
2353
2354         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2355                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2356                         rtl_rx_vlan_en(tp, true);
2357                 else
2358                         rtl_rx_vlan_en(tp, false);
2359         }
2360
2361         mutex_unlock(&tp->control);
2362
2363         usb_autopm_put_interface(tp->intf);
2364
2365 out:
2366         return ret;
2367 }
2368
2369 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2370
2371 static u32 __rtl_get_wol(struct r8152 *tp)
2372 {
2373         u32 ocp_data;
2374         u32 wolopts = 0;
2375
2376         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2377         if (ocp_data & LINK_ON_WAKE_EN)
2378                 wolopts |= WAKE_PHY;
2379
2380         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2381         if (ocp_data & UWF_EN)
2382                 wolopts |= WAKE_UCAST;
2383         if (ocp_data & BWF_EN)
2384                 wolopts |= WAKE_BCAST;
2385         if (ocp_data & MWF_EN)
2386                 wolopts |= WAKE_MCAST;
2387
2388         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2389         if (ocp_data & MAGIC_EN)
2390                 wolopts |= WAKE_MAGIC;
2391
2392         return wolopts;
2393 }
2394
2395 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2396 {
2397         u32 ocp_data;
2398
2399         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2400
2401         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2402         ocp_data &= ~LINK_ON_WAKE_EN;
2403         if (wolopts & WAKE_PHY)
2404                 ocp_data |= LINK_ON_WAKE_EN;
2405         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2406
2407         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2408         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2409         if (wolopts & WAKE_UCAST)
2410                 ocp_data |= UWF_EN;
2411         if (wolopts & WAKE_BCAST)
2412                 ocp_data |= BWF_EN;
2413         if (wolopts & WAKE_MCAST)
2414                 ocp_data |= MWF_EN;
2415         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2416
2417         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2418
2419         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2420         ocp_data &= ~MAGIC_EN;
2421         if (wolopts & WAKE_MAGIC)
2422                 ocp_data |= MAGIC_EN;
2423         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2424
2425         if (wolopts & WAKE_ANY)
2426                 device_set_wakeup_enable(&tp->udev->dev, true);
2427         else
2428                 device_set_wakeup_enable(&tp->udev->dev, false);
2429 }
2430
2431 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2432 {
2433         u8 u1u2[8];
2434
2435         if (enable)
2436                 memset(u1u2, 0xff, sizeof(u1u2));
2437         else
2438                 memset(u1u2, 0x00, sizeof(u1u2));
2439
2440         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2441 }
2442
2443 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2444 {
2445         u32 ocp_data;
2446
2447         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2448         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2449                 ocp_data |= U2P3_ENABLE;
2450         else
2451                 ocp_data &= ~U2P3_ENABLE;
2452         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2453 }
2454
2455 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2456 {
2457         u32 ocp_data;
2458
2459         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2460         if (enable)
2461                 ocp_data |= PWR_EN | PHASE2_EN;
2462         else
2463                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2464         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2465
2466         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2467         ocp_data &= ~PCUT_STATUS;
2468         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2469 }
2470
2471 static bool rtl_can_wakeup(struct r8152 *tp)
2472 {
2473         struct usb_device *udev = tp->udev;
2474
2475         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2476 }
2477
2478 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2479 {
2480         if (enable) {
2481                 u32 ocp_data;
2482
2483                 __rtl_set_wol(tp, WAKE_ANY);
2484
2485                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2486
2487                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2488                 ocp_data |= LINK_OFF_WAKE_EN;
2489                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2490
2491                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2492         } else {
2493                 u32 ocp_data;
2494
2495                 __rtl_set_wol(tp, tp->saved_wolopts);
2496
2497                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2498
2499                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2500                 ocp_data &= ~LINK_OFF_WAKE_EN;
2501                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2502
2503                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2504         }
2505 }
2506
2507 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2508 {
2509         rtl_runtime_suspend_enable(tp, enable);
2510
2511         if (enable) {
2512                 r8153_u1u2en(tp, false);
2513                 r8153_u2p3en(tp, false);
2514         } else {
2515                 r8153_u2p3en(tp, true);
2516                 r8153_u1u2en(tp, true);
2517         }
2518 }
2519
2520 static void r8153_teredo_off(struct r8152 *tp)
2521 {
2522         u32 ocp_data;
2523
2524         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2525         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2526         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2527
2528         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2529         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2530         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2531 }
2532
2533 static void rtl_reset_bmu(struct r8152 *tp)
2534 {
2535         u32 ocp_data;
2536
2537         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2538         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2539         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2540         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2541         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2542 }
2543
2544 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2545 {
2546         if (enable) {
2547                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2548                                                     LINKENA | DIS_SDSAVE);
2549         } else {
2550                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2551                                                     DIS_SDSAVE);
2552                 msleep(20);
2553         }
2554 }
2555
2556 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2557 {
2558         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2559         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2560         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2561 }
2562
2563 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2564 {
2565         u16 data;
2566
2567         r8152_mmd_indirect(tp, dev, reg);
2568         data = ocp_reg_read(tp, OCP_EEE_DATA);
2569         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2570
2571         return data;
2572 }
2573
2574 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2575 {
2576         r8152_mmd_indirect(tp, dev, reg);
2577         ocp_reg_write(tp, OCP_EEE_DATA, data);
2578         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2579 }
2580
2581 static void r8152_eee_en(struct r8152 *tp, bool enable)
2582 {
2583         u16 config1, config2, config3;
2584         u32 ocp_data;
2585
2586         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2587         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2588         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2589         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2590
2591         if (enable) {
2592                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2593                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2594                 config1 |= sd_rise_time(1);
2595                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2596                 config3 |= fast_snr(42);
2597         } else {
2598                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2599                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2600                              RX_QUIET_EN);
2601                 config1 |= sd_rise_time(7);
2602                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2603                 config3 |= fast_snr(511);
2604         }
2605
2606         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2607         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2608         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2609         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2610 }
2611
2612 static void r8152b_enable_eee(struct r8152 *tp)
2613 {
2614         r8152_eee_en(tp, true);
2615         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2616 }
2617
2618 static void r8152b_enable_fc(struct r8152 *tp)
2619 {
2620         u16 anar;
2621
2622         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2623         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2624         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2625 }
2626
2627 static void rtl8152_disable(struct r8152 *tp)
2628 {
2629         r8152_aldps_en(tp, false);
2630         rtl_disable(tp);
2631         r8152_aldps_en(tp, true);
2632 }
2633
2634 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2635 {
2636         r8152b_enable_eee(tp);
2637         r8152_aldps_en(tp, true);
2638         r8152b_enable_fc(tp);
2639
2640         set_bit(PHY_RESET, &tp->flags);
2641 }
2642
2643 static void r8152b_exit_oob(struct r8152 *tp)
2644 {
2645         u32 ocp_data;
2646         int i;
2647
2648         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2649         ocp_data &= ~RCR_ACPT_ALL;
2650         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2651
2652         rxdy_gated_en(tp, true);
2653         r8153_teredo_off(tp);
2654         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2655         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2656
2657         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2658         ocp_data &= ~NOW_IS_OOB;
2659         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2660
2661         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2662         ocp_data &= ~MCU_BORW_EN;
2663         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2664
2665         for (i = 0; i < 1000; i++) {
2666                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2667                 if (ocp_data & LINK_LIST_READY)
2668                         break;
2669                 usleep_range(1000, 2000);
2670         }
2671
2672         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2673         ocp_data |= RE_INIT_LL;
2674         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2675
2676         for (i = 0; i < 1000; i++) {
2677                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2678                 if (ocp_data & LINK_LIST_READY)
2679                         break;
2680                 usleep_range(1000, 2000);
2681         }
2682
2683         rtl8152_nic_reset(tp);
2684
2685         /* rx share fifo credit full threshold */
2686         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2687
2688         if (tp->udev->speed == USB_SPEED_FULL ||
2689             tp->udev->speed == USB_SPEED_LOW) {
2690                 /* rx share fifo credit near full threshold */
2691                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2692                                 RXFIFO_THR2_FULL);
2693                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2694                                 RXFIFO_THR3_FULL);
2695         } else {
2696                 /* rx share fifo credit near full threshold */
2697                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2698                                 RXFIFO_THR2_HIGH);
2699                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2700                                 RXFIFO_THR3_HIGH);
2701         }
2702
2703         /* TX share fifo free credit full threshold */
2704         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2705
2706         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2707         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2708         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2709                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2710
2711         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2712
2713         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2714
2715         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2716         ocp_data |= TCR0_AUTO_FIFO;
2717         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2718 }
2719
2720 static void r8152b_enter_oob(struct r8152 *tp)
2721 {
2722         u32 ocp_data;
2723         int i;
2724
2725         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2726         ocp_data &= ~NOW_IS_OOB;
2727         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2728
2729         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2730         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2731         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2732
2733         rtl_disable(tp);
2734
2735         for (i = 0; i < 1000; i++) {
2736                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2737                 if (ocp_data & LINK_LIST_READY)
2738                         break;
2739                 usleep_range(1000, 2000);
2740         }
2741
2742         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2743         ocp_data |= RE_INIT_LL;
2744         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2745
2746         for (i = 0; i < 1000; i++) {
2747                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2748                 if (ocp_data & LINK_LIST_READY)
2749                         break;
2750                 usleep_range(1000, 2000);
2751         }
2752
2753         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2754
2755         rtl_rx_vlan_en(tp, true);
2756
2757         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2758         ocp_data |= ALDPS_PROXY_MODE;
2759         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2760
2761         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2762         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2763         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2764
2765         rxdy_gated_en(tp, false);
2766
2767         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2768         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2769         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2770 }
2771
2772 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2773 {
2774         u16 data;
2775
2776         data = ocp_reg_read(tp, OCP_POWER_CFG);
2777         if (enable) {
2778                 data |= EN_ALDPS;
2779                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2780         } else {
2781                 data &= ~EN_ALDPS;
2782                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2783                 msleep(20);
2784         }
2785 }
2786
2787 static void r8153_eee_en(struct r8152 *tp, bool enable)
2788 {
2789         u32 ocp_data;
2790         u16 config;
2791
2792         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2793         config = ocp_reg_read(tp, OCP_EEE_CFG);
2794
2795         if (enable) {
2796                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2797                 config |= EEE10_EN;
2798         } else {
2799                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2800                 config &= ~EEE10_EN;
2801         }
2802
2803         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2804         ocp_reg_write(tp, OCP_EEE_CFG, config);
2805 }
2806
2807 static void r8153_hw_phy_cfg(struct r8152 *tp)
2808 {
2809         u32 ocp_data;
2810         u16 data;
2811
2812         /* disable ALDPS before updating the PHY parameters */
2813         r8153_aldps_en(tp, false);
2814
2815         /* disable EEE before updating the PHY parameters */
2816         r8153_eee_en(tp, false);
2817         ocp_reg_write(tp, OCP_EEE_ADV, 0);
2818
2819         if (tp->version == RTL_VER_03) {
2820                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2821                 data &= ~CTAP_SHORT_EN;
2822                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2823         }
2824
2825         data = ocp_reg_read(tp, OCP_POWER_CFG);
2826         data |= EEE_CLKDIV_EN;
2827         ocp_reg_write(tp, OCP_POWER_CFG, data);
2828
2829         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2830         data |= EN_10M_BGOFF;
2831         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2832         data = ocp_reg_read(tp, OCP_POWER_CFG);
2833         data |= EN_10M_PLLOFF;
2834         ocp_reg_write(tp, OCP_POWER_CFG, data);
2835         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2836
2837         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2838         ocp_data |= PFM_PWM_SWITCH;
2839         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2840
2841         /* Enable LPF corner auto tune */
2842         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2843
2844         /* Adjust 10M Amplitude */
2845         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2846         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2847
2848         r8153_eee_en(tp, true);
2849         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2850
2851         r8153_aldps_en(tp, true);
2852         r8152b_enable_fc(tp);
2853
2854         set_bit(PHY_RESET, &tp->flags);
2855 }
2856
2857 static void r8153_first_init(struct r8152 *tp)
2858 {
2859         u32 ocp_data;
2860         int i;
2861
2862         rxdy_gated_en(tp, true);
2863         r8153_teredo_off(tp);
2864
2865         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2866         ocp_data &= ~RCR_ACPT_ALL;
2867         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2868
2869         rtl8152_nic_reset(tp);
2870         rtl_reset_bmu(tp);
2871
2872         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2873         ocp_data &= ~NOW_IS_OOB;
2874         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2875
2876         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2877         ocp_data &= ~MCU_BORW_EN;
2878         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2879
2880         for (i = 0; i < 1000; i++) {
2881                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2882                 if (ocp_data & LINK_LIST_READY)
2883                         break;
2884                 usleep_range(1000, 2000);
2885         }
2886
2887         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2888         ocp_data |= RE_INIT_LL;
2889         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2890
2891         for (i = 0; i < 1000; i++) {
2892                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2893                 if (ocp_data & LINK_LIST_READY)
2894                         break;
2895                 usleep_range(1000, 2000);
2896         }
2897
2898         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2899
2900         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2901         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2902         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2903
2904         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2905         ocp_data |= TCR0_AUTO_FIFO;
2906         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2907
2908         rtl8152_nic_reset(tp);
2909
2910         /* rx share fifo credit full threshold */
2911         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2912         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2913         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2914         /* TX share fifo free credit full threshold */
2915         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2916
2917         /* rx aggregation */
2918         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2919         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2920         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2921 }
2922
2923 static void r8153_enter_oob(struct r8152 *tp)
2924 {
2925         u32 ocp_data;
2926         int i;
2927
2928         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2929         ocp_data &= ~NOW_IS_OOB;
2930         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2931
2932         rtl_disable(tp);
2933         rtl_reset_bmu(tp);
2934
2935         for (i = 0; i < 1000; i++) {
2936                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2937                 if (ocp_data & LINK_LIST_READY)
2938                         break;
2939                 usleep_range(1000, 2000);
2940         }
2941
2942         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2943         ocp_data |= RE_INIT_LL;
2944         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2945
2946         for (i = 0; i < 1000; i++) {
2947                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2948                 if (ocp_data & LINK_LIST_READY)
2949                         break;
2950                 usleep_range(1000, 2000);
2951         }
2952
2953         ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2954         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2955
2956         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2957         ocp_data &= ~TEREDO_WAKE_MASK;
2958         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2959
2960         rtl_rx_vlan_en(tp, true);
2961
2962         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2963         ocp_data |= ALDPS_PROXY_MODE;
2964         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2965
2966         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2967         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2968         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2969
2970         rxdy_gated_en(tp, false);
2971
2972         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2973         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2974         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2975 }
2976
2977 static void rtl8153_disable(struct r8152 *tp)
2978 {
2979         r8153_aldps_en(tp, false);
2980         rtl_disable(tp);
2981         rtl_reset_bmu(tp);
2982         r8153_aldps_en(tp, true);
2983         usb_enable_lpm(tp->udev);
2984 }
2985
2986 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2987 {
2988         u16 bmcr, anar, gbcr;
2989         int ret = 0;
2990
2991         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2992         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2993                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2994         if (tp->mii.supports_gmii) {
2995                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2996                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2997         } else {
2998                 gbcr = 0;
2999         }
3000
3001         if (autoneg == AUTONEG_DISABLE) {
3002                 if (speed == SPEED_10) {
3003                         bmcr = 0;
3004                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3005                 } else if (speed == SPEED_100) {
3006                         bmcr = BMCR_SPEED100;
3007                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3008                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3009                         bmcr = BMCR_SPEED1000;
3010                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3011                 } else {
3012                         ret = -EINVAL;
3013                         goto out;
3014                 }
3015
3016                 if (duplex == DUPLEX_FULL)
3017                         bmcr |= BMCR_FULLDPLX;
3018         } else {
3019                 if (speed == SPEED_10) {
3020                         if (duplex == DUPLEX_FULL)
3021                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3022                         else
3023                                 anar |= ADVERTISE_10HALF;
3024                 } else if (speed == SPEED_100) {
3025                         if (duplex == DUPLEX_FULL) {
3026                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3027                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3028                         } else {
3029                                 anar |= ADVERTISE_10HALF;
3030                                 anar |= ADVERTISE_100HALF;
3031                         }
3032                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3033                         if (duplex == DUPLEX_FULL) {
3034                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3035                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3036                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3037                         } else {
3038                                 anar |= ADVERTISE_10HALF;
3039                                 anar |= ADVERTISE_100HALF;
3040                                 gbcr |= ADVERTISE_1000HALF;
3041                         }
3042                 } else {
3043                         ret = -EINVAL;
3044                         goto out;
3045                 }
3046
3047                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3048         }
3049
3050         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3051                 bmcr |= BMCR_RESET;
3052
3053         if (tp->mii.supports_gmii)
3054                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3055
3056         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3057         r8152_mdio_write(tp, MII_BMCR, bmcr);
3058
3059         if (bmcr & BMCR_RESET) {
3060                 int i;
3061
3062                 for (i = 0; i < 50; i++) {
3063                         msleep(20);
3064                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3065                                 break;
3066                 }
3067         }
3068
3069 out:
3070         return ret;
3071 }
3072
3073 static void rtl8152_up(struct r8152 *tp)
3074 {
3075         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3076                 return;
3077
3078         r8152_aldps_en(tp, false);
3079         r8152b_exit_oob(tp);
3080         r8152_aldps_en(tp, true);
3081 }
3082
3083 static void rtl8152_down(struct r8152 *tp)
3084 {
3085         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3086                 rtl_drop_queued_tx(tp);
3087                 return;
3088         }
3089
3090         r8152_power_cut_en(tp, false);
3091         r8152_aldps_en(tp, false);
3092         r8152b_enter_oob(tp);
3093         r8152_aldps_en(tp, true);
3094 }
3095
3096 static void rtl8153_up(struct r8152 *tp)
3097 {
3098         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3099                 return;
3100
3101         r8153_u1u2en(tp, false);
3102         r8153_aldps_en(tp, false);
3103         r8153_first_init(tp);
3104         r8153_aldps_en(tp, true);
3105         r8153_u2p3en(tp, true);
3106         r8153_u1u2en(tp, true);
3107         usb_enable_lpm(tp->udev);
3108 }
3109
3110 static void rtl8153_down(struct r8152 *tp)
3111 {
3112         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3113                 rtl_drop_queued_tx(tp);
3114                 return;
3115         }
3116
3117         r8153_u1u2en(tp, false);
3118         r8153_u2p3en(tp, false);
3119         r8153_power_cut_en(tp, false);
3120         r8153_aldps_en(tp, false);
3121         r8153_enter_oob(tp);
3122         r8153_aldps_en(tp, true);
3123 }
3124
3125 static bool rtl8152_in_nway(struct r8152 *tp)
3126 {
3127         u16 nway_state;
3128
3129         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3130         tp->ocp_base = 0x2000;
3131         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
3132         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3133
3134         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3135         if (nway_state & 0xc000)
3136                 return false;
3137         else
3138                 return true;
3139 }
3140
3141 static bool rtl8153_in_nway(struct r8152 *tp)
3142 {
3143         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3144
3145         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3146                 return false;
3147         else
3148                 return true;
3149 }
3150
3151 static void set_carrier(struct r8152 *tp)
3152 {
3153         struct net_device *netdev = tp->netdev;
3154         struct napi_struct *napi = &tp->napi;
3155         u8 speed;
3156
3157         speed = rtl8152_get_speed(tp);
3158
3159         if (speed & LINK_STATUS) {
3160                 if (!netif_carrier_ok(netdev)) {
3161                         tp->rtl_ops.enable(tp);
3162                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3163                         netif_stop_queue(netdev);
3164                         napi_disable(napi);
3165                         netif_carrier_on(netdev);
3166                         rtl_start_rx(tp);
3167                         napi_enable(&tp->napi);
3168                         netif_wake_queue(netdev);
3169                         netif_info(tp, link, netdev, "carrier on\n");
3170                 } else if (netif_queue_stopped(netdev) &&
3171                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3172                         netif_wake_queue(netdev);
3173                 }
3174         } else {
3175                 if (netif_carrier_ok(netdev)) {
3176                         netif_carrier_off(netdev);
3177                         napi_disable(napi);
3178                         tp->rtl_ops.disable(tp);
3179                         napi_enable(napi);
3180                         netif_info(tp, link, netdev, "carrier off\n");
3181                 }
3182         }
3183 }
3184
3185 static void rtl_work_func_t(struct work_struct *work)
3186 {
3187         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3188
3189         /* If the device is unplugged or !netif_running(), the workqueue
3190          * doesn't need to wake the device, and could return directly.
3191          */
3192         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3193                 return;
3194
3195         if (usb_autopm_get_interface(tp->intf) < 0)
3196                 return;
3197
3198         if (!test_bit(WORK_ENABLE, &tp->flags))
3199                 goto out1;
3200
3201         if (!mutex_trylock(&tp->control)) {
3202                 schedule_delayed_work(&tp->schedule, 0);
3203                 goto out1;
3204         }
3205
3206         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3207                 set_carrier(tp);
3208
3209         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3210                 _rtl8152_set_rx_mode(tp->netdev);
3211
3212         /* don't schedule napi before linking */
3213         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3214             netif_carrier_ok(tp->netdev))
3215                 napi_schedule(&tp->napi);
3216
3217         mutex_unlock(&tp->control);
3218
3219 out1:
3220         usb_autopm_put_interface(tp->intf);
3221 }
3222
3223 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3224 {
3225         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3226
3227         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3228                 return;
3229
3230         if (usb_autopm_get_interface(tp->intf) < 0)
3231                 return;
3232
3233         mutex_lock(&tp->control);
3234
3235         tp->rtl_ops.hw_phy_cfg(tp);
3236
3237         rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3238
3239         mutex_unlock(&tp->control);
3240
3241         usb_autopm_put_interface(tp->intf);
3242 }
3243
3244 #ifdef CONFIG_PM_SLEEP
3245 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3246                         void *data)
3247 {
3248         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3249
3250         switch (action) {
3251         case PM_HIBERNATION_PREPARE:
3252         case PM_SUSPEND_PREPARE:
3253                 usb_autopm_get_interface(tp->intf);
3254                 break;
3255
3256         case PM_POST_HIBERNATION:
3257         case PM_POST_SUSPEND:
3258                 usb_autopm_put_interface(tp->intf);
3259                 break;
3260
3261         case PM_POST_RESTORE:
3262         case PM_RESTORE_PREPARE:
3263         default:
3264                 break;
3265         }
3266
3267         return NOTIFY_DONE;
3268 }
3269 #endif
3270
3271 static int rtl8152_open(struct net_device *netdev)
3272 {
3273         struct r8152 *tp = netdev_priv(netdev);
3274         int res = 0;
3275
3276         res = alloc_all_mem(tp);
3277         if (res)
3278                 goto out;
3279
3280         res = usb_autopm_get_interface(tp->intf);
3281         if (res < 0)
3282                 goto out_free;
3283
3284         mutex_lock(&tp->control);
3285
3286         tp->rtl_ops.up(tp);
3287
3288         netif_carrier_off(netdev);
3289         netif_start_queue(netdev);
3290         set_bit(WORK_ENABLE, &tp->flags);
3291
3292         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3293         if (res) {
3294                 if (res == -ENODEV)
3295                         netif_device_detach(tp->netdev);
3296                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3297                            res);
3298                 goto out_unlock;
3299         }
3300         napi_enable(&tp->napi);
3301
3302         mutex_unlock(&tp->control);
3303
3304         usb_autopm_put_interface(tp->intf);
3305 #ifdef CONFIG_PM_SLEEP
3306         tp->pm_notifier.notifier_call = rtl_notifier;
3307         register_pm_notifier(&tp->pm_notifier);
3308 #endif
3309         return 0;
3310
3311 out_unlock:
3312         mutex_unlock(&tp->control);
3313         usb_autopm_put_interface(tp->intf);
3314 out_free:
3315         free_all_mem(tp);
3316 out:
3317         return res;
3318 }
3319
3320 static int rtl8152_close(struct net_device *netdev)
3321 {
3322         struct r8152 *tp = netdev_priv(netdev);
3323         int res = 0;
3324
3325 #ifdef CONFIG_PM_SLEEP
3326         unregister_pm_notifier(&tp->pm_notifier);
3327 #endif
3328         napi_disable(&tp->napi);
3329         clear_bit(WORK_ENABLE, &tp->flags);
3330         usb_kill_urb(tp->intr_urb);
3331         cancel_delayed_work_sync(&tp->schedule);
3332         netif_stop_queue(netdev);
3333
3334         res = usb_autopm_get_interface(tp->intf);
3335         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3336                 rtl_drop_queued_tx(tp);
3337                 rtl_stop_rx(tp);
3338         } else {
3339                 mutex_lock(&tp->control);
3340
3341                 tp->rtl_ops.down(tp);
3342
3343                 mutex_unlock(&tp->control);
3344
3345                 usb_autopm_put_interface(tp->intf);
3346         }
3347
3348         free_all_mem(tp);
3349
3350         return res;
3351 }
3352
3353 static void rtl_tally_reset(struct r8152 *tp)
3354 {
3355         u32 ocp_data;
3356
3357         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3358         ocp_data |= TALLY_RESET;
3359         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3360 }
3361
3362 static void r8152b_init(struct r8152 *tp)
3363 {
3364         u32 ocp_data;
3365         u16 data;
3366
3367         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3368                 return;
3369
3370         data = r8152_mdio_read(tp, MII_BMCR);
3371         if (data & BMCR_PDOWN) {
3372                 data &= ~BMCR_PDOWN;
3373                 r8152_mdio_write(tp, MII_BMCR, data);
3374         }
3375
3376         r8152_aldps_en(tp, false);
3377
3378         if (tp->version == RTL_VER_01) {
3379                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3380                 ocp_data &= ~LED_MODE_MASK;
3381                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3382         }
3383
3384         r8152_power_cut_en(tp, false);
3385
3386         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3387         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3388         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3389         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3390         ocp_data &= ~MCU_CLK_RATIO_MASK;
3391         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3392         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3393         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3394                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3395         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3396
3397         rtl_tally_reset(tp);
3398
3399         /* enable rx aggregation */
3400         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3401         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3402         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3403 }
3404
3405 static void r8153_init(struct r8152 *tp)
3406 {
3407         u32 ocp_data;
3408         u16 data;
3409         int i;
3410
3411         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3412                 return;
3413
3414         r8153_u1u2en(tp, false);
3415
3416         for (i = 0; i < 500; i++) {
3417                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3418                     AUTOLOAD_DONE)
3419                         break;
3420                 msleep(20);
3421         }
3422
3423         for (i = 0; i < 500; i++) {
3424                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3425                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3426                         break;
3427                 msleep(20);
3428         }
3429
3430         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3431             tp->version == RTL_VER_05)
3432                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3433
3434         data = r8152_mdio_read(tp, MII_BMCR);
3435         if (data & BMCR_PDOWN) {
3436                 data &= ~BMCR_PDOWN;
3437                 r8152_mdio_write(tp, MII_BMCR, data);
3438         }
3439
3440         for (i = 0; i < 500; i++) {
3441                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3442                 if (ocp_data == PHY_STAT_LAN_ON)
3443                         break;
3444                 msleep(20);
3445         }
3446
3447         usb_disable_lpm(tp->udev);
3448         r8153_u2p3en(tp, false);
3449
3450         if (tp->version == RTL_VER_04) {
3451                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3452                 ocp_data &= ~pwd_dn_scale_mask;
3453                 ocp_data |= pwd_dn_scale(96);
3454                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3455
3456                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3457                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3458                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3459         } else if (tp->version == RTL_VER_05) {
3460                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3461                 ocp_data &= ~ECM_ALDPS;
3462                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3463
3464                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3465                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3466                         ocp_data &= ~DYNAMIC_BURST;
3467                 else
3468                         ocp_data |= DYNAMIC_BURST;
3469                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3470         } else if (tp->version == RTL_VER_06) {
3471                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3472                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3473                         ocp_data &= ~DYNAMIC_BURST;
3474                 else
3475                         ocp_data |= DYNAMIC_BURST;
3476                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3477         }
3478
3479         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3480         ocp_data |= EP4_FULL_FC;
3481         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3482
3483         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3484         ocp_data &= ~TIMER11_EN;
3485         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3486
3487         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3488         ocp_data &= ~LED_MODE_MASK;
3489         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3490
3491         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3492         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3493                 ocp_data |= LPM_TIMER_500MS;
3494         else
3495                 ocp_data |= LPM_TIMER_500US;
3496         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3497
3498         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3499         ocp_data &= ~SEN_VAL_MASK;
3500         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3501         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3502
3503         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3504
3505         r8153_power_cut_en(tp, false);
3506         r8153_u1u2en(tp, true);
3507
3508         /* MAC clock speed down */
3509         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3510         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3511         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3512         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3513
3514         rtl_tally_reset(tp);
3515         r8153_u2p3en(tp, true);
3516 }
3517
3518 static int rtl8152_pre_reset(struct usb_interface *intf)
3519 {
3520         struct r8152 *tp = usb_get_intfdata(intf);
3521         struct net_device *netdev;
3522
3523         if (!tp)
3524                 return 0;
3525
3526         netdev = tp->netdev;
3527         if (!netif_running(netdev))
3528                 return 0;
3529
3530         netif_stop_queue(netdev);
3531         napi_disable(&tp->napi);
3532         clear_bit(WORK_ENABLE, &tp->flags);
3533         usb_kill_urb(tp->intr_urb);
3534         cancel_delayed_work_sync(&tp->schedule);
3535         if (netif_carrier_ok(netdev)) {
3536                 mutex_lock(&tp->control);
3537                 tp->rtl_ops.disable(tp);
3538                 mutex_unlock(&tp->control);
3539         }
3540
3541         return 0;
3542 }
3543
3544 static int rtl8152_post_reset(struct usb_interface *intf)
3545 {
3546         struct r8152 *tp = usb_get_intfdata(intf);
3547         struct net_device *netdev;
3548
3549         if (!tp)
3550                 return 0;
3551
3552         netdev = tp->netdev;
3553         if (!netif_running(netdev))
3554                 return 0;
3555
3556         set_bit(WORK_ENABLE, &tp->flags);
3557         if (netif_carrier_ok(netdev)) {
3558                 mutex_lock(&tp->control);
3559                 tp->rtl_ops.enable(tp);
3560                 rtl_start_rx(tp);
3561                 rtl8152_set_rx_mode(netdev);
3562                 mutex_unlock(&tp->control);
3563         }
3564
3565         napi_enable(&tp->napi);
3566         netif_wake_queue(netdev);
3567         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3568
3569         if (!list_empty(&tp->rx_done))
3570                 napi_schedule(&tp->napi);
3571
3572         return 0;
3573 }
3574
3575 static bool delay_autosuspend(struct r8152 *tp)
3576 {
3577         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3578         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3579
3580         /* This means a linking change occurs and the driver doesn't detect it,
3581          * yet. If the driver has disabled tx/rx and hw is linking on, the
3582          * device wouldn't wake up by receiving any packet.
3583          */
3584         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3585                 return true;
3586
3587         /* If the linking down is occurred by nway, the device may miss the
3588          * linking change event. And it wouldn't wake when linking on.
3589          */
3590         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3591                 return true;
3592         else if (!skb_queue_empty(&tp->tx_queue))
3593                 return true;
3594         else
3595                 return false;
3596 }
3597
3598 static int rtl8152_runtime_suspend(struct r8152 *tp)
3599 {
3600         struct net_device *netdev = tp->netdev;
3601         int ret = 0;
3602
3603         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3604         smp_mb__after_atomic();
3605
3606         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3607                 u32 rcr = 0;
3608
3609                 if (delay_autosuspend(tp)) {
3610                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3611                         smp_mb__after_atomic();
3612                         ret = -EBUSY;
3613                         goto out1;
3614                 }
3615
3616                 if (netif_carrier_ok(netdev)) {
3617                         u32 ocp_data;
3618
3619                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3620                         ocp_data = rcr & ~RCR_ACPT_ALL;
3621                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3622                         rxdy_gated_en(tp, true);
3623                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3624                                                  PLA_OOB_CTRL);
3625                         if (!(ocp_data & RXFIFO_EMPTY)) {
3626                                 rxdy_gated_en(tp, false);
3627                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3628                                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3629                                 smp_mb__after_atomic();
3630                                 ret = -EBUSY;
3631                                 goto out1;
3632                         }
3633                 }
3634
3635                 clear_bit(WORK_ENABLE, &tp->flags);
3636                 usb_kill_urb(tp->intr_urb);
3637
3638                 tp->rtl_ops.autosuspend_en(tp, true);
3639
3640                 if (netif_carrier_ok(netdev)) {
3641                         struct napi_struct *napi = &tp->napi;
3642
3643                         napi_disable(napi);
3644                         rtl_stop_rx(tp);
3645                         rxdy_gated_en(tp, false);
3646                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3647                         napi_enable(napi);
3648                 }
3649         }
3650
3651 out1:
3652         return ret;
3653 }
3654
3655 static int rtl8152_system_suspend(struct r8152 *tp)
3656 {
3657         struct net_device *netdev = tp->netdev;
3658         int ret = 0;
3659
3660         netif_device_detach(netdev);
3661
3662         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3663                 struct napi_struct *napi = &tp->napi;
3664
3665                 clear_bit(WORK_ENABLE, &tp->flags);
3666                 usb_kill_urb(tp->intr_urb);
3667                 napi_disable(napi);
3668                 cancel_delayed_work_sync(&tp->schedule);
3669                 tp->rtl_ops.down(tp);
3670                 napi_enable(napi);
3671         }
3672
3673         return ret;
3674 }
3675
3676 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3677 {
3678         struct r8152 *tp = usb_get_intfdata(intf);
3679         int ret;
3680
3681         mutex_lock(&tp->control);
3682
3683         if (PMSG_IS_AUTO(message))
3684                 ret = rtl8152_runtime_suspend(tp);
3685         else
3686                 ret = rtl8152_system_suspend(tp);
3687
3688         mutex_unlock(&tp->control);
3689
3690         return ret;
3691 }
3692
3693 static int rtl8152_resume(struct usb_interface *intf)
3694 {
3695         struct r8152 *tp = usb_get_intfdata(intf);
3696         struct net_device *netdev = tp->netdev;
3697
3698         mutex_lock(&tp->control);
3699
3700         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3701                 tp->rtl_ops.init(tp);
3702                 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3703                 netif_device_attach(netdev);
3704         }
3705
3706         if (netif_running(netdev) && netdev->flags & IFF_UP) {
3707                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3708                         struct napi_struct *napi = &tp->napi;
3709
3710                         tp->rtl_ops.autosuspend_en(tp, false);
3711                         napi_disable(napi);
3712                         set_bit(WORK_ENABLE, &tp->flags);
3713                         if (netif_carrier_ok(netdev)) {
3714                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3715                                         rtl_start_rx(tp);
3716                                 } else {
3717                                         netif_carrier_off(netdev);
3718                                         tp->rtl_ops.disable(tp);
3719                                         netif_info(tp, link, netdev,
3720                                                    "linking down\n");
3721                                 }
3722                         }
3723                         napi_enable(napi);
3724                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3725                         smp_mb__after_atomic();
3726                         if (!list_empty(&tp->rx_done))
3727                                 napi_schedule(&tp->napi);
3728                 } else {
3729                         tp->rtl_ops.up(tp);
3730                         netif_carrier_off(netdev);
3731                         set_bit(WORK_ENABLE, &tp->flags);
3732                 }
3733                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3734         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3735                 if (netdev->flags & IFF_UP)
3736                         tp->rtl_ops.autosuspend_en(tp, false);
3737                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3738         }
3739
3740         mutex_unlock(&tp->control);
3741
3742         return 0;
3743 }
3744
3745 static int rtl8152_reset_resume(struct usb_interface *intf)
3746 {
3747         struct r8152 *tp = usb_get_intfdata(intf);
3748
3749         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3750         return rtl8152_resume(intf);
3751 }
3752
3753 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3754 {
3755         struct r8152 *tp = netdev_priv(dev);
3756
3757         if (usb_autopm_get_interface(tp->intf) < 0)
3758                 return;
3759
3760         if (!rtl_can_wakeup(tp)) {
3761                 wol->supported = 0;
3762                 wol->wolopts = 0;
3763         } else {
3764                 mutex_lock(&tp->control);
3765                 wol->supported = WAKE_ANY;
3766                 wol->wolopts = __rtl_get_wol(tp);
3767                 mutex_unlock(&tp->control);
3768         }
3769
3770         usb_autopm_put_interface(tp->intf);
3771 }
3772
3773 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3774 {
3775         struct r8152 *tp = netdev_priv(dev);
3776         int ret;
3777
3778         if (!rtl_can_wakeup(tp))
3779                 return -EOPNOTSUPP;
3780
3781         ret = usb_autopm_get_interface(tp->intf);
3782         if (ret < 0)
3783                 goto out_set_wol;
3784
3785         mutex_lock(&tp->control);
3786
3787         __rtl_set_wol(tp, wol->wolopts);
3788         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3789
3790         mutex_unlock(&tp->control);
3791
3792         usb_autopm_put_interface(tp->intf);
3793
3794 out_set_wol:
3795         return ret;
3796 }
3797
3798 static u32 rtl8152_get_msglevel(struct net_device *dev)
3799 {
3800         struct r8152 *tp = netdev_priv(dev);
3801
3802         return tp->msg_enable;
3803 }
3804
3805 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3806 {
3807         struct r8152 *tp = netdev_priv(dev);
3808
3809         tp->msg_enable = value;
3810 }
3811
3812 static void rtl8152_get_drvinfo(struct net_device *netdev,
3813                                 struct ethtool_drvinfo *info)
3814 {
3815         struct r8152 *tp = netdev_priv(netdev);
3816
3817         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3818         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3819         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3820 }
3821
3822 static
3823 int rtl8152_get_link_ksettings(struct net_device *netdev,
3824                                struct ethtool_link_ksettings *cmd)
3825 {
3826         struct r8152 *tp = netdev_priv(netdev);
3827         int ret;
3828
3829         if (!tp->mii.mdio_read)
3830                 return -EOPNOTSUPP;
3831
3832         ret = usb_autopm_get_interface(tp->intf);
3833         if (ret < 0)
3834                 goto out;
3835
3836         mutex_lock(&tp->control);
3837
3838         mii_ethtool_get_link_ksettings(&tp->mii, cmd);
3839
3840         mutex_unlock(&tp->control);
3841
3842         usb_autopm_put_interface(tp->intf);
3843
3844 out:
3845         return ret;
3846 }
3847
3848 static int rtl8152_set_link_ksettings(struct net_device *dev,
3849                                       const struct ethtool_link_ksettings *cmd)
3850 {
3851         struct r8152 *tp = netdev_priv(dev);
3852         int ret;
3853
3854         ret = usb_autopm_get_interface(tp->intf);
3855         if (ret < 0)
3856                 goto out;
3857
3858         mutex_lock(&tp->control);
3859
3860         ret = rtl8152_set_speed(tp, cmd->base.autoneg, cmd->base.speed,
3861                                 cmd->base.duplex);
3862         if (!ret) {
3863                 tp->autoneg = cmd->base.autoneg;
3864                 tp->speed = cmd->base.speed;
3865                 tp->duplex = cmd->base.duplex;
3866         }
3867
3868         mutex_unlock(&tp->control);
3869
3870         usb_autopm_put_interface(tp->intf);
3871
3872 out:
3873         return ret;
3874 }
3875
3876 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3877         "tx_packets",
3878         "rx_packets",
3879         "tx_errors",
3880         "rx_errors",
3881         "rx_missed",
3882         "align_errors",
3883         "tx_single_collisions",
3884         "tx_multi_collisions",
3885         "rx_unicast",
3886         "rx_broadcast",
3887         "rx_multicast",
3888         "tx_aborted",
3889         "tx_underrun",
3890 };
3891
3892 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3893 {
3894         switch (sset) {
3895         case ETH_SS_STATS:
3896                 return ARRAY_SIZE(rtl8152_gstrings);
3897         default:
3898                 return -EOPNOTSUPP;
3899         }
3900 }
3901
3902 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3903                                       struct ethtool_stats *stats, u64 *data)
3904 {
3905         struct r8152 *tp = netdev_priv(dev);
3906         struct tally_counter tally;
3907
3908         if (usb_autopm_get_interface(tp->intf) < 0)
3909                 return;
3910
3911         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3912
3913         usb_autopm_put_interface(tp->intf);
3914
3915         data[0] = le64_to_cpu(tally.tx_packets);
3916         data[1] = le64_to_cpu(tally.rx_packets);
3917         data[2] = le64_to_cpu(tally.tx_errors);
3918         data[3] = le32_to_cpu(tally.rx_errors);
3919         data[4] = le16_to_cpu(tally.rx_missed);
3920         data[5] = le16_to_cpu(tally.align_errors);
3921         data[6] = le32_to_cpu(tally.tx_one_collision);
3922         data[7] = le32_to_cpu(tally.tx_multi_collision);
3923         data[8] = le64_to_cpu(tally.rx_unicast);
3924         data[9] = le64_to_cpu(tally.rx_broadcast);
3925         data[10] = le32_to_cpu(tally.rx_multicast);
3926         data[11] = le16_to_cpu(tally.tx_aborted);
3927         data[12] = le16_to_cpu(tally.tx_underrun);
3928 }
3929
3930 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3931 {
3932         switch (stringset) {
3933         case ETH_SS_STATS:
3934                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3935                 break;
3936         }
3937 }
3938
3939 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3940 {
3941         u32 ocp_data, lp, adv, supported = 0;
3942         u16 val;
3943
3944         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3945         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3946
3947         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3948         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3949
3950         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3951         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3952
3953         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3954         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3955
3956         eee->eee_enabled = !!ocp_data;
3957         eee->eee_active = !!(supported & adv & lp);
3958         eee->supported = supported;
3959         eee->advertised = adv;
3960         eee->lp_advertised = lp;
3961
3962         return 0;
3963 }
3964
3965 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3966 {
3967         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3968
3969         r8152_eee_en(tp, eee->eee_enabled);
3970
3971         if (!eee->eee_enabled)
3972                 val = 0;
3973
3974         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3975
3976         return 0;
3977 }
3978
3979 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3980 {
3981         u32 ocp_data, lp, adv, supported = 0;
3982         u16 val;
3983
3984         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3985         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3986
3987         val = ocp_reg_read(tp, OCP_EEE_ADV);
3988         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3989
3990         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3991         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3992
3993         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3994         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3995
3996         eee->eee_enabled = !!ocp_data;
3997         eee->eee_active = !!(supported & adv & lp);
3998         eee->supported = supported;
3999         eee->advertised = adv;
4000         eee->lp_advertised = lp;
4001
4002         return 0;
4003 }
4004
4005 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4006 {
4007         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4008
4009         r8153_eee_en(tp, eee->eee_enabled);
4010
4011         if (!eee->eee_enabled)
4012                 val = 0;
4013
4014         ocp_reg_write(tp, OCP_EEE_ADV, val);
4015
4016         return 0;
4017 }
4018
4019 static int
4020 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4021 {
4022         struct r8152 *tp = netdev_priv(net);
4023         int ret;
4024
4025         ret = usb_autopm_get_interface(tp->intf);
4026         if (ret < 0)
4027                 goto out;
4028
4029         mutex_lock(&tp->control);
4030
4031         ret = tp->rtl_ops.eee_get(tp, edata);
4032
4033         mutex_unlock(&tp->control);
4034
4035         usb_autopm_put_interface(tp->intf);
4036
4037 out:
4038         return ret;
4039 }
4040
4041 static int
4042 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4043 {
4044         struct r8152 *tp = netdev_priv(net);
4045         int ret;
4046
4047         ret = usb_autopm_get_interface(tp->intf);
4048         if (ret < 0)
4049                 goto out;
4050
4051         mutex_lock(&tp->control);
4052
4053         ret = tp->rtl_ops.eee_set(tp, edata);
4054         if (!ret)
4055                 ret = mii_nway_restart(&tp->mii);
4056
4057         mutex_unlock(&tp->control);
4058
4059         usb_autopm_put_interface(tp->intf);
4060
4061 out:
4062         return ret;
4063 }
4064
4065 static int rtl8152_nway_reset(struct net_device *dev)
4066 {
4067         struct r8152 *tp = netdev_priv(dev);
4068         int ret;
4069
4070         ret = usb_autopm_get_interface(tp->intf);
4071         if (ret < 0)
4072                 goto out;
4073
4074         mutex_lock(&tp->control);
4075
4076         ret = mii_nway_restart(&tp->mii);
4077
4078         mutex_unlock(&tp->control);
4079
4080         usb_autopm_put_interface(tp->intf);
4081
4082 out:
4083         return ret;
4084 }
4085
4086 static int rtl8152_get_coalesce(struct net_device *netdev,
4087                                 struct ethtool_coalesce *coalesce)
4088 {
4089         struct r8152 *tp = netdev_priv(netdev);
4090
4091         switch (tp->version) {
4092         case RTL_VER_01:
4093         case RTL_VER_02:
4094                 return -EOPNOTSUPP;
4095         default:
4096                 break;
4097         }
4098
4099         coalesce->rx_coalesce_usecs = tp->coalesce;
4100
4101         return 0;
4102 }
4103
4104 static int rtl8152_set_coalesce(struct net_device *netdev,
4105                                 struct ethtool_coalesce *coalesce)
4106 {
4107         struct r8152 *tp = netdev_priv(netdev);
4108         int ret;
4109
4110         switch (tp->version) {
4111         case RTL_VER_01:
4112         case RTL_VER_02:
4113                 return -EOPNOTSUPP;
4114         default:
4115                 break;
4116         }
4117
4118         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4119                 return -EINVAL;
4120
4121         ret = usb_autopm_get_interface(tp->intf);
4122         if (ret < 0)
4123                 return ret;
4124
4125         mutex_lock(&tp->control);
4126
4127         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4128                 tp->coalesce = coalesce->rx_coalesce_usecs;
4129
4130                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4131                         r8153_set_rx_early_timeout(tp);
4132         }
4133
4134         mutex_unlock(&tp->control);
4135
4136         usb_autopm_put_interface(tp->intf);
4137
4138         return ret;
4139 }
4140
4141 static const struct ethtool_ops ops = {
4142         .get_drvinfo = rtl8152_get_drvinfo,
4143         .get_link = ethtool_op_get_link,
4144         .nway_reset = rtl8152_nway_reset,
4145         .get_msglevel = rtl8152_get_msglevel,
4146         .set_msglevel = rtl8152_set_msglevel,
4147         .get_wol = rtl8152_get_wol,
4148         .set_wol = rtl8152_set_wol,
4149         .get_strings = rtl8152_get_strings,
4150         .get_sset_count = rtl8152_get_sset_count,
4151         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4152         .get_coalesce = rtl8152_get_coalesce,
4153         .set_coalesce = rtl8152_set_coalesce,
4154         .get_eee = rtl_ethtool_get_eee,
4155         .set_eee = rtl_ethtool_set_eee,
4156         .get_link_ksettings = rtl8152_get_link_ksettings,
4157         .set_link_ksettings = rtl8152_set_link_ksettings,
4158 };
4159
4160 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4161 {
4162         struct r8152 *tp = netdev_priv(netdev);
4163         struct mii_ioctl_data *data = if_mii(rq);
4164         int res;
4165
4166         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4167                 return -ENODEV;
4168
4169         res = usb_autopm_get_interface(tp->intf);
4170         if (res < 0)
4171                 goto out;
4172
4173         switch (cmd) {
4174         case SIOCGMIIPHY:
4175                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4176                 break;
4177
4178         case SIOCGMIIREG:
4179                 mutex_lock(&tp->control);
4180                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4181                 mutex_unlock(&tp->control);
4182                 break;
4183
4184         case SIOCSMIIREG:
4185                 if (!capable(CAP_NET_ADMIN)) {
4186                         res = -EPERM;
4187                         break;
4188                 }
4189                 mutex_lock(&tp->control);
4190                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4191                 mutex_unlock(&tp->control);
4192                 break;
4193
4194         default:
4195                 res = -EOPNOTSUPP;
4196         }
4197
4198         usb_autopm_put_interface(tp->intf);
4199
4200 out:
4201         return res;
4202 }
4203
4204 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4205 {
4206         struct r8152 *tp = netdev_priv(dev);
4207         int ret;
4208
4209         switch (tp->version) {
4210         case RTL_VER_01:
4211         case RTL_VER_02:
4212                 dev->mtu = new_mtu;
4213                 return 0;
4214         default:
4215                 break;
4216         }
4217
4218         ret = usb_autopm_get_interface(tp->intf);
4219         if (ret < 0)
4220                 return ret;
4221
4222         mutex_lock(&tp->control);
4223
4224         dev->mtu = new_mtu;
4225
4226         if (netif_running(dev)) {
4227                 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4228
4229                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4230
4231                 if (netif_carrier_ok(dev))
4232                         r8153_set_rx_early_size(tp);
4233         }
4234
4235         mutex_unlock(&tp->control);
4236
4237         usb_autopm_put_interface(tp->intf);
4238
4239         return ret;
4240 }
4241
4242 static const struct net_device_ops rtl8152_netdev_ops = {
4243         .ndo_open               = rtl8152_open,
4244         .ndo_stop               = rtl8152_close,
4245         .ndo_do_ioctl           = rtl8152_ioctl,
4246         .ndo_start_xmit         = rtl8152_start_xmit,
4247         .ndo_tx_timeout         = rtl8152_tx_timeout,
4248         .ndo_set_features       = rtl8152_set_features,
4249         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4250         .ndo_set_mac_address    = rtl8152_set_mac_address,
4251         .ndo_change_mtu         = rtl8152_change_mtu,
4252         .ndo_validate_addr      = eth_validate_addr,
4253         .ndo_features_check     = rtl8152_features_check,
4254 };
4255
4256 static void rtl8152_unload(struct r8152 *tp)
4257 {
4258         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4259                 return;
4260
4261         if (tp->version != RTL_VER_01)
4262                 r8152_power_cut_en(tp, true);
4263 }
4264
4265 static void rtl8153_unload(struct r8152 *tp)
4266 {
4267         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4268                 return;
4269
4270         r8153_power_cut_en(tp, false);
4271 }
4272
4273 static int rtl_ops_init(struct r8152 *tp)
4274 {
4275         struct rtl_ops *ops = &tp->rtl_ops;
4276         int ret = 0;
4277
4278         switch (tp->version) {
4279         case RTL_VER_01:
4280         case RTL_VER_02:
4281                 ops->init               = r8152b_init;
4282                 ops->enable             = rtl8152_enable;
4283                 ops->disable            = rtl8152_disable;
4284                 ops->up                 = rtl8152_up;
4285                 ops->down               = rtl8152_down;
4286                 ops->unload             = rtl8152_unload;
4287                 ops->eee_get            = r8152_get_eee;
4288                 ops->eee_set            = r8152_set_eee;
4289                 ops->in_nway            = rtl8152_in_nway;
4290                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4291                 ops->autosuspend_en     = rtl_runtime_suspend_enable;
4292                 break;
4293
4294         case RTL_VER_03:
4295         case RTL_VER_04:
4296         case RTL_VER_05:
4297         case RTL_VER_06:
4298                 ops->init               = r8153_init;
4299                 ops->enable             = rtl8153_enable;
4300                 ops->disable            = rtl8153_disable;
4301                 ops->up                 = rtl8153_up;
4302                 ops->down               = rtl8153_down;
4303                 ops->unload             = rtl8153_unload;
4304                 ops->eee_get            = r8153_get_eee;
4305                 ops->eee_set            = r8153_set_eee;
4306                 ops->in_nway            = rtl8153_in_nway;
4307                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4308                 ops->autosuspend_en     = rtl8153_runtime_enable;
4309                 break;
4310
4311         default:
4312                 ret = -ENODEV;
4313                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4314                 break;
4315         }
4316
4317         return ret;
4318 }
4319
4320 static u8 rtl_get_version(struct usb_interface *intf)
4321 {
4322         struct usb_device *udev = interface_to_usbdev(intf);
4323         u32 ocp_data = 0;
4324         __le32 *tmp;
4325         u8 version;
4326         int ret;
4327
4328         tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
4329         if (!tmp)
4330                 return 0;
4331
4332         ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
4333                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
4334                               PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
4335         if (ret > 0)
4336                 ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;
4337
4338         kfree(tmp);
4339
4340         switch (ocp_data) {
4341         case 0x4c00:
4342                 version = RTL_VER_01;
4343                 break;
4344         case 0x4c10:
4345                 version = RTL_VER_02;
4346                 break;
4347         case 0x5c00:
4348                 version = RTL_VER_03;
4349                 break;
4350         case 0x5c10:
4351                 version = RTL_VER_04;
4352                 break;
4353         case 0x5c20:
4354                 version = RTL_VER_05;
4355                 break;
4356         case 0x5c30:
4357                 version = RTL_VER_06;
4358                 break;
4359         default:
4360                 version = RTL_VER_UNKNOWN;
4361                 dev_info(&intf->dev, "Unknown version 0x%04x\n", ocp_data);
4362                 break;
4363         }
4364
4365         return version;
4366 }
4367
4368 static int rtl8152_probe(struct usb_interface *intf,
4369                          const struct usb_device_id *id)
4370 {
4371         struct usb_device *udev = interface_to_usbdev(intf);
4372         u8 version = rtl_get_version(intf);
4373         struct r8152 *tp;
4374         struct net_device *netdev;
4375         int ret;
4376
4377         if (version == RTL_VER_UNKNOWN)
4378                 return -ENODEV;
4379
4380         if (udev->actconfig->desc.bConfigurationValue != 1) {
4381                 usb_driver_set_configuration(udev, 1);
4382                 return -ENODEV;
4383         }
4384
4385         usb_reset_device(udev);
4386         netdev = alloc_etherdev(sizeof(struct r8152));
4387         if (!netdev) {
4388                 dev_err(&intf->dev, "Out of memory\n");
4389                 return -ENOMEM;
4390         }
4391
4392         SET_NETDEV_DEV(netdev, &intf->dev);
4393         tp = netdev_priv(netdev);
4394         tp->msg_enable = 0x7FFF;
4395
4396         tp->udev = udev;
4397         tp->netdev = netdev;
4398         tp->intf = intf;
4399         tp->version = version;
4400
4401         switch (version) {
4402         case RTL_VER_01:
4403         case RTL_VER_02:
4404                 tp->mii.supports_gmii = 0;
4405                 break;
4406         default:
4407                 tp->mii.supports_gmii = 1;
4408                 break;
4409         }
4410
4411         ret = rtl_ops_init(tp);
4412         if (ret)
4413                 goto out;
4414
4415         mutex_init(&tp->control);
4416         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4417         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4418
4419         netdev->netdev_ops = &rtl8152_netdev_ops;
4420         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4421
4422         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4423                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4424                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4425                             NETIF_F_HW_VLAN_CTAG_TX;
4426         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4427                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4428                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4429                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4430         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4431                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4432                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4433
4434         if (tp->version == RTL_VER_01) {
4435                 netdev->features &= ~NETIF_F_RXCSUM;
4436                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4437         }
4438
4439         netdev->ethtool_ops = &ops;
4440         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4441
4442         /* MTU range: 68 - 1500 or 9194 */
4443         netdev->min_mtu = ETH_MIN_MTU;
4444         switch (tp->version) {
4445         case RTL_VER_01:
4446         case RTL_VER_02:
4447                 netdev->max_mtu = ETH_DATA_LEN;
4448                 break;
4449         default:
4450                 netdev->max_mtu = RTL8153_MAX_MTU;
4451                 break;
4452         }
4453
4454         tp->mii.dev = netdev;
4455         tp->mii.mdio_read = read_mii_word;
4456         tp->mii.mdio_write = write_mii_word;
4457         tp->mii.phy_id_mask = 0x3f;
4458         tp->mii.reg_num_mask = 0x1f;
4459         tp->mii.phy_id = R8152_PHY_ID;
4460
4461         switch (udev->speed) {
4462         case USB_SPEED_SUPER:
4463         case USB_SPEED_SUPER_PLUS:
4464                 tp->coalesce = COALESCE_SUPER;
4465                 break;
4466         case USB_SPEED_HIGH:
4467                 tp->coalesce = COALESCE_HIGH;
4468                 break;
4469         default:
4470                 tp->coalesce = COALESCE_SLOW;
4471                 break;
4472         }
4473
4474         tp->autoneg = AUTONEG_ENABLE;
4475         tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4476         tp->duplex = DUPLEX_FULL;
4477
4478         intf->needs_remote_wakeup = 1;
4479
4480         tp->rtl_ops.init(tp);
4481         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4482         set_ethernet_addr(tp);
4483
4484         usb_set_intfdata(intf, tp);
4485         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4486
4487         ret = register_netdev(netdev);
4488         if (ret != 0) {
4489                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4490                 goto out1;
4491         }
4492
4493         if (!rtl_can_wakeup(tp))
4494                 __rtl_set_wol(tp, 0);
4495
4496         tp->saved_wolopts = __rtl_get_wol(tp);
4497         if (tp->saved_wolopts)
4498                 device_set_wakeup_enable(&udev->dev, true);
4499         else
4500                 device_set_wakeup_enable(&udev->dev, false);
4501
4502         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4503
4504         return 0;
4505
4506 out1:
4507         netif_napi_del(&tp->napi);
4508         usb_set_intfdata(intf, NULL);
4509 out:
4510         free_netdev(netdev);
4511         return ret;
4512 }
4513
4514 static void rtl8152_disconnect(struct usb_interface *intf)
4515 {
4516         struct r8152 *tp = usb_get_intfdata(intf);
4517
4518         usb_set_intfdata(intf, NULL);
4519         if (tp) {
4520                 struct usb_device *udev = tp->udev;
4521
4522                 if (udev->state == USB_STATE_NOTATTACHED)
4523                         set_bit(RTL8152_UNPLUG, &tp->flags);
4524
4525                 netif_napi_del(&tp->napi);
4526                 unregister_netdev(tp->netdev);
4527                 cancel_delayed_work_sync(&tp->hw_phy_work);
4528                 tp->rtl_ops.unload(tp);
4529                 free_netdev(tp->netdev);
4530         }
4531 }
4532
4533 #define REALTEK_USB_DEVICE(vend, prod)  \
4534         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4535                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4536         .idVendor = (vend), \
4537         .idProduct = (prod), \
4538         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4539 }, \
4540 { \
4541         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4542                        USB_DEVICE_ID_MATCH_DEVICE, \
4543         .idVendor = (vend), \
4544         .idProduct = (prod), \
4545         .bInterfaceClass = USB_CLASS_COMM, \
4546         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4547         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4548
4549 /* table of devices that work with this driver */
4550 static struct usb_device_id rtl8152_table[] = {
4551         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4552         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4553         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4554         {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4555         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4556         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4557         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3062)},
4558         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x3069)},
4559         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4560         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x720c)},
4561         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7214)},
4562         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4563         {}
4564 };
4565
4566 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4567
4568 static struct usb_driver rtl8152_driver = {
4569         .name =         MODULENAME,
4570         .id_table =     rtl8152_table,
4571         .probe =        rtl8152_probe,
4572         .disconnect =   rtl8152_disconnect,
4573         .suspend =      rtl8152_suspend,
4574         .resume =       rtl8152_resume,
4575         .reset_resume = rtl8152_reset_resume,
4576         .pre_reset =    rtl8152_pre_reset,
4577         .post_reset =   rtl8152_post_reset,
4578         .supports_autosuspend = 1,
4579         .disable_hub_initiated_lpm = 1,
4580 };
4581
4582 module_usb_driver(rtl8152_driver);
4583
4584 MODULE_AUTHOR(DRIVER_AUTHOR);
4585 MODULE_DESCRIPTION(DRIVER_DESC);
4586 MODULE_LICENSE("GPL");
4587 MODULE_VERSION(DRIVER_VERSION);