drivers/regulator/qcom_smd-regulator.c

   1 /*
   2  * Copyright (c) 2015, Sony Mobile Communications AB.
   3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/driver.h>
  20 #include <linux/regulator/machine.h>
  21 #include <linux/regulator/of_regulator.h>
  22 #include <linux/soc/qcom/smd-rpm.h>
  23
  24 struct qcom_rpm_reg {
  25         struct device *dev;
  26
  27         struct qcom_smd_rpm *rpm;
  28
  29         u32 type;
  30         u32 id;
  31
  32         struct regulator_desc desc;
  33
  34         int is_enabled;
  35         int uV;
  36 };
  37
  38 struct rpm_regulator_req {
  39         __le32 key;
  40         __le32 nbytes;
  41         __le32 value;
  42 };
  43
  44 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  45 #define RPM_KEY_UV      0x00007675 /* "uv" */
  46 #define RPM_KEY_MA      0x0000616d /* "ma" */
  47
  48 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  49                                 struct rpm_regulator_req *req,
  50                                 size_t size)
  51 {
  52         return qcom_rpm_smd_write(vreg->rpm,
  53                                   QCOM_SMD_RPM_ACTIVE_STATE,
  54                                   vreg->type,
  55                                   vreg->id,
  56                                   req, size);
  57 }
  58
  59 static int rpm_reg_enable(struct regulator_dev *rdev)
  60 {
  61         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  62         struct rpm_regulator_req req;
  63         int ret;
  64
  65         req.key = cpu_to_le32(RPM_KEY_SWEN);
  66         req.nbytes = cpu_to_le32(sizeof(u32));
  67         req.value = cpu_to_le32(1);
  68
  69         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  70         if (!ret)
  71                 vreg->is_enabled = 1;
  72
  73         return ret;
  74 }
  75
  76 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  77 {
  78         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  79
  80         return vreg->is_enabled;
  81 }
  82
  83 static int rpm_reg_disable(struct regulator_dev *rdev)
  84 {
  85         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  86         struct rpm_regulator_req req;
  87         int ret;
  88
  89         req.key = cpu_to_le32(RPM_KEY_SWEN);
  90         req.nbytes = cpu_to_le32(sizeof(u32));
  91         req.value = 0;
  92
  93         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  94         if (!ret)
  95                 vreg->is_enabled = 0;
  96
  97         return ret;
  98 }
  99
 100 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 101 {
 102         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 103
 104         return vreg->uV;
 105 }
 106
 107 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 108                                int min_uV,
 109                                int max_uV,
 110                                unsigned *selector)
 111 {
 112         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 113         struct rpm_regulator_req req;
 114         int ret = 0;
 115
 116         req.key = cpu_to_le32(RPM_KEY_UV);
 117         req.nbytes = cpu_to_le32(sizeof(u32));
 118         req.value = cpu_to_le32(min_uV);
 119
 120         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 121         if (!ret)
 122                 vreg->uV = min_uV;
 123
 124         return ret;
 125 }
 126
 127 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 128 {
 129         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 130         struct rpm_regulator_req req;
 131
 132         req.key = cpu_to_le32(RPM_KEY_MA);
 133         req.nbytes = cpu_to_le32(sizeof(u32));
 134         req.value = cpu_to_le32(load_uA / 1000);
 135
 136         return rpm_reg_write_active(vreg, &req, sizeof(req));
 137 }
 138
 139 static const struct regulator_ops rpm_smps_ldo_ops = {
 140         .enable = rpm_reg_enable,
 141         .disable = rpm_reg_disable,
 142         .is_enabled = rpm_reg_is_enabled,
 143         .list_voltage = regulator_list_voltage_linear_range,
 144
 145         .get_voltage = rpm_reg_get_voltage,
 146         .set_voltage = rpm_reg_set_voltage,
 147
 148         .set_load = rpm_reg_set_load,
 149 };
 150
 151 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 152         .enable = rpm_reg_enable,
 153         .disable = rpm_reg_disable,
 154         .is_enabled = rpm_reg_is_enabled,
 155
 156         .get_voltage = rpm_reg_get_voltage,
 157         .set_voltage = rpm_reg_set_voltage,
 158
 159         .set_load = rpm_reg_set_load,
 160 };
 161
 162 static const struct regulator_ops rpm_switch_ops = {
 163         .enable = rpm_reg_enable,
 164         .disable = rpm_reg_disable,
 165         .is_enabled = rpm_reg_is_enabled,
 166 };
 167
 168 static const struct regulator_desc pma8084_hfsmps = {
 169         .linear_ranges = (struct regulator_linear_range[]) {
 170                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 171                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 172         },
 173         .n_linear_ranges = 2,
 174         .n_voltages = 159,
 175         .ops = &rpm_smps_ldo_ops,
 176 };
 177
 178 static const struct regulator_desc pma8084_ftsmps = {
 179         .linear_ranges = (struct regulator_linear_range[]) {
 180                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 181                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 182         },
 183         .n_linear_ranges = 2,
 184         .n_voltages = 262,
 185         .ops = &rpm_smps_ldo_ops,
 186 };
 187
 188 static const struct regulator_desc pma8084_pldo = {
 189         .linear_ranges = (struct regulator_linear_range[]) {
 190                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 191                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 192                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 193         },
 194         .n_linear_ranges = 3,
 195         .n_voltages = 164,
 196         .ops = &rpm_smps_ldo_ops,
 197 };
 198
 199 static const struct regulator_desc pma8084_nldo = {
 200         .linear_ranges = (struct regulator_linear_range[]) {
 201                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 202         },
 203         .n_linear_ranges = 1,
 204         .n_voltages = 64,
 205         .ops = &rpm_smps_ldo_ops,
 206 };
 207
 208 static const struct regulator_desc pma8084_switch = {
 209         .ops = &rpm_switch_ops,
 210 };
 211
 212 static const struct regulator_desc pm8x41_hfsmps = {
 213         .linear_ranges = (struct regulator_linear_range[]) {
 214                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 215                 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
 216         },
 217         .n_linear_ranges = 2,
 218         .n_voltages = 159,
 219         .ops = &rpm_smps_ldo_ops,
 220 };
 221
 222 static const struct regulator_desc pm8841_ftsmps = {
 223         .linear_ranges = (struct regulator_linear_range[]) {
 224                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 225                 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
 226         },
 227         .n_linear_ranges = 2,
 228         .n_voltages = 262,
 229         .ops = &rpm_smps_ldo_ops,
 230 };
 231
 232 static const struct regulator_desc pm8941_boost = {
 233         .linear_ranges = (struct regulator_linear_range[]) {
 234                 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
 235         },
 236         .n_linear_ranges = 1,
 237         .n_voltages = 31,
 238         .ops = &rpm_smps_ldo_ops,
 239 };
 240
 241 static const struct regulator_desc pm8941_pldo = {
 242         .linear_ranges = (struct regulator_linear_range[]) {
 243                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 244                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 245                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 246         },
 247         .n_linear_ranges = 3,
 248         .n_voltages = 164,
 249         .ops = &rpm_smps_ldo_ops,
 250 };
 251
 252 static const struct regulator_desc pm8941_nldo = {
 253         .linear_ranges = (struct regulator_linear_range[]) {
 254                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 255         },
 256         .n_linear_ranges = 1,
 257         .n_voltages = 64,
 258         .ops = &rpm_smps_ldo_ops,
 259 };
 260
 261 static const struct regulator_desc pm8941_lnldo = {
 262         .fixed_uV = 1740000,
 263         .n_voltages = 1,
 264         .ops = &rpm_smps_ldo_ops_fixed,
 265 };
 266
 267 static const struct regulator_desc pm8941_switch = {
 268         .ops = &rpm_switch_ops,
 269 };
 270
 271 static const struct regulator_desc pm8916_pldo = {
 272         .linear_ranges = (struct regulator_linear_range[]) {
 273                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 274         },
 275         .n_linear_ranges = 1,
 276         .n_voltages = 209,
 277         .ops = &rpm_smps_ldo_ops,
 278 };
 279
 280 static const struct regulator_desc pm8916_nldo = {
 281         .linear_ranges = (struct regulator_linear_range[]) {
 282                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 283         },
 284         .n_linear_ranges = 1,
 285         .n_voltages = 94,
 286         .ops = &rpm_smps_ldo_ops,
 287 };
 288
 289 static const struct regulator_desc pm8916_buck_lvo_smps = {
 290         .linear_ranges = (struct regulator_linear_range[]) {
 291                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 292                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 293         },
 294         .n_linear_ranges = 2,
 295         .n_voltages = 128,
 296         .ops = &rpm_smps_ldo_ops,
 297 };
 298
 299 static const struct regulator_desc pm8916_buck_hvo_smps = {
 300         .linear_ranges = (struct regulator_linear_range[]) {
 301                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 302         },
 303         .n_linear_ranges = 1,
 304         .n_voltages = 32,
 305         .ops = &rpm_smps_ldo_ops,
 306 };
 307
 308 static const struct regulator_desc pm8994_hfsmps = {
 309         .linear_ranges = (struct regulator_linear_range[]) {
 310                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 311                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 312         },
 313         .n_linear_ranges = 2,
 314         .n_voltages = 159,
 315         .ops = &rpm_smps_ldo_ops,
 316 };
 317
 318 static const struct regulator_desc pm8994_ftsmps = {
 319         .linear_ranges = (struct regulator_linear_range[]) {
 320                 REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
 321                 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
 322         },
 323         .n_linear_ranges = 2,
 324         .n_voltages = 350,
 325         .ops = &rpm_smps_ldo_ops,
 326 };
 327
 328 static const struct regulator_desc pm8994_nldo = {
 329         .linear_ranges = (struct regulator_linear_range[]) {
 330                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 331         },
 332         .n_linear_ranges = 1,
 333         .n_voltages = 64,
 334         .ops = &rpm_smps_ldo_ops,
 335 };
 336
 337 static const struct regulator_desc pm8994_pldo = {
 338         .linear_ranges = (struct regulator_linear_range[]) {
 339                 REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
 340                 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
 341                 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
 342         },
 343         .n_linear_ranges = 3,
 344         .n_voltages = 164,
 345         .ops = &rpm_smps_ldo_ops,
 346 };
 347
 348 static const struct regulator_desc pm8994_switch = {
 349         .ops = &rpm_switch_ops,
 350 };
 351
 352 static const struct regulator_desc pm8994_lnldo = {
 353         .fixed_uV = 1740000,
 354         .n_voltages = 1,
 355         .ops = &rpm_smps_ldo_ops_fixed,
 356 };
 357
 358 struct rpm_regulator_data {
 359         const char *name;
 360         u32 type;
 361         u32 id;
 362         const struct regulator_desc *desc;
 363         const char *supply;
 364 };
 365
 366 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 367         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 368         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 369         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 370         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 371         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 372         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 373         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 374         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 375         {}
 376 };
 377
 378 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 379         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 380         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 381         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 382         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 383         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 384         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 385         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 386         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 387         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 388         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 389         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 390         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 391         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
 392         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 393         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 394         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 395         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 396         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 397         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 398         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 399         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 400         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
 401         {}
 402 };
 403
 404 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 405         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 406         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 407         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 408         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 409
 410         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 411         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 412         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 413         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 414         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 415         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 416         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 417         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 418         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 419         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 420         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 421         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 422         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 423         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 424         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 425         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 426         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 427         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 428         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 429         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 430         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 431         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 432         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 433         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 434
 435         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 436         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 437         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 438
 439         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 440         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 441
 442         {}
 443 };
 444
 445 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 446         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 447         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 448         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 449         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 450         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 451         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 452         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 453         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 454         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 455         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 456         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 457         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 458
 459         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 460         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 461         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 462         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 463         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 464         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 465         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 466         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 467         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 468         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 469         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 470         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 471         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 472         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 473         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 474         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 475         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 476         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 477         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 478         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 479         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 480         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 481         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 482         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 483         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 484         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 485         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 486
 487         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 488         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 489         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 490         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 491         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 492
 493         {}
 494 };
 495
 496 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
 497         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
 498         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
 499         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
 500         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
 501         { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
 502         { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
 503         { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
 504         { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
 505         { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
 506         { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
 507         { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
 508         { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
 509         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
 510         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
 511         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
 512         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
 513         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
 514         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
 515         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
 516         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
 517         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 518         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 519         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
 520         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
 521         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 522         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
 523         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
 524         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
 525         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
 526         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 527         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 528         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
 529         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
 530         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
 531         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 532         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
 533         { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
 534         { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
 535         { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
 536         { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
 537         { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
 538         { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
 539         { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
 540         { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
 541         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
 542         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
 543
 544         {}
 545 };
 546
 547 static const struct of_device_id rpm_of_match[] = {
 548         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 549         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 550         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 551         { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
 552         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 553         {}
 554 };
 555 MODULE_DEVICE_TABLE(of, rpm_of_match);
 556
 557 static int rpm_reg_probe(struct platform_device *pdev)
 558 {
 559         const struct rpm_regulator_data *reg;
 560         const struct of_device_id *match;
 561         struct regulator_config config = { };
 562         struct regulator_dev *rdev;
 563         struct qcom_rpm_reg *vreg;
 564         struct qcom_smd_rpm *rpm;
 565
 566         rpm = dev_get_drvdata(pdev->dev.parent);
 567         if (!rpm) {
 568                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
 569                 return -ENODEV;
 570         }
 571
 572         match = of_match_device(rpm_of_match, &pdev->dev);
 573         for (reg = match->data; reg->name; reg++) {
 574                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 575                 if (!vreg)
 576                         return -ENOMEM;
 577
 578                 vreg->dev = &pdev->dev;
 579                 vreg->type = reg->type;
 580                 vreg->id = reg->id;
 581                 vreg->rpm = rpm;
 582
 583                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
 584
 585                 vreg->desc.id = -1;
 586                 vreg->desc.owner = THIS_MODULE;
 587                 vreg->desc.type = REGULATOR_VOLTAGE;
 588                 vreg->desc.name = reg->name;
 589                 vreg->desc.supply_name = reg->supply;
 590                 vreg->desc.of_match = reg->name;
 591
 592                 config.dev = &pdev->dev;
 593                 config.driver_data = vreg;
 594                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
 595                 if (IS_ERR(rdev)) {
 596                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
 597                         return PTR_ERR(rdev);
 598                 }
 599         }
 600
 601         return 0;
 602 }
 603
 604 static struct platform_driver rpm_reg_driver = {
 605         .probe = rpm_reg_probe,
 606         .driver = {
 607                 .name  = "qcom_rpm_smd_regulator",
 608                 .of_match_table = rpm_of_match,
 609         },
 610 };
 611
 612 static int __init rpm_reg_init(void)
 613 {
 614         return platform_driver_register(&rpm_reg_driver);
 615 }
 616 subsys_initcall(rpm_reg_init);
 617
 618 static void __exit rpm_reg_exit(void)
 619 {
 620         platform_driver_unregister(&rpm_reg_driver);
 621 }
 622 module_exit(rpm_reg_exit)
 623
 624 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 625 MODULE_LICENSE("GPL v2");