drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/bcd.h>
  16 #include <linux/i2c.h>
  17 #include <linux/init.h>
  18 #include <linux/module.h>
  19 #include <linux/rtc/ds1307.h>
  20 #include <linux/rtc.h>
  21 #include <linux/slab.h>
  22 #include <linux/string.h>
  23 #include <linux/hwmon.h>
  24 #include <linux/hwmon-sysfs.h>
  25 #include <linux/clk-provider.h>
  26
  27 /*
  28  * We can't determine type by probing, but if we expect pre-Linux code
  29  * to have set the chip up as a clock (turning on the oscillator and
  30  * setting the date and time), Linux can ignore the non-clock features.
  31  * That's a natural job for a factory or repair bench.
  32  */
  33 enum ds_type {
  34         ds_1307,
  35         ds_1337,
  36         ds_1338,
  37         ds_1339,
  38         ds_1340,
  39         ds_1388,
  40         ds_3231,
  41         m41t00,
  42         mcp794xx,
  43         rx_8025,
  44         last_ds_type /* always last */
  45         /* rs5c372 too?  different address... */
  46 };
  47
  48
  49 /* RTC registers don't differ much, except for the century flag */
  50 #define DS1307_REG_SECS         0x00    /* 00-59 */
  51 #       define DS1307_BIT_CH            0x80
  52 #       define DS1340_BIT_nEOSC         0x80
  53 #       define MCP794XX_BIT_ST          0x80
  54 #define DS1307_REG_MIN          0x01    /* 00-59 */
  55 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  56 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  57 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  58 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  59 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  60 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  61 #       define MCP794XX_BIT_VBATEN      0x08
  62 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  63 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  64 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  65 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  66
  67 /*
  68  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  69  * start at 7, and they differ a LOT. Only control and status matter for
  70  * basic RTC date and time functionality; be careful using them.
  71  */
  72 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  73 #       define DS1307_BIT_OUT           0x80
  74 #       define DS1338_BIT_OSF           0x20
  75 #       define DS1307_BIT_SQWE          0x10
  76 #       define DS1307_BIT_RS1           0x02
  77 #       define DS1307_BIT_RS0           0x01
  78 #define DS1337_REG_CONTROL      0x0e
  79 #       define DS1337_BIT_nEOSC         0x80
  80 #       define DS1339_BIT_BBSQI         0x20
  81 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  82 #       define DS1337_BIT_RS2           0x10
  83 #       define DS1337_BIT_RS1           0x08
  84 #       define DS1337_BIT_INTCN         0x04
  85 #       define DS1337_BIT_A2IE          0x02
  86 #       define DS1337_BIT_A1IE          0x01
  87 #define DS1340_REG_CONTROL      0x07
  88 #       define DS1340_BIT_OUT           0x80
  89 #       define DS1340_BIT_FT            0x40
  90 #       define DS1340_BIT_CALIB_SIGN    0x20
  91 #       define DS1340_M_CALIBRATION     0x1f
  92 #define DS1340_REG_FLAG         0x09
  93 #       define DS1340_BIT_OSF           0x80
  94 #define DS1337_REG_STATUS       0x0f
  95 #       define DS1337_BIT_OSF           0x80
  96 #       define DS3231_BIT_EN32KHZ       0x08
  97 #       define DS1337_BIT_A2I           0x02
  98 #       define DS1337_BIT_A1I           0x01
  99 #define DS1339_REG_ALARM1_SECS  0x07
 100
 101 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 102
 103 #define RX8025_REG_CTRL1        0x0e
 104 #       define RX8025_BIT_2412          0x20
 105 #define RX8025_REG_CTRL2        0x0f
 106 #       define RX8025_BIT_PON           0x10
 107 #       define RX8025_BIT_VDET          0x40
 108 #       define RX8025_BIT_XST           0x20
 109
 110
 111 struct ds1307 {
 112         u8                      offset; /* register's offset */
 113         u8                      regs[11];
 114         u16                     nvram_offset;
 115         struct bin_attribute    *nvram;
 116         enum ds_type            type;
 117         unsigned long           flags;
 118 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 119 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 120         struct i2c_client       *client;
 121         struct rtc_device       *rtc;
 122         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 123                                u8 length, u8 *values);
 124         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 125                                 u8 length, const u8 *values);
 126 #ifdef CONFIG_COMMON_CLK
 127         struct clk_hw           clks[2];
 128 #endif
 129 };
 130
 131 struct chip_desc {
 132         unsigned                alarm:1;
 133         u16                     nvram_offset;
 134         u16                     nvram_size;
 135         u16                     trickle_charger_reg;
 136         u8                      trickle_charger_setup;
 137         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 138 };
 139
 140 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 141                                   uint32_t ohms, bool diode);
 142
 143 static struct chip_desc chips[last_ds_type] = {
 144         [ds_1307] = {
 145                 .nvram_offset   = 8,
 146                 .nvram_size     = 56,
 147         },
 148         [ds_1337] = {
 149                 .alarm          = 1,
 150         },
 151         [ds_1338] = {
 152                 .nvram_offset   = 8,
 153                 .nvram_size     = 56,
 154         },
 155         [ds_1339] = {
 156                 .alarm          = 1,
 157                 .trickle_charger_reg = 0x10,
 158                 .do_trickle_setup = &do_trickle_setup_ds1339,
 159         },
 160         [ds_1340] = {
 161                 .trickle_charger_reg = 0x08,
 162         },
 163         [ds_1388] = {
 164                 .trickle_charger_reg = 0x0a,
 165         },
 166         [ds_3231] = {
 167                 .alarm          = 1,
 168         },
 169         [mcp794xx] = {
 170                 .alarm          = 1,
 171                 /* this is battery backed SRAM */
 172                 .nvram_offset   = 0x20,
 173                 .nvram_size     = 0x40,
 174         },
 175 };
 176
 177 static const struct i2c_device_id ds1307_id[] = {
 178         { "ds1307", ds_1307 },
 179         { "ds1337", ds_1337 },
 180         { "ds1338", ds_1338 },
 181         { "ds1339", ds_1339 },
 182         { "ds1388", ds_1388 },
 183         { "ds1340", ds_1340 },
 184         { "ds3231", ds_3231 },
 185         { "m41t00", m41t00 },
 186         { "mcp7940x", mcp794xx },
 187         { "mcp7941x", mcp794xx },
 188         { "pt7c4338", ds_1307 },
 189         { "rx8025", rx_8025 },
 190         { "isl12057", ds_1337 },
 191         { }
 192 };
 193 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 194
 195 #ifdef CONFIG_ACPI
 196 static const struct acpi_device_id ds1307_acpi_ids[] = {
 197         { .id = "DS1307", .driver_data = ds_1307 },
 198         { .id = "DS1337", .driver_data = ds_1337 },
 199         { .id = "DS1338", .driver_data = ds_1338 },
 200         { .id = "DS1339", .driver_data = ds_1339 },
 201         { .id = "DS1388", .driver_data = ds_1388 },
 202         { .id = "DS1340", .driver_data = ds_1340 },
 203         { .id = "DS3231", .driver_data = ds_3231 },
 204         { .id = "M41T00", .driver_data = m41t00 },
 205         { .id = "MCP7940X", .driver_data = mcp794xx },
 206         { .id = "MCP7941X", .driver_data = mcp794xx },
 207         { .id = "PT7C4338", .driver_data = ds_1307 },
 208         { .id = "RX8025", .driver_data = rx_8025 },
 209         { .id = "ISL12057", .driver_data = ds_1337 },
 210         { }
 211 };
 212 MODULE_DEVICE_TABLE(acpi, ds1307_acpi_ids);
 213 #endif
 214
 215 /*----------------------------------------------------------------------*/
 216
 217 #define BLOCK_DATA_MAX_TRIES 10
 218
 219 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 220                                        u8 command, u8 length, u8 *values)
 221 {
 222         s32 i, data;
 223
 224         for (i = 0; i < length; i++) {
 225                 data = i2c_smbus_read_byte_data(client, command + i);
 226                 if (data < 0)
 227                         return data;
 228                 values[i] = data;
 229         }
 230         return i;
 231 }
 232
 233 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 234                                   u8 length, u8 *values)
 235 {
 236         u8 oldvalues[255];
 237         s32 ret;
 238         int tries = 0;
 239
 240         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 241         ret = ds1307_read_block_data_once(client, command, length, values);
 242         if (ret < 0)
 243                 return ret;
 244         do {
 245                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 246                         dev_err(&client->dev,
 247                                 "ds1307_read_block_data failed\n");
 248                         return -EIO;
 249                 }
 250                 memcpy(oldvalues, values, length);
 251                 ret = ds1307_read_block_data_once(client, command, length,
 252                                                   values);
 253                 if (ret < 0)
 254                         return ret;
 255         } while (memcmp(oldvalues, values, length));
 256         return length;
 257 }
 258
 259 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 260                                    u8 length, const u8 *values)
 261 {
 262         u8 currvalues[255];
 263         int tries = 0;
 264
 265         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 266         do {
 267                 s32 i, ret;
 268
 269                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 270                         dev_err(&client->dev,
 271                                 "ds1307_write_block_data failed\n");
 272                         return -EIO;
 273                 }
 274                 for (i = 0; i < length; i++) {
 275                         ret = i2c_smbus_write_byte_data(client, command + i,
 276                                                         values[i]);
 277                         if (ret < 0)
 278                                 return ret;
 279                 }
 280                 ret = ds1307_read_block_data_once(client, command, length,
 281                                                   currvalues);
 282                 if (ret < 0)
 283                         return ret;
 284         } while (memcmp(currvalues, values, length));
 285         return length;
 286 }
 287
 288 /*----------------------------------------------------------------------*/
 289
 290 /* These RTC devices are not designed to be connected to a SMbus adapter.
 291    SMbus limits block operations length to 32 bytes, whereas it's not
 292    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 293    in that case, split them into smaller blocks */
 294
 295 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 296                                 u8 command, u8 length, const u8 *values)
 297 {
 298         u8 suboffset = 0;
 299
 300         if (length <= I2C_SMBUS_BLOCK_MAX) {
 301                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 302                                         command, length, values);
 303                 if (retval < 0)
 304                         return retval;
 305                 return length;
 306         }
 307
 308         while (suboffset < length) {
 309                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 310                                 command + suboffset,
 311                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 312                                 values + suboffset);
 313                 if (retval < 0)
 314                         return retval;
 315
 316                 suboffset += I2C_SMBUS_BLOCK_MAX;
 317         }
 318         return length;
 319 }
 320
 321 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 322                                 u8 command, u8 length, u8 *values)
 323 {
 324         u8 suboffset = 0;
 325
 326         if (length <= I2C_SMBUS_BLOCK_MAX)
 327                 return i2c_smbus_read_i2c_block_data(client,
 328                                         command, length, values);
 329
 330         while (suboffset < length) {
 331                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 332                                 command + suboffset,
 333                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 334                                 values + suboffset);
 335                 if (retval < 0)
 336                         return retval;
 337
 338                 suboffset += I2C_SMBUS_BLOCK_MAX;
 339         }
 340         return length;
 341 }
 342
 343 /*----------------------------------------------------------------------*/
 344
 345 /*
 346  * The ds1337 and ds1339 both have two alarms, but we only use the first
 347  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 348  * signal; ds1339 chips have only one alarm signal.
 349  */
 350 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 351 {
 352         struct i2c_client       *client = dev_id;
 353         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 354         struct mutex            *lock = &ds1307->rtc->ops_lock;
 355         int                     stat, control;
 356
 357         mutex_lock(lock);
 358         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 359         if (stat < 0)
 360                 goto out;
 361
 362         if (stat & DS1337_BIT_A1I) {
 363                 stat &= ~DS1337_BIT_A1I;
 364                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 365
 366                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 367                 if (control < 0)
 368                         goto out;
 369
 370                 control &= ~DS1337_BIT_A1IE;
 371                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 372
 373                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 374         }
 375
 376 out:
 377         mutex_unlock(lock);
 378
 379         return IRQ_HANDLED;
 380 }
 381
 382 /*----------------------------------------------------------------------*/
 383
 384 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 385 {
 386         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 387         int             tmp;
 388
 389         /* read the RTC date and time registers all at once */
 390         tmp = ds1307->read_block_data(ds1307->client,
 391                 ds1307->offset, 7, ds1307->regs);
 392         if (tmp != 7) {
 393                 dev_err(dev, "%s error %d\n", "read", tmp);
 394                 return -EIO;
 395         }
 396
 397         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 398
 399         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 400         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 401         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 402         t->tm_hour = bcd2bin(tmp);
 403         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 404         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 405         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 406         t->tm_mon = bcd2bin(tmp) - 1;
 407         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 408
 409 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
 410         switch (ds1307->type) {
 411         case ds_1337:
 412         case ds_1339:
 413         case ds_3231:
 414                 if (ds1307->regs[DS1307_REG_MONTH] & DS1337_BIT_CENTURY)
 415                         t->tm_year += 100;
 416                 break;
 417         case ds_1340:
 418                 if (ds1307->regs[DS1307_REG_HOUR] & DS1340_BIT_CENTURY)
 419                         t->tm_year += 100;
 420                 break;
 421         default:
 422                 break;
 423         }
 424 #endif
 425
 426         dev_dbg(dev, "%s secs=%d, mins=%d, "
 427                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 428                 "read", t->tm_sec, t->tm_min,
 429                 t->tm_hour, t->tm_mday,
 430                 t->tm_mon, t->tm_year, t->tm_wday);
 431
 432         /* initial clock setting can be undefined */
 433         return rtc_valid_tm(t);
 434 }
 435
 436 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 437 {
 438         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 439         int             result;
 440         int             tmp;
 441         u8              *buf = ds1307->regs;
 442
 443         dev_dbg(dev, "%s secs=%d, mins=%d, "
 444                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 445                 "write", t->tm_sec, t->tm_min,
 446                 t->tm_hour, t->tm_mday,
 447                 t->tm_mon, t->tm_year, t->tm_wday);
 448
 449 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
 450         if (t->tm_year < 100)
 451                 return -EINVAL;
 452
 453         switch (ds1307->type) {
 454         case ds_1337:
 455         case ds_1339:
 456         case ds_3231:
 457         case ds_1340:
 458                 if (t->tm_year > 299)
 459                         return -EINVAL;
 460         default:
 461                 if (t->tm_year > 199)
 462                         return -EINVAL;
 463                 break;
 464         }
 465 #else
 466         if (t->tm_year < 100 || t->tm_year > 199)
 467                 return -EINVAL;
 468 #endif
 469
 470         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 471         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 472         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 473         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 474         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 475         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 476
 477         /* assume 20YY not 19YY */
 478         tmp = t->tm_year - 100;
 479         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 480
 481         switch (ds1307->type) {
 482         case ds_1337:
 483         case ds_1339:
 484         case ds_3231:
 485                 if (t->tm_year > 199)
 486                         buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 487                 break;
 488         case ds_1340:
 489                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN;
 490                 if (t->tm_year > 199)
 491                         buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY;
 492                 break;
 493         case mcp794xx:
 494                 /*
 495                  * these bits were cleared when preparing the date/time
 496                  * values and need to be set again before writing the
 497                  * buffer out to the device.
 498                  */
 499                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 500                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 501                 break;
 502         default:
 503                 break;
 504         }
 505
 506         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 507
 508         result = ds1307->write_block_data(ds1307->client,
 509                 ds1307->offset, 7, buf);
 510         if (result < 0) {
 511                 dev_err(dev, "%s error %d\n", "write", result);
 512                 return result;
 513         }
 514         return 0;
 515 }
 516
 517 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 518 {
 519         struct i2c_client       *client = to_i2c_client(dev);
 520         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 521         int                     ret;
 522
 523         if (!test_bit(HAS_ALARM, &ds1307->flags))
 524                 return -EINVAL;
 525
 526         /* read all ALARM1, ALARM2, and status registers at once */
 527         ret = ds1307->read_block_data(client,
 528                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 529         if (ret != 9) {
 530                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 531                 return -EIO;
 532         }
 533
 534         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 535                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 536
 537         /*
 538          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 539          * and that all four fields are checked matches
 540          */
 541         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 542         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 543         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 544         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 545
 546         /* ... and status */
 547         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 548         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 549
 550         dev_dbg(dev, "%s secs=%d, mins=%d, "
 551                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 552                 "alarm read", t->time.tm_sec, t->time.tm_min,
 553                 t->time.tm_hour, t->time.tm_mday,
 554                 t->enabled, t->pending);
 555
 556         return 0;
 557 }
 558
 559 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 560 {
 561         struct i2c_client       *client = to_i2c_client(dev);
 562         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 563         unsigned char           *buf = ds1307->regs;
 564         u8                      control, status;
 565         int                     ret;
 566
 567         if (!test_bit(HAS_ALARM, &ds1307->flags))
 568                 return -EINVAL;
 569
 570         dev_dbg(dev, "%s secs=%d, mins=%d, "
 571                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 572                 "alarm set", t->time.tm_sec, t->time.tm_min,
 573                 t->time.tm_hour, t->time.tm_mday,
 574                 t->enabled, t->pending);
 575
 576         /* read current status of both alarms and the chip */
 577         ret = ds1307->read_block_data(client,
 578                         DS1339_REG_ALARM1_SECS, 9, buf);
 579         if (ret != 9) {
 580                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 581                 return -EIO;
 582         }
 583         control = ds1307->regs[7];
 584         status = ds1307->regs[8];
 585
 586         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 587                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 588
 589         /* set ALARM1, using 24 hour and day-of-month modes */
 590         buf[0] = bin2bcd(t->time.tm_sec);
 591         buf[1] = bin2bcd(t->time.tm_min);
 592         buf[2] = bin2bcd(t->time.tm_hour);
 593         buf[3] = bin2bcd(t->time.tm_mday);
 594
 595         /* set ALARM2 to non-garbage */
 596         buf[4] = 0;
 597         buf[5] = 0;
 598         buf[6] = 0;
 599
 600         /* disable alarms */
 601         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 602         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 603
 604         ret = ds1307->write_block_data(client,
 605                         DS1339_REG_ALARM1_SECS, 9, buf);
 606         if (ret < 0) {
 607                 dev_err(dev, "can't set alarm time\n");
 608                 return ret;
 609         }
 610
 611         /* optionally enable ALARM1 */
 612         if (t->enabled) {
 613                 dev_dbg(dev, "alarm IRQ armed\n");
 614                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 615                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
 616         }
 617
 618         return 0;
 619 }
 620
 621 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 622 {
 623         struct i2c_client       *client = to_i2c_client(dev);
 624         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 625         int                     ret;
 626
 627         if (!test_bit(HAS_ALARM, &ds1307->flags))
 628                 return -ENOTTY;
 629
 630         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 631         if (ret < 0)
 632                 return ret;
 633
 634         if (enabled)
 635                 ret |= DS1337_BIT_A1IE;
 636         else
 637                 ret &= ~DS1337_BIT_A1IE;
 638
 639         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 640         if (ret < 0)
 641                 return ret;
 642
 643         return 0;
 644 }
 645
 646 static const struct rtc_class_ops ds13xx_rtc_ops = {
 647         .read_time      = ds1307_get_time,
 648         .set_time       = ds1307_set_time,
 649         .read_alarm     = ds1337_read_alarm,
 650         .set_alarm      = ds1337_set_alarm,
 651         .alarm_irq_enable = ds1307_alarm_irq_enable,
 652 };
 653
 654 /*----------------------------------------------------------------------*/
 655
 656 /*
 657  * Alarm support for mcp794xx devices.
 658  */
 659
 660 #define MCP794XX_REG_WEEKDAY            0x3
 661 #define MCP794XX_REG_WEEKDAY_WDAY_MASK  0x7
 662 #define MCP794XX_REG_CONTROL            0x07
 663 #       define MCP794XX_BIT_ALM0_EN     0x10
 664 #       define MCP794XX_BIT_ALM1_EN     0x20
 665 #define MCP794XX_REG_ALARM0_BASE        0x0a
 666 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 667 #define MCP794XX_REG_ALARM1_BASE        0x11
 668 #define MCP794XX_REG_ALARM1_CTRL        0x14
 669 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 670 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 671 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 672 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 673 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 674 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 675                                          MCP794XX_BIT_ALMX_C1 | \
 676                                          MCP794XX_BIT_ALMX_C2)
 677
 678 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 679 {
 680         struct i2c_client       *client = dev_id;
 681         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 682         struct mutex            *lock = &ds1307->rtc->ops_lock;
 683         int reg, ret;
 684
 685         mutex_lock(lock);
 686
 687         /* Check and clear alarm 0 interrupt flag. */
 688         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 689         if (reg < 0)
 690                 goto out;
 691         if (!(reg & MCP794XX_BIT_ALMX_IF))
 692                 goto out;
 693         reg &= ~MCP794XX_BIT_ALMX_IF;
 694         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 695         if (ret < 0)
 696                 goto out;
 697
 698         /* Disable alarm 0. */
 699         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 700         if (reg < 0)
 701                 goto out;
 702         reg &= ~MCP794XX_BIT_ALM0_EN;
 703         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 704         if (ret < 0)
 705                 goto out;
 706
 707         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 708
 709 out:
 710         mutex_unlock(lock);
 711
 712         return IRQ_HANDLED;
 713 }
 714
 715 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 716 {
 717         struct i2c_client *client = to_i2c_client(dev);
 718         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 719         u8 *regs = ds1307->regs;
 720         int ret;
 721
 722         if (!test_bit(HAS_ALARM, &ds1307->flags))
 723                 return -EINVAL;
 724
 725         /* Read control and alarm 0 registers. */
 726         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 727         if (ret < 0)
 728                 return ret;
 729
 730         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 731
 732         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 733         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 734         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 735         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 736         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 737         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 738         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 739         t->time.tm_year = -1;
 740         t->time.tm_yday = -1;
 741         t->time.tm_isdst = -1;
 742
 743         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 744                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 745                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 746                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 747                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 748                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 749                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 750
 751         return 0;
 752 }
 753
 754 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 755 {
 756         struct i2c_client *client = to_i2c_client(dev);
 757         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 758         unsigned char *regs = ds1307->regs;
 759         int ret;
 760
 761         if (!test_bit(HAS_ALARM, &ds1307->flags))
 762                 return -EINVAL;
 763
 764         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 765                 "enabled=%d pending=%d\n", __func__,
 766                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 767                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 768                 t->enabled, t->pending);
 769
 770         /* Read control and alarm 0 registers. */
 771         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 772         if (ret < 0)
 773                 return ret;
 774
 775         /* Set alarm 0, using 24-hour and day-of-month modes. */
 776         regs[3] = bin2bcd(t->time.tm_sec);
 777         regs[4] = bin2bcd(t->time.tm_min);
 778         regs[5] = bin2bcd(t->time.tm_hour);
 779         regs[6] = bin2bcd(t->time.tm_wday + 1);
 780         regs[7] = bin2bcd(t->time.tm_mday);
 781         regs[8] = bin2bcd(t->time.tm_mon + 1);
 782
 783         /* Clear the alarm 0 interrupt flag. */
 784         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 785         /* Set alarm match: second, minute, hour, day, date, month. */
 786         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 787         /* Disable interrupt. We will not enable until completely programmed */
 788         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 789
 790         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 791         if (ret < 0)
 792                 return ret;
 793
 794         if (!t->enabled)
 795                 return 0;
 796         regs[0] |= MCP794XX_BIT_ALM0_EN;
 797         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 798 }
 799
 800 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 801 {
 802         struct i2c_client *client = to_i2c_client(dev);
 803         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 804         int reg;
 805
 806         if (!test_bit(HAS_ALARM, &ds1307->flags))
 807                 return -EINVAL;
 808
 809         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 810         if (reg < 0)
 811                 return reg;
 812
 813         if (enabled)
 814                 reg |= MCP794XX_BIT_ALM0_EN;
 815         else
 816                 reg &= ~MCP794XX_BIT_ALM0_EN;
 817
 818         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 819 }
 820
 821 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 822         .read_time      = ds1307_get_time,
 823         .set_time       = ds1307_set_time,
 824         .read_alarm     = mcp794xx_read_alarm,
 825         .set_alarm      = mcp794xx_set_alarm,
 826         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 827 };
 828
 829 /*----------------------------------------------------------------------*/
 830
 831 static ssize_t
 832 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 833                 struct bin_attribute *attr,
 834                 char *buf, loff_t off, size_t count)
 835 {
 836         struct i2c_client       *client;
 837         struct ds1307           *ds1307;
 838         int                     result;
 839
 840         client = kobj_to_i2c_client(kobj);
 841         ds1307 = i2c_get_clientdata(client);
 842
 843         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 844                                                                 count, buf);
 845         if (result < 0)
 846                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 847         return result;
 848 }
 849
 850 static ssize_t
 851 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 852                 struct bin_attribute *attr,
 853                 char *buf, loff_t off, size_t count)
 854 {
 855         struct i2c_client       *client;
 856         struct ds1307           *ds1307;
 857         int                     result;
 858
 859         client = kobj_to_i2c_client(kobj);
 860         ds1307 = i2c_get_clientdata(client);
 861
 862         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 863                                                                 count, buf);
 864         if (result < 0) {
 865                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 866                 return result;
 867         }
 868         return count;
 869 }
 870
 871
 872 /*----------------------------------------------------------------------*/
 873
 874 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 875                                   uint32_t ohms, bool diode)
 876 {
 877         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 878                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 879
 880         switch (ohms) {
 881         case 250:
 882                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 883                 break;
 884         case 2000:
 885                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 886                 break;
 887         case 4000:
 888                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 889                 break;
 890         default:
 891                 dev_warn(&client->dev,
 892                          "Unsupported ohm value %u in dt\n", ohms);
 893                 return 0;
 894         }
 895         return setup;
 896 }
 897
 898 static void ds1307_trickle_init(struct i2c_client *client,
 899                                 struct chip_desc *chip)
 900 {
 901         uint32_t ohms = 0;
 902         bool diode = true;
 903
 904         if (!chip->do_trickle_setup)
 905                 goto out;
 906         if (device_property_read_u32(&client->dev, "trickle-resistor-ohms", &ohms))
 907                 goto out;
 908         if (device_property_read_bool(&client->dev, "trickle-diode-disable"))
 909                 diode = false;
 910         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 911                                                              ohms, diode);
 912 out:
 913         return;
 914 }
 915
 916 /*----------------------------------------------------------------------*/
 917
 918 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 919
 920 /*
 921  * Temperature sensor support for ds3231 devices.
 922  */
 923
 924 #define DS3231_REG_TEMPERATURE  0x11
 925
 926 /*
 927  * A user-initiated temperature conversion is not started by this function,
 928  * so the temperature is updated once every 64 seconds.
 929  */
 930 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
 931 {
 932         struct ds1307 *ds1307 = dev_get_drvdata(dev);
 933         u8 temp_buf[2];
 934         s16 temp;
 935         int ret;
 936
 937         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
 938                                         sizeof(temp_buf), temp_buf);
 939         if (ret < 0)
 940                 return ret;
 941         if (ret != sizeof(temp_buf))
 942                 return -EIO;
 943
 944         /*
 945          * Temperature is represented as a 10-bit code with a resolution of
 946          * 0.25 degree celsius and encoded in two's complement format.
 947          */
 948         temp = (temp_buf[0] << 8) | temp_buf[1];
 949         temp >>= 6;
 950         *mC = temp * 250;
 951
 952         return 0;
 953 }
 954
 955 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
 956                                 struct device_attribute *attr, char *buf)
 957 {
 958         int ret;
 959         s32 temp;
 960
 961         ret = ds3231_hwmon_read_temp(dev, &temp);
 962         if (ret)
 963                 return ret;
 964
 965         return sprintf(buf, "%d\n", temp);
 966 }
 967 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
 968                         NULL, 0);
 969
 970 static struct attribute *ds3231_hwmon_attrs[] = {
 971         &sensor_dev_attr_temp1_input.dev_attr.attr,
 972         NULL,
 973 };
 974 ATTRIBUTE_GROUPS(ds3231_hwmon);
 975
 976 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 977 {
 978         struct device *dev;
 979
 980         if (ds1307->type != ds_3231)
 981                 return;
 982
 983         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
 984                                                 ds1307->client->name,
 985                                                 ds1307, ds3231_hwmon_groups);
 986         if (IS_ERR(dev)) {
 987                 dev_warn(&ds1307->client->dev,
 988                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
 989         }
 990 }
 991
 992 #else
 993
 994 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 995 {
 996 }
 997
 998 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
 999
1000 /*----------------------------------------------------------------------*/
1001
1002 /*
1003  * Square-wave output support for DS3231
1004  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
1005  */
1006 #ifdef CONFIG_COMMON_CLK
1007
1008 enum {
1009         DS3231_CLK_SQW = 0,
1010         DS3231_CLK_32KHZ,
1011 };
1012
1013 #define clk_sqw_to_ds1307(clk)  \
1014         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
1015 #define clk_32khz_to_ds1307(clk)        \
1016         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
1017
1018 static int ds3231_clk_sqw_rates[] = {
1019         1,
1020         1024,
1021         4096,
1022         8192,
1023 };
1024
1025 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
1026 {
1027         struct i2c_client *client = ds1307->client;
1028         struct mutex *lock = &ds1307->rtc->ops_lock;
1029         int control;
1030         int ret;
1031
1032         mutex_lock(lock);
1033
1034         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
1035         if (control < 0) {
1036                 ret = control;
1037                 goto out;
1038         }
1039
1040         control &= ~mask;
1041         control |= value;
1042
1043         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
1044 out:
1045         mutex_unlock(lock);
1046
1047         return ret;
1048 }
1049
1050 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
1051                                                 unsigned long parent_rate)
1052 {
1053         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1054         int control;
1055         int rate_sel = 0;
1056
1057         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1058         if (control < 0)
1059                 return control;
1060         if (control & DS1337_BIT_RS1)
1061                 rate_sel += 1;
1062         if (control & DS1337_BIT_RS2)
1063                 rate_sel += 2;
1064
1065         return ds3231_clk_sqw_rates[rate_sel];
1066 }
1067
1068 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1069                                         unsigned long *prate)
1070 {
1071         int i;
1072
1073         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1074                 if (ds3231_clk_sqw_rates[i] <= rate)
1075                         return ds3231_clk_sqw_rates[i];
1076         }
1077
1078         return 0;
1079 }
1080
1081 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1082                                         unsigned long parent_rate)
1083 {
1084         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1085         int control = 0;
1086         int rate_sel;
1087
1088         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1089                         rate_sel++) {
1090                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1091                         break;
1092         }
1093
1094         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1095                 return -EINVAL;
1096
1097         if (rate_sel & 1)
1098                 control |= DS1337_BIT_RS1;
1099         if (rate_sel & 2)
1100                 control |= DS1337_BIT_RS2;
1101
1102         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1103                                 control);
1104 }
1105
1106 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1107 {
1108         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1109
1110         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1111 }
1112
1113 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1114 {
1115         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1116
1117         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1118 }
1119
1120 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1121 {
1122         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1123         int control;
1124
1125         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1126         if (control < 0)
1127                 return control;
1128
1129         return !(control & DS1337_BIT_INTCN);
1130 }
1131
1132 static const struct clk_ops ds3231_clk_sqw_ops = {
1133         .prepare = ds3231_clk_sqw_prepare,
1134         .unprepare = ds3231_clk_sqw_unprepare,
1135         .is_prepared = ds3231_clk_sqw_is_prepared,
1136         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1137         .round_rate = ds3231_clk_sqw_round_rate,
1138         .set_rate = ds3231_clk_sqw_set_rate,
1139 };
1140
1141 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1142                                                 unsigned long parent_rate)
1143 {
1144         return 32768;
1145 }
1146
1147 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1148 {
1149         struct i2c_client *client = ds1307->client;
1150         struct mutex *lock = &ds1307->rtc->ops_lock;
1151         int status;
1152         int ret;
1153
1154         mutex_lock(lock);
1155
1156         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1157         if (status < 0) {
1158                 ret = status;
1159                 goto out;
1160         }
1161
1162         if (enable)
1163                 status |= DS3231_BIT_EN32KHZ;
1164         else
1165                 status &= ~DS3231_BIT_EN32KHZ;
1166
1167         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1168 out:
1169         mutex_unlock(lock);
1170
1171         return ret;
1172 }
1173
1174 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1175 {
1176         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1177
1178         return ds3231_clk_32khz_control(ds1307, true);
1179 }
1180
1181 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1182 {
1183         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1184
1185         ds3231_clk_32khz_control(ds1307, false);
1186 }
1187
1188 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1189 {
1190         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1191         int status;
1192
1193         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1194         if (status < 0)
1195                 return status;
1196
1197         return !!(status & DS3231_BIT_EN32KHZ);
1198 }
1199
1200 static const struct clk_ops ds3231_clk_32khz_ops = {
1201         .prepare = ds3231_clk_32khz_prepare,
1202         .unprepare = ds3231_clk_32khz_unprepare,
1203         .is_prepared = ds3231_clk_32khz_is_prepared,
1204         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1205 };
1206
1207 static struct clk_init_data ds3231_clks_init[] = {
1208         [DS3231_CLK_SQW] = {
1209                 .name = "ds3231_clk_sqw",
1210                 .ops = &ds3231_clk_sqw_ops,
1211         },
1212         [DS3231_CLK_32KHZ] = {
1213                 .name = "ds3231_clk_32khz",
1214                 .ops = &ds3231_clk_32khz_ops,
1215         },
1216 };
1217
1218 static int ds3231_clks_register(struct ds1307 *ds1307)
1219 {
1220         struct i2c_client *client = ds1307->client;
1221         struct device_node *node = client->dev.of_node;
1222         struct clk_onecell_data *onecell;
1223         int i;
1224
1225         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1226         if (!onecell)
1227                 return -ENOMEM;
1228
1229         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1230         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1231                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1232         if (!onecell->clks)
1233                 return -ENOMEM;
1234
1235         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1236                 struct clk_init_data init = ds3231_clks_init[i];
1237
1238                 /*
1239                  * Interrupt signal due to alarm conditions and square-wave
1240                  * output share same pin, so don't initialize both.
1241                  */
1242                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1243                         continue;
1244
1245                 /* optional override of the clockname */
1246                 of_property_read_string_index(node, "clock-output-names", i,
1247                                                 &init.name);
1248                 ds1307->clks[i].init = &init;
1249
1250                 onecell->clks[i] = devm_clk_register(&client->dev,
1251                                                         &ds1307->clks[i]);
1252                 if (IS_ERR(onecell->clks[i]))
1253                         return PTR_ERR(onecell->clks[i]);
1254         }
1255
1256         if (!node)
1257                 return 0;
1258
1259         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1260
1261         return 0;
1262 }
1263
1264 static void ds1307_clks_register(struct ds1307 *ds1307)
1265 {
1266         int ret;
1267
1268         if (ds1307->type != ds_3231)
1269                 return;
1270
1271         ret = ds3231_clks_register(ds1307);
1272         if (ret) {
1273                 dev_warn(&ds1307->client->dev,
1274                         "unable to register clock device %d\n", ret);
1275         }
1276 }
1277
1278 #else
1279
1280 static void ds1307_clks_register(struct ds1307 *ds1307)
1281 {
1282 }
1283
1284 #endif /* CONFIG_COMMON_CLK */
1285
1286 static int ds1307_probe(struct i2c_client *client,
1287                         const struct i2c_device_id *id)
1288 {
1289         struct ds1307           *ds1307;
1290         int                     err = -ENODEV;
1291         int                     tmp, wday;
1292         struct chip_desc        *chip;
1293         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1294         bool                    want_irq = false;
1295         bool                    ds1307_can_wakeup_device = false;
1296         unsigned char           *buf;
1297         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1298         struct rtc_time         tm;
1299         unsigned long           timestamp;
1300
1301         irq_handler_t   irq_handler = ds1307_irq;
1302
1303         static const int        bbsqi_bitpos[] = {
1304                 [ds_1337] = 0,
1305                 [ds_1339] = DS1339_BIT_BBSQI,
1306                 [ds_3231] = DS3231_BIT_BBSQW,
1307         };
1308         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1309
1310         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1311             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1312                 return -EIO;
1313
1314         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1315         if (!ds1307)
1316                 return -ENOMEM;
1317
1318         i2c_set_clientdata(client, ds1307);
1319
1320         ds1307->client  = client;
1321         if (id) {
1322                 chip = &chips[id->driver_data];
1323                 ds1307->type = id->driver_data;
1324         } else {
1325                 const struct acpi_device_id *acpi_id;
1326
1327                 acpi_id = acpi_match_device(ACPI_PTR(ds1307_acpi_ids),
1328                                             &client->dev);
1329                 if (!acpi_id)
1330                         return -ENODEV;
1331                 chip = &chips[acpi_id->driver_data];
1332                 ds1307->type = acpi_id->driver_data;
1333         }
1334
1335         if (!pdata)
1336                 ds1307_trickle_init(client, chip);
1337         else if (pdata->trickle_charger_setup)
1338                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1339
1340         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1341                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1342                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1343                     chip->trickle_charger_reg);
1344                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1345                     DS13XX_TRICKLE_CHARGER_MAGIC |
1346                     chip->trickle_charger_setup);
1347         }
1348
1349         buf = ds1307->regs;
1350         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1351                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1352                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1353         } else {
1354                 ds1307->read_block_data = ds1307_read_block_data;
1355                 ds1307->write_block_data = ds1307_write_block_data;
1356         }
1357
1358 #ifdef CONFIG_OF
1359 /*
1360  * For devices with no IRQ directly connected to the SoC, the RTC chip
1361  * can be forced as a wakeup source by stating that explicitly in
1362  * the device's .dts file using the "wakeup-source" boolean property.
1363  * If the "wakeup-source" property is set, don't request an IRQ.
1364  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1365  * if supported by the RTC.
1366  */
1367         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1368                 ds1307_can_wakeup_device = true;
1369         }
1370         /* Intersil ISL12057 DT backward compatibility */
1371         if (of_property_read_bool(client->dev.of_node,
1372                                   "isil,irq2-can-wakeup-machine")) {
1373                 ds1307_can_wakeup_device = true;
1374         }
1375 #endif
1376
1377         switch (ds1307->type) {
1378         case ds_1337:
1379         case ds_1339:
1380         case ds_3231:
1381                 /* get registers that the "rtc" read below won't read... */
1382                 tmp = ds1307->read_block_data(ds1307->client,
1383                                 DS1337_REG_CONTROL, 2, buf);
1384                 if (tmp != 2) {
1385                         dev_dbg(&client->dev, "read error %d\n", tmp);
1386                         err = -EIO;
1387                         goto exit;
1388                 }
1389
1390                 /* oscillator off?  turn it on, so clock can tick. */
1391                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1392                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1393
1394                 /*
1395                  * Using IRQ or defined as wakeup-source?
1396                  * Disable the square wave and both alarms.
1397                  * For some variants, be sure alarms can trigger when we're
1398                  * running on Vbackup (BBSQI/BBSQW)
1399                  */
1400                 if (chip->alarm && (ds1307->client->irq > 0 ||
1401                                                 ds1307_can_wakeup_device)) {
1402                         ds1307->regs[0] |= DS1337_BIT_INTCN
1403                                         | bbsqi_bitpos[ds1307->type];
1404                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1405
1406                         want_irq = true;
1407                 }
1408
1409                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1410                                                         ds1307->regs[0]);
1411
1412                 /* oscillator fault?  clear flag, and warn */
1413                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1414                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1415                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1416                         dev_warn(&client->dev, "SET TIME!\n");
1417                 }
1418                 break;
1419
1420         case rx_8025:
1421                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1422                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1423                 if (tmp != 2) {
1424                         dev_dbg(&client->dev, "read error %d\n", tmp);
1425                         err = -EIO;
1426                         goto exit;
1427                 }
1428
1429                 /* oscillator off?  turn it on, so clock can tick. */
1430                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1431                         ds1307->regs[1] |= RX8025_BIT_XST;
1432                         i2c_smbus_write_byte_data(client,
1433                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1434                                                   ds1307->regs[1]);
1435                         dev_warn(&client->dev,
1436                                  "oscillator stop detected - SET TIME!\n");
1437                 }
1438
1439                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1440                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1441                         i2c_smbus_write_byte_data(client,
1442                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1443                                                   ds1307->regs[1]);
1444                         dev_warn(&client->dev, "power-on detected\n");
1445                 }
1446
1447                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1448                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1449                         i2c_smbus_write_byte_data(client,
1450                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1451                                                   ds1307->regs[1]);
1452                         dev_warn(&client->dev, "voltage drop detected\n");
1453                 }
1454
1455                 /* make sure we are running in 24hour mode */
1456                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1457                         u8 hour;
1458
1459                         /* switch to 24 hour mode */
1460                         i2c_smbus_write_byte_data(client,
1461                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1462                                                   ds1307->regs[0] |
1463                                                   RX8025_BIT_2412);
1464
1465                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1466                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1467                         if (tmp != 2) {
1468                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1469                                 err = -EIO;
1470                                 goto exit;
1471                         }
1472
1473                         /* correct hour */
1474                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1475                         if (hour == 12)
1476                                 hour = 0;
1477                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1478                                 hour += 12;
1479
1480                         i2c_smbus_write_byte_data(client,
1481                                                   DS1307_REG_HOUR << 4 | 0x08,
1482                                                   hour);
1483                 }
1484                 break;
1485         case ds_1388:
1486                 ds1307->offset = 1; /* Seconds starts at 1 */
1487                 break;
1488         case mcp794xx:
1489                 rtc_ops = &mcp794xx_rtc_ops;
1490                 if (ds1307->client->irq > 0 && chip->alarm) {
1491                         irq_handler = mcp794xx_irq;
1492                         want_irq = true;
1493                 }
1494                 break;
1495         default:
1496                 break;
1497         }
1498
1499 read_rtc:
1500         /* read RTC registers */
1501         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1502         if (tmp != 8) {
1503                 dev_dbg(&client->dev, "read error %d\n", tmp);
1504                 err = -EIO;
1505                 goto exit;
1506         }
1507
1508         /*
1509          * minimal sanity checking; some chips (like DS1340) don't
1510          * specify the extra bits as must-be-zero, but there are
1511          * still a few values that are clearly out-of-range.
1512          */
1513         tmp = ds1307->regs[DS1307_REG_SECS];
1514         switch (ds1307->type) {
1515         case ds_1307:
1516         case m41t00:
1517                 /* clock halted?  turn it on, so clock can tick. */
1518                 if (tmp & DS1307_BIT_CH) {
1519                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1520                         dev_warn(&client->dev, "SET TIME!\n");
1521                         goto read_rtc;
1522                 }
1523                 break;
1524         case ds_1338:
1525                 /* clock halted?  turn it on, so clock can tick. */
1526                 if (tmp & DS1307_BIT_CH)
1527                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1528
1529                 /* oscillator fault?  clear flag, and warn */
1530                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1531                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1532                                         ds1307->regs[DS1307_REG_CONTROL]
1533                                         & ~DS1338_BIT_OSF);
1534                         dev_warn(&client->dev, "SET TIME!\n");
1535                         goto read_rtc;
1536                 }
1537                 break;
1538         case ds_1340:
1539                 /* clock halted?  turn it on, so clock can tick. */
1540                 if (tmp & DS1340_BIT_nEOSC)
1541                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1542
1543                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1544                 if (tmp < 0) {
1545                         dev_dbg(&client->dev, "read error %d\n", tmp);
1546                         err = -EIO;
1547                         goto exit;
1548                 }
1549
1550                 /* oscillator fault?  clear flag, and warn */
1551                 if (tmp & DS1340_BIT_OSF) {
1552                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1553                         dev_warn(&client->dev, "SET TIME!\n");
1554                 }
1555                 break;
1556         case mcp794xx:
1557                 /* make sure that the backup battery is enabled */
1558                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1559                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1560                                         ds1307->regs[DS1307_REG_WDAY]
1561                                         | MCP794XX_BIT_VBATEN);
1562                 }
1563
1564                 /* clock halted?  turn it on, so clock can tick. */
1565                 if (!(tmp & MCP794XX_BIT_ST)) {
1566                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1567                                         MCP794XX_BIT_ST);
1568                         dev_warn(&client->dev, "SET TIME!\n");
1569                         goto read_rtc;
1570                 }
1571
1572                 break;
1573         default:
1574                 break;
1575         }
1576
1577         tmp = ds1307->regs[DS1307_REG_HOUR];
1578         switch (ds1307->type) {
1579         case ds_1340:
1580         case m41t00:
1581                 /*
1582                  * NOTE: ignores century bits; fix before deploying
1583                  * systems that will run through year 2100.
1584                  */
1585                 break;
1586         case rx_8025:
1587                 break;
1588         default:
1589                 if (!(tmp & DS1307_BIT_12HR))
1590                         break;
1591
1592                 /*
1593                  * Be sure we're in 24 hour mode.  Multi-master systems
1594                  * take note...
1595                  */
1596                 tmp = bcd2bin(tmp & 0x1f);
1597                 if (tmp == 12)
1598                         tmp = 0;
1599                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1600                         tmp += 12;
1601                 i2c_smbus_write_byte_data(client,
1602                                 ds1307->offset + DS1307_REG_HOUR,
1603                                 bin2bcd(tmp));
1604         }
1605
1606         /*
1607          * Some IPs have weekday reset value = 0x1 which might not correct
1608          * hence compute the wday using the current date/month/year values
1609          */
1610         ds1307_get_time(&client->dev, &tm);
1611         wday = tm.tm_wday;
1612         timestamp = rtc_tm_to_time64(&tm);
1613         rtc_time64_to_tm(timestamp, &tm);
1614
1615         /*
1616          * Check if reset wday is different from the computed wday
1617          * If different then set the wday which we computed using
1618          * timestamp
1619          */
1620         if (wday != tm.tm_wday) {
1621                 wday = i2c_smbus_read_byte_data(client, MCP794XX_REG_WEEKDAY);
1622                 wday = wday & ~MCP794XX_REG_WEEKDAY_WDAY_MASK;
1623                 wday = wday | (tm.tm_wday + 1);
1624                 i2c_smbus_write_byte_data(client, MCP794XX_REG_WEEKDAY, wday);
1625         }
1626
1627         if (want_irq) {
1628                 device_set_wakeup_capable(&client->dev, true);
1629                 set_bit(HAS_ALARM, &ds1307->flags);
1630         }
1631         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1632                                 rtc_ops, THIS_MODULE);
1633         if (IS_ERR(ds1307->rtc)) {
1634                 return PTR_ERR(ds1307->rtc);
1635         }
1636
1637         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1638                 /* Disable request for an IRQ */
1639                 want_irq = false;
1640                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1641                 /* We cannot support UIE mode if we do not have an IRQ line */
1642                 ds1307->rtc->uie_unsupported = 1;
1643         }
1644
1645         if (want_irq) {
1646                 err = devm_request_threaded_irq(&client->dev,
1647                                                 client->irq, NULL, irq_handler,
1648                                                 IRQF_SHARED | IRQF_ONESHOT,
1649                                                 ds1307->rtc->name, client);
1650                 if (err) {
1651                         client->irq = 0;
1652                         device_set_wakeup_capable(&client->dev, false);
1653                         clear_bit(HAS_ALARM, &ds1307->flags);
1654                         dev_err(&client->dev, "unable to request IRQ!\n");
1655                 } else
1656                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1657         }
1658
1659         if (chip->nvram_size) {
1660
1661                 ds1307->nvram = devm_kzalloc(&client->dev,
1662                                         sizeof(struct bin_attribute),
1663                                         GFP_KERNEL);
1664                 if (!ds1307->nvram) {
1665                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1666                 } else {
1667
1668                         ds1307->nvram->attr.name = "nvram";
1669                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1670
1671                         sysfs_bin_attr_init(ds1307->nvram);
1672
1673                         ds1307->nvram->read = ds1307_nvram_read;
1674                         ds1307->nvram->write = ds1307_nvram_write;
1675                         ds1307->nvram->size = chip->nvram_size;
1676                         ds1307->nvram_offset = chip->nvram_offset;
1677
1678                         err = sysfs_create_bin_file(&client->dev.kobj,
1679                                                     ds1307->nvram);
1680                         if (err) {
1681                                 dev_err(&client->dev,
1682                                         "unable to create sysfs file: %s\n",
1683                                         ds1307->nvram->attr.name);
1684                         } else {
1685                                 set_bit(HAS_NVRAM, &ds1307->flags);
1686                                 dev_info(&client->dev, "%zu bytes nvram\n",
1687                                          ds1307->nvram->size);
1688                         }
1689                 }
1690         }
1691
1692         ds1307_hwmon_register(ds1307);
1693         ds1307_clks_register(ds1307);
1694
1695         return 0;
1696
1697 exit:
1698         return err;
1699 }
1700
1701 static int ds1307_remove(struct i2c_client *client)
1702 {
1703         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1704
1705         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1706                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1707
1708         return 0;
1709 }
1710
1711 static struct i2c_driver ds1307_driver = {
1712         .driver = {
1713                 .name   = "rtc-ds1307",
1714                 .acpi_match_table = ACPI_PTR(ds1307_acpi_ids),
1715         },
1716         .probe          = ds1307_probe,
1717         .remove         = ds1307_remove,
1718         .id_table       = ds1307_id,
1719 };
1720
1721 module_i2c_driver(ds1307_driver);
1722
1723 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1724 MODULE_LICENSE("GPL");