3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/immap.h>
34 struct spi_slave slave;
39 int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
40 void *din, ulong flags);
41 struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode);
42 void cfspi_init(void);
43 void cfspi_tx(u32 ctrl, u16 data);
46 extern void cfspi_port_conf(void);
47 extern int cfspi_claim_bus(uint bus, uint cs);
48 extern void cfspi_release_bus(uint bus, uint cs);
50 DECLARE_GLOBAL_DATA_PTR;
52 #ifndef CONFIG_SPI_IDLE_VAL
53 #if defined(CONFIG_SPI_MMC)
54 #define CONFIG_SPI_IDLE_VAL 0xFFFF
56 #define CONFIG_SPI_IDLE_VAL 0x0
60 #if defined(CONFIG_CF_DSPI)
61 /* DSPI specific mode */
62 #define SPI_MODE_MOD 0x00200000
63 #define SPI_DBLRATE 0x00100000
67 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
69 cfspi_port_conf(); /* port configuration */
71 dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
72 DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
73 DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
74 DSPI_MCR_CRXF | DSPI_MCR_CTXF;
76 /* Default setting in platform configuration */
77 #ifdef CONFIG_SYS_DSPI_CTAR0
78 dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0;
80 #ifdef CONFIG_SYS_DSPI_CTAR1
81 dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1;
83 #ifdef CONFIG_SYS_DSPI_CTAR2
84 dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2;
86 #ifdef CONFIG_SYS_DSPI_CTAR3
87 dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3;
89 #ifdef CONFIG_SYS_DSPI_CTAR4
90 dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4;
92 #ifdef CONFIG_SYS_DSPI_CTAR5
93 dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5;
95 #ifdef CONFIG_SYS_DSPI_CTAR6
96 dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6;
98 #ifdef CONFIG_SYS_DSPI_CTAR7
99 dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7;
103 void cfspi_tx(u32 ctrl, u16 data)
105 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
107 while ((dspi->sr & 0x0000F000) >= 4) ;
109 dspi->tfr = (ctrl | data);
114 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
116 while ((dspi->sr & 0x000000F0) == 0) ;
118 return (dspi->rfr & 0xFFFF);
121 int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
122 void *din, ulong flags)
124 struct cf_spi_slave *cfslave = (struct cf_spi_slave *)slave;
125 u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
126 u8 *spi_rd = NULL, *spi_wr = NULL;
128 uint len = bitlen >> 3;
130 if (cfslave->charbit == 16) {
132 spi_wr16 = (u16 *) dout;
133 spi_rd16 = (u16 *) din;
135 spi_wr = (u8 *) dout;
139 if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN)
140 ctrl |= DSPI_TFR_CONT;
142 ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16);
145 int tmp_len = len - 1;
148 if (cfslave->charbit == 16)
149 cfspi_tx(ctrl, *spi_wr16++);
151 cfspi_tx(ctrl, *spi_wr++);
156 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
157 if (cfslave->charbit == 16)
158 *spi_rd16++ = cfspi_rx();
160 *spi_rd++ = cfspi_rx();
164 len = 1; /* remaining byte */
167 if ((flags & SPI_XFER_END) == SPI_XFER_END)
168 ctrl &= ~DSPI_TFR_CONT;
172 if (cfslave->charbit == 16)
173 cfspi_tx(ctrl, *spi_wr16);
175 cfspi_tx(ctrl, *spi_wr);
180 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
181 if (cfslave->charbit == 16)
182 *spi_rd16 = cfspi_rx();
184 *spi_rd = cfspi_rx();
188 cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
195 struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
198 * bit definition for mode:
199 * bit 31 - 28: Transfer size 3 to 16 bits
200 * 27 - 26: PCS to SCK delay prescaler
201 * 25 - 24: After SCK delay prescaler
202 * 23 - 22: Delay after transfer prescaler
203 * 21 : Allow overwrite for bit 31-22 and bit 20-8
204 * 20 : Double baud rate
205 * 19 - 16: PCS to SCK delay scaler
206 * 15 - 12: After SCK delay scaler
207 * 11 - 8: Delay after transfer scaler
208 * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST
210 volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
211 int prescaler[] = { 2, 3, 5, 7 };
215 256, 512, 1024, 2048,
216 4096, 8192, 16384, 32768
218 int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0;
219 int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed;
222 tmp = (prescaler[3] * scaler[15]);
223 /* Maximum and minimum baudrate it can handle */
224 if ((cfslave->baudrate > (gd->bus_clk >> 1)) ||
225 (cfslave->baudrate < (gd->bus_clk / tmp))) {
226 printf("Exceed baudrate limitation: Max %d - Min %d\n",
227 (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp));
231 /* Activate Double Baud when it exceed 1/4 the bus clk */
232 if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) ||
233 (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) {
234 bus_setup |= DSPI_CTAR_DBR;
239 bus_setup |= DSPI_CTAR_CPOL;
241 bus_setup |= DSPI_CTAR_CPHA;
242 if (mode & SPI_LSB_FIRST)
243 bus_setup |= DSPI_CTAR_LSBFE;
245 /* Overwrite default value set in platform configuration file */
246 if (mode & SPI_MODE_MOD) {
248 if ((mode & 0xF0000000) == 0)
250 dspi->ctar[cfslave->slave.bus] & 0x78000000;
252 bus_setup |= ((mode & 0xF0000000) >> 1);
255 * Check to see if it is enabled by default in platform
256 * config, or manual setting passed by mode parameter
258 if (mode & SPI_DBLRATE) {
259 bus_setup |= DSPI_CTAR_DBR;
262 bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */
263 bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */
265 bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0);
268 ((dspi->ctar[cfslave->slave.bus] & 0x78000000) ==
269 0x78000000) ? 16 : 8;
271 pbrcnt = sizeof(prescaler) / sizeof(int);
272 brcnt = sizeof(scaler) / sizeof(int);
274 /* baudrate calculation - to closer value, may not be exact match */
275 for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) {
276 baud_speed = gd->bus_clk / prescaler[i];
277 for (j = 0; j < brcnt; j++) {
278 tmp = (baud_speed / scaler[j]) * (1 + dbr);
280 if (tmp > cfslave->baudrate)
281 diff = tmp - cfslave->baudrate;
283 diff = cfslave->baudrate - tmp;
285 if (diff < bestmatch) {
292 bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
293 dspi->ctar[cfslave->slave.bus] = bus_setup;
295 return &cfslave->slave;
297 #endif /* CONFIG_CF_DSPI */
299 #ifdef CONFIG_CF_QSPI
301 #endif /* CONFIG_CF_QSPI */
303 #ifdef CONFIG_CMD_SPI
304 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
306 if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8)))
312 void spi_init_f(void)
316 void spi_init_r(void)
325 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
326 unsigned int max_hz, unsigned int mode)
328 struct cf_spi_slave *cfslave;
330 if (!spi_cs_is_valid(bus, cs))
333 cfslave = malloc(sizeof(struct cf_spi_slave));
337 cfslave->slave.bus = bus;
338 cfslave->slave.cs = cs;
339 cfslave->baudrate = max_hz;
342 return cfspi_setup_slave(cfslave, mode);
345 void spi_free_slave(struct spi_slave *slave)
350 int spi_claim_bus(struct spi_slave *slave)
352 return cfspi_claim_bus(slave->bus, slave->cs);
355 void spi_release_bus(struct spi_slave *slave)
357 cfspi_release_bus(slave->bus, slave->cs);
360 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
361 void *din, unsigned long flags)
363 return cfspi_xfer(slave, bitlen, dout, din, flags);
365 #endif /* CONFIG_CMD_SPI */