2 * Copyright (C) 2012-2017 ARM Limited or its affiliates.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #ifndef _CC_CRYPTO_CTX_H_
19 #define _CC_CRYPTO_CTX_H_
21 #include <linux/types.h>
24 #ifndef CC_CTX_SIZE_LOG2
25 #if (CC_SUPPORT_SHA > 256)
26 #define CC_CTX_SIZE_LOG2 8
28 #define CC_CTX_SIZE_LOG2 7
31 #define CC_CTX_SIZE (1 << CC_CTX_SIZE_LOG2)
32 #define CC_DRV_CTX_SIZE_WORDS (CC_CTX_SIZE >> 2)
34 #define CC_DRV_DES_IV_SIZE 8
35 #define CC_DRV_DES_BLOCK_SIZE 8
37 #define CC_DRV_DES_ONE_KEY_SIZE 8
38 #define CC_DRV_DES_DOUBLE_KEY_SIZE 16
39 #define CC_DRV_DES_TRIPLE_KEY_SIZE 24
40 #define CC_DRV_DES_KEY_SIZE_MAX CC_DRV_DES_TRIPLE_KEY_SIZE
42 #define CC_AES_IV_SIZE 16
43 #define CC_AES_IV_SIZE_WORDS (CC_AES_IV_SIZE >> 2)
45 #define CC_AES_BLOCK_SIZE 16
46 #define CC_AES_BLOCK_SIZE_WORDS 4
48 #define CC_AES_128_BIT_KEY_SIZE 16
49 #define CC_AES_128_BIT_KEY_SIZE_WORDS (CC_AES_128_BIT_KEY_SIZE >> 2)
50 #define CC_AES_192_BIT_KEY_SIZE 24
51 #define CC_AES_192_BIT_KEY_SIZE_WORDS (CC_AES_192_BIT_KEY_SIZE >> 2)
52 #define CC_AES_256_BIT_KEY_SIZE 32
53 #define CC_AES_256_BIT_KEY_SIZE_WORDS (CC_AES_256_BIT_KEY_SIZE >> 2)
54 #define CC_AES_KEY_SIZE_MAX CC_AES_256_BIT_KEY_SIZE
55 #define CC_AES_KEY_SIZE_WORDS_MAX (CC_AES_KEY_SIZE_MAX >> 2)
57 #define CC_MD5_DIGEST_SIZE 16
58 #define CC_SHA1_DIGEST_SIZE 20
59 #define CC_SHA224_DIGEST_SIZE 28
60 #define CC_SHA256_DIGEST_SIZE 32
61 #define CC_SHA256_DIGEST_SIZE_IN_WORDS 8
62 #define CC_SHA384_DIGEST_SIZE 48
63 #define CC_SHA512_DIGEST_SIZE 64
65 #define CC_SHA1_BLOCK_SIZE 64
66 #define CC_SHA1_BLOCK_SIZE_IN_WORDS 16
67 #define CC_MD5_BLOCK_SIZE 64
68 #define CC_MD5_BLOCK_SIZE_IN_WORDS 16
69 #define CC_SHA224_BLOCK_SIZE 64
70 #define CC_SHA256_BLOCK_SIZE 64
71 #define CC_SHA256_BLOCK_SIZE_IN_WORDS 16
72 #define CC_SHA1_224_256_BLOCK_SIZE 64
73 #define CC_SHA384_BLOCK_SIZE 128
74 #define CC_SHA512_BLOCK_SIZE 128
76 #if (CC_SUPPORT_SHA > 256)
77 #define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
78 #define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/
79 #else /* Only up to SHA256 */
80 #define CC_DIGEST_SIZE_MAX CC_SHA256_DIGEST_SIZE
81 #define CC_HASH_BLOCK_SIZE_MAX CC_SHA256_BLOCK_SIZE /*512b*/
84 #define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX
86 #define CC_MULTI2_SYSTEM_KEY_SIZE 32
87 #define CC_MULTI2_DATA_KEY_SIZE 8
88 #define CC_MULTI2_SYSTEM_N_DATA_KEY_SIZE (CC_MULTI2_SYSTEM_KEY_SIZE + CC_MULTI2_DATA_KEY_SIZE)
89 #define CC_MULTI2_BLOCK_SIZE 8
90 #define CC_MULTI2_IV_SIZE 8
91 #define CC_MULTI2_MIN_NUM_ROUNDS 8
92 #define CC_MULTI2_MAX_NUM_ROUNDS 128
95 #define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX
98 enum drv_engine_type {
105 DRV_ENGINE_RESERVE32B = S32_MAX,
108 enum drv_crypto_alg {
109 DRV_CRYPTO_ALG_NULL = -1,
110 DRV_CRYPTO_ALG_AES = 0,
111 DRV_CRYPTO_ALG_DES = 1,
112 DRV_CRYPTO_ALG_HASH = 2,
113 DRV_CRYPTO_ALG_C2 = 3,
114 DRV_CRYPTO_ALG_HMAC = 4,
115 DRV_CRYPTO_ALG_AEAD = 5,
116 DRV_CRYPTO_ALG_BYPASS = 6,
117 DRV_CRYPTO_ALG_NUM = 7,
118 DRV_CRYPTO_ALG_RESERVE32B = S32_MAX
121 enum drv_crypto_direction {
122 DRV_CRYPTO_DIRECTION_NULL = -1,
123 DRV_CRYPTO_DIRECTION_ENCRYPT = 0,
124 DRV_CRYPTO_DIRECTION_DECRYPT = 1,
125 DRV_CRYPTO_DIRECTION_DECRYPT_ENCRYPT = 3,
126 DRV_CRYPTO_DIRECTION_RESERVE32B = S32_MAX
129 enum drv_cipher_mode {
130 DRV_CIPHER_NULL_MODE = -1,
134 DRV_CIPHER_CBC_MAC = 3,
136 DRV_CIPHER_XCBC_MAC = 5,
140 DRV_CIPHER_CBC_CTS = 11,
141 DRV_CIPHER_GCTR = 12,
142 DRV_CIPHER_ESSIV = 13,
143 DRV_CIPHER_BITLOCKER = 14,
144 DRV_CIPHER_RESERVE32B = S32_MAX
155 DRV_HASH_CBC_MAC = 6,
156 DRV_HASH_XCBC_MAC = 7,
158 DRV_HASH_MODE_NUM = 9,
159 DRV_HASH_RESERVE32B = S32_MAX
162 enum drv_hash_hw_mode {
164 DRV_HASH_HW_SHA1 = 1,
165 DRV_HASH_HW_SHA256 = 2,
166 DRV_HASH_HW_SHA224 = 10,
167 DRV_HASH_HW_SHA512 = 4,
168 DRV_HASH_HW_SHA384 = 12,
169 DRV_HASH_HW_GHASH = 6,
170 DRV_HASH_HW_RESERVE32B = S32_MAX
173 enum drv_multi2_mode {
174 DRV_MULTI2_NULL = -1,
178 DRV_MULTI2_RESERVE32B = S32_MAX
182 /* drv_crypto_key_type[1:0] is mapped to cipher_do[1:0] */
183 /* drv_crypto_key_type[2] is mapped to cipher_config2 */
184 enum drv_crypto_key_type {
186 DRV_USER_KEY = 0, /* 0x000 */
187 DRV_ROOT_KEY = 1, /* 0x001 */
188 DRV_PROVISIONING_KEY = 2, /* 0x010 */
189 DRV_SESSION_KEY = 3, /* 0x011 */
190 DRV_APPLET_KEY = 4, /* NA */
191 DRV_PLATFORM_KEY = 5, /* 0x101 */
192 DRV_CUSTOMER_KEY = 6, /* 0x110 */
193 DRV_END_OF_KEYS = S32_MAX,
196 enum drv_crypto_padding_type {
197 DRV_PADDING_NONE = 0,
198 DRV_PADDING_PKCS7 = 1,
199 DRV_PADDING_RESERVE32B = S32_MAX
202 /*******************************************************************/
203 /***************** DESCRIPTOR BASED CONTEXTS ***********************/
204 /*******************************************************************/
206 /* Generic context ("super-class") */
207 struct drv_ctx_generic {
208 enum drv_crypto_alg alg;
209 } __attribute__((__may_alias__));
212 struct drv_ctx_hash {
213 enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HASH */
214 enum drv_hash_mode mode;
215 u8 digest[CC_DIGEST_SIZE_MAX];
216 /* reserve to end of allocated context size */
217 u8 reserved[CC_CTX_SIZE - 2 * sizeof(u32) -
221 /* !!!! drv_ctx_hmac should have the same structure as drv_ctx_hash except
222 k0, k0_size fields */
223 struct drv_ctx_hmac {
224 enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_HMAC */
225 enum drv_hash_mode mode;
226 u8 digest[CC_DIGEST_SIZE_MAX];
227 u32 k0[CC_HMAC_BLOCK_SIZE_MAX / sizeof(u32)];
229 /* reserve to end of allocated context size */
230 u8 reserved[CC_CTX_SIZE - 3 * sizeof(u32) -
231 CC_DIGEST_SIZE_MAX - CC_HMAC_BLOCK_SIZE_MAX];
234 struct drv_ctx_cipher {
235 enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
236 enum drv_cipher_mode mode;
237 enum drv_crypto_direction direction;
238 enum drv_crypto_key_type crypto_key_type;
239 enum drv_crypto_padding_type padding_type;
240 u32 key_size; /* numeric value in bytes */
241 u32 data_unit_size; /* required for XTS */
242 /* block_state is the AES engine block state.
243 * It is used by the host to pass IV or counter at initialization.
244 * It is used by SeP for intermediate block chaining state and for
245 * returning MAC algorithms results. */
246 u8 block_state[CC_AES_BLOCK_SIZE];
247 u8 key[CC_AES_KEY_SIZE_MAX];
248 u8 xex_key[CC_AES_KEY_SIZE_MAX];
249 /* reserve to end of allocated context size */
250 u32 reserved[CC_DRV_CTX_SIZE_WORDS - 7 -
251 CC_AES_BLOCK_SIZE / sizeof(u32) - 2 *
252 (CC_AES_KEY_SIZE_MAX / sizeof(u32))];
255 /* authentication and encryption with associated data class */
256 struct drv_ctx_aead {
257 enum drv_crypto_alg alg; /* DRV_CRYPTO_ALG_AES */
258 enum drv_cipher_mode mode;
259 enum drv_crypto_direction direction;
260 u32 key_size; /* numeric value in bytes */
261 u32 nonce_size; /* nonce size (octets) */
262 u32 header_size; /* finit additional data size (octets) */
263 u32 text_size; /* finit text data size (octets) */
264 u32 tag_size; /* mac size, element of {4, 6, 8, 10, 12, 14, 16} */
265 /* block_state1/2 is the AES engine block state */
266 u8 block_state[CC_AES_BLOCK_SIZE];
267 u8 mac_state[CC_AES_BLOCK_SIZE]; /* MAC result */
268 u8 nonce[CC_AES_BLOCK_SIZE]; /* nonce buffer */
269 u8 key[CC_AES_KEY_SIZE_MAX];
270 /* reserve to end of allocated context size */
271 u32 reserved[CC_DRV_CTX_SIZE_WORDS - 8 -
272 3 * (CC_AES_BLOCK_SIZE / sizeof(u32)) -
273 CC_AES_KEY_SIZE_MAX / sizeof(u32)];
276 /*******************************************************************/
277 /***************** MESSAGE BASED CONTEXTS **************************/
278 /*******************************************************************/
281 /* Get the address of a @member within a given @ctx address
282 @ctx: The context address
283 @type: Type of context structure
284 @member: Associated context field */
285 #define GET_CTX_FIELD_ADDR(ctx, type, member) (ctx + offsetof(type, member))
287 #endif /* _CC_CRYPTO_CTX_H_ */