2 * Copyright © 2006-2009 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
23 #include <linux/i2c.h>
26 #include "psb_intel_bios.h"
28 #include "psb_intel_drv.h"
29 #include "psb_intel_reg.h"
30 #include "psb_powermgmt.h"
31 #include <linux/pm_runtime.h>
33 /* The max/min PWM frequency in BPCR[31:17] - */
34 /* The smallest number is 1 (not 0) that can fit in the
35 * 15-bit field of the and then*/
36 /* shifts to the left by one bit to get the actual 16-bit
37 * value that the 15-bits correspond to.*/
38 #define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF
39 #define BRIGHTNESS_MAX_LEVEL 100
42 * Sets the power state for the panel.
44 static void mrst_lvds_set_power(struct drm_device *dev,
45 struct psb_intel_output *output, bool on)
48 DRM_DRIVER_PRIVATE_T *dev_priv = dev->dev_private;
49 PSB_DEBUG_ENTRY("\n");
51 if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
52 OSPM_UHB_FORCE_POWER_ON))
56 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
59 pp_status = REG_READ(PP_STATUS);
60 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY);
61 dev_priv->is_lvds_on = true;
63 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
66 pp_status = REG_READ(PP_STATUS);
67 } while (pp_status & PP_ON);
68 dev_priv->is_lvds_on = false;
69 pm_request_idle(&dev->pdev->dev);
72 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
75 static void mrst_lvds_dpms(struct drm_encoder *encoder, int mode)
77 struct drm_device *dev = encoder->dev;
78 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
80 PSB_DEBUG_ENTRY("\n");
82 if (mode == DRM_MODE_DPMS_ON)
83 mrst_lvds_set_power(dev, output, true);
85 mrst_lvds_set_power(dev, output, false);
87 /* XXX: We never power down the LVDS pairs. */
90 static void mrst_lvds_mode_set(struct drm_encoder *encoder,
91 struct drm_display_mode *mode,
92 struct drm_display_mode *adjusted_mode)
94 struct psb_intel_mode_device *mode_dev =
95 enc_to_psb_intel_output(encoder)->mode_dev;
96 struct drm_device *dev = encoder->dev;
98 uint64_t v = DRM_MODE_SCALE_FULLSCREEN;
100 PSB_DEBUG_ENTRY("\n");
102 if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
103 OSPM_UHB_FORCE_POWER_ON))
107 * The LVDS pin pair will already have been turned on in the
108 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
111 lvds_port = (REG_READ(LVDS) &
112 (~LVDS_PIPEB_SELECT)) |
116 if (mode_dev->panel_wants_dither)
117 lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE;
119 REG_WRITE(LVDS, lvds_port);
121 drm_connector_property_get_value(
122 &enc_to_psb_intel_output(encoder)->base,
123 dev->mode_config.scaling_mode_property,
126 if (v == DRM_MODE_SCALE_NO_SCALE)
127 REG_WRITE(PFIT_CONTROL, 0);
128 else if (v == DRM_MODE_SCALE_ASPECT) {
129 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) ||
130 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) {
131 if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) ==
132 (mode->hdisplay * adjusted_mode->crtc_vdisplay))
133 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
134 else if ((adjusted_mode->crtc_hdisplay *
135 mode->vdisplay) > (mode->hdisplay *
136 adjusted_mode->crtc_vdisplay))
137 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
138 PFIT_SCALING_MODE_PILLARBOX);
140 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
141 PFIT_SCALING_MODE_LETTERBOX);
143 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
144 } else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
145 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
147 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
151 static const struct drm_encoder_helper_funcs mrst_lvds_helper_funcs = {
152 .dpms = mrst_lvds_dpms,
153 .mode_fixup = psb_intel_lvds_mode_fixup,
154 .prepare = psb_intel_lvds_prepare,
155 .mode_set = mrst_lvds_mode_set,
156 .commit = psb_intel_lvds_commit,
159 static struct drm_display_mode lvds_configuration_modes[] = {
160 /* hard coded fixed mode for TPO LTPS LPJ040K001A */
161 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 33264, 800, 836,
162 846, 1056, 0, 480, 489, 491, 525, 0, 0) },
163 /* hard coded fixed mode for LVDS 800x480 */
164 { DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER, 30994, 800, 801,
165 802, 1024, 0, 480, 481, 482, 525, 0, 0) },
166 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
167 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1072,
168 1104, 1184, 0, 600, 603, 604, 608, 0, 0) },
169 /* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
170 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1104,
171 1136, 1184, 0, 600, 603, 604, 608, 0, 0) },
172 /* hard coded fixed mode for Sharp wsvga LVDS 1024x600 */
173 { DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 48885, 1024, 1124,
174 1204, 1312, 0, 600, 607, 610, 621, 0, 0) },
175 /* hard coded fixed mode for LVDS 1024x768 */
176 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
177 1184, 1344, 0, 768, 771, 777, 806, 0, 0) },
178 /* hard coded fixed mode for LVDS 1366x768 */
179 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 77500, 1366, 1430,
180 1558, 1664, 0, 768, 769, 770, 776, 0, 0) },
183 /* Returns the panel fixed mode from configuration. */
185 static struct drm_display_mode *
186 mrst_lvds_get_configuration_mode(struct drm_device *dev)
188 struct drm_display_mode *mode = NULL;
189 struct drm_psb_private *dev_priv = dev->dev_private;
190 struct mrst_timing_info *ti = &dev_priv->gct_data.DTD;
192 if (dev_priv->vbt_data.size != 0x00) { /*if non-zero, then use vbt*/
193 mode = kzalloc(sizeof(*mode), GFP_KERNEL);
197 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
198 mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
199 mode->hsync_start = mode->hdisplay + \
200 ((ti->hsync_offset_hi << 8) | \
201 ti->hsync_offset_lo);
202 mode->hsync_end = mode->hsync_start + \
203 ((ti->hsync_pulse_width_hi << 8) | \
204 ti->hsync_pulse_width_lo);
205 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
207 mode->vsync_start = \
208 mode->vdisplay + ((ti->vsync_offset_hi << 4) | \
209 ti->vsync_offset_lo);
211 mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \
212 ti->vsync_pulse_width_lo);
213 mode->vtotal = mode->vdisplay + \
214 ((ti->vblank_hi << 8) | ti->vblank_lo);
215 mode->clock = ti->pixel_clock * 10;
217 printk(KERN_INFO "hdisplay is %d\n", mode->hdisplay);
218 printk(KERN_INFO "vdisplay is %d\n", mode->vdisplay);
219 printk(KERN_INFO "HSS is %d\n", mode->hsync_start);
220 printk(KERN_INFO "HSE is %d\n", mode->hsync_end);
221 printk(KERN_INFO "htotal is %d\n", mode->htotal);
222 printk(KERN_INFO "VSS is %d\n", mode->vsync_start);
223 printk(KERN_INFO "VSE is %d\n", mode->vsync_end);
224 printk(KERN_INFO "vtotal is %d\n", mode->vtotal);
225 printk(KERN_INFO "clock is %d\n", mode->clock);
228 mode = drm_mode_duplicate(dev, &lvds_configuration_modes[2]);
230 drm_mode_set_name(mode);
231 drm_mode_set_crtcinfo(mode, 0);
237 * mrst_lvds_init - setup LVDS connectors on this device
240 * Create the connector, register the LVDS DDC bus, and try to figure out what
241 * modes we can display on the LVDS panel (if present).
243 void mrst_lvds_init(struct drm_device *dev,
244 struct psb_intel_mode_device *mode_dev)
246 struct psb_intel_output *psb_intel_output;
247 struct drm_connector *connector;
248 struct drm_encoder *encoder;
249 struct drm_psb_private *dev_priv =
250 (struct drm_psb_private *) dev->dev_private;
253 struct i2c_adapter *i2c_adap;
254 struct drm_display_mode *scan; /* *modes, *bios_mode; */
256 PSB_DEBUG_ENTRY("\n");
258 psb_intel_output = kzalloc(sizeof(struct psb_intel_output), GFP_KERNEL);
259 if (!psb_intel_output)
262 psb_intel_output->mode_dev = mode_dev;
263 connector = &psb_intel_output->base;
264 encoder = &psb_intel_output->enc;
265 dev_priv->is_lvds_on = true;
266 drm_connector_init(dev, &psb_intel_output->base,
267 &psb_intel_lvds_connector_funcs,
268 DRM_MODE_CONNECTOR_LVDS);
270 drm_encoder_init(dev, &psb_intel_output->enc, &psb_intel_lvds_enc_funcs,
271 DRM_MODE_ENCODER_LVDS);
273 drm_mode_connector_attach_encoder(&psb_intel_output->base,
274 &psb_intel_output->enc);
275 psb_intel_output->type = INTEL_OUTPUT_LVDS;
277 drm_encoder_helper_add(encoder, &mrst_lvds_helper_funcs);
278 drm_connector_helper_add(connector,
279 &psb_intel_lvds_connector_helper_funcs);
280 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
281 connector->interlace_allowed = false;
282 connector->doublescan_allowed = false;
284 drm_connector_attach_property(connector,
285 dev->mode_config.scaling_mode_property,
286 DRM_MODE_SCALE_FULLSCREEN);
287 drm_connector_attach_property(connector,
288 dev_priv->backlight_property,
289 BRIGHTNESS_MAX_LEVEL);
291 mode_dev->panel_wants_dither = false;
292 if (dev_priv->vbt_data.size != 0x00)
293 mode_dev->panel_wants_dither = (dev_priv->gct_data.
294 Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
298 * 1) check for EDID on DDC
299 * 2) check for VBT data
300 * 3) check to see if LVDS is already on
301 * if none of the above, no panel
302 * 4) make sure lid is open
303 * if closed, act like it's not there for now
305 i2c_adap = i2c_get_adapter(2);
306 if (i2c_adap == NULL)
307 printk(KERN_ALERT "No ddc adapter available!\n");
309 * Attempt to get the fixed panel mode from DDC. Assume that the
310 * preferred mode is the right one.
313 edid = drm_get_edid(connector, i2c_adap);
315 drm_mode_connector_update_edid_property(connector,
317 ret = drm_add_edid_modes(connector, edid);
321 list_for_each_entry(scan, &connector->probed_modes, head) {
322 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
323 mode_dev->panel_fixed_mode =
324 drm_mode_duplicate(dev, scan);
325 goto out; /* FIXME: check for quirks */
331 * If we didn't get EDID, try geting panel timing
332 * from configuration data
334 mode_dev->panel_fixed_mode = mrst_lvds_get_configuration_mode(dev);
336 if (mode_dev->panel_fixed_mode) {
337 mode_dev->panel_fixed_mode->type |=
338 DRM_MODE_TYPE_PREFERRED;
339 goto out; /* FIXME: check for quirks */
342 /* If we still don't have a mode after all that, give up. */
343 if (!mode_dev->panel_fixed_mode) {
345 ("Found no modes on the lvds, ignoring the LVDS\n");
350 drm_sysfs_connector_add(connector);
354 DRM_DEBUG("No LVDS modes found, disabling.\n");
355 if (psb_intel_output->ddc_bus)
356 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
360 drm_encoder_cleanup(encoder);
361 drm_connector_cleanup(connector);