2 * Copyright © 2006-2007 Intel Corporation
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
23 #include <linux/i2c.h>
24 /* #include <drm/drm_crtc.h> */
25 /* #include <drm/drm_edid.h> */
28 #include "psb_intel_bios.h"
30 #include "psb_intel_drv.h"
31 #include "psb_intel_reg.h"
32 #include "psb_powermgmt.h"
33 #include <linux/pm_runtime.h>
35 /* MRST defines start */
37 uint8_t blc_minbrightness;
39 uint8_t blc_brightnesscmd;
40 int lvds_backlight; /* restore backlight to this value */
43 u32 PWMControlRegFreq;
46 * LVDS I2C backlight control macros
48 #define BRIGHTNESS_MAX_LEVEL 100
49 #define BRIGHTNESS_MASK 0xFF
50 #define BLC_I2C_TYPE 0x01
51 #define BLC_PWM_TYPT 0x02
53 #define BLC_POLARITY_NORMAL 0
54 #define BLC_POLARITY_INVERSE 1
56 #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
57 #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
58 #define PSB_BLC_PWM_PRECISION_FACTOR (10)
59 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
60 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
62 struct psb_intel_lvds_priv {
64 * Saved LVDO output states
69 uint32_t savePP_CONTROL;
70 uint32_t savePP_CYCLE;
71 uint32_t savePFIT_CONTROL;
72 uint32_t savePFIT_PGM_RATIOS;
73 uint32_t saveBLC_PWM_CTL;
76 /* MRST defines end */
79 * Returns the maximum level of the backlight duty cycle field.
81 static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
83 struct drm_psb_private *dev_priv = dev->dev_private;
86 if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
87 OSPM_UHB_ONLY_IF_ON)) {
88 retVal = ((REG_READ(BLC_PWM_CTL) &
89 BACKLIGHT_MODULATION_FREQ_MASK) >>
90 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
92 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
94 retVal = ((dev_priv->saveBLC_PWM_CTL &
95 BACKLIGHT_MODULATION_FREQ_MASK) >>
96 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
102 * Set LVDS backlight level by I2C command
104 static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
107 struct drm_psb_private *dev_priv =
108 (struct drm_psb_private *)dev->dev_private;
110 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
112 unsigned int blc_i2c_brightness;
114 struct i2c_msg msgs[] = {
116 .addr = lvds_i2c_bus->slave_addr,
123 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
125 BRIGHTNESS_MAX_LEVEL);
127 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
128 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
130 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
131 out_buf[1] = (u8)blc_i2c_brightness;
133 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
134 DRM_DEBUG("I2C set brightness.(command, value) (%d, %d)\n",
140 DRM_ERROR("I2C transfer error\n");
145 static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
147 struct drm_psb_private *dev_priv =
148 (struct drm_psb_private *)dev->dev_private;
151 u32 blc_pwm_duty_cycle;
153 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
155 /*BLC_PWM_CTL Should be initiated while backlight device init*/
156 BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
158 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
160 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
161 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
163 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
164 REG_WRITE(BLC_PWM_CTL,
165 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
166 (blc_pwm_duty_cycle));
172 * Set LVDS backlight level either by I2C or PWM
174 void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
177 struct drm_psb_private *dev_priv =
178 (struct drm_psb_private *)dev->dev_private;
180 DRM_DEBUG("backlight level is %d\n", level);
182 if (!dev_priv->lvds_bl) {
183 DRM_ERROR("NO LVDS Backlight Info\n");
187 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
188 psb_lvds_i2c_set_brightness(dev, level);
190 psb_lvds_pwm_set_brightness(dev, level);
194 * Sets the backlight level.
196 * \param level backlight level, from 0 to psb_intel_lvds_get_max_backlight().
198 static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
200 struct drm_psb_private *dev_priv = dev->dev_private;
203 if (ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
204 OSPM_UHB_ONLY_IF_ON)) {
206 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
207 REG_WRITE(BLC_PWM_CTL,
209 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
210 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
212 blc_pwm_ctl = dev_priv->saveBLC_PWM_CTL &
213 ~BACKLIGHT_DUTY_CYCLE_MASK;
214 dev_priv->saveBLC_PWM_CTL = (blc_pwm_ctl |
215 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
220 * Sets the power state for the panel.
222 static void psb_intel_lvds_set_power(struct drm_device *dev,
223 struct psb_intel_output *output, bool on)
227 if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
228 OSPM_UHB_FORCE_POWER_ON))
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
235 pp_status = REG_READ(PP_STATUS);
236 } while ((pp_status & PP_ON) == 0);
238 psb_intel_lvds_set_backlight(dev,
240 mode_dev->backlight_duty_cycle);
242 psb_intel_lvds_set_backlight(dev, 0);
244 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
247 pp_status = REG_READ(PP_STATUS);
248 } while (pp_status & PP_ON);
251 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
254 static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
256 struct drm_device *dev = encoder->dev;
257 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
259 if (mode == DRM_MODE_DPMS_ON)
260 psb_intel_lvds_set_power(dev, output, true);
262 psb_intel_lvds_set_power(dev, output, false);
264 /* XXX: We never power down the LVDS pairs. */
267 static void psb_intel_lvds_save(struct drm_connector *connector)
269 struct drm_device *dev = connector->dev;
270 struct drm_psb_private *dev_priv =
271 (struct drm_psb_private *)dev->dev_private;
272 struct psb_intel_output *psb_intel_output =
273 to_psb_intel_output(connector);
274 struct psb_intel_lvds_priv *lvds_priv =
275 (struct psb_intel_lvds_priv *)psb_intel_output->dev_priv;
277 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
278 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
279 lvds_priv->saveLVDS = REG_READ(LVDS);
280 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
281 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
282 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
283 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
284 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
285 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
287 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
288 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
289 BACKLIGHT_DUTY_CYCLE_MASK);
292 * If the light is off at server startup,
293 * just make it full brightness
295 if (dev_priv->backlight_duty_cycle == 0)
296 dev_priv->backlight_duty_cycle =
297 psb_intel_lvds_get_max_backlight(dev);
299 DRM_DEBUG("(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
300 lvds_priv->savePP_ON,
301 lvds_priv->savePP_OFF,
303 lvds_priv->savePP_CONTROL,
304 lvds_priv->savePP_CYCLE,
305 lvds_priv->saveBLC_PWM_CTL);
308 static void psb_intel_lvds_restore(struct drm_connector *connector)
310 struct drm_device *dev = connector->dev;
313 /*struct drm_psb_private *dev_priv =
314 (struct drm_psb_private *)dev->dev_private;*/
315 struct psb_intel_output *psb_intel_output =
316 to_psb_intel_output(connector);
317 struct psb_intel_lvds_priv *lvds_priv =
318 (struct psb_intel_lvds_priv *)psb_intel_output->dev_priv;
320 DRM_DEBUG("(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
321 lvds_priv->savePP_ON,
322 lvds_priv->savePP_OFF,
324 lvds_priv->savePP_CONTROL,
325 lvds_priv->savePP_CYCLE,
326 lvds_priv->saveBLC_PWM_CTL);
328 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
329 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
330 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
331 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
332 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
333 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
334 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
335 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
336 REG_WRITE(LVDS, lvds_priv->saveLVDS);
338 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
339 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
342 pp_status = REG_READ(PP_STATUS);
343 } while ((pp_status & PP_ON) == 0);
345 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
348 pp_status = REG_READ(PP_STATUS);
349 } while (pp_status & PP_ON);
353 int psb_intel_lvds_mode_valid(struct drm_connector *connector,
354 struct drm_display_mode *mode)
356 struct psb_intel_output *psb_intel_output =
357 to_psb_intel_output(connector);
358 struct drm_display_mode *fixed_mode =
359 psb_intel_output->mode_dev->panel_fixed_mode;
361 PSB_DEBUG_ENTRY("\n");
363 if (psb_intel_output->type == INTEL_OUTPUT_MIPI2)
364 fixed_mode = psb_intel_output->mode_dev->panel_fixed_mode2;
367 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
368 return MODE_NO_DBLESCAN;
371 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
372 return MODE_NO_INTERLACE;
375 if (mode->hdisplay > fixed_mode->hdisplay)
377 if (mode->vdisplay > fixed_mode->vdisplay)
383 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
384 struct drm_display_mode *mode,
385 struct drm_display_mode *adjusted_mode)
387 struct psb_intel_mode_device *mode_dev =
388 enc_to_psb_intel_output(encoder)->mode_dev;
389 struct drm_device *dev = encoder->dev;
390 struct psb_intel_crtc *psb_intel_crtc =
391 to_psb_intel_crtc(encoder->crtc);
392 struct drm_encoder *tmp_encoder;
393 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
394 struct psb_intel_output *psb_intel_output =
395 enc_to_psb_intel_output(encoder);
397 PSB_DEBUG_ENTRY("type = 0x%x, pipe = %d.\n",
398 psb_intel_output->type, psb_intel_crtc->pipe);
400 if (psb_intel_output->type == INTEL_OUTPUT_MIPI2)
401 panel_fixed_mode = mode_dev->panel_fixed_mode2;
403 /* PSB doesn't appear to be GEN4 */
404 if (psb_intel_crtc->pipe == 0) {
405 printk(KERN_ERR "Can't support LVDS on pipe A\n");
408 /* Should never happen!! */
409 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
411 if (tmp_encoder != encoder
412 && tmp_encoder->crtc == encoder->crtc) {
413 printk(KERN_ERR "Can't enable LVDS and another "
414 "encoder on the same pipe\n");
420 * If we have timings from the BIOS for the panel, put them in
421 * to the adjusted mode. The CRTC will be set up for this mode,
422 * with the panel scaling set up to source from the H/VDisplay
423 * of the original mode.
425 if (panel_fixed_mode != NULL) {
426 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
427 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
428 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
429 adjusted_mode->htotal = panel_fixed_mode->htotal;
430 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
431 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
432 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
433 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
434 adjusted_mode->clock = panel_fixed_mode->clock;
435 drm_mode_set_crtcinfo(adjusted_mode,
436 CRTC_INTERLACE_HALVE_V);
440 * XXX: It would be nice to support lower refresh rates on the
441 * panels to reduce power consumption, and perhaps match the
442 * user's requested refresh rate.
448 static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
450 struct drm_device *dev = encoder->dev;
451 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
452 struct psb_intel_mode_device *mode_dev = output->mode_dev;
454 PSB_DEBUG_ENTRY("\n");
456 if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
457 OSPM_UHB_FORCE_POWER_ON))
460 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
461 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
462 BACKLIGHT_DUTY_CYCLE_MASK);
464 psb_intel_lvds_set_power(dev, output, false);
466 ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
469 static void psb_intel_lvds_commit(struct drm_encoder *encoder)
471 struct drm_device *dev = encoder->dev;
472 struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
473 struct psb_intel_mode_device *mode_dev = output->mode_dev;
475 PSB_DEBUG_ENTRY("\n");
477 if (mode_dev->backlight_duty_cycle == 0)
478 mode_dev->backlight_duty_cycle =
479 psb_intel_lvds_get_max_backlight(dev);
481 psb_intel_lvds_set_power(dev, output, true);
484 static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
485 struct drm_display_mode *mode,
486 struct drm_display_mode *adjusted_mode)
488 struct psb_intel_mode_device *mode_dev =
489 enc_to_psb_intel_output(encoder)->mode_dev;
490 struct drm_device *dev = encoder->dev;
494 * The LVDS pin pair will already have been turned on in the
495 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
500 * Enable automatic panel scaling so that non-native modes fill the
501 * screen. Should be enabled before the pipe is enabled, according to
502 * register description and PRM.
504 if (mode->hdisplay != adjusted_mode->hdisplay ||
505 mode->vdisplay != adjusted_mode->vdisplay)
506 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
507 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
508 HORIZ_INTERP_BILINEAR);
512 if (mode_dev->panel_wants_dither)
513 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
515 REG_WRITE(PFIT_CONTROL, pfit_control);
519 * Detect the LVDS connection.
521 * This always returns CONNECTOR_STATUS_CONNECTED.
522 * This connector should only have
523 * been set up if the LVDS was actually connected anyway.
525 static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
526 *connector, bool force)
528 return connector_status_connected;
532 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
534 static int psb_intel_lvds_get_modes(struct drm_connector *connector)
536 struct drm_device *dev = connector->dev;
537 struct psb_intel_output *psb_intel_output =
538 to_psb_intel_output(connector);
539 struct psb_intel_mode_device *mode_dev =
540 psb_intel_output->mode_dev;
543 ret = psb_intel_ddc_get_modes(psb_intel_output);
548 /* Didn't get an EDID, so
549 * Set wide sync ranges so we get all modes
550 * handed to valid_mode for checking
552 connector->display_info.min_vfreq = 0;
553 connector->display_info.max_vfreq = 200;
554 connector->display_info.min_hfreq = 0;
555 connector->display_info.max_hfreq = 200;
557 if (mode_dev->panel_fixed_mode != NULL) {
558 struct drm_display_mode *mode =
559 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
560 drm_mode_probed_add(connector, mode);
568 * psb_intel_lvds_destroy - unregister and free LVDS structures
569 * @connector: connector to free
571 * Unregister the DDC bus for this connector then free the driver private
574 void psb_intel_lvds_destroy(struct drm_connector *connector)
576 struct psb_intel_output *psb_intel_output =
577 to_psb_intel_output(connector);
579 if (psb_intel_output->ddc_bus)
580 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
581 drm_sysfs_connector_remove(connector);
582 drm_connector_cleanup(connector);
586 int psb_intel_lvds_set_property(struct drm_connector *connector,
587 struct drm_property *property,
590 struct drm_encoder *pEncoder = connector->encoder;
592 PSB_DEBUG_ENTRY("\n");
594 if (!strcmp(property->name, "scaling mode") && pEncoder) {
595 struct psb_intel_crtc *pPsbCrtc =
596 to_psb_intel_crtc(pEncoder->crtc);
599 PSB_DEBUG_ENTRY("scaling mode\n");
605 case DRM_MODE_SCALE_FULLSCREEN:
607 case DRM_MODE_SCALE_NO_SCALE:
609 case DRM_MODE_SCALE_ASPECT:
615 if (drm_connector_property_get_value(connector,
620 if (curValue == value)
623 if (drm_connector_property_set_value(connector,
628 if (pPsbCrtc->saved_mode.hdisplay != 0 &&
629 pPsbCrtc->saved_mode.vdisplay != 0) {
630 if (!drm_crtc_helper_set_mode(pEncoder->crtc,
631 &pPsbCrtc->saved_mode,
637 } else if (!strcmp(property->name, "backlight") && pEncoder) {
638 PSB_DEBUG_ENTRY("backlight\n");
640 if (drm_connector_property_set_value(connector,
645 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
646 struct backlight_device bd;
647 bd.props.brightness = value;
648 psb_set_brightness(&bd);
651 } else if (!strcmp(property->name, "DPMS") && pEncoder) {
652 struct drm_encoder_helper_funcs *pEncHFuncs
653 = pEncoder->helper_private;
654 PSB_DEBUG_ENTRY("DPMS\n");
655 pEncHFuncs->dpms(pEncoder, value);
664 static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
665 .dpms = psb_intel_lvds_encoder_dpms,
666 .mode_fixup = psb_intel_lvds_mode_fixup,
667 .prepare = psb_intel_lvds_prepare,
668 .mode_set = psb_intel_lvds_mode_set,
669 .commit = psb_intel_lvds_commit,
672 static const struct drm_connector_helper_funcs
673 psb_intel_lvds_connector_helper_funcs = {
674 .get_modes = psb_intel_lvds_get_modes,
675 .mode_valid = psb_intel_lvds_mode_valid,
676 .best_encoder = psb_intel_best_encoder,
679 static const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
680 .dpms = drm_helper_connector_dpms,
681 .save = psb_intel_lvds_save,
682 .restore = psb_intel_lvds_restore,
683 .detect = psb_intel_lvds_detect,
684 .fill_modes = drm_helper_probe_single_connector_modes,
685 .set_property = psb_intel_lvds_set_property,
686 .destroy = psb_intel_lvds_destroy,
690 static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
692 drm_encoder_cleanup(encoder);
695 const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
696 .destroy = psb_intel_lvds_enc_destroy,
702 * psb_intel_lvds_init - setup LVDS connectors on this device
705 * Create the connector, register the LVDS DDC bus, and try to figure out what
706 * modes we can display on the LVDS panel (if present).
708 void psb_intel_lvds_init(struct drm_device *dev,
709 struct psb_intel_mode_device *mode_dev)
711 struct psb_intel_output *psb_intel_output;
712 struct psb_intel_lvds_priv *lvds_priv;
713 struct drm_connector *connector;
714 struct drm_encoder *encoder;
715 struct drm_display_mode *scan; /* *modes, *bios_mode; */
716 struct drm_crtc *crtc;
717 struct drm_psb_private *dev_priv =
718 (struct drm_psb_private *)dev->dev_private;
722 psb_intel_output = kzalloc(sizeof(struct psb_intel_output), GFP_KERNEL);
723 if (!psb_intel_output)
726 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
728 kfree(psb_intel_output);
729 DRM_DEBUG("LVDS private allocation error\n");
733 psb_intel_output->dev_priv = lvds_priv;
735 psb_intel_output->mode_dev = mode_dev;
736 connector = &psb_intel_output->base;
737 encoder = &psb_intel_output->enc;
738 drm_connector_init(dev, &psb_intel_output->base,
739 &psb_intel_lvds_connector_funcs,
740 DRM_MODE_CONNECTOR_LVDS);
742 drm_encoder_init(dev, &psb_intel_output->enc,
743 &psb_intel_lvds_enc_funcs,
744 DRM_MODE_ENCODER_LVDS);
746 drm_mode_connector_attach_encoder(&psb_intel_output->base,
747 &psb_intel_output->enc);
748 psb_intel_output->type = INTEL_OUTPUT_LVDS;
750 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
751 drm_connector_helper_add(connector,
752 &psb_intel_lvds_connector_helper_funcs);
753 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
754 connector->interlace_allowed = false;
755 connector->doublescan_allowed = false;
757 /*Attach connector properties*/
758 drm_connector_attach_property(connector,
759 dev->mode_config.scaling_mode_property,
760 DRM_MODE_SCALE_FULLSCREEN);
761 drm_connector_attach_property(connector,
762 dev_priv->backlight_property,
763 BRIGHTNESS_MAX_LEVEL);
767 * FIXME: distroy i2c_bus when exit
769 psb_intel_output->i2c_bus = psb_intel_i2c_create(dev,
772 if (!psb_intel_output->i2c_bus) {
774 &dev->pdev->dev, "I2C bus registration failed.\n");
777 psb_intel_output->i2c_bus->slave_addr = 0x2C;
778 dev_priv->lvds_i2c_bus = psb_intel_output->i2c_bus;
782 * 1) check for EDID on DDC
783 * 2) check for VBT data
784 * 3) check to see if LVDS is already on
785 * if none of the above, no panel
786 * 4) make sure lid is open
787 * if closed, act like it's not there for now
790 /* Set up the DDC bus. */
791 psb_intel_output->ddc_bus = psb_intel_i2c_create(dev,
794 if (!psb_intel_output->ddc_bus) {
795 dev_printk(KERN_ERR, &dev->pdev->dev,
796 "DDC bus registration " "failed.\n");
801 * Attempt to get the fixed panel mode from DDC. Assume that the
802 * preferred mode is the right one.
804 psb_intel_ddc_get_modes(psb_intel_output);
805 list_for_each_entry(scan, &connector->probed_modes, head) {
806 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
807 mode_dev->panel_fixed_mode =
808 drm_mode_duplicate(dev, scan);
809 goto out; /* FIXME: check for quirks */
813 /* Failed to get EDID, what about VBT? do we need this?*/
814 if (mode_dev->vbt_mode)
815 mode_dev->panel_fixed_mode =
816 drm_mode_duplicate(dev, mode_dev->vbt_mode);
818 if (!mode_dev->panel_fixed_mode)
819 if (dev_priv->lfp_lvds_vbt_mode)
820 mode_dev->panel_fixed_mode =
821 drm_mode_duplicate(dev,
822 dev_priv->lfp_lvds_vbt_mode);
825 * If we didn't get EDID, try checking if the panel is already turned
826 * on. If so, assume that whatever is currently programmed is the
829 lvds = REG_READ(LVDS);
830 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
831 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
833 if (crtc && (lvds & LVDS_PORT_EN)) {
834 mode_dev->panel_fixed_mode =
835 psb_intel_crtc_mode_get(dev, crtc);
836 if (mode_dev->panel_fixed_mode) {
837 mode_dev->panel_fixed_mode->type |=
838 DRM_MODE_TYPE_PREFERRED;
839 goto out; /* FIXME: check for quirks */
843 /* If we still don't have a mode after all that, give up. */
844 if (!mode_dev->panel_fixed_mode) {
846 ("Found no modes on the lvds, ignoring the LVDS\n");
851 * Blacklist machines with BIOSes that list an LVDS panel without
852 * actually having one.
855 drm_sysfs_connector_add(connector);
857 PSB_DEBUG_ENTRY("hdisplay = %d\n",
858 mode_dev->panel_fixed_mode->hdisplay);
859 PSB_DEBUG_ENTRY(" vdisplay = %d\n",
860 mode_dev->panel_fixed_mode->vdisplay);
861 PSB_DEBUG_ENTRY(" hsync_start = %d\n",
862 mode_dev->panel_fixed_mode->hsync_start);
863 PSB_DEBUG_ENTRY(" hsync_end = %d\n",
864 mode_dev->panel_fixed_mode->hsync_end);
865 PSB_DEBUG_ENTRY(" htotal = %d\n",
866 mode_dev->panel_fixed_mode->htotal);
867 PSB_DEBUG_ENTRY(" vsync_start = %d\n",
868 mode_dev->panel_fixed_mode->vsync_start);
869 PSB_DEBUG_ENTRY(" vsync_end = %d\n",
870 mode_dev->panel_fixed_mode->vsync_end);
871 PSB_DEBUG_ENTRY(" vtotal = %d\n",
872 mode_dev->panel_fixed_mode->vtotal);
873 PSB_DEBUG_ENTRY(" clock = %d\n",
874 mode_dev->panel_fixed_mode->clock);
879 if (psb_intel_output->ddc_bus)
880 psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
882 if (psb_intel_output->i2c_bus)
883 psb_intel_i2c_destroy(psb_intel_output->i2c_bus);
885 drm_encoder_cleanup(encoder);
886 drm_connector_cleanup(connector);