drivers/staging/iio/adc/ad7793.c

   1 /*
   2  * AD7792/AD7793 SPI ADC driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/regulator/consumer.h>
  16 #include <linux/err.h>
  17 #include <linux/sched.h>
  18 #include <linux/delay.h>
  19 #include <linux/module.h>
  20
  21 #include "../iio.h"
  22 #include "../sysfs.h"
  23 #include "../buffer.h"
  24 #include "../ring_sw.h"
  25 #include "../trigger.h"
  26 #include "../trigger_consumer.h"
  27
  28 #include "ad7793.h"
  29
  30 /* NOTE:
  31  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
  32  * In order to avoid contentions on the SPI bus, it's therefore necessary
  33  * to use spi bus locking.
  34  *
  35  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
  36  */
  37
  38 struct ad7793_chip_info {
  39         struct iio_chan_spec            channel[7];
  40 };
  41
  42 struct ad7793_state {
  43         struct spi_device               *spi;
  44         struct iio_trigger              *trig;
  45         const struct ad7793_chip_info   *chip_info;
  46         struct regulator                *reg;
  47         struct ad7793_platform_data     *pdata;
  48         wait_queue_head_t               wq_data_avail;
  49         bool                            done;
  50         bool                            irq_dis;
  51         u16                             int_vref_mv;
  52         u16                             mode;
  53         u16                             conf;
  54         u32                             scale_avail[8][2];
  55         /* Note this uses fact that 8 the mask always fits in a long */
  56         unsigned long                   available_scan_masks[7];
  57         /*
  58          * DMA (thus cache coherency maintenance) requires the
  59          * transfer buffers to live in their own cache lines.
  60          */
  61         u8                              data[4] ____cacheline_aligned;
  62 };
  63
  64 enum ad7793_supported_device_ids {
  65         ID_AD7792,
  66         ID_AD7793,
  67 };
  68
  69 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
  70                               bool cs_change, unsigned char reg,
  71                               unsigned size, unsigned val)
  72 {
  73         u8 *data = st->data;
  74         struct spi_transfer t = {
  75                 .tx_buf         = data,
  76                 .len            = size + 1,
  77                 .cs_change      = cs_change,
  78         };
  79         struct spi_message m;
  80
  81         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
  82
  83         switch (size) {
  84         case 3:
  85                 data[1] = val >> 16;
  86                 data[2] = val >> 8;
  87                 data[3] = val;
  88                 break;
  89         case 2:
  90                 data[1] = val >> 8;
  91                 data[2] = val;
  92                 break;
  93         case 1:
  94                 data[1] = val;
  95                 break;
  96         default:
  97                 return -EINVAL;
  98         }
  99
 100         spi_message_init(&m);
 101         spi_message_add_tail(&t, &m);
 102
 103         if (locked)
 104                 return spi_sync_locked(st->spi, &m);
 105         else
 106                 return spi_sync(st->spi, &m);
 107 }
 108
 109 static int ad7793_write_reg(struct ad7793_state *st,
 110                             unsigned reg, unsigned size, unsigned val)
 111 {
 112         return __ad7793_write_reg(st, false, false, reg, size, val);
 113 }
 114
 115 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
 116                              bool cs_change, unsigned char reg,
 117                              int *val, unsigned size)
 118 {
 119         u8 *data = st->data;
 120         int ret;
 121         struct spi_transfer t[] = {
 122                 {
 123                         .tx_buf = data,
 124                         .len = 1,
 125                 }, {
 126                         .rx_buf = data,
 127                         .len = size,
 128                         .cs_change = cs_change,
 129                 },
 130         };
 131         struct spi_message m;
 132
 133         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
 134
 135         spi_message_init(&m);
 136         spi_message_add_tail(&t[0], &m);
 137         spi_message_add_tail(&t[1], &m);
 138
 139         if (locked)
 140                 ret = spi_sync_locked(st->spi, &m);
 141         else
 142                 ret = spi_sync(st->spi, &m);
 143
 144         if (ret < 0)
 145                 return ret;
 146
 147         switch (size) {
 148         case 3:
 149                 *val = data[0] << 16 | data[1] << 8 | data[2];
 150                 break;
 151         case 2:
 152                 *val = data[0] << 8 | data[1];
 153                 break;
 154         case 1:
 155                 *val = data[0];
 156                 break;
 157         default:
 158                 return -EINVAL;
 159         }
 160
 161         return 0;
 162 }
 163
 164 static int ad7793_read_reg(struct ad7793_state *st,
 165                            unsigned reg, int *val, unsigned size)
 166 {
 167         return __ad7793_read_reg(st, 0, 0, reg, val, size);
 168 }
 169
 170 static int ad7793_read(struct ad7793_state *st, unsigned ch,
 171                        unsigned len, int *val)
 172 {
 173         int ret;
 174         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 175         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 176                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
 177
 178         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 179
 180         spi_bus_lock(st->spi->master);
 181         st->done = false;
 182
 183         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 184                                  sizeof(st->mode), st->mode);
 185         if (ret < 0)
 186                 goto out;
 187
 188         st->irq_dis = false;
 189         enable_irq(st->spi->irq);
 190         wait_event_interruptible(st->wq_data_avail, st->done);
 191
 192         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
 193 out:
 194         spi_bus_unlock(st->spi->master);
 195
 196         return ret;
 197 }
 198
 199 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
 200 {
 201         int ret;
 202
 203         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 204         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
 205
 206         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 207
 208         spi_bus_lock(st->spi->master);
 209         st->done = false;
 210
 211         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 212                                  sizeof(st->mode), st->mode);
 213         if (ret < 0)
 214                 goto out;
 215
 216         st->irq_dis = false;
 217         enable_irq(st->spi->irq);
 218         wait_event_interruptible(st->wq_data_avail, st->done);
 219
 220         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 221                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
 222
 223         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 224                                  sizeof(st->mode), st->mode);
 225 out:
 226         spi_bus_unlock(st->spi->master);
 227
 228         return ret;
 229 }
 230
 231 static const u8 ad7793_calib_arr[6][2] = {
 232         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
 233         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
 234         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
 235         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
 236         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
 237         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
 238 };
 239
 240 static int ad7793_calibrate_all(struct ad7793_state *st)
 241 {
 242         int i, ret;
 243
 244         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
 245                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
 246                                        ad7793_calib_arr[i][1]);
 247                 if (ret)
 248                         goto out;
 249         }
 250
 251         return 0;
 252 out:
 253         dev_err(&st->spi->dev, "Calibration failed\n");
 254         return ret;
 255 }
 256
 257 static int ad7793_setup(struct ad7793_state *st)
 258 {
 259         int i, ret = -1;
 260         unsigned long long scale_uv;
 261         u32 id;
 262
 263         /* reset the serial interface */
 264         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
 265         if (ret < 0)
 266                 goto out;
 267         msleep(1); /* Wait for at least 500us */
 268
 269         /* write/read test for device presence */
 270         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
 271         if (ret)
 272                 goto out;
 273
 274         id &= AD7793_ID_MASK;
 275
 276         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
 277                 dev_err(&st->spi->dev, "device ID query failed\n");
 278                 goto out;
 279         }
 280
 281         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
 282                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
 283         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
 284
 285         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
 286         if (ret)
 287                 goto out;
 288
 289         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 290         if (ret)
 291                 goto out;
 292
 293         ret = ad7793_write_reg(st, AD7793_REG_IO,
 294                                sizeof(st->pdata->io), st->pdata->io);
 295         if (ret)
 296                 goto out;
 297
 298         ret = ad7793_calibrate_all(st);
 299         if (ret)
 300                 goto out;
 301
 302         /* Populate available ADC input ranges */
 303         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
 304                 scale_uv = ((u64)st->int_vref_mv * 100000000)
 305                         >> (st->chip_info->channel[0].scan_type.realbits -
 306                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
 307                 scale_uv >>= i;
 308
 309                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
 310                 st->scale_avail[i][0] = scale_uv;
 311         }
 312
 313         return 0;
 314 out:
 315         dev_err(&st->spi->dev, "setup failed\n");
 316         return ret;
 317 }
 318
 319 static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
 320 {
 321         struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
 322         int ret;
 323         s64 dat64[2];
 324         u32 *dat32 = (u32 *)dat64;
 325
 326         if (!(test_bit(ch, ring->scan_mask)))
 327                 return  -EBUSY;
 328
 329         ret = ring->access->read_last(ring, (u8 *) &dat64);
 330         if (ret)
 331                 return ret;
 332
 333         *val = *dat32;
 334
 335         return 0;
 336 }
 337
 338 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
 339 {
 340         struct ad7793_state *st = iio_priv(indio_dev);
 341         struct iio_buffer *ring = indio_dev->buffer;
 342         size_t d_size;
 343         unsigned channel;
 344
 345         if (!ring->scan_count)
 346                 return -EINVAL;
 347
 348         channel = find_first_bit(ring->scan_mask,
 349                                  indio_dev->masklength);
 350
 351         d_size = ring->scan_count *
 352                  indio_dev->channels[0].scan_type.storagebits / 8;
 353
 354         if (ring->scan_timestamp) {
 355                 d_size += sizeof(s64);
 356
 357                 if (d_size % sizeof(s64))
 358                         d_size += sizeof(s64) - (d_size % sizeof(s64));
 359         }
 360
 361         if (indio_dev->buffer->access->set_bytes_per_datum)
 362                 indio_dev->buffer->access->
 363                         set_bytes_per_datum(indio_dev->buffer, d_size);
 364
 365         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 366                     AD7793_MODE_SEL(AD7793_MODE_CONT);
 367         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
 368                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
 369
 370         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 371
 372         spi_bus_lock(st->spi->master);
 373         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 374                            sizeof(st->mode), st->mode);
 375
 376         st->irq_dis = false;
 377         enable_irq(st->spi->irq);
 378
 379         return 0;
 380 }
 381
 382 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
 383 {
 384         struct ad7793_state *st = iio_priv(indio_dev);
 385
 386         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 387                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
 388
 389         st->done = false;
 390         wait_event_interruptible(st->wq_data_avail, st->done);
 391
 392         if (!st->irq_dis)
 393                 disable_irq_nosync(st->spi->irq);
 394
 395         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 396                            sizeof(st->mode), st->mode);
 397
 398         return spi_bus_unlock(st->spi->master);
 399 }
 400
 401 /**
 402  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
 403  **/
 404
 405 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
 406 {
 407         struct iio_poll_func *pf = p;
 408         struct iio_dev *indio_dev = pf->indio_dev;
 409         struct iio_buffer *ring = indio_dev->buffer;
 410         struct ad7793_state *st = iio_priv(indio_dev);
 411         s64 dat64[2];
 412         s32 *dat32 = (s32 *)dat64;
 413
 414         if (ring->scan_count)
 415                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
 416                                   dat32,
 417                                   indio_dev->channels[0].scan_type.realbits/8);
 418
 419         /* Guaranteed to be aligned with 8 byte boundary */
 420         if (ring->scan_timestamp)
 421                 dat64[1] = pf->timestamp;
 422
 423         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
 424
 425         iio_trigger_notify_done(indio_dev->trig);
 426         st->irq_dis = false;
 427         enable_irq(st->spi->irq);
 428
 429         return IRQ_HANDLED;
 430 }
 431
 432 static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
 433         .preenable = &ad7793_ring_preenable,
 434         .postenable = &iio_triggered_buffer_postenable,
 435         .predisable = &iio_triggered_buffer_predisable,
 436         .postdisable = &ad7793_ring_postdisable,
 437 };
 438
 439 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
 440 {
 441         int ret;
 442
 443         indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
 444         if (!indio_dev->buffer) {
 445                 ret = -ENOMEM;
 446                 goto error_ret;
 447         }
 448         /* Effectively select the ring buffer implementation */
 449         indio_dev->buffer->access = &ring_sw_access_funcs;
 450         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
 451                                                  &ad7793_trigger_handler,
 452                                                  IRQF_ONESHOT,
 453                                                  indio_dev,
 454                                                  "ad7793_consumer%d",
 455                                                  indio_dev->id);
 456         if (indio_dev->pollfunc == NULL) {
 457                 ret = -ENOMEM;
 458                 goto error_deallocate_sw_rb;
 459         }
 460
 461         /* Ring buffer functions - here trigger setup related */
 462         indio_dev->buffer->setup_ops = &ad7793_ring_setup_ops;
 463
 464         /* Flag that polled ring buffering is possible */
 465         indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
 466         return 0;
 467
 468 error_deallocate_sw_rb:
 469         iio_sw_rb_free(indio_dev->buffer);
 470 error_ret:
 471         return ret;
 472 }
 473
 474 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
 475 {
 476         iio_dealloc_pollfunc(indio_dev->pollfunc);
 477         iio_sw_rb_free(indio_dev->buffer);
 478 }
 479
 480 /**
 481  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
 482  **/
 483 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
 484 {
 485         struct ad7793_state *st = iio_priv(private);
 486
 487         st->done = true;
 488         wake_up_interruptible(&st->wq_data_avail);
 489         disable_irq_nosync(irq);
 490         st->irq_dis = true;
 491         iio_trigger_poll(st->trig, iio_get_time_ns());
 492
 493         return IRQ_HANDLED;
 494 }
 495
 496 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
 497 {
 498         struct ad7793_state *st = iio_priv(indio_dev);
 499         int ret;
 500
 501         st->trig = iio_allocate_trigger("%s-dev%d",
 502                                         spi_get_device_id(st->spi)->name,
 503                                         indio_dev->id);
 504         if (st->trig == NULL) {
 505                 ret = -ENOMEM;
 506                 goto error_ret;
 507         }
 508
 509         ret = request_irq(st->spi->irq,
 510                           ad7793_data_rdy_trig_poll,
 511                           IRQF_TRIGGER_LOW,
 512                           spi_get_device_id(st->spi)->name,
 513                           indio_dev);
 514         if (ret)
 515                 goto error_free_trig;
 516
 517         disable_irq_nosync(st->spi->irq);
 518         st->irq_dis = true;
 519         st->trig->dev.parent = &st->spi->dev;
 520         st->trig->owner = THIS_MODULE;
 521         st->trig->private_data = indio_dev;
 522
 523         ret = iio_trigger_register(st->trig);
 524
 525         /* select default trigger */
 526         indio_dev->trig = st->trig;
 527         if (ret)
 528                 goto error_free_irq;
 529
 530         return 0;
 531
 532 error_free_irq:
 533         free_irq(st->spi->irq, indio_dev);
 534 error_free_trig:
 535         iio_free_trigger(st->trig);
 536 error_ret:
 537         return ret;
 538 }
 539
 540 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
 541 {
 542         struct ad7793_state *st = iio_priv(indio_dev);
 543
 544         iio_trigger_unregister(st->trig);
 545         free_irq(st->spi->irq, indio_dev);
 546         iio_free_trigger(st->trig);
 547 }
 548
 549 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
 550                                           17, 16, 12, 10, 8, 6, 4};
 551
 552 static ssize_t ad7793_read_frequency(struct device *dev,
 553                 struct device_attribute *attr,
 554                 char *buf)
 555 {
 556         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 557         struct ad7793_state *st = iio_priv(indio_dev);
 558
 559         return sprintf(buf, "%d\n",
 560                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
 561 }
 562
 563 static ssize_t ad7793_write_frequency(struct device *dev,
 564                 struct device_attribute *attr,
 565                 const char *buf,
 566                 size_t len)
 567 {
 568         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 569         struct ad7793_state *st = iio_priv(indio_dev);
 570         long lval;
 571         int i, ret;
 572
 573         mutex_lock(&indio_dev->mlock);
 574         if (iio_buffer_enabled(indio_dev)) {
 575                 mutex_unlock(&indio_dev->mlock);
 576                 return -EBUSY;
 577         }
 578         mutex_unlock(&indio_dev->mlock);
 579
 580         ret = strict_strtol(buf, 10, &lval);
 581         if (ret)
 582                 return ret;
 583
 584         ret = -EINVAL;
 585
 586         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
 587                 if (lval == sample_freq_avail[i]) {
 588                         mutex_lock(&indio_dev->mlock);
 589                         st->mode &= ~AD7793_MODE_RATE(-1);
 590                         st->mode |= AD7793_MODE_RATE(i);
 591                         ad7793_write_reg(st, AD7793_REG_MODE,
 592                                          sizeof(st->mode), st->mode);
 593                         mutex_unlock(&indio_dev->mlock);
 594                         ret = 0;
 595                 }
 596
 597         return ret ? ret : len;
 598 }
 599
 600 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 601                 ad7793_read_frequency,
 602                 ad7793_write_frequency);
 603
 604 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
 605         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
 606
 607 static ssize_t ad7793_show_scale_available(struct device *dev,
 608                         struct device_attribute *attr, char *buf)
 609 {
 610         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 611         struct ad7793_state *st = iio_priv(indio_dev);
 612         int i, len = 0;
 613
 614         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 615                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
 616                                st->scale_avail[i][1]);
 617
 618         len += sprintf(buf + len, "\n");
 619
 620         return len;
 621 }
 622
 623 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
 624                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
 625
 626 static struct attribute *ad7793_attributes[] = {
 627         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 628         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 629         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
 630         NULL
 631 };
 632
 633 static const struct attribute_group ad7793_attribute_group = {
 634         .attrs = ad7793_attributes,
 635 };
 636
 637 static int ad7793_read_raw(struct iio_dev *indio_dev,
 638                            struct iio_chan_spec const *chan,
 639                            int *val,
 640                            int *val2,
 641                            long m)
 642 {
 643         struct ad7793_state *st = iio_priv(indio_dev);
 644         int ret, smpl = 0;
 645         unsigned long long scale_uv;
 646         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
 647
 648         switch (m) {
 649         case 0:
 650                 mutex_lock(&indio_dev->mlock);
 651                 if (iio_buffer_enabled(indio_dev))
 652                         ret = ad7793_scan_from_ring(st,
 653                                         chan->scan_index, &smpl);
 654                 else
 655                         ret = ad7793_read(st, chan->address,
 656                                         chan->scan_type.realbits / 8, &smpl);
 657                 mutex_unlock(&indio_dev->mlock);
 658
 659                 if (ret < 0)
 660                         return ret;
 661
 662                 *val = (smpl >> chan->scan_type.shift) &
 663                         ((1 << (chan->scan_type.realbits)) - 1);
 664
 665                 if (!unipolar)
 666                         *val -= (1 << (chan->scan_type.realbits - 1));
 667
 668                 return IIO_VAL_INT;
 669
 670         case IIO_CHAN_INFO_SCALE:
 671                 switch (chan->type) {
 672                 case IIO_VOLTAGE:
 673                         if (chan->differential) {
 674                                 *val = st->
 675                                         scale_avail[(st->conf >> 8) & 0x7][0];
 676                                 *val2 = st->
 677                                         scale_avail[(st->conf >> 8) & 0x7][1];
 678                                 return IIO_VAL_INT_PLUS_NANO;
 679                         } else {
 680                                 /* 1170mV / 2^23 * 6 */
 681                                 scale_uv = (1170ULL * 100000000ULL * 6ULL)
 682                                         >> (chan->scan_type.realbits -
 683                                             (unipolar ? 0 : 1));
 684                         }
 685                         break;
 686                 case IIO_TEMP:
 687                         /* Always uses unity gain and internal ref */
 688                         scale_uv = (2500ULL * 100000000ULL)
 689                                 >> (chan->scan_type.realbits -
 690                                 (unipolar ? 0 : 1));
 691                         break;
 692                 default:
 693                         return -EINVAL;
 694                 }
 695
 696                 *val2 = do_div(scale_uv, 100000000) * 10;
 697                 *val =  scale_uv;
 698
 699                 return IIO_VAL_INT_PLUS_NANO;
 700         }
 701         return -EINVAL;
 702 }
 703
 704 static int ad7793_write_raw(struct iio_dev *indio_dev,
 705                                struct iio_chan_spec const *chan,
 706                                int val,
 707                                int val2,
 708                                long mask)
 709 {
 710         struct ad7793_state *st = iio_priv(indio_dev);
 711         int ret, i;
 712         unsigned int tmp;
 713
 714         mutex_lock(&indio_dev->mlock);
 715         if (iio_buffer_enabled(indio_dev)) {
 716                 mutex_unlock(&indio_dev->mlock);
 717                 return -EBUSY;
 718         }
 719
 720         switch (mask) {
 721         case IIO_CHAN_INFO_SCALE:
 722                 ret = -EINVAL;
 723                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 724                         if (val2 == st->scale_avail[i][1]) {
 725                                 tmp = st->conf;
 726                                 st->conf &= ~AD7793_CONF_GAIN(-1);
 727                                 st->conf |= AD7793_CONF_GAIN(i);
 728
 729                                 if (tmp != st->conf) {
 730                                         ad7793_write_reg(st, AD7793_REG_CONF,
 731                                                          sizeof(st->conf),
 732                                                          st->conf);
 733                                         ad7793_calibrate_all(st);
 734                                 }
 735                                 ret = 0;
 736                         }
 737
 738         default:
 739                 ret = -EINVAL;
 740         }
 741
 742         mutex_unlock(&indio_dev->mlock);
 743         return ret;
 744 }
 745
 746 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
 747                                    struct iio_trigger *trig)
 748 {
 749         if (indio_dev->trig != trig)
 750                 return -EINVAL;
 751
 752         return 0;
 753 }
 754
 755 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
 756                                struct iio_chan_spec const *chan,
 757                                long mask)
 758 {
 759         return IIO_VAL_INT_PLUS_NANO;
 760 }
 761
 762 static const struct iio_info ad7793_info = {
 763         .read_raw = &ad7793_read_raw,
 764         .write_raw = &ad7793_write_raw,
 765         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
 766         .attrs = &ad7793_attribute_group,
 767         .validate_trigger = ad7793_validate_trigger,
 768         .driver_module = THIS_MODULE,
 769 };
 770
 771 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
 772         [ID_AD7793] = {
 773                 .channel[0] = {
 774                         .type = IIO_VOLTAGE,
 775                         .differential = 1,
 776                         .indexed = 1,
 777                         .channel = 0,
 778                         .channel2 = 0,
 779                         .address = AD7793_CH_AIN1P_AIN1M,
 780                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 781                         .scan_index = 0,
 782                         .scan_type = IIO_ST('s', 24, 32, 0)
 783                 },
 784                 .channel[1] = {
 785                         .type = IIO_VOLTAGE,
 786                         .differential = 1,
 787                         .indexed = 1,
 788                         .channel = 1,
 789                         .channel2 = 1,
 790                         .address = AD7793_CH_AIN2P_AIN2M,
 791                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 792                         .scan_index = 1,
 793                         .scan_type = IIO_ST('s', 24, 32, 0)
 794                 },
 795                 .channel[2] = {
 796                         .type = IIO_VOLTAGE,
 797                         .differential = 1,
 798                         .indexed = 1,
 799                         .channel = 2,
 800                         .channel2 = 2,
 801                         .address = AD7793_CH_AIN3P_AIN3M,
 802                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 803                         .scan_index = 2,
 804                         .scan_type = IIO_ST('s', 24, 32, 0)
 805                 },
 806                 .channel[3] = {
 807                         .type = IIO_VOLTAGE,
 808                         .differential = 1,
 809                         .extend_name = "shorted",
 810                         .indexed = 1,
 811                         .channel = 2,
 812                         .channel2 = 2,
 813                         .address = AD7793_CH_AIN1M_AIN1M,
 814                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 815                         .scan_index = 2,
 816                         .scan_type = IIO_ST('s', 24, 32, 0)
 817                 },
 818                 .channel[4] = {
 819                         .type = IIO_TEMP,
 820                         .indexed = 1,
 821                         .channel = 0,
 822                         .address = AD7793_CH_TEMP,
 823                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 824                         .scan_index = 4,
 825                         .scan_type = IIO_ST('s', 24, 32, 0),
 826                 },
 827                 .channel[5] = {
 828                         .type = IIO_VOLTAGE,
 829                         .extend_name = "supply",
 830                         .indexed = 1,
 831                         .channel = 4,
 832                         .address = AD7793_CH_AVDD_MONITOR,
 833                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 834                         .scan_index = 5,
 835                         .scan_type = IIO_ST('s', 24, 32, 0),
 836                 },
 837                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 838         },
 839         [ID_AD7792] = {
 840                 .channel[0] = {
 841                         .type = IIO_VOLTAGE,
 842                         .differential = 1,
 843                         .indexed = 1,
 844                         .channel = 0,
 845                         .channel2 = 0,
 846                         .address = AD7793_CH_AIN1P_AIN1M,
 847                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 848                         .scan_index = 0,
 849                         .scan_type = IIO_ST('s', 16, 32, 0)
 850                 },
 851                 .channel[1] = {
 852                         .type = IIO_VOLTAGE,
 853                         .differential = 1,
 854                         .indexed = 1,
 855                         .channel = 1,
 856                         .channel2 = 1,
 857                         .address = AD7793_CH_AIN2P_AIN2M,
 858                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 859                         .scan_index = 1,
 860                         .scan_type = IIO_ST('s', 16, 32, 0)
 861                 },
 862                 .channel[2] = {
 863                         .type = IIO_VOLTAGE,
 864                         .differential = 1,
 865                         .indexed = 1,
 866                         .channel = 2,
 867                         .channel2 = 2,
 868                         .address = AD7793_CH_AIN3P_AIN3M,
 869                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 870                         .scan_index = 2,
 871                         .scan_type = IIO_ST('s', 16, 32, 0)
 872                 },
 873                 .channel[3] = {
 874                         .type = IIO_VOLTAGE,
 875                         .differential = 1,
 876                         .extend_name = "shorted",
 877                         .indexed = 1,
 878                         .channel = 2,
 879                         .channel2 = 2,
 880                         .address = AD7793_CH_AIN1M_AIN1M,
 881                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 882                         .scan_index = 2,
 883                         .scan_type = IIO_ST('s', 16, 32, 0)
 884                 },
 885                 .channel[4] = {
 886                         .type = IIO_TEMP,
 887                         .indexed = 1,
 888                         .channel = 0,
 889                         .address = AD7793_CH_TEMP,
 890                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 891                         .scan_index = 4,
 892                         .scan_type = IIO_ST('s', 16, 32, 0),
 893                 },
 894                 .channel[5] = {
 895                         .type = IIO_VOLTAGE,
 896                         .extend_name = "supply",
 897                         .indexed = 1,
 898                         .channel = 4,
 899                         .address = AD7793_CH_AVDD_MONITOR,
 900                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 901                         .scan_index = 5,
 902                         .scan_type = IIO_ST('s', 16, 32, 0),
 903                 },
 904                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 905         },
 906 };
 907
 908 static int __devinit ad7793_probe(struct spi_device *spi)
 909 {
 910         struct ad7793_platform_data *pdata = spi->dev.platform_data;
 911         struct ad7793_state *st;
 912         struct iio_dev *indio_dev;
 913         int ret, i, voltage_uv = 0;
 914
 915         if (!pdata) {
 916                 dev_err(&spi->dev, "no platform data?\n");
 917                 return -ENODEV;
 918         }
 919
 920         if (!spi->irq) {
 921                 dev_err(&spi->dev, "no IRQ?\n");
 922                 return -ENODEV;
 923         }
 924
 925         indio_dev = iio_allocate_device(sizeof(*st));
 926         if (indio_dev == NULL)
 927                 return -ENOMEM;
 928
 929         st = iio_priv(indio_dev);
 930
 931         st->reg = regulator_get(&spi->dev, "vcc");
 932         if (!IS_ERR(st->reg)) {
 933                 ret = regulator_enable(st->reg);
 934                 if (ret)
 935                         goto error_put_reg;
 936
 937                 voltage_uv = regulator_get_voltage(st->reg);
 938         }
 939
 940         st->chip_info =
 941                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 942
 943         st->pdata = pdata;
 944
 945         if (pdata && pdata->vref_mv)
 946                 st->int_vref_mv = pdata->vref_mv;
 947         else if (voltage_uv)
 948                 st->int_vref_mv = voltage_uv / 1000;
 949         else
 950                 st->int_vref_mv = 2500; /* Build-in ref */
 951
 952         spi_set_drvdata(spi, indio_dev);
 953         st->spi = spi;
 954
 955         indio_dev->dev.parent = &spi->dev;
 956         indio_dev->name = spi_get_device_id(spi)->name;
 957         indio_dev->modes = INDIO_DIRECT_MODE;
 958         indio_dev->channels = st->chip_info->channel;
 959         indio_dev->available_scan_masks = st->available_scan_masks;
 960         indio_dev->num_channels = 7;
 961         indio_dev->info = &ad7793_info;
 962
 963         for (i = 0; i < indio_dev->num_channels; i++) {
 964                 set_bit(i, &st->available_scan_masks[i]);
 965                 set_bit(indio_dev->
 966                         channels[indio_dev->num_channels - 1].scan_index,
 967                         &st->available_scan_masks[i]);
 968         }
 969
 970         init_waitqueue_head(&st->wq_data_avail);
 971
 972         ret = ad7793_register_ring_funcs_and_init(indio_dev);
 973         if (ret)
 974                 goto error_disable_reg;
 975
 976         ret = ad7793_probe_trigger(indio_dev);
 977         if (ret)
 978                 goto error_unreg_ring;
 979
 980         ret = iio_buffer_register(indio_dev,
 981                                   indio_dev->channels,
 982                                   indio_dev->num_channels);
 983         if (ret)
 984                 goto error_remove_trigger;
 985
 986         ret = ad7793_setup(st);
 987         if (ret)
 988                 goto error_uninitialize_ring;
 989
 990         ret = iio_device_register(indio_dev);
 991         if (ret)
 992                 goto error_uninitialize_ring;
 993
 994         return 0;
 995
 996 error_uninitialize_ring:
 997         iio_buffer_unregister(indio_dev);
 998 error_remove_trigger:
 999         ad7793_remove_trigger(indio_dev);
1000 error_unreg_ring:
1001         ad7793_ring_cleanup(indio_dev);
1002 error_disable_reg:
1003         if (!IS_ERR(st->reg))
1004                 regulator_disable(st->reg);
1005 error_put_reg:
1006         if (!IS_ERR(st->reg))
1007                 regulator_put(st->reg);
1008
1009         iio_free_device(indio_dev);
1010
1011         return ret;
1012 }
1013
1014 static int ad7793_remove(struct spi_device *spi)
1015 {
1016         struct iio_dev *indio_dev = spi_get_drvdata(spi);
1017         struct ad7793_state *st = iio_priv(indio_dev);
1018
1019         iio_device_unregister(indio_dev);
1020         iio_buffer_unregister(indio_dev);
1021         ad7793_remove_trigger(indio_dev);
1022         ad7793_ring_cleanup(indio_dev);
1023
1024         if (!IS_ERR(st->reg)) {
1025                 regulator_disable(st->reg);
1026                 regulator_put(st->reg);
1027         }
1028
1029         iio_free_device(indio_dev);
1030
1031         return 0;
1032 }
1033
1034 static const struct spi_device_id ad7793_id[] = {
1035         {"ad7792", ID_AD7792},
1036         {"ad7793", ID_AD7793},
1037         {}
1038 };
1039 MODULE_DEVICE_TABLE(spi, ad7793_id);
1040
1041 static struct spi_driver ad7793_driver = {
1042         .driver = {
1043                 .name   = "ad7793",
1044                 .bus    = &spi_bus_type,
1045                 .owner  = THIS_MODULE,
1046         },
1047         .probe          = ad7793_probe,
1048         .remove         = __devexit_p(ad7793_remove),
1049         .id_table       = ad7793_id,
1050 };
1051
1052 static int __init ad7793_init(void)
1053 {
1054         return spi_register_driver(&ad7793_driver);
1055 }
1056 module_init(ad7793_init);
1057
1058 static void __exit ad7793_exit(void)
1059 {
1060         spi_unregister_driver(&ad7793_driver);
1061 }
1062 module_exit(ad7793_exit);
1063
1064 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
1065 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
1066 MODULE_LICENSE("GPL v2");