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1 /*
2  * AD7792/AD7793 SPI ADC driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19
20 #include "../iio.h"
21 #include "../sysfs.h"
22 #include "../ring_generic.h"
23 #include "../ring_sw.h"
24 #include "../trigger.h"
25 #include "../trigger_consumer.h"
26
27 #include "ad7793.h"
28
29 /* NOTE:
30  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
31  * In order to avoid contentions on the SPI bus, it's therefore necessary
32  * to use spi bus locking.
33  *
34  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
35  */
36
37 struct ad7793_chip_info {
38         struct iio_chan_spec            channel[7];
39 };
40
41 struct ad7793_state {
42         struct spi_device               *spi;
43         struct iio_trigger              *trig;
44         const struct ad7793_chip_info   *chip_info;
45         struct regulator                *reg;
46         struct ad7793_platform_data     *pdata;
47         wait_queue_head_t               wq_data_avail;
48         bool                            done;
49         bool                            irq_dis;
50         u16                             int_vref_mv;
51         u16                             mode;
52         u16                             conf;
53         u32                             scale_avail[8][2];
54         u32                             available_scan_masks[7];
55         /*
56          * DMA (thus cache coherency maintenance) requires the
57          * transfer buffers to live in their own cache lines.
58          */
59         u8                              data[4] ____cacheline_aligned;
60 };
61
62 enum ad7793_supported_device_ids {
63         ID_AD7792,
64         ID_AD7793,
65 };
66
67 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
68                               bool cs_change, unsigned char reg,
69                               unsigned size, unsigned val)
70 {
71         u8 *data = st->data;
72         struct spi_transfer t = {
73                 .tx_buf         = data,
74                 .len            = size + 1,
75                 .cs_change      = cs_change,
76         };
77         struct spi_message m;
78
79         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
80
81         switch (size) {
82         case 3:
83                 data[1] = val >> 16;
84                 data[2] = val >> 8;
85                 data[3] = val;
86                 break;
87         case 2:
88                 data[1] = val >> 8;
89                 data[2] = val;
90                 break;
91         case 1:
92                 data[1] = val;
93                 break;
94         default:
95                 return -EINVAL;
96         }
97
98         spi_message_init(&m);
99         spi_message_add_tail(&t, &m);
100
101         if (locked)
102                 return spi_sync_locked(st->spi, &m);
103         else
104                 return spi_sync(st->spi, &m);
105 }
106
107 static int ad7793_write_reg(struct ad7793_state *st,
108                             unsigned reg, unsigned size, unsigned val)
109 {
110         return __ad7793_write_reg(st, false, false, reg, size, val);
111 }
112
113 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
114                              bool cs_change, unsigned char reg,
115                              int *val, unsigned size)
116 {
117         u8 *data = st->data;
118         int ret;
119         struct spi_transfer t[] = {
120                 {
121                         .tx_buf = data,
122                         .len = 1,
123                 }, {
124                         .rx_buf = data,
125                         .len = size,
126                         .cs_change = cs_change,
127                 },
128         };
129         struct spi_message m;
130
131         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
132
133         spi_message_init(&m);
134         spi_message_add_tail(&t[0], &m);
135         spi_message_add_tail(&t[1], &m);
136
137         if (locked)
138                 ret = spi_sync_locked(st->spi, &m);
139         else
140                 ret = spi_sync(st->spi, &m);
141
142         if (ret < 0)
143                 return ret;
144
145         switch (size) {
146         case 3:
147                 *val = data[0] << 16 | data[1] << 8 | data[2];
148                 break;
149         case 2:
150                 *val = data[0] << 8 | data[1];
151                 break;
152         case 1:
153                 *val = data[0];
154                 break;
155         default:
156                 return -EINVAL;
157         }
158
159         return 0;
160 }
161
162 static int ad7793_read_reg(struct ad7793_state *st,
163                            unsigned reg, int *val, unsigned size)
164 {
165         return __ad7793_read_reg(st, 0, 0, reg, val, size);
166 }
167
168 static int ad7793_read(struct ad7793_state *st, unsigned ch,
169                        unsigned len, int *val)
170 {
171         int ret;
172         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
173         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
174                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
175
176         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
177
178         spi_bus_lock(st->spi->master);
179         st->done = false;
180
181         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
182                                  sizeof(st->mode), st->mode);
183         if (ret < 0)
184                 goto out;
185
186         st->irq_dis = false;
187         enable_irq(st->spi->irq);
188         wait_event_interruptible(st->wq_data_avail, st->done);
189
190         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
191 out:
192         spi_bus_unlock(st->spi->master);
193
194         return ret;
195 }
196
197 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
198 {
199         int ret;
200
201         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
202         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
203
204         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
205
206         spi_bus_lock(st->spi->master);
207         st->done = false;
208
209         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
210                                  sizeof(st->mode), st->mode);
211         if (ret < 0)
212                 goto out;
213
214         st->irq_dis = false;
215         enable_irq(st->spi->irq);
216         wait_event_interruptible(st->wq_data_avail, st->done);
217
218         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
219                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
220
221         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
222                                  sizeof(st->mode), st->mode);
223 out:
224         spi_bus_unlock(st->spi->master);
225
226         return ret;
227 }
228
229 static const u8 ad7793_calib_arr[6][2] = {
230         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
231         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
232         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
233         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
234         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
235         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
236 };
237
238 static int ad7793_calibrate_all(struct ad7793_state *st)
239 {
240         int i, ret;
241
242         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
243                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
244                                        ad7793_calib_arr[i][1]);
245                 if (ret)
246                         goto out;
247         }
248
249         return 0;
250 out:
251         dev_err(&st->spi->dev, "Calibration failed\n");
252         return ret;
253 }
254
255 static int ad7793_setup(struct ad7793_state *st)
256 {
257         int i, ret = -1;
258         unsigned long long scale_uv;
259         u32 id;
260
261         /* reset the serial interface */
262         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
263         if (ret < 0)
264                 goto out;
265         msleep(1); /* Wait for at least 500us */
266
267         /* write/read test for device presence */
268         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
269         if (ret)
270                 goto out;
271
272         id &= AD7793_ID_MASK;
273
274         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
275                 dev_err(&st->spi->dev, "device ID query failed\n");
276                 goto out;
277         }
278
279         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
280                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
281         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
282
283         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
284         if (ret)
285                 goto out;
286
287         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
288         if (ret)
289                 goto out;
290
291         ret = ad7793_write_reg(st, AD7793_REG_IO,
292                                sizeof(st->pdata->io), st->pdata->io);
293         if (ret)
294                 goto out;
295
296         ret = ad7793_calibrate_all(st);
297         if (ret)
298                 goto out;
299
300         /* Populate available ADC input ranges */
301         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
302                 scale_uv = ((u64)st->int_vref_mv * 100000000)
303                         >> (st->chip_info->channel[0].scan_type.realbits -
304                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
305                 scale_uv >>= i;
306
307                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
308                 st->scale_avail[i][0] = scale_uv;
309         }
310
311         return 0;
312 out:
313         dev_err(&st->spi->dev, "setup failed\n");
314         return ret;
315 }
316
317 static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
318 {
319         struct iio_ring_buffer *ring = iio_priv_to_dev(st)->ring;
320         int ret;
321         s64 dat64[2];
322         u32 *dat32 = (u32 *)dat64;
323
324         if (!(ring->scan_mask & (1 << ch)))
325                 return  -EBUSY;
326
327         ret = ring->access->read_last(ring, (u8 *) &dat64);
328         if (ret)
329                 return ret;
330
331         *val = *dat32;
332
333         return 0;
334 }
335
336 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
337 {
338         struct ad7793_state *st = iio_priv(indio_dev);
339         struct iio_ring_buffer *ring = indio_dev->ring;
340         size_t d_size;
341         unsigned channel;
342
343         if (!ring->scan_count)
344                 return -EINVAL;
345
346         channel = __ffs(ring->scan_mask);
347
348         d_size = ring->scan_count *
349                  indio_dev->channels[0].scan_type.storagebits / 8;
350
351         if (ring->scan_timestamp) {
352                 d_size += sizeof(s64);
353
354                 if (d_size % sizeof(s64))
355                         d_size += sizeof(s64) - (d_size % sizeof(s64));
356         }
357
358         if (indio_dev->ring->access->set_bytes_per_datum)
359                 indio_dev->ring->access->set_bytes_per_datum(indio_dev->ring,
360                                                              d_size);
361
362         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
363                     AD7793_MODE_SEL(AD7793_MODE_CONT);
364         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
365                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
366
367         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
368
369         spi_bus_lock(st->spi->master);
370         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
371                            sizeof(st->mode), st->mode);
372
373         st->irq_dis = false;
374         enable_irq(st->spi->irq);
375
376         return 0;
377 }
378
379 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
380 {
381         struct ad7793_state *st = iio_priv(indio_dev);
382
383         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
384                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
385
386         st->done = false;
387         wait_event_interruptible(st->wq_data_avail, st->done);
388
389         if (!st->irq_dis)
390                 disable_irq_nosync(st->spi->irq);
391
392         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
393                            sizeof(st->mode), st->mode);
394
395         return spi_bus_unlock(st->spi->master);
396 }
397
398 /**
399  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
400  **/
401
402 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
403 {
404         struct iio_poll_func *pf = p;
405         struct iio_dev *indio_dev = pf->indio_dev;
406         struct iio_ring_buffer *ring = indio_dev->ring;
407         struct ad7793_state *st = iio_priv(indio_dev);
408         s64 dat64[2];
409         s32 *dat32 = (s32 *)dat64;
410
411         if (ring->scan_count)
412                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
413                                   dat32,
414                                   indio_dev->channels[0].scan_type.realbits/8);
415
416         /* Guaranteed to be aligned with 8 byte boundary */
417         if (ring->scan_timestamp)
418                 dat64[1] = pf->timestamp;
419
420         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
421
422         iio_trigger_notify_done(indio_dev->trig);
423         st->irq_dis = false;
424         enable_irq(st->spi->irq);
425
426         return IRQ_HANDLED;
427 }
428
429 static const struct iio_ring_setup_ops ad7793_ring_setup_ops = {
430         .preenable = &ad7793_ring_preenable,
431         .postenable = &iio_triggered_ring_postenable,
432         .predisable = &iio_triggered_ring_predisable,
433         .postdisable = &ad7793_ring_postdisable,
434 };
435
436 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
437 {
438         int ret;
439
440         indio_dev->ring = iio_sw_rb_allocate(indio_dev);
441         if (!indio_dev->ring) {
442                 ret = -ENOMEM;
443                 goto error_ret;
444         }
445         /* Effectively select the ring buffer implementation */
446         indio_dev->ring->access = &ring_sw_access_funcs;
447         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
448                                                  &ad7793_trigger_handler,
449                                                  IRQF_ONESHOT,
450                                                  indio_dev,
451                                                  "ad7793_consumer%d",
452                                                  indio_dev->id);
453         if (indio_dev->pollfunc == NULL) {
454                 ret = -ENOMEM;
455                 goto error_deallocate_sw_rb;
456         }
457
458         /* Ring buffer functions - here trigger setup related */
459         indio_dev->ring->setup_ops = &ad7793_ring_setup_ops;
460
461         /* Flag that polled ring buffering is possible */
462         indio_dev->modes |= INDIO_RING_TRIGGERED;
463         return 0;
464
465 error_deallocate_sw_rb:
466         iio_sw_rb_free(indio_dev->ring);
467 error_ret:
468         return ret;
469 }
470
471 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
472 {
473         iio_dealloc_pollfunc(indio_dev->pollfunc);
474         iio_sw_rb_free(indio_dev->ring);
475 }
476
477 /**
478  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
479  **/
480 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
481 {
482         struct ad7793_state *st = iio_priv(private);
483
484         st->done = true;
485         wake_up_interruptible(&st->wq_data_avail);
486         disable_irq_nosync(irq);
487         st->irq_dis = true;
488         iio_trigger_poll(st->trig, iio_get_time_ns());
489
490         return IRQ_HANDLED;
491 }
492
493 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
494 {
495         struct ad7793_state *st = iio_priv(indio_dev);
496         int ret;
497
498         st->trig = iio_allocate_trigger("%s-dev%d",
499                                         spi_get_device_id(st->spi)->name,
500                                         indio_dev->id);
501         if (st->trig == NULL) {
502                 ret = -ENOMEM;
503                 goto error_ret;
504         }
505
506         ret = request_irq(st->spi->irq,
507                           ad7793_data_rdy_trig_poll,
508                           IRQF_TRIGGER_LOW,
509                           spi_get_device_id(st->spi)->name,
510                           indio_dev);
511         if (ret)
512                 goto error_free_trig;
513
514         disable_irq_nosync(st->spi->irq);
515         st->irq_dis = true;
516         st->trig->dev.parent = &st->spi->dev;
517         st->trig->owner = THIS_MODULE;
518         st->trig->private_data = indio_dev;
519
520         ret = iio_trigger_register(st->trig);
521
522         /* select default trigger */
523         indio_dev->trig = st->trig;
524         if (ret)
525                 goto error_free_irq;
526
527         return 0;
528
529 error_free_irq:
530         free_irq(st->spi->irq, indio_dev);
531 error_free_trig:
532         iio_free_trigger(st->trig);
533 error_ret:
534         return ret;
535 }
536
537 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
538 {
539         struct ad7793_state *st = iio_priv(indio_dev);
540
541         iio_trigger_unregister(st->trig);
542         free_irq(st->spi->irq, indio_dev);
543         iio_free_trigger(st->trig);
544 }
545
546 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
547                                           17, 16, 12, 10, 8, 6, 4};
548
549 static ssize_t ad7793_read_frequency(struct device *dev,
550                 struct device_attribute *attr,
551                 char *buf)
552 {
553         struct iio_dev *indio_dev = dev_get_drvdata(dev);
554         struct ad7793_state *st = iio_priv(indio_dev);
555
556         return sprintf(buf, "%d\n",
557                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
558 }
559
560 static ssize_t ad7793_write_frequency(struct device *dev,
561                 struct device_attribute *attr,
562                 const char *buf,
563                 size_t len)
564 {
565         struct iio_dev *indio_dev = dev_get_drvdata(dev);
566         struct ad7793_state *st = iio_priv(indio_dev);
567         long lval;
568         int i, ret;
569
570         mutex_lock(&indio_dev->mlock);
571         if (iio_ring_enabled(indio_dev)) {
572                 mutex_unlock(&indio_dev->mlock);
573                 return -EBUSY;
574         }
575         mutex_unlock(&indio_dev->mlock);
576
577         ret = strict_strtol(buf, 10, &lval);
578         if (ret)
579                 return ret;
580
581         ret = -EINVAL;
582
583         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
584                 if (lval == sample_freq_avail[i]) {
585                         mutex_lock(&indio_dev->mlock);
586                         st->mode &= ~AD7793_MODE_RATE(-1);
587                         st->mode |= AD7793_MODE_RATE(i);
588                         ad7793_write_reg(st, AD7793_REG_MODE,
589                                          sizeof(st->mode), st->mode);
590                         mutex_unlock(&indio_dev->mlock);
591                         ret = 0;
592                 }
593
594         return ret ? ret : len;
595 }
596
597 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
598                 ad7793_read_frequency,
599                 ad7793_write_frequency);
600
601 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
602         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
603
604 static ssize_t ad7793_show_scale_available(struct device *dev,
605                         struct device_attribute *attr, char *buf)
606 {
607         struct iio_dev *indio_dev = dev_get_drvdata(dev);
608         struct ad7793_state *st = iio_priv(indio_dev);
609         int i, len = 0;
610
611         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
612                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
613                                st->scale_avail[i][1]);
614
615         len += sprintf(buf + len, "\n");
616
617         return len;
618 }
619
620 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
621                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
622
623 static struct attribute *ad7793_attributes[] = {
624         &iio_dev_attr_sampling_frequency.dev_attr.attr,
625         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
626         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
627         NULL
628 };
629
630 static const struct attribute_group ad7793_attribute_group = {
631         .attrs = ad7793_attributes,
632 };
633
634 static int ad7793_read_raw(struct iio_dev *indio_dev,
635                            struct iio_chan_spec const *chan,
636                            int *val,
637                            int *val2,
638                            long m)
639 {
640         struct ad7793_state *st = iio_priv(indio_dev);
641         int ret, smpl = 0;
642         unsigned long long scale_uv;
643         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
644
645         switch (m) {
646         case 0:
647                 mutex_lock(&indio_dev->mlock);
648                 if (iio_ring_enabled(indio_dev))
649                         ret = ad7793_scan_from_ring(st,
650                                         chan->scan_index, &smpl);
651                 else
652                         ret = ad7793_read(st, chan->address,
653                                         chan->scan_type.realbits / 8, &smpl);
654                 mutex_unlock(&indio_dev->mlock);
655
656                 if (ret < 0)
657                         return ret;
658
659                 *val = (smpl >> chan->scan_type.shift) &
660                         ((1 << (chan->scan_type.realbits)) - 1);
661
662                 if (!unipolar)
663                         *val -= (1 << (chan->scan_type.realbits - 1));
664
665                 return IIO_VAL_INT;
666
667         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
668                 *val = st->scale_avail[(st->conf >> 8) & 0x7][0];
669                 *val2 = st->scale_avail[(st->conf >> 8) & 0x7][1];
670
671                 return IIO_VAL_INT_PLUS_NANO;
672
673         case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
674                 switch (chan->type) {
675                 case IIO_IN:
676                         /* 1170mV / 2^23 * 6 */
677                         scale_uv = (1170ULL * 100000000ULL * 6ULL)
678                                 >> (chan->scan_type.realbits -
679                                 (unipolar ? 0 : 1));
680                         break;
681                 case IIO_TEMP:
682                         /* Always uses unity gain and internal ref */
683                         scale_uv = (2500ULL * 100000000ULL)
684                                 >> (chan->scan_type.realbits -
685                                 (unipolar ? 0 : 1));
686                         break;
687                 default:
688                         return -EINVAL;
689                 }
690
691                 *val2 = do_div(scale_uv, 100000000) * 10;
692                 *val =  scale_uv;
693
694                 return IIO_VAL_INT_PLUS_NANO;
695         }
696         return -EINVAL;
697 }
698
699 static int ad7793_write_raw(struct iio_dev *indio_dev,
700                                struct iio_chan_spec const *chan,
701                                int val,
702                                int val2,
703                                long mask)
704 {
705         struct ad7793_state *st = iio_priv(indio_dev);
706         int ret, i;
707         unsigned int tmp;
708
709         mutex_lock(&indio_dev->mlock);
710         if (iio_ring_enabled(indio_dev)) {
711                 mutex_unlock(&indio_dev->mlock);
712                 return -EBUSY;
713         }
714
715         switch (mask) {
716         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
717                 ret = -EINVAL;
718                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
719                         if (val2 == st->scale_avail[i][1]) {
720                                 tmp = st->conf;
721                                 st->conf &= ~AD7793_CONF_GAIN(-1);
722                                 st->conf |= AD7793_CONF_GAIN(i);
723
724                                 if (tmp != st->conf) {
725                                         ad7793_write_reg(st, AD7793_REG_CONF,
726                                                          sizeof(st->conf),
727                                                          st->conf);
728                                         ad7793_calibrate_all(st);
729                                 }
730                                 ret = 0;
731                         }
732
733         default:
734                 ret = -EINVAL;
735         }
736
737         mutex_unlock(&indio_dev->mlock);
738         return ret;
739 }
740
741 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
742                                    struct iio_trigger *trig)
743 {
744         if (indio_dev->trig != trig)
745                 return -EINVAL;
746
747         return 0;
748 }
749
750 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
751                                struct iio_chan_spec const *chan,
752                                long mask)
753 {
754         return IIO_VAL_INT_PLUS_NANO;
755 }
756
757 static const struct iio_info ad7793_info = {
758         .read_raw = &ad7793_read_raw,
759         .write_raw = &ad7793_write_raw,
760         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
761         .attrs = &ad7793_attribute_group,
762         .validate_trigger = ad7793_validate_trigger,
763         .driver_module = THIS_MODULE,
764 };
765
766 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
767         [ID_AD7793] = {
768                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
769                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
770                                     AD7793_CH_AIN1P_AIN1M,
771                                     0, IIO_ST('s', 24, 32, 0), 0),
772                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
773                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
774                                     AD7793_CH_AIN2P_AIN2M,
775                                     1, IIO_ST('s', 24, 32, 0), 0),
776                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
777                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
778                                     AD7793_CH_AIN3P_AIN3M,
779                                     2, IIO_ST('s', 24, 32, 0), 0),
780                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
781                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
782                                     AD7793_CH_AIN1M_AIN1M,
783                                     3, IIO_ST('s', 24, 32, 0), 0),
784                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
785                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
786                                     AD7793_CH_TEMP,
787                                     4, IIO_ST('s', 24, 32, 0), 0),
788                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
789                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
790                                     AD7793_CH_AVDD_MONITOR,
791                                     5, IIO_ST('s', 24, 32, 0), 0),
792                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
793         },
794         [ID_AD7792] = {
795                 .channel[0] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 0, 0,
796                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
797                                     AD7793_CH_AIN1P_AIN1M,
798                                     0, IIO_ST('s', 16, 32, 0), 0),
799                 .channel[1] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 1, 1,
800                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
801                                     AD7793_CH_AIN2P_AIN2M,
802                                     1, IIO_ST('s', 16, 32, 0), 0),
803                 .channel[2] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, NULL, 2, 2,
804                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
805                                     AD7793_CH_AIN3P_AIN3M,
806                                     2, IIO_ST('s', 16, 32, 0), 0),
807                 .channel[3] = IIO_CHAN(IIO_IN_DIFF, 0, 1, 0, "shorted", 0, 0,
808                                     (1 << IIO_CHAN_INFO_SCALE_SHARED),
809                                     AD7793_CH_AIN1M_AIN1M,
810                                     3, IIO_ST('s', 16, 32, 0), 0),
811                 .channel[4] = IIO_CHAN(IIO_TEMP, 0, 1, 0, NULL, 0, 0,
812                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
813                                     AD7793_CH_TEMP,
814                                     4, IIO_ST('s', 16, 32, 0), 0),
815                 .channel[5] = IIO_CHAN(IIO_IN, 0, 1, 0, "supply", 4, 0,
816                                     (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
817                                     AD7793_CH_AVDD_MONITOR,
818                                     5, IIO_ST('s', 16, 32, 0), 0),
819                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
820         },
821 };
822
823 static int __devinit ad7793_probe(struct spi_device *spi)
824 {
825         struct ad7793_platform_data *pdata = spi->dev.platform_data;
826         struct ad7793_state *st;
827         struct iio_dev *indio_dev;
828         int ret, i, voltage_uv = 0, regdone = 0;
829
830         if (!pdata) {
831                 dev_err(&spi->dev, "no platform data?\n");
832                 return -ENODEV;
833         }
834
835         if (!spi->irq) {
836                 dev_err(&spi->dev, "no IRQ?\n");
837                 return -ENODEV;
838         }
839
840         indio_dev = iio_allocate_device(sizeof(*st));
841         if (indio_dev == NULL)
842                 return -ENOMEM;
843
844         st = iio_priv(indio_dev);
845
846         st->reg = regulator_get(&spi->dev, "vcc");
847         if (!IS_ERR(st->reg)) {
848                 ret = regulator_enable(st->reg);
849                 if (ret)
850                         goto error_put_reg;
851
852                 voltage_uv = regulator_get_voltage(st->reg);
853         }
854
855         st->chip_info =
856                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
857
858         st->pdata = pdata;
859
860         if (pdata && pdata->vref_mv)
861                 st->int_vref_mv = pdata->vref_mv;
862         else if (voltage_uv)
863                 st->int_vref_mv = voltage_uv / 1000;
864         else
865                 st->int_vref_mv = 2500; /* Build-in ref */
866
867         spi_set_drvdata(spi, indio_dev);
868         st->spi = spi;
869
870         indio_dev->dev.parent = &spi->dev;
871         indio_dev->name = spi_get_device_id(spi)->name;
872         indio_dev->modes = INDIO_DIRECT_MODE;
873         indio_dev->channels = st->chip_info->channel;
874         indio_dev->available_scan_masks = st->available_scan_masks;
875         indio_dev->num_channels = 7;
876         indio_dev->info = &ad7793_info;
877
878         for (i = 0; i < indio_dev->num_channels; i++)
879                 st->available_scan_masks[i] = (1 << i) | (1 <<
880                         indio_dev->channels[indio_dev->num_channels - 1].
881                         scan_index);
882
883         init_waitqueue_head(&st->wq_data_avail);
884
885         ret = ad7793_register_ring_funcs_and_init(indio_dev);
886         if (ret)
887                 goto error_disable_reg;
888
889         ret = iio_device_register(indio_dev);
890         if (ret)
891                 goto error_unreg_ring;
892         regdone = 1;
893
894         ret = ad7793_probe_trigger(indio_dev);
895         if (ret)
896                 goto error_unreg_ring;
897
898         ret = iio_ring_buffer_register(indio_dev,
899                                        indio_dev->channels,
900                                        indio_dev->num_channels);
901         if (ret)
902                 goto error_remove_trigger;
903
904         ret = ad7793_setup(st);
905         if (ret)
906                 goto error_uninitialize_ring;
907
908         return 0;
909
910 error_uninitialize_ring:
911         iio_ring_buffer_unregister(indio_dev);
912 error_remove_trigger:
913         ad7793_remove_trigger(indio_dev);
914 error_unreg_ring:
915         ad7793_ring_cleanup(indio_dev);
916 error_disable_reg:
917         if (!IS_ERR(st->reg))
918                 regulator_disable(st->reg);
919 error_put_reg:
920         if (!IS_ERR(st->reg))
921                 regulator_put(st->reg);
922
923         if (regdone)
924                 iio_device_unregister(indio_dev);
925         else
926                 iio_free_device(indio_dev);
927
928         return ret;
929 }
930
931 static int ad7793_remove(struct spi_device *spi)
932 {
933         struct iio_dev *indio_dev = spi_get_drvdata(spi);
934         struct ad7793_state *st = iio_priv(indio_dev);
935
936         iio_ring_buffer_unregister(indio_dev);
937         ad7793_remove_trigger(indio_dev);
938         ad7793_ring_cleanup(indio_dev);
939
940         if (!IS_ERR(st->reg)) {
941                 regulator_disable(st->reg);
942                 regulator_put(st->reg);
943         }
944
945         iio_device_unregister(indio_dev);
946
947         return 0;
948 }
949
950 static const struct spi_device_id ad7793_id[] = {
951         {"ad7792", ID_AD7792},
952         {"ad7793", ID_AD7793},
953         {}
954 };
955
956 static struct spi_driver ad7793_driver = {
957         .driver = {
958                 .name   = "ad7793",
959                 .bus    = &spi_bus_type,
960                 .owner  = THIS_MODULE,
961         },
962         .probe          = ad7793_probe,
963         .remove         = __devexit_p(ad7793_remove),
964         .id_table       = ad7793_id,
965 };
966
967 static int __init ad7793_init(void)
968 {
969         return spi_register_driver(&ad7793_driver);
970 }
971 module_init(ad7793_init);
972
973 static void __exit ad7793_exit(void)
974 {
975         spi_unregister_driver(&ad7793_driver);
976 }
977 module_exit(ad7793_exit);
978
979 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
980 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
981 MODULE_LICENSE("GPL v2");