2 * Xen event channels (2-level ABI)
4 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
7 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
9 #include <linux/linkage.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/module.h>
14 #include <asm/sync_bitops.h>
15 #include <asm/xen/hypercall.h>
16 #include <asm/xen/hypervisor.h>
19 #include <xen/xen-ops.h>
20 #include <xen/events.h>
21 #include <xen/interface/xen.h>
22 #include <xen/interface/event_channel.h>
24 #include "events_internal.h"
27 * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
28 * careful to only use bitops which allow for this (e.g
29 * test_bit/find_first_bit and friends but not __ffs) and to pass
30 * BITS_PER_EVTCHN_WORD as the bitmask length.
32 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
34 * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
35 * array. Primarily to avoid long lines (hence the terse name).
37 #define BM(x) (unsigned long *)(x)
38 /* Find the first set bit in a evtchn mask */
39 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
41 static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
44 static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
46 clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
47 set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
50 static void evtchn_2l_clear_pending(unsigned port)
52 struct shared_info *s = HYPERVISOR_shared_info;
53 sync_clear_bit(port, BM(&s->evtchn_pending[0]));
56 static void evtchn_2l_set_pending(unsigned port)
58 struct shared_info *s = HYPERVISOR_shared_info;
59 sync_set_bit(port, BM(&s->evtchn_pending[0]));
62 static bool evtchn_2l_is_pending(unsigned port)
64 struct shared_info *s = HYPERVISOR_shared_info;
65 return sync_test_bit(port, BM(&s->evtchn_pending[0]));
68 static bool evtchn_2l_test_and_set_mask(unsigned port)
70 struct shared_info *s = HYPERVISOR_shared_info;
71 return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
74 static void evtchn_2l_mask(unsigned port)
76 struct shared_info *s = HYPERVISOR_shared_info;
77 sync_set_bit(port, BM(&s->evtchn_mask[0]));
80 static void evtchn_2l_unmask(unsigned port)
82 struct shared_info *s = HYPERVISOR_shared_info;
83 unsigned int cpu = get_cpu();
84 int do_hypercall = 0, evtchn_pending = 0;
86 BUG_ON(!irqs_disabled());
88 if (unlikely((cpu != cpu_from_evtchn(port))))
92 * Need to clear the mask before checking pending to
93 * avoid a race with an event becoming pending.
95 * EVTCHNOP_unmask will only trigger an upcall if the
96 * mask bit was set, so if a hypercall is needed
99 sync_clear_bit(port, BM(&s->evtchn_mask[0]));
100 evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
102 if (unlikely(evtchn_pending && xen_hvm_domain())) {
103 sync_set_bit(port, BM(&s->evtchn_mask[0]));
108 /* Slow path (hypercall) if this is a non-local port or if this is
109 * an hvm domain and an event is pending (hvm domains don't have
110 * their own implementation of irq_enable). */
112 struct evtchn_unmask unmask = { .port = port };
113 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
115 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
118 * The following is basically the equivalent of
119 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
120 * the interrupt edge' if the channel is masked.
122 if (evtchn_pending &&
123 !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
124 BM(&vcpu_info->evtchn_pending_sel)))
125 vcpu_info->evtchn_upcall_pending = 1;
131 static DEFINE_PER_CPU(unsigned int, current_word_idx);
132 static DEFINE_PER_CPU(unsigned int, current_bit_idx);
135 * Mask out the i least significant bits of w
137 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
139 static inline xen_ulong_t active_evtchns(unsigned int cpu,
140 struct shared_info *sh,
143 return sh->evtchn_pending[idx] &
144 per_cpu(cpu_evtchn_mask, cpu)[idx] &
145 ~sh->evtchn_mask[idx];
149 * Search the CPU's pending events bitmasks. For each one found, map
150 * the event number to an irq, and feed it into do_IRQ() for handling.
152 * Xen uses a two-level bitmap to speed searching. The first level is
153 * a bitset of words which contain pending event bits. The second
154 * level is a bitset of pending events themselves.
156 static void evtchn_2l_handle_events(unsigned cpu)
159 xen_ulong_t pending_words;
160 xen_ulong_t pending_bits;
161 int start_word_idx, start_bit_idx;
162 int word_idx, bit_idx;
164 struct irq_desc *desc;
165 struct shared_info *s = HYPERVISOR_shared_info;
166 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
168 /* Timer interrupt has highest priority. */
169 irq = irq_from_virq(cpu, VIRQ_TIMER);
171 unsigned int evtchn = evtchn_from_irq(irq);
172 word_idx = evtchn / BITS_PER_LONG;
173 bit_idx = evtchn % BITS_PER_LONG;
174 if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx)) {
175 desc = irq_to_desc(irq);
177 generic_handle_irq_desc(irq, desc);
182 * Master flag must be cleared /before/ clearing
183 * selector flag. xchg_xen_ulong must contain an
184 * appropriate barrier.
186 pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
188 start_word_idx = __this_cpu_read(current_word_idx);
189 start_bit_idx = __this_cpu_read(current_bit_idx);
191 word_idx = start_word_idx;
193 for (i = 0; pending_words != 0; i++) {
196 words = MASK_LSBS(pending_words, word_idx);
199 * If we masked out all events, wrap to beginning.
206 word_idx = EVTCHN_FIRST_BIT(words);
208 pending_bits = active_evtchns(cpu, s, word_idx);
209 bit_idx = 0; /* usually scan entire word from start */
211 * We scan the starting word in two parts.
213 * 1st time: start in the middle, scanning the
216 * 2nd time: scan the whole word (not just the
217 * parts skipped in the first pass) -- if an
218 * event in the previously scanned bits is
219 * pending again it would just be scanned on
220 * the next loop anyway.
222 if (word_idx == start_word_idx) {
224 bit_idx = start_bit_idx;
231 bits = MASK_LSBS(pending_bits, bit_idx);
233 /* If we masked out all events, move on. */
237 bit_idx = EVTCHN_FIRST_BIT(bits);
240 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
241 irq = evtchn_to_irq[port];
244 desc = irq_to_desc(irq);
246 generic_handle_irq_desc(irq, desc);
249 bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
251 /* Next caller starts at last processed + 1 */
252 __this_cpu_write(current_word_idx,
254 (word_idx+1) % BITS_PER_EVTCHN_WORD);
255 __this_cpu_write(current_bit_idx, bit_idx);
256 } while (bit_idx != 0);
258 /* Scan start_l1i twice; all others once. */
259 if ((word_idx != start_word_idx) || (i != 0))
260 pending_words &= ~(1UL << word_idx);
262 word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
266 irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
268 struct shared_info *sh = HYPERVISOR_shared_info;
269 int cpu = smp_processor_id();
270 xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
273 static DEFINE_SPINLOCK(debug_lock);
276 spin_lock_irqsave(&debug_lock, flags);
278 printk("\nvcpu %d\n ", cpu);
280 for_each_online_cpu(i) {
282 v = per_cpu(xen_vcpu, i);
283 pending = (get_irq_regs() && i == cpu)
284 ? xen_irqs_disabled(get_irq_regs())
285 : v->evtchn_upcall_mask;
286 printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
287 pending, v->evtchn_upcall_pending,
288 (int)(sizeof(v->evtchn_pending_sel)*2),
289 v->evtchn_pending_sel);
291 v = per_cpu(xen_vcpu, cpu);
293 printk("\npending:\n ");
294 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
295 printk("%0*"PRI_xen_ulong"%s",
296 (int)sizeof(sh->evtchn_pending[0])*2,
297 sh->evtchn_pending[i],
298 i % 8 == 0 ? "\n " : " ");
299 printk("\nglobal mask:\n ");
300 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
301 printk("%0*"PRI_xen_ulong"%s",
302 (int)(sizeof(sh->evtchn_mask[0])*2),
304 i % 8 == 0 ? "\n " : " ");
306 printk("\nglobally unmasked:\n ");
307 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
308 printk("%0*"PRI_xen_ulong"%s",
309 (int)(sizeof(sh->evtchn_mask[0])*2),
310 sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
311 i % 8 == 0 ? "\n " : " ");
313 printk("\nlocal cpu%d mask:\n ", cpu);
314 for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
315 printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
317 i % 8 == 0 ? "\n " : " ");
319 printk("\nlocally unmasked:\n ");
320 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
321 xen_ulong_t pending = sh->evtchn_pending[i]
322 & ~sh->evtchn_mask[i]
324 printk("%0*"PRI_xen_ulong"%s",
325 (int)(sizeof(sh->evtchn_mask[0])*2),
326 pending, i % 8 == 0 ? "\n " : " ");
329 printk("\npending list:\n");
330 for (i = 0; i < NR_EVENT_CHANNELS; i++) {
331 if (sync_test_bit(i, BM(sh->evtchn_pending))) {
332 int word_idx = i / BITS_PER_EVTCHN_WORD;
333 printk(" %d: event %d -> irq %d%s%s%s\n",
334 cpu_from_evtchn(i), i,
336 sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
338 !sync_test_bit(i, BM(sh->evtchn_mask))
339 ? "" : " globally-masked",
340 sync_test_bit(i, BM(cpu_evtchn))
341 ? "" : " locally-masked");
345 spin_unlock_irqrestore(&debug_lock, flags);
350 static const struct evtchn_ops evtchn_ops_2l = {
351 .bind_to_cpu = evtchn_2l_bind_to_cpu,
352 .clear_pending = evtchn_2l_clear_pending,
353 .set_pending = evtchn_2l_set_pending,
354 .is_pending = evtchn_2l_is_pending,
355 .test_and_set_mask = evtchn_2l_test_and_set_mask,
356 .mask = evtchn_2l_mask,
357 .unmask = evtchn_2l_unmask,
358 .handle_events = evtchn_2l_handle_events,
361 void __init xen_evtchn_2l_init(void)
363 pr_info("Using 2-level ABI\n");
364 evtchn_ops = &evtchn_ops_2l;