2 * Configuration for Versatile Express. Parts were derived from other ARM
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __VEXPRESS_AEMV8A_H
9 #define __VEXPRESS_AEMV8A_H
13 /* We use generic board for v8 Versatile Express */
14 #define CONFIG_SYS_GENERIC_BOARD
16 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
17 #ifndef CONFIG_SEMIHOSTING
18 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
20 #define CONFIG_ARMV8_SWITCH_TO_EL1
23 #define CONFIG_REMAKE_ELF
25 #if !defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && \
26 !defined(CONFIG_TARGET_VEXPRESS64_JUNO)
27 /* Base FVP and Juno not using GICv3 yet */
31 /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
33 #define CONFIG_SUPPORT_RAW_INITRD
35 /* Cache Definitions */
36 #define CONFIG_SYS_DCACHE_OFF
37 #define CONFIG_SYS_ICACHE_OFF
39 #define CONFIG_IDENT_STRING " vexpress_aemv8a"
40 #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a"
42 /* Link Definitions */
43 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
44 /* ATF loads u-boot here for BASE_FVP model */
45 #define CONFIG_SYS_TEXT_BASE 0x88000000
46 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
47 #elif CONFIG_TARGET_VEXPRESS64_JUNO
48 #define CONFIG_SYS_TEXT_BASE 0xe0000000
49 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
51 #define CONFIG_SYS_TEXT_BASE 0x80000000
52 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
55 /* Flat Device Tree Definitions */
56 #define CONFIG_OF_LIBFDT
58 /* CS register bases for the original memory map. */
59 #define V2M_PA_CS0 0x00000000
60 #define V2M_PA_CS1 0x14000000
61 #define V2M_PA_CS2 0x18000000
62 #define V2M_PA_CS3 0x1c000000
63 #define V2M_PA_CS4 0x0c000000
64 #define V2M_PA_CS5 0x10000000
66 #define V2M_PERIPH_OFFSET(x) (x << 16)
67 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
68 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
69 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
71 #define V2M_BASE 0x80000000
73 /* Common peripherals relative to CS7. */
74 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
75 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
76 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
77 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
79 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
80 #define V2M_UART0 0x7ff80000
81 #define V2M_UART1 0x7ff70000
83 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
84 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
85 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
86 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
89 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
91 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
92 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
94 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
95 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
97 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
99 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
101 /* System register offsets. */
102 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
103 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
104 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
106 /* Generic Timer Definitions */
107 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
109 /* Generic Interrupt Controller Definitions */
111 #define GICD_BASE (0x2f000000)
112 #define GICR_BASE (0x2f100000)
115 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
116 #define GICD_BASE (0x2f000000)
117 #define GICC_BASE (0x2c000000)
118 #elif CONFIG_TARGET_VEXPRESS64_JUNO
119 #define GICD_BASE (0x2C010000)
120 #define GICC_BASE (0x2C02f000)
122 #define GICD_BASE (0x2C001000)
123 #define GICC_BASE (0x2C002000)
127 #define CONFIG_SYS_MEMTEST_START V2M_BASE
128 #define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000)
130 /* Size of malloc() pool */
131 #define CONFIG_SYS_MALLOC_F_LEN 0x2000
132 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
134 /* Ethernet Configuration */
135 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
136 /* The real hardware Versatile express uses SMSC9118 */
137 #define CONFIG_SMC911X 1
138 #define CONFIG_SMC911X_32_BIT 1
139 #define CONFIG_SMC911X_BASE (0x018000000)
141 /* The Vexpress64 simulators use SMSC91C111 */
142 #define CONFIG_SMC91111 1
143 #define CONFIG_SMC91111_BASE (0x01A000000)
146 /* PL011 Serial Configuration */
147 #define CONFIG_BAUDRATE 115200
149 #define CONFIG_DM_SERIAL
150 #define CONFIG_PL01X_SERIAL
152 #define CONFIG_SYS_SERIAL0 V2M_UART0
153 #define CONFIG_SYS_SERIAL1 V2M_UART1
154 #define CONFIG_CONS_INDEX 0
155 #define CONFIG_PL011_SERIAL
156 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
157 #define CONFIG_PL011_CLOCK 7273800
159 #define CONFIG_PL011_CLOCK 24000000
161 #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
162 (void *)CONFIG_SYS_SERIAL1}
165 #define CONFIG_BAUDRATE 115200
166 #define CONFIG_SYS_SERIAL0 V2M_UART0
167 #define CONFIG_SYS_SERIAL1 V2M_UART1
169 /* Command line configuration */
171 /*#define CONFIG_MENU_SHOW*/
172 #define CONFIG_CMD_CACHE
173 #define CONFIG_CMD_BDI
174 #define CONFIG_CMD_BOOTI
175 #define CONFIG_CMD_UNZIP
176 #define CONFIG_CMD_DHCP
177 #define CONFIG_CMD_PXE
178 #define CONFIG_CMD_ENV
179 #define CONFIG_CMD_IMI
180 #define CONFIG_CMD_LOADB
181 #define CONFIG_CMD_MEMORY
182 #define CONFIG_CMD_MII
183 #define CONFIG_CMD_NET
184 #define CONFIG_CMD_PING
185 #define CONFIG_CMD_SAVEENV
186 #define CONFIG_CMD_RUN
187 #define CONFIG_CMD_BOOTD
188 #define CONFIG_CMD_ECHO
189 #define CONFIG_CMD_SOURCE
190 #define CONFIG_CMD_FAT
191 #define CONFIG_DOS_PARTITION
194 #define CONFIG_BOOTP_BOOTFILESIZE
195 #define CONFIG_BOOTP_BOOTPATH
196 #define CONFIG_BOOTP_GATEWAY
197 #define CONFIG_BOOTP_HOSTNAME
198 #define CONFIG_BOOTP_PXE
199 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
201 /* Miscellaneous configurable options */
202 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
204 /* Physical Memory Map */
205 #define CONFIG_NR_DRAM_BANKS 1
206 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
207 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */
208 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
210 /* Initial environment variables */
211 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
212 #define CONFIG_EXTRA_ENV_SETTINGS \
213 "kernel_name=uImage\0" \
214 "kernel_addr=0x80000000\0" \
215 "initrd_name=ramdisk.img\0" \
216 "initrd_addr=0x88000000\0" \
217 "fdt_name=devtree.dtb\0" \
218 "fdt_addr=0x83000000\0" \
219 "fdt_high=0xffffffffffffffff\0" \
220 "initrd_high=0xffffffffffffffff\0"
222 #define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
223 "0x1c090000 debug user_debug=31 "\
226 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
227 "smhload ${fdt_name} $fdt_addr; " \
228 "smhload ${initrd_name} $initrd_addr initrd_end; " \
229 "fdt addr $fdt_addr; fdt resize; " \
230 "fdt chosen $initrd_addr $initrd_end; " \
231 "bootm $kernel_addr - $fdt_addr"
233 #define CONFIG_BOOTDELAY 1
237 #define CONFIG_EXTRA_ENV_SETTINGS \
238 "kernel_addr_r=0x80000000\0" \
239 "initrd_addr_r=0x88000000\0" \
240 "fdt_addr_r=0x83000000\0" \
241 "fdt_high=0xa0000000\0"
243 #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 root=/dev/ram0"
244 #define CONFIG_BOOTCOMMAND "bootm $kernel_addr_r " \
245 "$initrd_addr_r:$initrd_size $fdt_addr_r"
246 #define CONFIG_BOOTDELAY -1
249 /* Do not preserve environment */
250 #define CONFIG_ENV_IS_NOWHERE 1
251 #define CONFIG_ENV_SIZE 0x1000
253 /* Monitor Command Prompt */
254 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
255 #define CONFIG_SYS_PROMPT "VExpress64# "
256 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
257 sizeof(CONFIG_SYS_PROMPT) + 16)
258 #define CONFIG_SYS_HUSH_PARSER
259 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
260 #define CONFIG_SYS_LONGHELP
261 #define CONFIG_CMDLINE_EDITING
262 #define CONFIG_SYS_MAXARGS 64 /* max command args */
264 /* Flash memory is available on the Juno board only */
265 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
266 #define CONFIG_SYS_NO_FLASH
268 #define CONFIG_CMD_FLASH
269 #define CONFIG_SYS_FLASH_CFI 1
270 #define CONFIG_FLASH_CFI_DRIVER 1
271 #define CONFIG_SYS_FLASH_BASE 0x08000000
272 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */
273 #define CONFIG_SYS_MAX_FLASH_BANKS 2
275 /* Timeout values in ticks */
276 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
277 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
279 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
280 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
281 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
282 #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
283 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
287 #endif /* __VEXPRESS_AEMV8A_H */