2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
20 #include <linux/of_device.h>
21 #include <linux/scatterlist.h>
22 #include <linux/sh_dma.h>
23 #include <linux/slab.h>
24 #include <linux/module.h>
25 #include <linux/workqueue.h>
26 #include <sound/soc.h>
27 #include <sound/pcm_params.h>
28 #include <sound/sh_fsi.h>
30 /* PortA/PortB register */
31 #define REG_DO_FMT 0x0000
32 #define REG_DOFF_CTL 0x0004
33 #define REG_DOFF_ST 0x0008
34 #define REG_DI_FMT 0x000C
35 #define REG_DIFF_CTL 0x0010
36 #define REG_DIFF_ST 0x0014
37 #define REG_CKG1 0x0018
38 #define REG_CKG2 0x001C
39 #define REG_DIDT 0x0020
40 #define REG_DODT 0x0024
41 #define REG_MUTE_ST 0x0028
42 #define REG_OUT_DMAC 0x002C
43 #define REG_OUT_SEL 0x0030
44 #define REG_IN_DMAC 0x0038
47 #define MST_CLK_RST 0x0210
48 #define MST_SOFT_RST 0x0214
49 #define MST_FIFO_SZ 0x0218
51 /* core register (depend on FSI version) */
52 #define A_MST_CTLR 0x0180
53 #define B_MST_CTLR 0x01A0
54 #define CPU_INT_ST 0x01F4
55 #define CPU_IEMSK 0x01F8
56 #define CPU_IMSK 0x01FC
63 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
64 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
65 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
66 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
68 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
69 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
70 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
72 #define CR_MONO (0x0 << 4)
73 #define CR_MONO_D (0x1 << 4)
74 #define CR_PCM (0x2 << 4)
75 #define CR_I2S (0x3 << 4)
76 #define CR_TDM (0x4 << 4)
77 #define CR_TDM_D (0x5 << 4)
81 #define VDMD_MASK (0x3 << 4)
82 #define VDMD_FRONT (0x0 << 4) /* Package in front */
83 #define VDMD_BACK (0x1 << 4) /* Package in back */
84 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
86 #define DMA_ON (0x1 << 0)
90 #define IRQ_HALF 0x00100000
91 #define FIFO_CLR 0x00000001
94 #define ERR_OVER 0x00000010
95 #define ERR_UNDER 0x00000001
96 #define ST_ERR (ERR_OVER | ERR_UNDER)
99 #define ACKMD_MASK 0x00007000
100 #define BPFMD_MASK 0x00000700
101 #define DIMD (1 << 4)
102 #define DOMD (1 << 0)
105 #define BP (1 << 4) /* Fix the signal of Biphase output */
106 #define SE (1 << 0) /* Fix the master clock */
112 /* IO SHIFT / MACRO */
117 #define AB_IO(param, shift) (param << shift)
120 #define PBSR (1 << 12) /* Port B Software Reset */
121 #define PASR (1 << 8) /* Port A Software Reset */
122 #define IR (1 << 4) /* Interrupt Reset */
123 #define FSISR (1 << 0) /* Software Reset */
126 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
127 /* 1: Biphase and serial */
130 #define FIFO_SZ_MASK 0x7
132 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
134 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
141 * A : sample widtht 16bit setting
142 * B : sample widtht 24bit setting
145 #define SHIFT_16DATA 0
146 #define SHIFT_24DATA 4
148 #define PACKAGE_24BITBUS_BACK 0
149 #define PACKAGE_24BITBUS_FRONT 1
150 #define PACKAGE_16BITBUS_STREAM 2
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
156 * FSI driver use below type name for variable
158 * xxx_num : number of data
159 * xxx_pos : position of data
160 * xxx_capa : capacity of data
164 * period/frame/sample image
168 * period pos period pos
170 * |<-------------------- period--------------------->|
171 * ==|============================================ ... =|==
173 * ||<----- frame ----->|<------ frame ----->| ... |
174 * |+--------------------+--------------------+- ... |
175 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
176 * |+--------------------+--------------------+- ... |
177 * ==|============================================ ... =|==
195 * FSIxCLK [CPG] (ick) -------> |
196 * |-> FSI_DIV (div)-> FSI2
197 * FSIxCK [external] (xck) ---> |
204 struct fsi_stream_handler;
208 * these are initialized by fsi_stream_init()
210 struct snd_pcm_substream *substream;
211 int fifo_sample_capa; /* sample capacity of FSI FIFO */
212 int buff_sample_capa; /* sample capacity of ALSA buffer */
213 int buff_sample_pos; /* sample position of ALSA buffer */
214 int period_samples; /* sample number / 1 period */
215 int period_pos; /* current period position */
216 int sample_width; /* sample width */
226 * thse are initialized by fsi_handler_init()
228 struct fsi_stream_handler *handler;
229 struct fsi_priv *priv;
232 * these are for DMAEngine
234 struct dma_chan *chan;
235 struct sh_dmae_slave slave; /* see fsi_handler_init() */
236 struct work_struct work;
243 /* see [FSI clock] */
248 int (*set_rate)(struct device *dev,
249 struct fsi_priv *fsi);
257 struct fsi_master *master;
259 struct fsi_stream playback;
260 struct fsi_stream capture;
262 struct fsi_clk clock;
275 struct fsi_stream_handler {
276 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
277 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
278 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
279 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
280 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
281 int (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
284 #define fsi_stream_handler_call(io, func, args...) \
286 !((io)->handler->func) ? 0 : \
287 (io)->handler->func(args))
301 struct fsi_priv fsia;
302 struct fsi_priv fsib;
303 const struct fsi_core *core;
307 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
310 * basic read write function
313 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
315 /* valid data area is 24bit */
318 __raw_writel(data, reg);
321 static u32 __fsi_reg_read(u32 __iomem *reg)
323 return __raw_readl(reg);
326 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
328 u32 val = __fsi_reg_read(reg);
333 __fsi_reg_write(reg, val);
336 #define fsi_reg_write(p, r, d)\
337 __fsi_reg_write((p->base + REG_##r), d)
339 #define fsi_reg_read(p, r)\
340 __fsi_reg_read((p->base + REG_##r))
342 #define fsi_reg_mask_set(p, r, m, d)\
343 __fsi_reg_mask_set((p->base + REG_##r), m, d)
345 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
346 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
347 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
352 spin_lock_irqsave(&master->lock, flags);
353 ret = __fsi_reg_read(master->base + reg);
354 spin_unlock_irqrestore(&master->lock, flags);
359 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
360 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
361 static void _fsi_master_mask_set(struct fsi_master *master,
362 u32 reg, u32 mask, u32 data)
366 spin_lock_irqsave(&master->lock, flags);
367 __fsi_reg_mask_set(master->base + reg, mask, data);
368 spin_unlock_irqrestore(&master->lock, flags);
374 static int fsi_version(struct fsi_master *master)
376 return master->core->ver;
379 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
384 static int fsi_is_clk_master(struct fsi_priv *fsi)
386 return fsi->clk_master;
389 static int fsi_is_port_a(struct fsi_priv *fsi)
391 return fsi->master->base == fsi->base;
394 static int fsi_is_spdif(struct fsi_priv *fsi)
399 static int fsi_is_enable_stream(struct fsi_priv *fsi)
401 return fsi->enable_stream;
404 static int fsi_is_play(struct snd_pcm_substream *substream)
406 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
409 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
411 struct snd_soc_pcm_runtime *rtd = substream->private_data;
416 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
418 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
421 return &master->fsia;
423 return &master->fsib;
426 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
428 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
431 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
433 int is_play = fsi_stream_is_play(fsi, io);
434 int is_porta = fsi_is_port_a(fsi);
438 shift = is_play ? AO_SHIFT : AI_SHIFT;
440 shift = is_play ? BO_SHIFT : BI_SHIFT;
445 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
447 return frames * fsi->chan_num;
450 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
452 return samples / fsi->chan_num;
455 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
456 struct fsi_stream *io)
458 int is_play = fsi_stream_is_play(fsi, io);
463 fsi_reg_read(fsi, DOFF_ST) :
464 fsi_reg_read(fsi, DIFF_ST);
466 frames = 0x1ff & (status >> 8);
468 return fsi_frame2sample(fsi, frames);
471 static void fsi_count_fifo_err(struct fsi_priv *fsi)
473 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
474 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
476 if (ostatus & ERR_OVER)
477 fsi->playback.oerr_num++;
479 if (ostatus & ERR_UNDER)
480 fsi->playback.uerr_num++;
482 if (istatus & ERR_OVER)
483 fsi->capture.oerr_num++;
485 if (istatus & ERR_UNDER)
486 fsi->capture.uerr_num++;
488 fsi_reg_write(fsi, DOFF_ST, 0);
489 fsi_reg_write(fsi, DIFF_ST, 0);
493 * fsi_stream_xx() function
495 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
496 struct fsi_stream *io)
498 return &fsi->playback == io;
501 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
502 struct snd_pcm_substream *substream)
504 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
507 static int fsi_stream_is_working(struct fsi_priv *fsi,
508 struct fsi_stream *io)
510 struct fsi_master *master = fsi_get_master(fsi);
514 spin_lock_irqsave(&master->lock, flags);
515 ret = !!(io->substream && io->substream->runtime);
516 spin_unlock_irqrestore(&master->lock, flags);
521 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
526 static void fsi_stream_init(struct fsi_priv *fsi,
527 struct fsi_stream *io,
528 struct snd_pcm_substream *substream)
530 struct snd_pcm_runtime *runtime = substream->runtime;
531 struct fsi_master *master = fsi_get_master(fsi);
534 spin_lock_irqsave(&master->lock, flags);
535 io->substream = substream;
536 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
537 io->buff_sample_pos = 0;
538 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
540 io->sample_width = samples_to_bytes(runtime, 1);
542 io->oerr_num = -1; /* ignore 1st err */
543 io->uerr_num = -1; /* ignore 1st err */
544 fsi_stream_handler_call(io, init, fsi, io);
545 spin_unlock_irqrestore(&master->lock, flags);
548 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
550 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
551 struct fsi_master *master = fsi_get_master(fsi);
554 spin_lock_irqsave(&master->lock, flags);
556 if (io->oerr_num > 0)
557 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
559 if (io->uerr_num > 0)
560 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
562 fsi_stream_handler_call(io, quit, fsi, io);
563 io->substream = NULL;
564 io->buff_sample_capa = 0;
565 io->buff_sample_pos = 0;
566 io->period_samples = 0;
568 io->sample_width = 0;
572 spin_unlock_irqrestore(&master->lock, flags);
575 static int fsi_stream_transfer(struct fsi_stream *io)
577 struct fsi_priv *fsi = fsi_stream_to_priv(io);
581 return fsi_stream_handler_call(io, transfer, fsi, io);
584 #define fsi_stream_start(fsi, io)\
585 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
587 #define fsi_stream_stop(fsi, io)\
588 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
590 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
592 struct fsi_stream *io;
596 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
599 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
609 static int fsi_stream_remove(struct fsi_priv *fsi)
611 struct fsi_stream *io;
615 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
618 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
629 * format/bus/dma setting
631 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
632 u32 bus, struct device *dev)
634 struct fsi_master *master = fsi_get_master(fsi);
635 int is_play = fsi_stream_is_play(fsi, io);
638 if (fsi_version(master) >= 2) {
642 * FSI2 needs DMA/Bus setting
645 case PACKAGE_24BITBUS_FRONT:
648 dev_dbg(dev, "24bit bus / package in front\n");
650 case PACKAGE_16BITBUS_STREAM:
653 dev_dbg(dev, "16bit bus / stream mode\n");
655 case PACKAGE_24BITBUS_BACK:
659 dev_dbg(dev, "24bit bus / package in back\n");
664 fsi_reg_write(fsi, OUT_DMAC, dma);
666 fsi_reg_write(fsi, IN_DMAC, dma);
670 fsi_reg_write(fsi, DO_FMT, fmt);
672 fsi_reg_write(fsi, DI_FMT, fmt);
679 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
681 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
682 struct fsi_master *master = fsi_get_master(fsi);
684 fsi_core_mask_set(master, imsk, data, data);
685 fsi_core_mask_set(master, iemsk, data, data);
688 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
690 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
691 struct fsi_master *master = fsi_get_master(fsi);
693 fsi_core_mask_set(master, imsk, data, 0);
694 fsi_core_mask_set(master, iemsk, data, 0);
697 static u32 fsi_irq_get_status(struct fsi_master *master)
699 return fsi_core_read(master, int_st);
702 static void fsi_irq_clear_status(struct fsi_priv *fsi)
705 struct fsi_master *master = fsi_get_master(fsi);
707 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
708 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
710 /* clear interrupt factor */
711 fsi_core_mask_set(master, int_st, data, 0);
715 * SPDIF master clock function
717 * These functions are used later FSI2
719 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
721 struct fsi_master *master = fsi_get_master(fsi);
725 val = enable ? mask : 0;
728 fsi_core_mask_set(master, a_mclk, mask, val) :
729 fsi_core_mask_set(master, b_mclk, mask, val);
735 static int fsi_clk_init(struct device *dev,
736 struct fsi_priv *fsi,
740 int (*set_rate)(struct device *dev,
741 struct fsi_priv *fsi))
743 struct fsi_clk *clock = &fsi->clock;
744 int is_porta = fsi_is_port_a(fsi);
751 clock->set_rate = set_rate;
753 clock->own = devm_clk_get(dev, NULL);
754 if (IS_ERR(clock->own))
759 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
760 if (IS_ERR(clock->xck)) {
761 dev_err(dev, "can't get xck clock\n");
764 if (clock->xck == clock->own) {
765 dev_err(dev, "cpu doesn't support xck clock\n");
770 /* FSIACLK/FSIBCLK */
772 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
773 if (IS_ERR(clock->ick)) {
774 dev_err(dev, "can't get ick clock\n");
777 if (clock->ick == clock->own) {
778 dev_err(dev, "cpu doesn't support ick clock\n");
785 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
786 if (IS_ERR(clock->div)) {
787 dev_err(dev, "can't get div clock\n");
790 if (clock->div == clock->own) {
791 dev_err(dev, "cpu doens't support div clock\n");
799 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
800 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
802 fsi->clock.rate = rate;
805 static int fsi_clk_is_valid(struct fsi_priv *fsi)
807 return fsi->clock.set_rate &&
811 static int fsi_clk_enable(struct device *dev,
812 struct fsi_priv *fsi)
814 struct fsi_clk *clock = &fsi->clock;
817 if (!fsi_clk_is_valid(fsi))
820 if (0 == clock->count) {
821 ret = clock->set_rate(dev, fsi);
823 fsi_clk_invalid(fsi);
828 clk_enable(clock->xck);
830 clk_enable(clock->ick);
832 clk_enable(clock->div);
840 static int fsi_clk_disable(struct device *dev,
841 struct fsi_priv *fsi)
843 struct fsi_clk *clock = &fsi->clock;
845 if (!fsi_clk_is_valid(fsi))
848 if (1 == clock->count--) {
850 clk_disable(clock->xck);
852 clk_disable(clock->ick);
854 clk_disable(clock->div);
860 static int fsi_clk_set_ackbpf(struct device *dev,
861 struct fsi_priv *fsi,
862 int ackmd, int bpfmd)
866 /* check ackmd/bpfmd relationship */
868 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
890 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
915 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
919 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
921 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
927 static int fsi_clk_set_rate_external(struct device *dev,
928 struct fsi_priv *fsi)
930 struct clk *xck = fsi->clock.xck;
931 struct clk *ick = fsi->clock.ick;
932 unsigned long rate = fsi->clock.rate;
937 /* check clock rate */
938 xrate = clk_get_rate(xck);
940 dev_err(dev, "unsupported clock rate\n");
944 clk_set_parent(ick, xck);
945 clk_set_rate(ick, xrate);
947 bpfmd = fsi->chan_num * 32;
948 ackmd = xrate / rate;
950 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
952 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
954 dev_err(dev, "%s failed", __func__);
959 static int fsi_clk_set_rate_cpg(struct device *dev,
960 struct fsi_priv *fsi)
962 struct clk *ick = fsi->clock.ick;
963 struct clk *div = fsi->clock.div;
964 unsigned long rate = fsi->clock.rate;
965 unsigned long target = 0; /* 12288000 or 11289600 */
966 unsigned long actual, cout;
967 unsigned long diff, min;
968 unsigned long best_cout, best_act;
973 if (!(12288000 % rate))
975 if (!(11289600 % rate))
978 dev_err(dev, "unsupported rate\n");
982 bpfmd = fsi->chan_num * 32;
983 ackmd = target / rate;
984 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
986 dev_err(dev, "%s failed", __func__);
993 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
995 * But, it needs to find best match of CPG and FSI_DIV
996 * combination, since it is difficult to generate correct
997 * frequency of audio clock from ick clock only.
998 * Because ick is created from its parent clock.
1000 * target = rate x [512/256/128/64]fs
1001 * cout = round(target x adjustment)
1002 * actual = cout / adjustment (by FSI-DIV) ~= target
1008 for (adj = 1; adj < 0xffff; adj++) {
1010 cout = target * adj;
1011 if (cout > 100000000) /* max clock = 100MHz */
1014 /* cout/actual audio clock */
1015 cout = clk_round_rate(ick, cout);
1016 actual = cout / adj;
1018 /* find best frequency */
1019 diff = abs(actual - target);
1027 ret = clk_set_rate(ick, best_cout);
1029 dev_err(dev, "ick clock failed\n");
1033 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1035 dev_err(dev, "div clock failed\n");
1039 dev_dbg(dev, "ick/div = %ld/%ld\n",
1040 clk_get_rate(ick), clk_get_rate(div));
1046 * pio data transfer handler
1048 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1052 if (fsi_is_enable_stream(fsi)) {
1056 * fsi_pio_push_init()
1058 u32 *buf = (u32 *)_buf;
1060 for (i = 0; i < samples / 2; i++)
1061 fsi_reg_write(fsi, DODT, buf[i]);
1064 u16 *buf = (u16 *)_buf;
1066 for (i = 0; i < samples; i++)
1067 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1071 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1073 u16 *buf = (u16 *)_buf;
1076 for (i = 0; i < samples; i++)
1077 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1080 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1082 u32 *buf = (u32 *)_buf;
1085 for (i = 0; i < samples; i++)
1086 fsi_reg_write(fsi, DODT, *(buf + i));
1089 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1091 u32 *buf = (u32 *)_buf;
1094 for (i = 0; i < samples; i++)
1095 *(buf + i) = fsi_reg_read(fsi, DIDT);
1098 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1100 struct snd_pcm_runtime *runtime = io->substream->runtime;
1102 return runtime->dma_area +
1103 samples_to_bytes(runtime, io->buff_sample_pos);
1106 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1107 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1108 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1111 struct snd_pcm_runtime *runtime;
1112 struct snd_pcm_substream *substream;
1116 if (!fsi_stream_is_working(fsi, io))
1120 substream = io->substream;
1121 runtime = substream->runtime;
1123 /* FSI FIFO has limit.
1124 * So, this driver can not send periods data at a time
1126 if (io->buff_sample_pos >=
1127 io->period_samples * (io->period_pos + 1)) {
1130 io->period_pos = (io->period_pos + 1) % runtime->periods;
1132 if (0 == io->period_pos)
1133 io->buff_sample_pos = 0;
1136 buf = fsi_pio_get_area(fsi, io);
1138 switch (io->sample_width) {
1140 run16(fsi, buf, samples);
1143 run32(fsi, buf, samples);
1149 /* update buff_sample_pos */
1150 io->buff_sample_pos += samples;
1153 snd_pcm_period_elapsed(substream);
1158 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1160 int sample_residues; /* samples in FSI fifo */
1161 int sample_space; /* ALSA free samples space */
1164 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1165 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1167 samples = min(sample_residues, sample_space);
1169 return fsi_pio_transfer(fsi, io,
1175 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1177 int sample_residues; /* ALSA residue samples */
1178 int sample_space; /* FSI fifo free samples space */
1181 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1182 sample_space = io->fifo_sample_capa -
1183 fsi_get_current_fifo_samples(fsi, io);
1185 samples = min(sample_residues, sample_space);
1187 return fsi_pio_transfer(fsi, io,
1193 static int fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1196 struct fsi_master *master = fsi_get_master(fsi);
1197 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1200 fsi_irq_enable(fsi, io);
1202 fsi_irq_disable(fsi, io);
1204 if (fsi_is_clk_master(fsi))
1205 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1210 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1213 * we can use 16bit stream mode
1214 * when "playback" and "16bit data"
1215 * and platform allows "stream mode"
1219 if (fsi_is_enable_stream(fsi))
1220 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1221 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1223 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1224 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1228 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1231 * always 24bit bus, package back when "capture"
1233 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1234 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1238 static struct fsi_stream_handler fsi_pio_push_handler = {
1239 .init = fsi_pio_push_init,
1240 .transfer = fsi_pio_push,
1241 .start_stop = fsi_pio_start_stop,
1244 static struct fsi_stream_handler fsi_pio_pop_handler = {
1245 .init = fsi_pio_pop_init,
1246 .transfer = fsi_pio_pop,
1247 .start_stop = fsi_pio_start_stop,
1250 static irqreturn_t fsi_interrupt(int irq, void *data)
1252 struct fsi_master *master = data;
1253 u32 int_st = fsi_irq_get_status(master);
1255 /* clear irq status */
1256 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1257 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1259 if (int_st & AB_IO(1, AO_SHIFT))
1260 fsi_stream_transfer(&master->fsia.playback);
1261 if (int_st & AB_IO(1, BO_SHIFT))
1262 fsi_stream_transfer(&master->fsib.playback);
1263 if (int_st & AB_IO(1, AI_SHIFT))
1264 fsi_stream_transfer(&master->fsia.capture);
1265 if (int_st & AB_IO(1, BI_SHIFT))
1266 fsi_stream_transfer(&master->fsib.capture);
1268 fsi_count_fifo_err(&master->fsia);
1269 fsi_count_fifo_err(&master->fsib);
1271 fsi_irq_clear_status(&master->fsia);
1272 fsi_irq_clear_status(&master->fsib);
1278 * dma data transfer handler
1280 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1282 struct snd_pcm_runtime *runtime = io->substream->runtime;
1283 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1284 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1285 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1288 * 24bit data : 24bit bus / package in back
1289 * 16bit data : 16bit bus / stream mode
1291 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1292 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1294 io->loop_cnt = 2; /* push 1st, 2nd period first, then 3rd, 4th... */
1295 io->additional_pos = 0;
1296 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1297 snd_pcm_lib_buffer_bytes(io->substream), dir);
1301 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1303 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1304 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1305 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1307 dma_unmap_single(dai->dev, io->dma,
1308 snd_pcm_lib_buffer_bytes(io->substream), dir);
1312 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io, int additional)
1314 struct snd_pcm_runtime *runtime = io->substream->runtime;
1315 int period = io->period_pos + additional;
1317 if (period >= runtime->periods)
1320 return io->dma + samples_to_bytes(runtime, period * io->period_samples);
1323 static void fsi_dma_complete(void *data)
1325 struct fsi_stream *io = (struct fsi_stream *)data;
1326 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1327 struct snd_pcm_runtime *runtime = io->substream->runtime;
1328 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1329 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1330 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1332 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io, 0),
1333 samples_to_bytes(runtime, io->period_samples), dir);
1335 io->buff_sample_pos += io->period_samples;
1338 if (io->period_pos >= runtime->periods) {
1340 io->buff_sample_pos = 0;
1343 fsi_count_fifo_err(fsi);
1344 fsi_stream_transfer(io);
1346 snd_pcm_period_elapsed(io->substream);
1349 static void fsi_dma_do_work(struct work_struct *work)
1351 struct fsi_stream *io = container_of(work, struct fsi_stream, work);
1352 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1353 struct snd_soc_dai *dai;
1354 struct dma_async_tx_descriptor *desc;
1355 struct snd_pcm_runtime *runtime;
1356 enum dma_data_direction dir;
1357 int is_play = fsi_stream_is_play(fsi, io);
1361 if (!fsi_stream_is_working(fsi, io))
1364 dai = fsi_get_dai(io->substream);
1365 runtime = io->substream->runtime;
1366 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1367 len = samples_to_bytes(runtime, io->period_samples);
1369 for (i = 0; i < io->loop_cnt; i++) {
1370 buf = fsi_dma_get_area(io, io->additional_pos);
1372 dma_sync_single_for_device(dai->dev, buf, len, dir);
1374 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1375 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1377 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1381 desc->callback = fsi_dma_complete;
1382 desc->callback_param = io;
1384 if (dmaengine_submit(desc) < 0) {
1385 dev_err(dai->dev, "tx_submit() fail\n");
1389 dma_async_issue_pending(io->chan);
1391 io->additional_pos = 1;
1399 * In DMAEngine case, codec and FSI cannot be started simultaneously
1400 * since FSI is using the scheduler work queue.
1401 * Therefore, in capture case, probably FSI FIFO will have got
1402 * overflow error in this point.
1403 * in that case, DMA cannot start transfer until error was cleared.
1406 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1407 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1408 fsi_reg_write(fsi, DIFF_ST, 0);
1413 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1415 struct sh_dmae_slave *slave = param;
1417 chan->private = slave;
1422 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1424 schedule_work(&io->work);
1429 static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1432 struct fsi_master *master = fsi_get_master(fsi);
1433 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1434 u32 enable = start ? DMA_ON : 0;
1436 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1438 dmaengine_terminate_all(io->chan);
1440 if (fsi_is_clk_master(fsi))
1441 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1446 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1448 dma_cap_mask_t mask;
1451 dma_cap_set(DMA_SLAVE, mask);
1453 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1456 /* switch to PIO handler */
1457 if (fsi_stream_is_play(fsi, io))
1458 fsi->playback.handler = &fsi_pio_push_handler;
1460 fsi->capture.handler = &fsi_pio_pop_handler;
1462 dev_info(dev, "switch handler (dma => pio)\n");
1465 return fsi_stream_probe(fsi, dev);
1468 INIT_WORK(&io->work, fsi_dma_do_work);
1473 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1475 cancel_work_sync(&io->work);
1477 fsi_stream_stop(fsi, io);
1480 dma_release_channel(io->chan);
1486 static struct fsi_stream_handler fsi_dma_push_handler = {
1487 .init = fsi_dma_init,
1488 .quit = fsi_dma_quit,
1489 .probe = fsi_dma_probe,
1490 .transfer = fsi_dma_transfer,
1491 .remove = fsi_dma_remove,
1492 .start_stop = fsi_dma_push_start_stop,
1498 static void fsi_fifo_init(struct fsi_priv *fsi,
1499 struct fsi_stream *io,
1502 struct fsi_master *master = fsi_get_master(fsi);
1503 int is_play = fsi_stream_is_play(fsi, io);
1507 /* get on-chip RAM capacity */
1508 shift = fsi_master_read(master, FIFO_SZ);
1509 shift >>= fsi_get_port_shift(fsi, io);
1510 shift &= FIFO_SZ_MASK;
1511 frame_capa = 256 << shift;
1512 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1515 * The maximum number of sample data varies depending
1516 * on the number of channels selected for the format.
1518 * FIFOs are used in 4-channel units in 3-channel mode
1519 * and in 8-channel units in 5- to 7-channel mode
1520 * meaning that more FIFOs than the required size of DPRAM
1523 * ex) if 256 words of DP-RAM is connected
1524 * 1 channel: 256 (256 x 1 = 256)
1525 * 2 channels: 128 (128 x 2 = 256)
1526 * 3 channels: 64 ( 64 x 3 = 192)
1527 * 4 channels: 64 ( 64 x 4 = 256)
1528 * 5 channels: 32 ( 32 x 5 = 160)
1529 * 6 channels: 32 ( 32 x 6 = 192)
1530 * 7 channels: 32 ( 32 x 7 = 224)
1531 * 8 channels: 32 ( 32 x 8 = 256)
1533 for (i = 1; i < fsi->chan_num; i <<= 1)
1535 dev_dbg(dev, "%d channel %d store\n",
1536 fsi->chan_num, frame_capa);
1538 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1541 * set interrupt generation factor
1545 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1546 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1548 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1549 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1553 static int fsi_hw_startup(struct fsi_priv *fsi,
1554 struct fsi_stream *io,
1560 if (fsi_is_clk_master(fsi))
1563 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1565 /* clock inversion (CKG2) */
1567 if (fsi->bit_clk_inv)
1569 if (fsi->lr_clk_inv)
1571 if (fsi_is_clk_master(fsi))
1573 fsi_reg_write(fsi, CKG2, data);
1576 if (fsi_is_spdif(fsi)) {
1577 fsi_spdif_clk_ctrl(fsi, 1);
1578 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1585 switch (io->sample_width) {
1587 data = BUSOP_GET(16, io->bus_option);
1590 data = BUSOP_GET(24, io->bus_option);
1593 fsi_format_bus_setup(fsi, io, data, dev);
1596 fsi_irq_disable(fsi, io);
1597 fsi_irq_clear_status(fsi);
1600 fsi_fifo_init(fsi, io, dev);
1602 /* start master clock */
1603 if (fsi_is_clk_master(fsi))
1604 return fsi_clk_enable(dev, fsi);
1609 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1612 /* stop master clock */
1613 if (fsi_is_clk_master(fsi))
1614 return fsi_clk_disable(dev, fsi);
1619 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1620 struct snd_soc_dai *dai)
1622 struct fsi_priv *fsi = fsi_get_priv(substream);
1624 fsi_clk_invalid(fsi);
1629 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1630 struct snd_soc_dai *dai)
1632 struct fsi_priv *fsi = fsi_get_priv(substream);
1634 fsi_clk_invalid(fsi);
1637 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1638 struct snd_soc_dai *dai)
1640 struct fsi_priv *fsi = fsi_get_priv(substream);
1641 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1645 case SNDRV_PCM_TRIGGER_START:
1646 fsi_stream_init(fsi, io, substream);
1648 ret = fsi_hw_startup(fsi, io, dai->dev);
1650 ret = fsi_stream_transfer(io);
1652 fsi_stream_start(fsi, io);
1654 case SNDRV_PCM_TRIGGER_STOP:
1656 ret = fsi_hw_shutdown(fsi, dai->dev);
1657 fsi_stream_stop(fsi, io);
1658 fsi_stream_quit(fsi, io);
1665 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1667 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1668 case SND_SOC_DAIFMT_I2S:
1672 case SND_SOC_DAIFMT_LEFT_J:
1683 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1685 struct fsi_master *master = fsi_get_master(fsi);
1687 if (fsi_version(master) < 2)
1690 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1696 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1698 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1701 /* set master/slave audio interface */
1702 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1703 case SND_SOC_DAIFMT_CBM_CFM:
1704 fsi->clk_master = 1;
1706 case SND_SOC_DAIFMT_CBS_CFS:
1712 /* set clock inversion */
1713 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1714 case SND_SOC_DAIFMT_NB_IF:
1715 fsi->bit_clk_inv = 0;
1716 fsi->lr_clk_inv = 1;
1718 case SND_SOC_DAIFMT_IB_NF:
1719 fsi->bit_clk_inv = 1;
1720 fsi->lr_clk_inv = 0;
1722 case SND_SOC_DAIFMT_IB_IF:
1723 fsi->bit_clk_inv = 1;
1724 fsi->lr_clk_inv = 1;
1726 case SND_SOC_DAIFMT_NB_NF:
1728 fsi->bit_clk_inv = 0;
1729 fsi->lr_clk_inv = 0;
1733 if (fsi_is_clk_master(fsi)) {
1735 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1736 fsi_clk_set_rate_cpg);
1738 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1739 fsi_clk_set_rate_external);
1743 if (fsi_is_spdif(fsi))
1744 ret = fsi_set_fmt_spdif(fsi);
1746 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1751 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1752 struct snd_pcm_hw_params *params,
1753 struct snd_soc_dai *dai)
1755 struct fsi_priv *fsi = fsi_get_priv(substream);
1757 if (fsi_is_clk_master(fsi))
1758 fsi_clk_valid(fsi, params_rate(params));
1763 static const struct snd_soc_dai_ops fsi_dai_ops = {
1764 .startup = fsi_dai_startup,
1765 .shutdown = fsi_dai_shutdown,
1766 .trigger = fsi_dai_trigger,
1767 .set_fmt = fsi_dai_set_fmt,
1768 .hw_params = fsi_dai_hw_params,
1775 static struct snd_pcm_hardware fsi_pcm_hardware = {
1776 .info = SNDRV_PCM_INFO_INTERLEAVED |
1777 SNDRV_PCM_INFO_MMAP |
1778 SNDRV_PCM_INFO_MMAP_VALID |
1779 SNDRV_PCM_INFO_PAUSE,
1780 .formats = FSI_FMTS,
1786 .buffer_bytes_max = 64 * 1024,
1787 .period_bytes_min = 32,
1788 .period_bytes_max = 8192,
1794 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1796 struct snd_pcm_runtime *runtime = substream->runtime;
1799 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1801 ret = snd_pcm_hw_constraint_integer(runtime,
1802 SNDRV_PCM_HW_PARAM_PERIODS);
1807 static int fsi_hw_params(struct snd_pcm_substream *substream,
1808 struct snd_pcm_hw_params *hw_params)
1810 return snd_pcm_lib_malloc_pages(substream,
1811 params_buffer_bytes(hw_params));
1814 static int fsi_hw_free(struct snd_pcm_substream *substream)
1816 return snd_pcm_lib_free_pages(substream);
1819 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1821 struct fsi_priv *fsi = fsi_get_priv(substream);
1822 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1824 return fsi_sample2frame(fsi, io->buff_sample_pos);
1827 static struct snd_pcm_ops fsi_pcm_ops = {
1828 .open = fsi_pcm_open,
1829 .ioctl = snd_pcm_lib_ioctl,
1830 .hw_params = fsi_hw_params,
1831 .hw_free = fsi_hw_free,
1832 .pointer = fsi_pointer,
1839 #define PREALLOC_BUFFER (32 * 1024)
1840 #define PREALLOC_BUFFER_MAX (32 * 1024)
1842 static void fsi_pcm_free(struct snd_pcm *pcm)
1844 snd_pcm_lib_preallocate_free_for_all(pcm);
1847 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1849 struct snd_pcm *pcm = rtd->pcm;
1852 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1853 * in MMAP mode (i.e. aplay -M)
1855 return snd_pcm_lib_preallocate_pages_for_all(
1857 SNDRV_DMA_TYPE_CONTINUOUS,
1858 snd_dma_continuous_data(GFP_KERNEL),
1859 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1866 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1871 .formats = FSI_FMTS,
1877 .formats = FSI_FMTS,
1881 .ops = &fsi_dai_ops,
1887 .formats = FSI_FMTS,
1893 .formats = FSI_FMTS,
1897 .ops = &fsi_dai_ops,
1901 static struct snd_soc_platform_driver fsi_soc_platform = {
1902 .ops = &fsi_pcm_ops,
1903 .pcm_new = fsi_pcm_new,
1904 .pcm_free = fsi_pcm_free,
1907 static const struct snd_soc_component_driver fsi_soc_component = {
1914 static void fsi_of_parse(char *name,
1915 struct device_node *np,
1916 struct sh_fsi_port_info *info,
1921 unsigned long flags = 0;
1925 } of_parse_property[] = {
1926 { "spdif-connection", SH_FSI_FMT_SPDIF },
1927 { "stream-mode-support", SH_FSI_ENABLE_STREAM_MODE },
1928 { "use-internal-clock", SH_FSI_CLK_CPG },
1931 for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
1932 sprintf(prop, "%s,%s", name, of_parse_property[i].name);
1933 if (of_get_property(np, prop, NULL))
1934 flags |= of_parse_property[i].val;
1936 info->flags = flags;
1938 dev_dbg(dev, "%s flags : %lx\n", name, info->flags);
1941 static void fsi_port_info_init(struct fsi_priv *fsi,
1942 struct sh_fsi_port_info *info)
1944 if (info->flags & SH_FSI_FMT_SPDIF)
1947 if (info->flags & SH_FSI_CLK_CPG)
1950 if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
1951 fsi->enable_stream = 1;
1954 static void fsi_handler_init(struct fsi_priv *fsi,
1955 struct sh_fsi_port_info *info)
1957 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1958 fsi->playback.priv = fsi;
1959 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
1960 fsi->capture.priv = fsi;
1963 fsi->playback.slave.shdma_slave.slave_id = info->tx_id;
1964 fsi->playback.handler = &fsi_dma_push_handler;
1968 static struct of_device_id fsi_of_match[];
1969 static int fsi_probe(struct platform_device *pdev)
1971 struct fsi_master *master;
1972 struct device_node *np = pdev->dev.of_node;
1973 struct sh_fsi_platform_info info;
1974 const struct fsi_core *core;
1975 struct fsi_priv *fsi;
1976 struct resource *res;
1980 memset(&info, 0, sizeof(info));
1984 const struct of_device_id *of_id;
1986 of_id = of_match_device(fsi_of_match, &pdev->dev);
1989 fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
1990 fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
1993 const struct platform_device_id *id_entry = pdev->id_entry;
1995 core = (struct fsi_core *)id_entry->driver_data;
1997 if (pdev->dev.platform_data)
1998 memcpy(&info, pdev->dev.platform_data, sizeof(info));
2002 dev_err(&pdev->dev, "unknown fsi device\n");
2006 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2007 irq = platform_get_irq(pdev, 0);
2008 if (!res || (int)irq <= 0) {
2009 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
2013 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
2015 dev_err(&pdev->dev, "Could not allocate master\n");
2019 master->base = devm_ioremap_nocache(&pdev->dev,
2020 res->start, resource_size(res));
2021 if (!master->base) {
2022 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2026 /* master setting */
2027 master->core = core;
2028 spin_lock_init(&master->lock);
2031 fsi = &master->fsia;
2032 fsi->base = master->base;
2033 fsi->master = master;
2034 fsi_port_info_init(fsi, &info.port_a);
2035 fsi_handler_init(fsi, &info.port_a);
2036 ret = fsi_stream_probe(fsi, &pdev->dev);
2038 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2043 fsi = &master->fsib;
2044 fsi->base = master->base + 0x40;
2045 fsi->master = master;
2046 fsi_port_info_init(fsi, &info.port_b);
2047 fsi_handler_init(fsi, &info.port_b);
2048 ret = fsi_stream_probe(fsi, &pdev->dev);
2050 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2054 pm_runtime_enable(&pdev->dev);
2055 dev_set_drvdata(&pdev->dev, master);
2057 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2058 dev_name(&pdev->dev), master);
2060 dev_err(&pdev->dev, "irq request err\n");
2064 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2066 dev_err(&pdev->dev, "cannot snd soc register\n");
2070 ret = snd_soc_register_component(&pdev->dev, &fsi_soc_component,
2071 fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
2073 dev_err(&pdev->dev, "cannot snd component register\n");
2080 snd_soc_unregister_platform(&pdev->dev);
2082 pm_runtime_disable(&pdev->dev);
2083 fsi_stream_remove(&master->fsib);
2085 fsi_stream_remove(&master->fsia);
2090 static int fsi_remove(struct platform_device *pdev)
2092 struct fsi_master *master;
2094 master = dev_get_drvdata(&pdev->dev);
2096 pm_runtime_disable(&pdev->dev);
2098 snd_soc_unregister_component(&pdev->dev);
2099 snd_soc_unregister_platform(&pdev->dev);
2101 fsi_stream_remove(&master->fsia);
2102 fsi_stream_remove(&master->fsib);
2107 static void __fsi_suspend(struct fsi_priv *fsi,
2108 struct fsi_stream *io,
2111 if (!fsi_stream_is_working(fsi, io))
2114 fsi_stream_stop(fsi, io);
2115 fsi_hw_shutdown(fsi, dev);
2118 static void __fsi_resume(struct fsi_priv *fsi,
2119 struct fsi_stream *io,
2122 if (!fsi_stream_is_working(fsi, io))
2125 fsi_hw_startup(fsi, io, dev);
2126 fsi_stream_start(fsi, io);
2129 static int fsi_suspend(struct device *dev)
2131 struct fsi_master *master = dev_get_drvdata(dev);
2132 struct fsi_priv *fsia = &master->fsia;
2133 struct fsi_priv *fsib = &master->fsib;
2135 __fsi_suspend(fsia, &fsia->playback, dev);
2136 __fsi_suspend(fsia, &fsia->capture, dev);
2138 __fsi_suspend(fsib, &fsib->playback, dev);
2139 __fsi_suspend(fsib, &fsib->capture, dev);
2144 static int fsi_resume(struct device *dev)
2146 struct fsi_master *master = dev_get_drvdata(dev);
2147 struct fsi_priv *fsia = &master->fsia;
2148 struct fsi_priv *fsib = &master->fsib;
2150 __fsi_resume(fsia, &fsia->playback, dev);
2151 __fsi_resume(fsia, &fsia->capture, dev);
2153 __fsi_resume(fsib, &fsib->playback, dev);
2154 __fsi_resume(fsib, &fsib->capture, dev);
2159 static struct dev_pm_ops fsi_pm_ops = {
2160 .suspend = fsi_suspend,
2161 .resume = fsi_resume,
2164 static struct fsi_core fsi1_core = {
2173 static struct fsi_core fsi2_core = {
2177 .int_st = CPU_INT_ST,
2180 .a_mclk = A_MST_CTLR,
2181 .b_mclk = B_MST_CTLR,
2184 static struct of_device_id fsi_of_match[] = {
2185 { .compatible = "renesas,sh_fsi", .data = &fsi1_core},
2186 { .compatible = "renesas,sh_fsi2", .data = &fsi2_core},
2189 MODULE_DEVICE_TABLE(of, fsi_of_match);
2191 static struct platform_device_id fsi_id_table[] = {
2192 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2193 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2196 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2198 static struct platform_driver fsi_driver = {
2200 .name = "fsi-pcm-audio",
2202 .of_match_table = fsi_of_match,
2205 .remove = fsi_remove,
2206 .id_table = fsi_id_table,
2209 module_platform_driver(fsi_driver);
2211 MODULE_LICENSE("GPL");
2212 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2213 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2214 MODULE_ALIAS("platform:fsi-pcm-audio");