4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
27 #include <linux/irqchip/arm-gic-v3.h>
29 #include <asm/kvm_emulate.h>
30 #include <asm/kvm_arm.h>
31 #include <asm/kvm_mmu.h>
34 #include "vgic-mmio.h"
36 static int vgic_its_save_tables_v0(struct vgic_its *its);
37 static int vgic_its_restore_tables_v0(struct vgic_its *its);
38 static int vgic_its_commit_v0(struct vgic_its *its);
39 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
40 struct kvm_vcpu *filter_vcpu);
43 * Creates a new (reference to a) struct vgic_irq for a given LPI.
44 * If this LPI is already mapped on another ITS, we increase its refcount
45 * and return a pointer to the existing structure.
46 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
47 * This function returns a pointer to the _unlocked_ structure.
49 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
50 struct kvm_vcpu *vcpu)
52 struct vgic_dist *dist = &kvm->arch.vgic;
53 struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;
56 /* In this case there is no put, since we keep the reference. */
60 irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
62 return ERR_PTR(-ENOMEM);
64 INIT_LIST_HEAD(&irq->lpi_list);
65 INIT_LIST_HEAD(&irq->ap_list);
66 spin_lock_init(&irq->irq_lock);
68 irq->config = VGIC_CONFIG_EDGE;
69 kref_init(&irq->refcount);
71 irq->target_vcpu = vcpu;
73 spin_lock(&dist->lpi_list_lock);
76 * There could be a race with another vgic_add_lpi(), so we need to
77 * check that we don't add a second list entry with the same LPI.
79 list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) {
80 if (oldirq->intid != intid)
83 /* Someone was faster with adding this LPI, lets use that. */
88 * This increases the refcount, the caller is expected to
89 * call vgic_put_irq() on the returned pointer once it's
90 * finished with the IRQ.
92 vgic_get_irq_kref(irq);
97 list_add_tail(&irq->lpi_list, &dist->lpi_list_head);
98 dist->lpi_list_count++;
101 spin_unlock(&dist->lpi_list_lock);
104 * We "cache" the configuration table entries in our struct vgic_irq's.
105 * However we only have those structs for mapped IRQs, so we read in
106 * the respective config data from memory here upon mapping the LPI.
108 ret = update_lpi_config(kvm, irq, NULL);
112 ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
120 struct list_head dev_list;
122 /* the head for the list of ITTEs */
123 struct list_head itt_head;
124 u32 num_eventid_bits;
129 #define COLLECTION_NOT_MAPPED ((u32)~0)
131 struct its_collection {
132 struct list_head coll_list;
138 #define its_is_collection_mapped(coll) ((coll) && \
139 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
142 struct list_head ite_list;
144 struct vgic_irq *irq;
145 struct its_collection *collection;
151 * struct vgic_its_abi - ITS abi ops and settings
152 * @cte_esz: collection table entry size
153 * @dte_esz: device table entry size
154 * @ite_esz: interrupt translation table entry size
155 * @save tables: save the ITS tables into guest RAM
156 * @restore_tables: restore the ITS internal structs from tables
157 * stored in guest RAM
158 * @commit: initialize the registers which expose the ABI settings,
159 * especially the entry sizes
161 struct vgic_its_abi {
165 int (*save_tables)(struct vgic_its *its);
166 int (*restore_tables)(struct vgic_its *its);
167 int (*commit)(struct vgic_its *its);
170 static const struct vgic_its_abi its_table_abi_versions[] = {
171 [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8,
172 .save_tables = vgic_its_save_tables_v0,
173 .restore_tables = vgic_its_restore_tables_v0,
174 .commit = vgic_its_commit_v0,
178 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
180 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
182 return &its_table_abi_versions[its->abi_rev];
185 int vgic_its_set_abi(struct vgic_its *its, int rev)
187 const struct vgic_its_abi *abi;
190 abi = vgic_its_get_abi(its);
191 return abi->commit(its);
195 * Find and returns a device in the device table for an ITS.
196 * Must be called with the its_lock mutex held.
198 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
200 struct its_device *device;
202 list_for_each_entry(device, &its->device_list, dev_list)
203 if (device_id == device->device_id)
210 * Find and returns an interrupt translation table entry (ITTE) for a given
211 * Device ID/Event ID pair on an ITS.
212 * Must be called with the its_lock mutex held.
214 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
217 struct its_device *device;
220 device = find_its_device(its, device_id);
224 list_for_each_entry(ite, &device->itt_head, ite_list)
225 if (ite->event_id == event_id)
231 /* To be used as an iterator this macro misses the enclosing parentheses */
232 #define for_each_lpi_its(dev, ite, its) \
233 list_for_each_entry(dev, &(its)->device_list, dev_list) \
234 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
237 * We only implement 48 bits of PA at the moment, although the ITS
238 * supports more. Let's be restrictive here.
240 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
241 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
243 #define GIC_LPI_OFFSET 8192
245 #define VITS_TYPER_IDBITS 16
246 #define VITS_TYPER_DEVBITS 16
249 * Finds and returns a collection in the ITS collection table.
250 * Must be called with the its_lock mutex held.
252 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
254 struct its_collection *collection;
256 list_for_each_entry(collection, &its->collection_list, coll_list) {
257 if (coll_id == collection->collection_id)
264 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
265 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
268 * Reads the configuration data for a given LPI from guest memory and
269 * updates the fields in struct vgic_irq.
270 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
271 * VCPU. Unconditionally applies if filter_vcpu is NULL.
273 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
274 struct kvm_vcpu *filter_vcpu)
276 u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
280 ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
286 spin_lock(&irq->irq_lock);
288 if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
289 irq->priority = LPI_PROP_PRIORITY(prop);
290 irq->enabled = LPI_PROP_ENABLE_BIT(prop);
292 vgic_queue_irq_unlock(kvm, irq);
294 spin_unlock(&irq->irq_lock);
301 * Create a snapshot of the current LPI list, so that we can enumerate all
302 * LPIs without holding any lock.
303 * Returns the array length and puts the kmalloc'ed array into intid_ptr.
305 static int vgic_copy_lpi_list(struct kvm *kvm, u32 **intid_ptr)
307 struct vgic_dist *dist = &kvm->arch.vgic;
308 struct vgic_irq *irq;
310 int irq_count = dist->lpi_list_count, i = 0;
313 * We use the current value of the list length, which may change
314 * after the kmalloc. We don't care, because the guest shouldn't
315 * change anything while the command handling is still running,
316 * and in the worst case we would miss a new IRQ, which one wouldn't
317 * expect to be covered by this command anyway.
319 intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL);
323 spin_lock(&dist->lpi_list_lock);
324 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
325 /* We don't need to "get" the IRQ, as we hold the list lock. */
326 intids[i] = irq->intid;
327 if (++i == irq_count)
330 spin_unlock(&dist->lpi_list_lock);
337 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
338 * is targeting) to the VGIC's view, which deals with target VCPUs.
339 * Needs to be called whenever either the collection for a LPIs has
340 * changed or the collection itself got retargeted.
342 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
344 struct kvm_vcpu *vcpu;
346 if (!its_is_collection_mapped(ite->collection))
349 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
351 spin_lock(&ite->irq->irq_lock);
352 ite->irq->target_vcpu = vcpu;
353 spin_unlock(&ite->irq->irq_lock);
357 * Updates the target VCPU for every LPI targeting this collection.
358 * Must be called with the its_lock mutex held.
360 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
361 struct its_collection *coll)
363 struct its_device *device;
366 for_each_lpi_its(device, ite, its) {
367 if (!ite->collection || coll != ite->collection)
370 update_affinity_ite(kvm, ite);
374 static u32 max_lpis_propbaser(u64 propbaser)
376 int nr_idbits = (propbaser & 0x1f) + 1;
378 return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
382 * Scan the whole LPI pending table and sync the pending bit in there
383 * with our own data structures. This relies on the LPI being
386 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
388 gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
389 struct vgic_irq *irq;
390 int last_byte_offset = -1;
395 nr_irqs = vgic_copy_lpi_list(vcpu->kvm, &intids);
399 for (i = 0; i < nr_irqs; i++) {
400 int byte_offset, bit_nr;
403 byte_offset = intids[i] / BITS_PER_BYTE;
404 bit_nr = intids[i] % BITS_PER_BYTE;
407 * For contiguously allocated LPIs chances are we just read
408 * this very same byte in the last iteration. Reuse that.
410 if (byte_offset != last_byte_offset) {
411 ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset,
417 last_byte_offset = byte_offset;
420 irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
421 spin_lock(&irq->irq_lock);
422 irq->pending_latch = pendmask & (1U << bit_nr);
423 vgic_queue_irq_unlock(vcpu->kvm, irq);
424 vgic_put_irq(vcpu->kvm, irq);
432 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
433 struct vgic_its *its,
434 gpa_t addr, unsigned int len)
436 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
437 u64 reg = GITS_TYPER_PLPIS;
440 * We use linear CPU numbers for redistributor addressing,
441 * so GITS_TYPER.PTA is 0.
442 * Also we force all PROPBASER registers to be the same, so
443 * CommonLPIAff is 0 as well.
444 * To avoid memory waste in the guest, we keep the number of IDBits and
445 * DevBits low - as least for the time being.
447 reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
448 reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
449 reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
451 return extract_bytes(reg, addr & 7, len);
454 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
455 struct vgic_its *its,
456 gpa_t addr, unsigned int len)
460 val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
461 val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
465 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
466 struct vgic_its *its,
467 gpa_t addr, unsigned int len,
470 u32 rev = GITS_IIDR_REV(val);
472 if (rev >= NR_ITS_ABIS)
474 return vgic_its_set_abi(its, rev);
477 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
478 struct vgic_its *its,
479 gpa_t addr, unsigned int len)
481 switch (addr & 0xffff) {
483 return 0x92; /* part number, bits[7:0] */
485 return 0xb4; /* part number, bits[11:8] */
487 return GIC_PIDR2_ARCH_GICv3 | 0x0b;
489 return 0x40; /* This is a 64K software visible page */
490 /* The following are the ID registers for (any) GIC. */
505 * Find the target VCPU and the LPI number for a given devid/eventid pair
506 * and make this IRQ pending, possibly injecting it.
507 * Must be called with the its_lock mutex held.
508 * Returns 0 on success, a positive error value for any ITS mapping
509 * related errors and negative error values for generic errors.
511 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
512 u32 devid, u32 eventid)
514 struct kvm_vcpu *vcpu;
520 ite = find_ite(its, devid, eventid);
521 if (!ite || !its_is_collection_mapped(ite->collection))
522 return E_ITS_INT_UNMAPPED_INTERRUPT;
524 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
526 return E_ITS_INT_UNMAPPED_INTERRUPT;
528 if (!vcpu->arch.vgic_cpu.lpis_enabled)
531 spin_lock(&ite->irq->irq_lock);
532 ite->irq->pending_latch = true;
533 vgic_queue_irq_unlock(kvm, ite->irq);
538 static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
540 struct vgic_io_device *iodev;
542 if (dev->ops != &kvm_io_gic_ops)
545 iodev = container_of(dev, struct vgic_io_device, dev);
547 if (iodev->iodev_type != IODEV_ITS)
554 * Queries the KVM IO bus framework to get the ITS pointer from the given
556 * We then call vgic_its_trigger_msi() with the decoded data.
557 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
559 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
562 struct kvm_io_device *kvm_io_dev;
563 struct vgic_io_device *iodev;
566 if (!vgic_has_its(kvm))
569 if (!(msi->flags & KVM_MSI_VALID_DEVID))
572 address = (u64)msi->address_hi << 32 | msi->address_lo;
574 kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
578 iodev = vgic_get_its_iodev(kvm_io_dev);
582 mutex_lock(&iodev->its->its_lock);
583 ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
584 mutex_unlock(&iodev->its->its_lock);
590 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
591 * if the guest has blocked the MSI. So we map any LPI mapping
592 * related error to that.
600 /* Requires the its_lock to be held. */
601 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
603 list_del(&ite->ite_list);
605 /* This put matches the get in vgic_add_lpi. */
607 vgic_put_irq(kvm, ite->irq);
612 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
614 return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
617 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
618 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
619 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
620 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
621 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
622 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
623 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
624 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
625 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
628 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
629 * Must be called with the its_lock mutex held.
631 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
634 u32 device_id = its_cmd_get_deviceid(its_cmd);
635 u32 event_id = its_cmd_get_id(its_cmd);
639 ite = find_ite(its, device_id, event_id);
640 if (ite && ite->collection) {
642 * Though the spec talks about removing the pending state, we
643 * don't bother here since we clear the ITTE anyway and the
644 * pending state is a property of the ITTE struct.
646 its_free_ite(kvm, ite);
650 return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
654 * The MOVI command moves an ITTE to a different collection.
655 * Must be called with the its_lock mutex held.
657 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
660 u32 device_id = its_cmd_get_deviceid(its_cmd);
661 u32 event_id = its_cmd_get_id(its_cmd);
662 u32 coll_id = its_cmd_get_collection(its_cmd);
663 struct kvm_vcpu *vcpu;
665 struct its_collection *collection;
667 ite = find_ite(its, device_id, event_id);
669 return E_ITS_MOVI_UNMAPPED_INTERRUPT;
671 if (!its_is_collection_mapped(ite->collection))
672 return E_ITS_MOVI_UNMAPPED_COLLECTION;
674 collection = find_collection(its, coll_id);
675 if (!its_is_collection_mapped(collection))
676 return E_ITS_MOVI_UNMAPPED_COLLECTION;
678 ite->collection = collection;
679 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
681 spin_lock(&ite->irq->irq_lock);
682 ite->irq->target_vcpu = vcpu;
683 spin_unlock(&ite->irq->irq_lock);
689 * Check whether an ID can be stored into the corresponding guest table.
690 * For a direct table this is pretty easy, but gets a bit nasty for
691 * indirect tables. We check whether the resulting guest physical address
692 * is actually valid (covered by a memslot and guest accessible).
693 * For this we have to read the respective first level entry.
695 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id)
697 int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
698 u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
699 int esz = GITS_BASER_ENTRY_SIZE(baser);
704 case GITS_BASER_TYPE_DEVICE:
705 if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
708 case GITS_BASER_TYPE_COLLECTION:
709 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
710 if (id >= BIT_ULL(16))
717 if (!(baser & GITS_BASER_INDIRECT)) {
720 if (id >= (l1_tbl_size / esz))
723 addr = BASER_ADDRESS(baser) + id * esz;
724 gfn = addr >> PAGE_SHIFT;
726 return kvm_is_visible_gfn(its->dev->kvm, gfn);
729 /* calculate and check the index into the 1st level */
730 index = id / (SZ_64K / esz);
731 if (index >= (l1_tbl_size / sizeof(u64)))
734 /* Each 1st level entry is represented by a 64-bit value. */
735 if (kvm_read_guest(its->dev->kvm,
736 BASER_ADDRESS(baser) + index * sizeof(indirect_ptr),
737 &indirect_ptr, sizeof(indirect_ptr)))
740 indirect_ptr = le64_to_cpu(indirect_ptr);
742 /* check the valid bit of the first level entry */
743 if (!(indirect_ptr & BIT_ULL(63)))
747 * Mask the guest physical address and calculate the frame number.
748 * Any address beyond our supported 48 bits of PA will be caught
749 * by the actual check in the final step.
751 indirect_ptr &= GENMASK_ULL(51, 16);
753 /* Find the address of the actual entry */
754 index = id % (SZ_64K / esz);
755 indirect_ptr += index * esz;
756 gfn = indirect_ptr >> PAGE_SHIFT;
758 return kvm_is_visible_gfn(its->dev->kvm, gfn);
761 static int vgic_its_alloc_collection(struct vgic_its *its,
762 struct its_collection **colp,
765 struct its_collection *collection;
767 if (!vgic_its_check_id(its, its->baser_coll_table, coll_id))
768 return E_ITS_MAPC_COLLECTION_OOR;
770 collection = kzalloc(sizeof(*collection), GFP_KERNEL);
772 collection->collection_id = coll_id;
773 collection->target_addr = COLLECTION_NOT_MAPPED;
775 list_add_tail(&collection->coll_list, &its->collection_list);
781 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
783 struct its_collection *collection;
784 struct its_device *device;
788 * Clearing the mapping for that collection ID removes the
789 * entry from the list. If there wasn't any before, we can
792 collection = find_collection(its, coll_id);
796 for_each_lpi_its(device, ite, its)
797 if (ite->collection &&
798 ite->collection->collection_id == coll_id)
799 ite->collection = NULL;
801 list_del(&collection->coll_list);
805 /* Must be called with its_lock mutex held */
806 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
807 struct its_collection *collection,
808 u32 lpi_id, u32 event_id)
812 ite = kzalloc(sizeof(*ite), GFP_KERNEL);
814 return ERR_PTR(-ENOMEM);
816 ite->event_id = event_id;
817 ite->collection = collection;
820 list_add_tail(&ite->ite_list, &device->itt_head);
825 * The MAPTI and MAPI commands map LPIs to ITTEs.
826 * Must be called with its_lock mutex held.
828 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
831 u32 device_id = its_cmd_get_deviceid(its_cmd);
832 u32 event_id = its_cmd_get_id(its_cmd);
833 u32 coll_id = its_cmd_get_collection(its_cmd);
835 struct kvm_vcpu *vcpu = NULL;
836 struct its_device *device;
837 struct its_collection *collection, *new_coll = NULL;
838 struct vgic_irq *irq;
841 device = find_its_device(its, device_id);
843 return E_ITS_MAPTI_UNMAPPED_DEVICE;
845 if (event_id >= BIT_ULL(device->num_eventid_bits))
846 return E_ITS_MAPTI_ID_OOR;
848 if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
849 lpi_nr = its_cmd_get_physical_id(its_cmd);
852 if (lpi_nr < GIC_LPI_OFFSET ||
853 lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
854 return E_ITS_MAPTI_PHYSICALID_OOR;
856 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
857 if (find_ite(its, device_id, event_id))
860 collection = find_collection(its, coll_id);
862 int ret = vgic_its_alloc_collection(its, &collection, coll_id);
865 new_coll = collection;
868 ite = vgic_its_alloc_ite(device, collection, lpi_nr, event_id);
871 vgic_its_free_collection(its, coll_id);
875 if (its_is_collection_mapped(collection))
876 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
878 irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
881 vgic_its_free_collection(its, coll_id);
882 its_free_ite(kvm, ite);
890 /* Requires the its_lock to be held. */
891 static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device)
893 struct its_ite *ite, *temp;
896 * The spec says that unmapping a device with still valid
897 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
898 * since we cannot leave the memory unreferenced.
900 list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
901 its_free_ite(kvm, ite);
903 list_del(&device->dev_list);
907 /* Must be called with its_lock mutex held */
908 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
909 u32 device_id, gpa_t itt_addr,
912 struct its_device *device;
914 device = kzalloc(sizeof(*device), GFP_KERNEL);
916 return ERR_PTR(-ENOMEM);
918 device->device_id = device_id;
919 device->itt_addr = itt_addr;
920 device->num_eventid_bits = num_eventid_bits;
921 INIT_LIST_HEAD(&device->itt_head);
923 list_add_tail(&device->dev_list, &its->device_list);
928 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
929 * Must be called with the its_lock mutex held.
931 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
934 u32 device_id = its_cmd_get_deviceid(its_cmd);
935 bool valid = its_cmd_get_validbit(its_cmd);
936 u8 num_eventid_bits = its_cmd_get_size(its_cmd);
937 gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
938 struct its_device *device;
940 if (!vgic_its_check_id(its, its->baser_device_table, device_id))
941 return E_ITS_MAPD_DEVICE_OOR;
943 if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
944 return E_ITS_MAPD_ITTSIZE_OOR;
946 device = find_its_device(its, device_id);
949 * The spec says that calling MAPD on an already mapped device
950 * invalidates all cached data for this device. We implement this
951 * by removing the mapping and re-establishing it.
954 vgic_its_unmap_device(kvm, device);
957 * The spec does not say whether unmapping a not-mapped device
958 * is an error, so we are done in any case.
963 device = vgic_its_alloc_device(its, device_id, itt_addr,
966 return PTR_ERR(device);
972 * The MAPC command maps collection IDs to redistributors.
973 * Must be called with the its_lock mutex held.
975 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
980 struct its_collection *collection;
983 valid = its_cmd_get_validbit(its_cmd);
984 coll_id = its_cmd_get_collection(its_cmd);
985 target_addr = its_cmd_get_target_addr(its_cmd);
987 if (target_addr >= atomic_read(&kvm->online_vcpus))
988 return E_ITS_MAPC_PROCNUM_OOR;
991 vgic_its_free_collection(its, coll_id);
993 collection = find_collection(its, coll_id);
998 ret = vgic_its_alloc_collection(its, &collection,
1002 collection->target_addr = target_addr;
1004 collection->target_addr = target_addr;
1005 update_affinity_collection(kvm, its, collection);
1013 * The CLEAR command removes the pending state for a particular LPI.
1014 * Must be called with the its_lock mutex held.
1016 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1019 u32 device_id = its_cmd_get_deviceid(its_cmd);
1020 u32 event_id = its_cmd_get_id(its_cmd);
1021 struct its_ite *ite;
1024 ite = find_ite(its, device_id, event_id);
1026 return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1028 ite->irq->pending_latch = false;
1034 * The INV command syncs the configuration bits from the memory table.
1035 * Must be called with the its_lock mutex held.
1037 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1040 u32 device_id = its_cmd_get_deviceid(its_cmd);
1041 u32 event_id = its_cmd_get_id(its_cmd);
1042 struct its_ite *ite;
1045 ite = find_ite(its, device_id, event_id);
1047 return E_ITS_INV_UNMAPPED_INTERRUPT;
1049 return update_lpi_config(kvm, ite->irq, NULL);
1053 * The INVALL command requests flushing of all IRQ data in this collection.
1054 * Find the VCPU mapped to that collection, then iterate over the VM's list
1055 * of mapped LPIs and update the configuration for each IRQ which targets
1056 * the specified vcpu. The configuration will be read from the in-memory
1057 * configuration table.
1058 * Must be called with the its_lock mutex held.
1060 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1063 u32 coll_id = its_cmd_get_collection(its_cmd);
1064 struct its_collection *collection;
1065 struct kvm_vcpu *vcpu;
1066 struct vgic_irq *irq;
1070 collection = find_collection(its, coll_id);
1071 if (!its_is_collection_mapped(collection))
1072 return E_ITS_INVALL_UNMAPPED_COLLECTION;
1074 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1076 irq_count = vgic_copy_lpi_list(kvm, &intids);
1080 for (i = 0; i < irq_count; i++) {
1081 irq = vgic_get_irq(kvm, NULL, intids[i]);
1084 update_lpi_config(kvm, irq, vcpu);
1085 vgic_put_irq(kvm, irq);
1094 * The MOVALL command moves the pending state of all IRQs targeting one
1095 * redistributor to another. We don't hold the pending state in the VCPUs,
1096 * but in the IRQs instead, so there is really not much to do for us here.
1097 * However the spec says that no IRQ must target the old redistributor
1098 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1099 * This command affects all LPIs in the system that target that redistributor.
1101 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1104 struct vgic_dist *dist = &kvm->arch.vgic;
1105 u32 target1_addr = its_cmd_get_target_addr(its_cmd);
1106 u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32);
1107 struct kvm_vcpu *vcpu1, *vcpu2;
1108 struct vgic_irq *irq;
1110 if (target1_addr >= atomic_read(&kvm->online_vcpus) ||
1111 target2_addr >= atomic_read(&kvm->online_vcpus))
1112 return E_ITS_MOVALL_PROCNUM_OOR;
1114 if (target1_addr == target2_addr)
1117 vcpu1 = kvm_get_vcpu(kvm, target1_addr);
1118 vcpu2 = kvm_get_vcpu(kvm, target2_addr);
1120 spin_lock(&dist->lpi_list_lock);
1122 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
1123 spin_lock(&irq->irq_lock);
1125 if (irq->target_vcpu == vcpu1)
1126 irq->target_vcpu = vcpu2;
1128 spin_unlock(&irq->irq_lock);
1131 spin_unlock(&dist->lpi_list_lock);
1137 * The INT command injects the LPI associated with that DevID/EvID pair.
1138 * Must be called with the its_lock mutex held.
1140 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1143 u32 msi_data = its_cmd_get_id(its_cmd);
1144 u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1146 return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1150 * This function is called with the its_cmd lock held, but the ITS data
1151 * structure lock dropped.
1153 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1158 mutex_lock(&its->its_lock);
1159 switch (its_cmd_get_command(its_cmd)) {
1161 ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1164 ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1167 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1169 case GITS_CMD_MAPTI:
1170 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1173 ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1175 case GITS_CMD_DISCARD:
1176 ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1178 case GITS_CMD_CLEAR:
1179 ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1181 case GITS_CMD_MOVALL:
1182 ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1185 ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1188 ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1190 case GITS_CMD_INVALL:
1191 ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1194 /* we ignore this command: we are in sync all of the time */
1198 mutex_unlock(&its->its_lock);
1203 static u64 vgic_sanitise_its_baser(u64 reg)
1205 reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1206 GITS_BASER_SHAREABILITY_SHIFT,
1207 vgic_sanitise_shareability);
1208 reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1209 GITS_BASER_INNER_CACHEABILITY_SHIFT,
1210 vgic_sanitise_inner_cacheability);
1211 reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1212 GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1213 vgic_sanitise_outer_cacheability);
1215 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1216 reg &= ~GENMASK_ULL(15, 12);
1218 /* We support only one (ITS) page size: 64K */
1219 reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1224 static u64 vgic_sanitise_its_cbaser(u64 reg)
1226 reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1227 GITS_CBASER_SHAREABILITY_SHIFT,
1228 vgic_sanitise_shareability);
1229 reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1230 GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1231 vgic_sanitise_inner_cacheability);
1232 reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1233 GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1234 vgic_sanitise_outer_cacheability);
1237 * Sanitise the physical address to be 64k aligned.
1238 * Also limit the physical addresses to 48 bits.
1240 reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1245 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1246 struct vgic_its *its,
1247 gpa_t addr, unsigned int len)
1249 return extract_bytes(its->cbaser, addr & 7, len);
1252 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1253 gpa_t addr, unsigned int len,
1256 /* When GITS_CTLR.Enable is 1, this register is RO. */
1260 mutex_lock(&its->cmd_lock);
1261 its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1262 its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1265 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1266 * it to CREADR to make sure we start with an empty command buffer.
1268 its->cwriter = its->creadr;
1269 mutex_unlock(&its->cmd_lock);
1272 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1273 #define ITS_CMD_SIZE 32
1274 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1276 /* Must be called with the cmd_lock held. */
1277 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1282 /* Commands are only processed when the ITS is enabled. */
1286 cbaser = CBASER_ADDRESS(its->cbaser);
1288 while (its->cwriter != its->creadr) {
1289 int ret = kvm_read_guest(kvm, cbaser + its->creadr,
1290 cmd_buf, ITS_CMD_SIZE);
1292 * If kvm_read_guest() fails, this could be due to the guest
1293 * programming a bogus value in CBASER or something else going
1294 * wrong from which we cannot easily recover.
1295 * According to section 6.3.2 in the GICv3 spec we can just
1296 * ignore that command then.
1299 vgic_its_handle_command(kvm, its, cmd_buf);
1301 its->creadr += ITS_CMD_SIZE;
1302 if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1308 * By writing to CWRITER the guest announces new commands to be processed.
1309 * To avoid any races in the first place, we take the its_cmd lock, which
1310 * protects our ring buffer variables, so that there is only one user
1311 * per ITS handling commands at a given time.
1313 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1314 gpa_t addr, unsigned int len,
1322 mutex_lock(&its->cmd_lock);
1324 reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1325 reg = ITS_CMD_OFFSET(reg);
1326 if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1327 mutex_unlock(&its->cmd_lock);
1332 vgic_its_process_commands(kvm, its);
1334 mutex_unlock(&its->cmd_lock);
1337 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1338 struct vgic_its *its,
1339 gpa_t addr, unsigned int len)
1341 return extract_bytes(its->cwriter, addr & 0x7, len);
1344 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1345 struct vgic_its *its,
1346 gpa_t addr, unsigned int len)
1348 return extract_bytes(its->creadr, addr & 0x7, len);
1351 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1352 struct vgic_its *its,
1353 gpa_t addr, unsigned int len,
1359 mutex_lock(&its->cmd_lock);
1366 cmd_offset = ITS_CMD_OFFSET(val);
1367 if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1372 its->creadr = cmd_offset;
1374 mutex_unlock(&its->cmd_lock);
1378 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1379 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1380 struct vgic_its *its,
1381 gpa_t addr, unsigned int len)
1385 switch (BASER_INDEX(addr)) {
1387 reg = its->baser_device_table;
1390 reg = its->baser_coll_table;
1397 return extract_bytes(reg, addr & 7, len);
1400 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1401 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1402 struct vgic_its *its,
1403 gpa_t addr, unsigned int len,
1406 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1407 u64 entry_size, device_type;
1408 u64 reg, *regptr, clearbits = 0;
1410 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1414 switch (BASER_INDEX(addr)) {
1416 regptr = &its->baser_device_table;
1417 entry_size = abi->dte_esz;
1418 device_type = GITS_BASER_TYPE_DEVICE;
1421 regptr = &its->baser_coll_table;
1422 entry_size = abi->cte_esz;
1423 device_type = GITS_BASER_TYPE_COLLECTION;
1424 clearbits = GITS_BASER_INDIRECT;
1430 reg = update_64bit_reg(*regptr, addr & 7, len, val);
1431 reg &= ~GITS_BASER_RO_MASK;
1434 reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1435 reg |= device_type << GITS_BASER_TYPE_SHIFT;
1436 reg = vgic_sanitise_its_baser(reg);
1441 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1442 struct vgic_its *its,
1443 gpa_t addr, unsigned int len)
1447 mutex_lock(&its->cmd_lock);
1448 if (its->creadr == its->cwriter)
1449 reg |= GITS_CTLR_QUIESCENT;
1451 reg |= GITS_CTLR_ENABLE;
1452 mutex_unlock(&its->cmd_lock);
1457 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1458 gpa_t addr, unsigned int len,
1461 mutex_lock(&its->cmd_lock);
1463 its->enabled = !!(val & GITS_CTLR_ENABLE);
1466 * Try to process any pending commands. This function bails out early
1467 * if the ITS is disabled or no commands have been queued.
1469 vgic_its_process_commands(kvm, its);
1471 mutex_unlock(&its->cmd_lock);
1474 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1476 .reg_offset = off, \
1478 .access_flags = acc, \
1483 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1485 .reg_offset = off, \
1487 .access_flags = acc, \
1490 .uaccess_its_write = uwr, \
1493 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1494 gpa_t addr, unsigned int len, unsigned long val)
1499 static struct vgic_register_region its_registers[] = {
1500 REGISTER_ITS_DESC(GITS_CTLR,
1501 vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1503 REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1504 vgic_mmio_read_its_iidr, its_mmio_write_wi,
1505 vgic_mmio_uaccess_write_its_iidr, 4,
1507 REGISTER_ITS_DESC(GITS_TYPER,
1508 vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1509 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1510 REGISTER_ITS_DESC(GITS_CBASER,
1511 vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1512 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1513 REGISTER_ITS_DESC(GITS_CWRITER,
1514 vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1515 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1516 REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1517 vgic_mmio_read_its_creadr, its_mmio_write_wi,
1518 vgic_mmio_uaccess_write_its_creadr, 8,
1519 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1520 REGISTER_ITS_DESC(GITS_BASER,
1521 vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1522 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1523 REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1524 vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1528 /* This is called on setting the LPI enable bit in the redistributor. */
1529 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1531 if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1532 its_sync_lpi_pending_table(vcpu);
1535 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its)
1537 struct vgic_io_device *iodev = &its->iodev;
1540 if (!its->initialized)
1543 if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base))
1546 iodev->regions = its_registers;
1547 iodev->nr_regions = ARRAY_SIZE(its_registers);
1548 kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1550 iodev->base_addr = its->vgic_its_base;
1551 iodev->iodev_type = IODEV_ITS;
1553 mutex_lock(&kvm->slots_lock);
1554 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1555 KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1556 mutex_unlock(&kvm->slots_lock);
1561 #define INITIAL_BASER_VALUE \
1562 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1563 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1564 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1565 GITS_BASER_PAGE_SIZE_64K)
1567 #define INITIAL_PROPBASER_VALUE \
1568 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1569 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1570 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1572 static int vgic_its_create(struct kvm_device *dev, u32 type)
1574 struct vgic_its *its;
1576 if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1579 its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL);
1583 mutex_init(&its->its_lock);
1584 mutex_init(&its->cmd_lock);
1586 its->vgic_its_base = VGIC_ADDR_UNDEF;
1588 INIT_LIST_HEAD(&its->device_list);
1589 INIT_LIST_HEAD(&its->collection_list);
1591 dev->kvm->arch.vgic.has_its = true;
1592 its->initialized = false;
1593 its->enabled = false;
1596 its->baser_device_table = INITIAL_BASER_VALUE |
1597 ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1598 its->baser_coll_table = INITIAL_BASER_VALUE |
1599 ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1600 dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1604 return vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1607 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1609 struct kvm *kvm = kvm_dev->kvm;
1610 struct vgic_its *its = kvm_dev->private;
1611 struct its_device *dev;
1612 struct its_ite *ite;
1613 struct list_head *dev_cur, *dev_temp;
1614 struct list_head *cur, *temp;
1617 * We may end up here without the lists ever having been initialized.
1618 * Check this and bail out early to avoid dereferencing a NULL pointer.
1620 if (!its->device_list.next)
1623 mutex_lock(&its->its_lock);
1624 list_for_each_safe(dev_cur, dev_temp, &its->device_list) {
1625 dev = container_of(dev_cur, struct its_device, dev_list);
1626 list_for_each_safe(cur, temp, &dev->itt_head) {
1627 ite = (container_of(cur, struct its_ite, ite_list));
1628 its_free_ite(kvm, ite);
1634 list_for_each_safe(cur, temp, &its->collection_list) {
1636 kfree(container_of(cur, struct its_collection, coll_list));
1638 mutex_unlock(&its->its_lock);
1643 int vgic_its_has_attr_regs(struct kvm_device *dev,
1644 struct kvm_device_attr *attr)
1646 const struct vgic_register_region *region;
1647 gpa_t offset = attr->attr;
1650 align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1655 region = vgic_find_mmio_region(its_registers,
1656 ARRAY_SIZE(its_registers),
1664 int vgic_its_attr_regs_access(struct kvm_device *dev,
1665 struct kvm_device_attr *attr,
1666 u64 *reg, bool is_write)
1668 const struct vgic_register_region *region;
1669 struct vgic_its *its;
1675 offset = attr->attr;
1678 * Although the spec supports upper/lower 32-bit accesses to
1679 * 64-bit ITS registers, the userspace ABI requires 64-bit
1680 * accesses to all 64-bit wide registers. We therefore only
1681 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1684 if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1692 mutex_lock(&dev->kvm->lock);
1694 if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1699 region = vgic_find_mmio_region(its_registers,
1700 ARRAY_SIZE(its_registers),
1707 if (!lock_all_vcpus(dev->kvm)) {
1712 addr = its->vgic_its_base + offset;
1714 len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
1717 if (region->uaccess_its_write)
1718 ret = region->uaccess_its_write(dev->kvm, its, addr,
1721 region->its_write(dev->kvm, its, addr, len, *reg);
1723 *reg = region->its_read(dev->kvm, its, addr, len);
1725 unlock_all_vcpus(dev->kvm);
1727 mutex_unlock(&dev->kvm->lock);
1732 * vgic_its_save_device_tables - Save the device table and all ITT
1735 static int vgic_its_save_device_tables(struct vgic_its *its)
1741 * vgic_its_restore_device_tables - Restore the device table and all ITT
1742 * from guest RAM to internal data structs
1744 static int vgic_its_restore_device_tables(struct vgic_its *its)
1750 * vgic_its_save_collection_table - Save the collection table into
1753 static int vgic_its_save_collection_table(struct vgic_its *its)
1759 * vgic_its_restore_collection_table - reads the collection table
1760 * in guest memory and restores the ITS internal state. Requires the
1761 * BASER registers to be restored before.
1763 static int vgic_its_restore_collection_table(struct vgic_its *its)
1769 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
1770 * according to v0 ABI
1772 static int vgic_its_save_tables_v0(struct vgic_its *its)
1774 struct kvm *kvm = its->dev->kvm;
1777 mutex_lock(&kvm->lock);
1778 mutex_lock(&its->its_lock);
1780 if (!lock_all_vcpus(kvm)) {
1781 mutex_unlock(&its->its_lock);
1782 mutex_unlock(&kvm->lock);
1786 ret = vgic_its_save_device_tables(its);
1790 ret = vgic_its_save_collection_table(its);
1793 unlock_all_vcpus(kvm);
1794 mutex_unlock(&its->its_lock);
1795 mutex_unlock(&kvm->lock);
1800 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
1801 * to internal data structs according to V0 ABI
1804 static int vgic_its_restore_tables_v0(struct vgic_its *its)
1806 struct kvm *kvm = its->dev->kvm;
1809 mutex_lock(&kvm->lock);
1810 mutex_lock(&its->its_lock);
1812 if (!lock_all_vcpus(kvm)) {
1813 mutex_unlock(&its->its_lock);
1814 mutex_unlock(&kvm->lock);
1818 ret = vgic_its_restore_collection_table(its);
1822 ret = vgic_its_restore_device_tables(its);
1825 unlock_all_vcpus(kvm);
1826 mutex_unlock(&its->its_lock);
1827 mutex_unlock(&kvm->lock);
1833 * On restore path, MSI injections can happen before the
1834 * first VCPU run so let's complete the GIC init here.
1836 return kvm_vgic_map_resources(its->dev->kvm);
1839 static int vgic_its_commit_v0(struct vgic_its *its)
1841 const struct vgic_its_abi *abi;
1843 abi = vgic_its_get_abi(its);
1844 its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1845 its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
1847 its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
1848 << GITS_BASER_ENTRY_SIZE_SHIFT);
1850 its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
1851 << GITS_BASER_ENTRY_SIZE_SHIFT);
1855 static int vgic_its_has_attr(struct kvm_device *dev,
1856 struct kvm_device_attr *attr)
1858 switch (attr->group) {
1859 case KVM_DEV_ARM_VGIC_GRP_ADDR:
1860 switch (attr->attr) {
1861 case KVM_VGIC_ITS_ADDR_TYPE:
1865 case KVM_DEV_ARM_VGIC_GRP_CTRL:
1866 switch (attr->attr) {
1867 case KVM_DEV_ARM_VGIC_CTRL_INIT:
1869 case KVM_DEV_ARM_ITS_SAVE_TABLES:
1871 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
1875 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
1876 return vgic_its_has_attr_regs(dev, attr);
1881 static int vgic_its_set_attr(struct kvm_device *dev,
1882 struct kvm_device_attr *attr)
1884 struct vgic_its *its = dev->private;
1887 switch (attr->group) {
1888 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
1889 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1890 unsigned long type = (unsigned long)attr->attr;
1893 if (type != KVM_VGIC_ITS_ADDR_TYPE)
1896 if (copy_from_user(&addr, uaddr, sizeof(addr)))
1899 ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base,
1904 its->vgic_its_base = addr;
1908 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
1909 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1911 switch (attr->attr) {
1912 case KVM_DEV_ARM_VGIC_CTRL_INIT:
1913 its->initialized = true;
1916 case KVM_DEV_ARM_ITS_SAVE_TABLES:
1917 return abi->save_tables(its);
1918 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
1919 return abi->restore_tables(its);
1922 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
1923 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1926 if (get_user(reg, uaddr))
1929 return vgic_its_attr_regs_access(dev, attr, ®, true);
1935 static int vgic_its_get_attr(struct kvm_device *dev,
1936 struct kvm_device_attr *attr)
1938 switch (attr->group) {
1939 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
1940 struct vgic_its *its = dev->private;
1941 u64 addr = its->vgic_its_base;
1942 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1943 unsigned long type = (unsigned long)attr->attr;
1945 if (type != KVM_VGIC_ITS_ADDR_TYPE)
1948 if (copy_to_user(uaddr, &addr, sizeof(addr)))
1952 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
1953 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
1957 ret = vgic_its_attr_regs_access(dev, attr, ®, false);
1960 return put_user(reg, uaddr);
1969 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
1970 .name = "kvm-arm-vgic-its",
1971 .create = vgic_its_create,
1972 .destroy = vgic_its_destroy,
1973 .set_attr = vgic_its_set_attr,
1974 .get_attr = vgic_its_get_attr,
1975 .has_attr = vgic_its_has_attr,
1978 int kvm_vgic_register_its_device(void)
1980 return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
1981 KVM_DEV_TYPE_ARM_VGIC_ITS);
1985 * Registers all ITSes with the kvm_io_bus framework.
1986 * To follow the existing VGIC initialization sequence, this has to be
1987 * done as late as possible, just before the first VCPU runs.
1989 int vgic_register_its_iodevs(struct kvm *kvm)
1991 struct kvm_device *dev;
1994 list_for_each_entry(dev, &kvm->devices, vm_node) {
1995 if (dev->ops != &kvm_arm_vgic_its_ops)
1998 ret = vgic_register_its_iodev(kvm, dev->private);
2002 * We don't need to care about tearing down previously
2003 * registered ITSes, as the kvm_io_bus framework removes
2004 * them for us if the VM gets destroyed.