virt/kvm/arm/vgic/vgic-kvm-device.c

   1 /*
   2  * VGIC: KVM DEVICE API
   3  *
   4  * Copyright (C) 2015 ARM Ltd.
   5  * Author: Marc Zyngier <marc.zyngier@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16 #include <linux/kvm_host.h>
  17 #include <kvm/arm_vgic.h>
  18 #include <linux/uaccess.h>
  19 #include <asm/kvm_mmu.h>
  20 #include <asm/cputype.h>
  21 #include "vgic.h"
  22
  23 /* common helpers */
  24
  25 int vgic_check_ioaddr(struct kvm *kvm, phys_addr_t *ioaddr,
  26                       phys_addr_t addr, phys_addr_t alignment)
  27 {
  28         if (addr & ~KVM_PHYS_MASK)
  29                 return -E2BIG;
  30
  31         if (!IS_ALIGNED(addr, alignment))
  32                 return -EINVAL;
  33
  34         if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
  35                 return -EEXIST;
  36
  37         return 0;
  38 }
  39
  40 /**
  41  * kvm_vgic_addr - set or get vgic VM base addresses
  42  * @kvm:   pointer to the vm struct
  43  * @type:  the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
  44  * @addr:  pointer to address value
  45  * @write: if true set the address in the VM address space, if false read the
  46  *          address
  47  *
  48  * Set or get the vgic base addresses for the distributor and the virtual CPU
  49  * interface in the VM physical address space.  These addresses are properties
  50  * of the emulated core/SoC and therefore user space initially knows this
  51  * information.
  52  * Check them for sanity (alignment, double assignment). We can't check for
  53  * overlapping regions in case of a virtual GICv3 here, since we don't know
  54  * the number of VCPUs yet, so we defer this check to map_resources().
  55  */
  56 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
  57 {
  58         int r = 0;
  59         struct vgic_dist *vgic = &kvm->arch.vgic;
  60         int type_needed;
  61         phys_addr_t *addr_ptr, alignment;
  62
  63         mutex_lock(&kvm->lock);
  64         switch (type) {
  65         case KVM_VGIC_V2_ADDR_TYPE_DIST:
  66                 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
  67                 addr_ptr = &vgic->vgic_dist_base;
  68                 alignment = SZ_4K;
  69                 break;
  70         case KVM_VGIC_V2_ADDR_TYPE_CPU:
  71                 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
  72                 addr_ptr = &vgic->vgic_cpu_base;
  73                 alignment = SZ_4K;
  74                 break;
  75         case KVM_VGIC_V3_ADDR_TYPE_DIST:
  76                 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
  77                 addr_ptr = &vgic->vgic_dist_base;
  78                 alignment = SZ_64K;
  79                 break;
  80         case KVM_VGIC_V3_ADDR_TYPE_REDIST:
  81                 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
  82                 addr_ptr = &vgic->vgic_redist_base;
  83                 alignment = SZ_64K;
  84                 break;
  85         default:
  86                 r = -ENODEV;
  87                 goto out;
  88         }
  89
  90         if (vgic->vgic_model != type_needed) {
  91                 r = -ENODEV;
  92                 goto out;
  93         }
  94
  95         if (write) {
  96                 r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment);
  97                 if (!r)
  98                         *addr_ptr = *addr;
  99         } else {
 100                 *addr = *addr_ptr;
 101         }
 102
 103 out:
 104         mutex_unlock(&kvm->lock);
 105         return r;
 106 }
 107
 108 static int vgic_set_common_attr(struct kvm_device *dev,
 109                                 struct kvm_device_attr *attr)
 110 {
 111         int r;
 112
 113         switch (attr->group) {
 114         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
 115                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
 116                 u64 addr;
 117                 unsigned long type = (unsigned long)attr->attr;
 118
 119                 if (copy_from_user(&addr, uaddr, sizeof(addr)))
 120                         return -EFAULT;
 121
 122                 r = kvm_vgic_addr(dev->kvm, type, &addr, true);
 123                 return (r == -ENODEV) ? -ENXIO : r;
 124         }
 125         case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
 126                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 127                 u32 val;
 128                 int ret = 0;
 129
 130                 if (get_user(val, uaddr))
 131                         return -EFAULT;
 132
 133                 /*
 134                  * We require:
 135                  * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
 136                  * - at most 1024 interrupts
 137                  * - a multiple of 32 interrupts
 138                  */
 139                 if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
 140                     val > VGIC_MAX_RESERVED ||
 141                     (val & 31))
 142                         return -EINVAL;
 143
 144                 mutex_lock(&dev->kvm->lock);
 145
 146                 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
 147                         ret = -EBUSY;
 148                 else
 149                         dev->kvm->arch.vgic.nr_spis =
 150                                 val - VGIC_NR_PRIVATE_IRQS;
 151
 152                 mutex_unlock(&dev->kvm->lock);
 153
 154                 return ret;
 155         }
 156         case KVM_DEV_ARM_VGIC_GRP_CTRL: {
 157                 switch (attr->attr) {
 158                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
 159                         mutex_lock(&dev->kvm->lock);
 160                         r = vgic_init(dev->kvm);
 161                         mutex_unlock(&dev->kvm->lock);
 162                         return r;
 163                 }
 164                 break;
 165         }
 166         }
 167
 168         return -ENXIO;
 169 }
 170
 171 static int vgic_get_common_attr(struct kvm_device *dev,
 172                                 struct kvm_device_attr *attr)
 173 {
 174         int r = -ENXIO;
 175
 176         switch (attr->group) {
 177         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
 178                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
 179                 u64 addr;
 180                 unsigned long type = (unsigned long)attr->attr;
 181
 182                 r = kvm_vgic_addr(dev->kvm, type, &addr, false);
 183                 if (r)
 184                         return (r == -ENODEV) ? -ENXIO : r;
 185
 186                 if (copy_to_user(uaddr, &addr, sizeof(addr)))
 187                         return -EFAULT;
 188                 break;
 189         }
 190         case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
 191                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 192
 193                 r = put_user(dev->kvm->arch.vgic.nr_spis +
 194                              VGIC_NR_PRIVATE_IRQS, uaddr);
 195                 break;
 196         }
 197         }
 198
 199         return r;
 200 }
 201
 202 static int vgic_create(struct kvm_device *dev, u32 type)
 203 {
 204         return kvm_vgic_create(dev->kvm, type);
 205 }
 206
 207 static void vgic_destroy(struct kvm_device *dev)
 208 {
 209         kfree(dev);
 210 }
 211
 212 int kvm_register_vgic_device(unsigned long type)
 213 {
 214         int ret = -ENODEV;
 215
 216         switch (type) {
 217         case KVM_DEV_TYPE_ARM_VGIC_V2:
 218                 ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
 219                                               KVM_DEV_TYPE_ARM_VGIC_V2);
 220                 break;
 221         case KVM_DEV_TYPE_ARM_VGIC_V3:
 222                 ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
 223                                               KVM_DEV_TYPE_ARM_VGIC_V3);
 224
 225                 if (ret)
 226                         break;
 227                 ret = kvm_vgic_register_its_device();
 228                 break;
 229         }
 230
 231         return ret;
 232 }
 233
 234 int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
 235                        struct vgic_reg_attr *reg_attr)
 236 {
 237         int cpuid;
 238
 239         cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
 240                  KVM_DEV_ARM_VGIC_CPUID_SHIFT;
 241
 242         if (cpuid >= atomic_read(&dev->kvm->online_vcpus))
 243                 return -EINVAL;
 244
 245         reg_attr->vcpu = kvm_get_vcpu(dev->kvm, cpuid);
 246         reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
 247
 248         return 0;
 249 }
 250
 251 /* unlocks vcpus from @vcpu_lock_idx and smaller */
 252 static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)
 253 {
 254         struct kvm_vcpu *tmp_vcpu;
 255
 256         for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) {
 257                 tmp_vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx);
 258                 mutex_unlock(&tmp_vcpu->mutex);
 259         }
 260 }
 261
 262 static void unlock_all_vcpus(struct kvm *kvm)
 263 {
 264         unlock_vcpus(kvm, atomic_read(&kvm->online_vcpus) - 1);
 265 }
 266
 267 /* Returns true if all vcpus were locked, false otherwise */
 268 static bool lock_all_vcpus(struct kvm *kvm)
 269 {
 270         struct kvm_vcpu *tmp_vcpu;
 271         int c;
 272
 273         /*
 274          * Any time a vcpu is run, vcpu_load is called which tries to grab the
 275          * vcpu->mutex.  By grabbing the vcpu->mutex of all VCPUs we ensure
 276          * that no other VCPUs are run and fiddle with the vgic state while we
 277          * access it.
 278          */
 279         kvm_for_each_vcpu(c, tmp_vcpu, kvm) {
 280                 if (!mutex_trylock(&tmp_vcpu->mutex)) {
 281                         unlock_vcpus(kvm, c - 1);
 282                         return false;
 283                 }
 284         }
 285
 286         return true;
 287 }
 288
 289 /**
 290  * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
 291  *
 292  * @dev:      kvm device handle
 293  * @attr:     kvm device attribute
 294  * @reg:      address the value is read or written
 295  * @is_write: true if userspace is writing a register
 296  */
 297 static int vgic_v2_attr_regs_access(struct kvm_device *dev,
 298                                     struct kvm_device_attr *attr,
 299                                     u32 *reg, bool is_write)
 300 {
 301         struct vgic_reg_attr reg_attr;
 302         gpa_t addr;
 303         struct kvm_vcpu *vcpu;
 304         int ret;
 305
 306         ret = vgic_v2_parse_attr(dev, attr, &reg_attr);
 307         if (ret)
 308                 return ret;
 309
 310         vcpu = reg_attr.vcpu;
 311         addr = reg_attr.addr;
 312
 313         mutex_lock(&dev->kvm->lock);
 314
 315         ret = vgic_init(dev->kvm);
 316         if (ret)
 317                 goto out;
 318
 319         if (!lock_all_vcpus(dev->kvm)) {
 320                 ret = -EBUSY;
 321                 goto out;
 322         }
 323
 324         switch (attr->group) {
 325         case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
 326                 ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, reg);
 327                 break;
 328         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 329                 ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, reg);
 330                 break;
 331         default:
 332                 ret = -EINVAL;
 333                 break;
 334         }
 335
 336         unlock_all_vcpus(dev->kvm);
 337 out:
 338         mutex_unlock(&dev->kvm->lock);
 339         return ret;
 340 }
 341
 342 static int vgic_v2_set_attr(struct kvm_device *dev,
 343                             struct kvm_device_attr *attr)
 344 {
 345         int ret;
 346
 347         ret = vgic_set_common_attr(dev, attr);
 348         if (ret != -ENXIO)
 349                 return ret;
 350
 351         switch (attr->group) {
 352         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 353         case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
 354                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 355                 u32 reg;
 356
 357                 if (get_user(reg, uaddr))
 358                         return -EFAULT;
 359
 360                 return vgic_v2_attr_regs_access(dev, attr, &reg, true);
 361         }
 362         }
 363
 364         return -ENXIO;
 365 }
 366
 367 static int vgic_v2_get_attr(struct kvm_device *dev,
 368                             struct kvm_device_attr *attr)
 369 {
 370         int ret;
 371
 372         ret = vgic_get_common_attr(dev, attr);
 373         if (ret != -ENXIO)
 374                 return ret;
 375
 376         switch (attr->group) {
 377         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 378         case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
 379                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 380                 u32 reg = 0;
 381
 382                 ret = vgic_v2_attr_regs_access(dev, attr, &reg, false);
 383                 if (ret)
 384                         return ret;
 385                 return put_user(reg, uaddr);
 386         }
 387         }
 388
 389         return -ENXIO;
 390 }
 391
 392 static int vgic_v2_has_attr(struct kvm_device *dev,
 393                             struct kvm_device_attr *attr)
 394 {
 395         switch (attr->group) {
 396         case KVM_DEV_ARM_VGIC_GRP_ADDR:
 397                 switch (attr->attr) {
 398                 case KVM_VGIC_V2_ADDR_TYPE_DIST:
 399                 case KVM_VGIC_V2_ADDR_TYPE_CPU:
 400                         return 0;
 401                 }
 402                 break;
 403         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 404         case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
 405                 return vgic_v2_has_attr_regs(dev, attr);
 406         case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
 407                 return 0;
 408         case KVM_DEV_ARM_VGIC_GRP_CTRL:
 409                 switch (attr->attr) {
 410                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
 411                         return 0;
 412                 }
 413         }
 414         return -ENXIO;
 415 }
 416
 417 struct kvm_device_ops kvm_arm_vgic_v2_ops = {
 418         .name = "kvm-arm-vgic-v2",
 419         .create = vgic_create,
 420         .destroy = vgic_destroy,
 421         .set_attr = vgic_v2_set_attr,
 422         .get_attr = vgic_v2_get_attr,
 423         .has_attr = vgic_v2_has_attr,
 424 };
 425
 426 int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,
 427                        struct vgic_reg_attr *reg_attr)
 428 {
 429         unsigned long vgic_mpidr, mpidr_reg;
 430
 431         /*
 432          * For KVM_DEV_ARM_VGIC_GRP_DIST_REGS group,
 433          * attr might not hold MPIDR. Hence assume vcpu0.
 434          */
 435         if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) {
 436                 vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >>
 437                               KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT;
 438
 439                 mpidr_reg = VGIC_TO_MPIDR(vgic_mpidr);
 440                 reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg);
 441         } else {
 442                 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0);
 443         }
 444
 445         if (!reg_attr->vcpu)
 446                 return -EINVAL;
 447
 448         reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
 449
 450         return 0;
 451 }
 452
 453 /*
 454  * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
 455  *
 456  * @dev:      kvm device handle
 457  * @attr:     kvm device attribute
 458  * @reg:      address the value is read or written
 459  * @is_write: true if userspace is writing a register
 460  */
 461 static int vgic_v3_attr_regs_access(struct kvm_device *dev,
 462                                     struct kvm_device_attr *attr,
 463                                     u64 *reg, bool is_write)
 464 {
 465         struct vgic_reg_attr reg_attr;
 466         gpa_t addr;
 467         struct kvm_vcpu *vcpu;
 468         int ret;
 469         u32 tmp32;
 470
 471         ret = vgic_v3_parse_attr(dev, attr, &reg_attr);
 472         if (ret)
 473                 return ret;
 474
 475         vcpu = reg_attr.vcpu;
 476         addr = reg_attr.addr;
 477
 478         mutex_lock(&dev->kvm->lock);
 479
 480         if (unlikely(!vgic_initialized(dev->kvm))) {
 481                 ret = -EBUSY;
 482                 goto out;
 483         }
 484
 485         if (!lock_all_vcpus(dev->kvm)) {
 486                 ret = -EBUSY;
 487                 goto out;
 488         }
 489
 490         switch (attr->group) {
 491         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 492                 if (is_write)
 493                         tmp32 = *reg;
 494
 495                 ret = vgic_v3_dist_uaccess(vcpu, is_write, addr, &tmp32);
 496                 if (!is_write)
 497                         *reg = tmp32;
 498                 break;
 499         case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
 500                 if (is_write)
 501                         tmp32 = *reg;
 502
 503                 ret = vgic_v3_redist_uaccess(vcpu, is_write, addr, &tmp32);
 504                 if (!is_write)
 505                         *reg = tmp32;
 506                 break;
 507         case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
 508                 u64 regid;
 509
 510                 regid = (attr->attr & KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK);
 511                 ret = vgic_v3_cpu_sysregs_uaccess(vcpu, is_write,
 512                                                   regid, reg);
 513                 break;
 514         }
 515         case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
 516                 unsigned int info, intid;
 517
 518                 info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
 519                         KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT;
 520                 if (info == VGIC_LEVEL_INFO_LINE_LEVEL) {
 521                         intid = attr->attr &
 522                                 KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK;
 523                         ret = vgic_v3_line_level_info_uaccess(vcpu, is_write,
 524                                                               intid, reg);
 525                 } else {
 526                         ret = -EINVAL;
 527                 }
 528                 break;
 529         }
 530         default:
 531                 ret = -EINVAL;
 532                 break;
 533         }
 534
 535         unlock_all_vcpus(dev->kvm);
 536 out:
 537         mutex_unlock(&dev->kvm->lock);
 538         return ret;
 539 }
 540
 541 static int vgic_v3_set_attr(struct kvm_device *dev,
 542                             struct kvm_device_attr *attr)
 543 {
 544         int ret;
 545
 546         ret = vgic_set_common_attr(dev, attr);
 547         if (ret != -ENXIO)
 548                 return ret;
 549
 550         switch (attr->group) {
 551         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 552         case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS: {
 553                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 554                 u32 tmp32;
 555                 u64 reg;
 556
 557                 if (get_user(tmp32, uaddr))
 558                         return -EFAULT;
 559
 560                 reg = tmp32;
 561                 return vgic_v3_attr_regs_access(dev, attr, &reg, true);
 562         }
 563         case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
 564                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
 565                 u64 reg;
 566
 567                 if (get_user(reg, uaddr))
 568                         return -EFAULT;
 569
 570                 return vgic_v3_attr_regs_access(dev, attr, &reg, true);
 571         }
 572         case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
 573                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 574                 u64 reg;
 575                 u32 tmp32;
 576
 577                 if (get_user(tmp32, uaddr))
 578                         return -EFAULT;
 579
 580                 reg = tmp32;
 581                 return vgic_v3_attr_regs_access(dev, attr, &reg, true);
 582         }
 583         }
 584         return -ENXIO;
 585 }
 586
 587 static int vgic_v3_get_attr(struct kvm_device *dev,
 588                             struct kvm_device_attr *attr)
 589 {
 590         int ret;
 591
 592         ret = vgic_get_common_attr(dev, attr);
 593         if (ret != -ENXIO)
 594                 return ret;
 595
 596         switch (attr->group) {
 597         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 598         case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS: {
 599                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 600                 u64 reg;
 601                 u32 tmp32;
 602
 603                 ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
 604                 if (ret)
 605                         return ret;
 606                 tmp32 = reg;
 607                 return put_user(tmp32, uaddr);
 608         }
 609         case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS: {
 610                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
 611                 u64 reg;
 612
 613                 ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
 614                 if (ret)
 615                         return ret;
 616                 return put_user(reg, uaddr);
 617         }
 618         case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
 619                 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
 620                 u64 reg;
 621                 u32 tmp32;
 622
 623                 ret = vgic_v3_attr_regs_access(dev, attr, &reg, false);
 624                 if (ret)
 625                         return ret;
 626                 tmp32 = reg;
 627                 return put_user(tmp32, uaddr);
 628         }
 629         }
 630         return -ENXIO;
 631 }
 632
 633 static int vgic_v3_has_attr(struct kvm_device *dev,
 634                             struct kvm_device_attr *attr)
 635 {
 636         switch (attr->group) {
 637         case KVM_DEV_ARM_VGIC_GRP_ADDR:
 638                 switch (attr->attr) {
 639                 case KVM_VGIC_V3_ADDR_TYPE_DIST:
 640                 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
 641                         return 0;
 642                 }
 643                 break;
 644         case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
 645         case KVM_DEV_ARM_VGIC_GRP_REDIST_REGS:
 646         case KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS:
 647                 return vgic_v3_has_attr_regs(dev, attr);
 648         case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
 649                 return 0;
 650         case KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO: {
 651                 if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >>
 652                       KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT) ==
 653                       VGIC_LEVEL_INFO_LINE_LEVEL)
 654                         return 0;
 655                 break;
 656         }
 657         case KVM_DEV_ARM_VGIC_GRP_CTRL:
 658                 switch (attr->attr) {
 659                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
 660                         return 0;
 661                 }
 662         }
 663         return -ENXIO;
 664 }
 665
 666 struct kvm_device_ops kvm_arm_vgic_v3_ops = {
 667         .name = "kvm-arm-vgic-v3",
 668         .create = vgic_create,
 669         .destroy = vgic_destroy,
 670         .set_attr = vgic_v3_set_attr,
 671         .get_attr = vgic_v3_get_attr,
 672         .has_attr = vgic_v3_has_attr,
 673 };