ARM: at91sam9m10g45ek: add mmc environment configuration support

[karo-tx-uboot.git] / README

diff --git a/README b/README
index c9990e6796d307239c3d50f6f97e8063a2a74e91..a280435e9fbec65012cf9758a66f6827d2f22353 100644 (file)
--- a/README
+++ b/README
@@ -132,6 +132,10 @@ Directory Hierarchy:
 ====================
 
 /arch                  Architecture specific files
 ====================
 
 /arch                  Architecture specific files

+  /arc                 Files generic to ARC architecture
+    /cpu               CPU specific files
+      /arc700          Files specific to ARC 700 CPUs
+    /lib               Architecture specific library files

   /arm                 Files generic to ARM architecture
     /cpu               CPU specific files
       /arm720t         Files specific to ARM 720 CPUs
   /arm                 Files generic to ARM architecture
     /cpu               CPU specific files
       /arm720t         Files specific to ARM 720 CPUs


@@ -164,7 +168,7 @@ Directory Hierarchy:
   /mips                        Files generic to MIPS architecture
     /cpu               CPU specific files
       /mips32          Files specific to MIPS32 CPUs
   /mips                        Files generic to MIPS architecture
     /cpu               CPU specific files
       /mips32          Files specific to MIPS32 CPUs

-      /xburst          Files specific to Ingenic XBurst CPUs
+      /mips64          Files specific to MIPS64 CPUs

     /lib               Architecture specific library files
   /nds32               Files generic to NDS32 architecture
     /cpu               CPU specific files
     /lib               Architecture specific library files
   /nds32               Files generic to NDS32 architecture
     /cpu               CPU specific files


@@ -260,6 +264,17 @@ e.g. "make cogent_mpc8xx_config". And also configure the cogent
 directory according to the instructions in cogent/README.
 
 
 directory according to the instructions in cogent/README.
 
 

+Sandbox Environment:
+--------------------
+
+U-Boot can be built natively to run on a Linux host using the 'sandbox'
+board. This allows feature development which is not board- or architecture-
+specific to be undertaken on a native platform. The sandbox is also used to
+run some of U-Boot's tests.
+
+See board/sandbox/sandbox/README.sandbox for more details.
+
+

 Configuration Options:
 ----------------------
 
 Configuration Options:
 ----------------------
 


@@ -427,7 +442,21 @@ The following options need to be configured:
                In this mode, a single differential clock is used to supply
                clocks to the sysclock, ddrclock and usbclock.
 
                In this mode, a single differential clock is used to supply
                clocks to the sysclock, ddrclock and usbclock.
 

+               CONFIG_SYS_CPC_REINIT_F
+               This CONFIG is defined when the CPC is configured as SRAM at the
+               time of U-boot entry and is required to be re-initialized.
+
+               CONFIG_DEEP_SLEEP
+               Inidcates this SoC supports deep sleep feature. If deep sleep is
+               supported, core will start to execute uboot when wakes up.
+

 - Generic CPU options:
 - Generic CPU options:

+               CONFIG_SYS_GENERIC_GLOBAL_DATA
+               Defines global data is initialized in generic board board_init_f().
+               If this macro is defined, global data is created and cleared in
+               generic board board_init_f(). Without this macro, architecture/board
+               should initialize global data before calling board_init_f().
+

                CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
 
                Defines the endianess of the CPU. Implementation of those
                CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
 
                Defines the endianess of the CPU. Implementation of those


@@ -454,6 +483,9 @@ The following options need to be configured:
                CONFIG_SYS_FSL_DDRC_GEN3
                Freescale DDR3 controller.
 
                CONFIG_SYS_FSL_DDRC_GEN3
                Freescale DDR3 controller.
 

+               CONFIG_SYS_FSL_DDRC_GEN4
+               Freescale DDR4 controller.
+

                CONFIG_SYS_FSL_DDRC_ARM_GEN3
                Freescale DDR3 controller for ARM-based SoCs.
 
                CONFIG_SYS_FSL_DDRC_ARM_GEN3
                Freescale DDR3 controller for ARM-based SoCs.
 


@@ -469,7 +501,15 @@ The following options need to be configured:
 
                CONFIG_SYS_FSL_DDR3
                Board config to use DDR3. It can be enabled for SoCs with
 
                CONFIG_SYS_FSL_DDR3
                Board config to use DDR3. It can be enabled for SoCs with

-               Freescale DDR3 controllers.
+               Freescale DDR3 or DDR3L controllers.
+
+               CONFIG_SYS_FSL_DDR3L
+               Board config to use DDR3L. It can be enabled for SoCs with
+               DDR3L controllers.
+
+               CONFIG_SYS_FSL_DDR4
+               Board config to use DDR4. It can be enabled for SoCs with
+               DDR4 controllers.

 
                CONFIG_SYS_FSL_IFC_BE
                Defines the IFC controller register space as Big Endian
 
                CONFIG_SYS_FSL_IFC_BE
                Defines the IFC controller register space as Big Endian


@@ -486,6 +526,10 @@ The following options need to be configured:
                PBI commands can be used to configure SoC before it starts the execution.
                Please refer doc/README.pblimage for more details
 
                PBI commands can be used to configure SoC before it starts the execution.
                Please refer doc/README.pblimage for more details
 

+               CONFIG_SPL_FSL_PBL
+               It adds a target to create boot binary having SPL binary in PBI format
+               concatenated with u-boot binary.
+

                CONFIG_SYS_FSL_DDR_BE
                Defines the DDR controller register space as Big Endian
 
                CONFIG_SYS_FSL_DDR_BE
                Defines the DDR controller register space as Big Endian
 


@@ -713,6 +757,10 @@ The following options need to be configured:
                boot loader that has already initialized the UART.  Define this
                variable to flush the UART at init time.
 
                boot loader that has already initialized the UART.  Define this
                variable to flush the UART at init time.
 

+               CONFIG_SERIAL_HW_FLOW_CONTROL
+
+               Define this variable to enable hw flow control in serial driver.
+               Current user of this option is drivers/serial/nsl16550.c driver

 
 - Console Interface:
                Depending on board, define exactly one serial port
 
 - Console Interface:
                Depending on board, define exactly one serial port


@@ -912,6 +960,7 @@ The following options need to be configured:
                The default command configuration includes all commands
                except those marked below with a "*".
 
                The default command configuration includes all commands
                except those marked below with a "*".
 

+               CONFIG_CMD_AES            AES 128 CBC encrypt/decrypt

                CONFIG_CMD_ASKENV       * ask for env variable
                CONFIG_CMD_BDI            bdinfo
                CONFIG_CMD_BEDBUG       * Include BedBug Debugger
                CONFIG_CMD_ASKENV       * ask for env variable
                CONFIG_CMD_BDI            bdinfo
                CONFIG_CMD_BEDBUG       * Include BedBug Debugger


@@ -1456,13 +1505,6 @@ The following options need to be configured:
                        for your device
                        - CONFIG_USBD_PRODUCTID 0xFFFF
 
                        for your device
                        - CONFIG_USBD_PRODUCTID 0xFFFF
 

-               Some USB device drivers may need to check USB cable attachment.
-               In this case you can enable following config in BoardName.h:
-                       CONFIG_USB_CABLE_CHECK
-                       This enables function definition:
-                       - usb_cable_connected() in include/usb.h
-                       Implementation of this function is board-specific.
-

 - ULPI Layer Support:
                The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
                the generic ULPI layer. The generic layer accesses the ULPI PHY
 - ULPI Layer Support:
                The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
                the generic ULPI layer. The generic layer accesses the ULPI PHY


@@ -1492,6 +1534,16 @@ The following options need to be configured:
                        CONFIG_SH_MMCIF_CLK
                        Define the clock frequency for MMCIF
 
                        CONFIG_SH_MMCIF_CLK
                        Define the clock frequency for MMCIF
 

+               CONFIG_GENERIC_MMC
+               Enable the generic MMC driver
+
+               CONFIG_SUPPORT_EMMC_BOOT
+               Enable some additional features of the eMMC boot partitions.
+
+               CONFIG_SUPPORT_EMMC_RPMB
+               Enable the commands for reading, writing and programming the
+               key for the Replay Protection Memory Block partition in eMMC.
+

 - USB Device Firmware Update (DFU) class support:
                CONFIG_DFU_FUNCTION
                This enables the USB portion of the DFU USB class
 - USB Device Firmware Update (DFU) class support:
                CONFIG_DFU_FUNCTION
                This enables the USB portion of the DFU USB class


@@ -1537,6 +1589,28 @@ The following options need to be configured:
                entering dfuMANIFEST state. Host waits this timeout, before
                sending again an USB request to the device.
 
                entering dfuMANIFEST state. Host waits this timeout, before
                sending again an USB request to the device.
 

+- USB Device Android Fastboot support:
+               CONFIG_CMD_FASTBOOT
+               This enables the command "fastboot" which enables the Android
+               fastboot mode for the platform's USB device. Fastboot is a USB
+               protocol for downloading images, flashing and device control
+               used on Android devices.
+               See doc/README.android-fastboot for more information.
+
+               CONFIG_ANDROID_BOOT_IMAGE
+               This enables support for booting images which use the Android
+               image format header.
+
+               CONFIG_USB_FASTBOOT_BUF_ADDR
+               The fastboot protocol requires a large memory buffer for
+               downloads. Define this to the starting RAM address to use for
+               downloaded images.
+
+               CONFIG_USB_FASTBOOT_BUF_SIZE
+               The fastboot protocol requires a large memory buffer for
+               downloads. This buffer should be as large as possible for a
+               platform. Define this to the size available RAM for fastboot.
+

 - Journaling Flash filesystem support:
                CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
                CONFIG_JFFS2_NAND_DEV
 - Journaling Flash filesystem support:
                CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
                CONFIG_JFFS2_NAND_DEV


@@ -2508,6 +2582,19 @@ CBFS (Coreboot Filesystem) support
 
                Specify the number of FPGA devices to support.
 
 
                Specify the number of FPGA devices to support.
 

+               CONFIG_CMD_FPGA_LOADMK
+
+               Enable support for fpga loadmk command
+
+               CONFIG_CMD_FPGA_LOADP
+
+               Enable support for fpga loadp command - load partial bitstream
+
+               CONFIG_CMD_FPGA_LOADBP
+
+               Enable support for fpga loadbp command - load partial bitstream
+               (Xilinx only)
+

                CONFIG_SYS_FPGA_PROG_FEEDBACK
 
                Enable printing of hash marks during FPGA configuration.
                CONFIG_SYS_FPGA_PROG_FEEDBACK
 
                Enable printing of hash marks during FPGA configuration.


@@ -3316,6 +3403,9 @@ FIT uImage format:
                continuing (the hardware starts execution after just
                loading the first page rather than the full 4K).
 
                continuing (the hardware starts execution after just
                loading the first page rather than the full 4K).
 

+               CONFIG_SPL_SKIP_RELOCATE
+               Avoid SPL relocation
+

                CONFIG_SPL_NAND_BASE
                Include nand_base.c in the SPL.  Requires
                CONFIG_SPL_NAND_DRIVERS.
                CONFIG_SPL_NAND_BASE
                Include nand_base.c in the SPL.  Requires
                CONFIG_SPL_NAND_DRIVERS.


@@ -4510,8 +4600,13 @@ This firmware often needs to be loaded during U-Boot booting, so macros
 are used to identify the storage device (NOR flash, SPI, etc) and the address
 within that device.
 
 are used to identify the storage device (NOR flash, SPI, etc) and the address
 within that device.
 

-- CONFIG_SYS_QE_FMAN_FW_ADDR
-       The address in the storage device where the firmware is located.  The
+- CONFIG_SYS_FMAN_FW_ADDR
+       The address in the storage device where the FMAN microcode is located.  The
+       meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+       is also specified.
+
+- CONFIG_SYS_QE_FW_ADDR
+       The address in the storage device where the QE microcode is located.  The

        meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
        is also specified.
 
        meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
        is also specified.