Merge branch 'master' of /home/wd/git/u-boot/custodians

[karo-tx-uboot.git] / README

diff --git a/README b/README
index d7e5b76295d22b0b3a90ad3cdee1db0e82de9000..8bb9c8d6be2a1b4bc50ea6882dcb1e1f12956b0f 100644 (file)
--- a/README
+++ b/README
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2000 - 2009
+# (C) Copyright 2000 - 2011
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -356,6 +356,18 @@ The following options need to be configured:
                Define this option if you want to enable the
                ICache only when Code runs from RAM.
 
+- 85xx CPU Options:
+               CONFIG_SYS_FSL_TBCLK_DIV
+
+               Defines the core time base clock divider ratio compared to the
+               system clock.  On most PQ3 devices this is 8, on newer QorIQ
+               devices it can be 16 or 32.  The ratio varies from SoC to Soc.
+
+               CONFIG_SYS_FSL_PCIE_COMPAT
+
+               Defines the string to utilize when trying to match PCIe device
+               tree nodes for the given platform.
+
 - Intel Monahans options:
                CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
 
@@ -468,6 +480,18 @@ The following options need to be configured:
                define this to a list of base addresses for each (supported)
                port. See e.g. include/configs/versatile.h
 
+               CONFIG_PL011_SERIAL_RLCR
+
+               Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
+               have separate receive and transmit line control registers.  Set
+               this variable to initialize the extra register.
+
+               CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+
+               On some platforms (e.g. U8500) U-Boot is loaded by a second stage
+               boot loader that has already initialized the UART.  Define this
+               variable to flush the UART at init time.
+
 
 - Console Interface:
                Depending on board, define exactly one serial port
@@ -690,6 +714,7 @@ The following options need to be configured:
                                          (requires CONFIG_CMD_MEMORY)
                CONFIG_CMD_SOURCE         "source" command Support
                CONFIG_CMD_SPI          * SPI serial bus support
+               CONFIG_CMD_TFTPSRV      * TFTP transfer in server mode
                CONFIG_CMD_USB          * USB support
                CONFIG_CMD_VFD          * VFD support (TRAB)
                CONFIG_CMD_CDP          * Cisco Discover Protocol support
@@ -720,10 +745,17 @@ The following options need to be configured:
 - Watchdog:
                CONFIG_WATCHDOG
                If this variable is defined, it enables watchdog
-               support. There must be support in the platform specific
-               code for a watchdog. For the 8xx and 8260 CPUs, the
-               SIU Watchdog feature is enabled in the SYPCR
-               register.
+               support for the SoC. There must be support in the SoC
+               specific code for a watchdog. For the 8xx and 8260
+               CPUs, the SIU Watchdog feature is enabled in the SYPCR
+               register.  When supported for a specific SoC is
+               available, then no further board specific code should
+               be needed to use it.
+
+               CONFIG_HW_WATCHDOG
+               When using a watchdog circuitry external to the used
+               SoC, then define this variable and provide board
+               specific code for the "hw_watchdog_reset" function.
 
 - U-Boot Version:
                CONFIG_VERSION_VARIABLE
@@ -1303,7 +1335,6 @@ The following options need to be configured:
                driver in use must provide a function: mcast() to join/leave a
                multicast group.
 
-               CONFIG_BOOTP_RANDOM_DELAY
 - BOOTP Recovery Mode:
                CONFIG_BOOTP_RANDOM_DELAY
 
@@ -2751,6 +2782,14 @@ Low Level (hardware related) configuration options:
                source code. It is used to make hardware dependant
                initializations.
 
+- CONFIG_IDE_AHB:
+               Most IDE controllers were designed to be connected with PCI
+               interface. Only few of them were designed for AHB interface.
+               When software is doing ATA command and data transfer to
+               IDE devices through IDE-AHB controller, some additional
+               registers accessing to these kind of IDE-AHB controller
+               is requierd.
+
 - CONFIG_SYS_IMMR:     Physical address of the Internal Memory.
                DO NOT CHANGE unless you know exactly what you're
                doing! (11-4) [MPC8xx/82xx systems only]