]> git.kernelconcepts.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/imx6qdl-sabresd.dtsi
MLK-10203-2 arm: pcie: enable imx6qdl pcie support
[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-sabresd.dtsi
index ec76160b2758deb3dc5d109bab365ec23cf9c2cd..9cf7652ee7941680916a6a351df546aba98b5aa5 100644 (file)
                        enable-active-high;
                };
 
+               reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on {
+                       compatible = "regulator-fixed";
+                       regulator-name = "mipi_dsi_pwr_on";
+                       gpio = <&gpio6 14 0>;
+                       enable-active-high;
+               };
+
                reg_sensor: regulator@3 {
                        compatible = "regulator-fixed";
                        reg = <3>;
 
                power {
                        label = "Power Button";
-                       gpios = <&gpio3 29 0>;
+                       gpios = <&gpio3 29 1>;
                        gpio-key,wakeup;
                        linux,code = <KEY_POWER>;
                };
 
                volume-up {
                        label = "Volume Up";
-                       gpios = <&gpio1 4 0>;
+                       gpios = <&gpio1 4 1>;
                        gpio-key,wakeup;
                        linux,code = <KEY_VOLUMEUP>;
                };
 
                volume-down {
                        label = "Volume Down";
-                       gpios = <&gpio1 5 0>;
+                       gpios = <&gpio1 5 1>;
                        gpio-key,wakeup;
                        linux,code = <KEY_VOLUMEDOWN>;
                };
                compatible = "fsl,imx6q-sabresd-wm8962",
                           "fsl,imx-audio-wm8962";
                model = "wm8962-audio";
-               ssi-controller = <&ssi2>;
+               cpu-dai = <&ssi2>;
                audio-codec = <&codec>;
                audio-routing =
                        "Headphone Jack", "HPOUTL",
                        "DMICDAT", "DMIC";
                mux-int-port = <2>;
                mux-ext-port = <3>;
+               hp-det-gpios = <&gpio7 8 1>;
+               mic-det-gpios = <&gpio1 9 1>;
        };
 
        sound-hdmi {
                status = "okay";
        };
 
+       v4l2_cap_0 {
+               compatible = "fsl,imx6q-v4l2-capture";
+               ipu_id = <0>;
+               csi_id = <0>;
+               mclk_source = <0>;
+               status = "okay";
+       };
+
+       v4l2_cap_1 {
+               compatible = "fsl,imx6q-v4l2-capture";
+               ipu_id = <0>;
+               csi_id = <1>;
+               mclk_source = <0>;
+               status = "okay";
+       };
+
        v4l2_out {
                compatible = "fsl,mxc_v4l2_output";
                status = "okay";
        };
+
+       mipi_dsi_reset: mipi-dsi-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <50>;
+               #reset-cells = <0>;
+       };
 };
 
 &audmux {
        status = "okay";
 };
 
+&cpu0 {
+       arm-supply = <&sw1a_reg>;
+       soc-supply = <&sw1c_reg>;
+};
+
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio4 9 0>;
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rgmii";
        phy-reset-gpios = <&gpio1 25 0>;
+       fsl,magic-packet;
        status = "okay";
 };
 
                PLLVDD-supply = <&reg_audio>;
                SPKVDD1-supply = <&reg_audio>;
                SPKVDD2-supply = <&reg_audio>;
+               amic-mono;
                gpio-cfg = <
                        0x0000 /* 0:Default */
                        0x0000 /* 1:Default */
                interrupts = <18 8>;
                interrupt-route = <1>;
        };
+
+       ov564x: ov564x@3c {
+               compatible = "ovti,ov564x";
+               reg = <0x3c>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ipu1_2>;
+               clocks = <&clks IMX6QDL_CLK_CKO>;
+               clock-names = "csi_mclk";
+               DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+               AVDD-supply = <&vgen3_reg>;  /* 2.8v, on rev C board is VGEN3,
+                                               on rev B board is VGEN5 */
+               DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
+               pwn-gpios = <&gpio1 16 1>;   /* active low: SD1_DAT0 */
+               rst-gpios = <&gpio1 17 0>;   /* active high: SD1_DAT1 */
+               csi_id = <0>;
+               mclk = <24000000>;
+               mclk_source = <0>;
+       };
 };
 
 &i2c2 {
                interrupts = <26 2>;
                work-mode = <1>;/*DCM mode*/
        };
+
+       pmic: pfuze100@08 {
+               compatible = "fsl,pfuze100";
+               reg = <0x08>;
+
+               regulators {
+                       sw1a_reg: sw1ab {
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw1c_reg: sw1c {
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw2_reg: sw2 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3a_reg: sw3a {
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3b_reg: sw3b {
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw4_reg: sw4 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       swbst_reg: swbst {
+                               regulator-min-microvolt = <5000000>;
+                               regulator-max-microvolt = <5150000>;
+                       };
+
+                       snvs_reg: vsnvs {
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vref_reg: vrefddr {
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vgen1_reg: vgen1 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       vgen2_reg: vgen2 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       vgen3_reg: vgen3 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vgen4_reg: vgen4 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen5_reg: vgen5 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen6_reg: vgen6 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+
+       ov5640_mipi: ov5640_mipi@3c { /* i2c2 driver */
+               compatible = "ovti,ov5640_mipi";
+               reg = <0x3c>;
+               clocks = <&clks 201>;
+               clock-names = "csi_mclk";
+               DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+               AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
+                                               rev B board is VGEN5 */
+               DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
+               pwn-gpios = <&gpio1 19 1>;   /* active low: SD1_CLK */
+               rst-gpios = <&gpio1 20 0>;   /* active high: SD1_DAT2 */
+               csi_id = <1>;
+               mclk = <24000000>;
+               mclk_source = <0>;
+       };
+
+       egalax_ts@04 {
+               compatible = "eeti,egalax_ts";
+               reg = <0x04>;
+               interrupt-parent = <&gpio6>;
+               interrupts = <8 2>;
+               wakeup-gpios = <&gpio6 8 0>;
+       };
+
 };
 
 &i2c3 {
                interrupt-parent = <&gpio3>;
                interrupts = <16 1>;
        };
+
+       isl29023@44 {
+               compatible = "fsl,isl29023";
+               reg = <0x44>;
+               rext = <499>;
+               vdd-supply = <&reg_sensor>;
+               interrupt-parent = <&gpio3>;
+               interrupts = <9 2>;
+       };
 };
 
 &iomuxc {
                                MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
                                MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
                                MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
+                               MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
                                MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
                                MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
                                MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
                                MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
                                MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
                                MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
+                               MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x80000000
+                               MX6QDL_PAD_GPIO_9__GPIO1_IO09   0x80000000
+                               MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
+                               MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000
+                               MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
+                               MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
                        >;
                };
 
                        >;
                };
 
+               pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
+                       fsl,pins = <
+                               MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x80000000
+                               MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x80000000
+                               MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x80000000
+                               MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x80000000
+                               MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x80000000
+                               MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x80000000
+                               MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x80000000
+                               MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x80000000
+                               MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
+                               MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x80000000
+                               MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x80000000
+                               MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x80000000
+                       >;
+               };
+
                pinctrl_pwm1: pwm1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
                                MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
                        >;
                };
+
+               pinctrl_usdhc4: usdhc4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
+                               MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
+                               MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
+                               MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
+                               MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
+                               MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
+                               MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
+                               MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
+                               MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
+                               MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
+                       >;
+               };
+
        };
 };
 
 &gpc {
        /* use ldo-bypass, u-boot will check it and configure */
        fsl,ldo-bypass = <1>;
+       fsl,wdog-reset = <2>;
 };
 
 &hdmi_audio {
        };
 };
 
+&mipi_csi {
+       status = "okay";
+       ipu_id = <0>;
+       csi_id = <1>;
+       v_channel = <0>;
+       lanes = <2>;
+};
+
+&mipi_dsi {
+       dev_id = <0>;
+       disp_id = <1>;
+       lcd_panel = "TRULY-WVGA";
+       disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;
+       resets = <&mipi_dsi_reset>;
+       status = "okay";
+};
+
+&pcie {
+       power-on-gpio = <&gpio3 19 0>;
+       reset-gpio = <&gpio7 12 0>;
+       status = "okay";
+};
+
 &pwm1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pwm1>;
        bus-width = <8>;
        cd-gpios = <&gpio2 2 0>;
        wp-gpios = <&gpio2 3 0>;
+       no-1-8-v;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
        status = "okay";
 };
 
        bus-width = <8>;
        cd-gpios = <&gpio2 0 0>;
        wp-gpios = <&gpio2 1 0>;
+       no-1-8-v;
+       keep-power-in-suspend;
+       enable-sdio-wakeup;
+       status = "okay";
+};
+
+&usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+       bus-width = <8>;
+       non-removable;
+       no-1-8-v;
+       keep-power-in-suspend;
+       status = "okay";
+};
+
+&wdog1 {
+       status = "disabled";
+};
+
+&wdog2 {
        status = "okay";
 };