Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

[karo-tx-linux.git] / arch / arm / boot / dts / r8a7792.dtsi

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 8ecfda7a004ecb322b63e1fa0c8b3d1aa6851ca9..0efecb232ee52ce0d75c189b1e378fbb274cc836 100644 (file)
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -46,7 +46,7 @@
                        compatible = "arm,cortex-a15";
                        reg = <0>;
                        clock-frequency = <1000000000>;
-                       clocks = <&cpg_clocks R8A7792_CLK_Z>;
+                       clocks = <&z_clk>;
                        power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
                        next-level-cache = <&L2_CA15>;
                };
@@ -60,9 +60,8 @@
                        next-level-cache = <&L2_CA15>;
                };
 
-               L2_CA15: cache-controller@0 {
+               L2_CA15: cache-controller-0 {
                        compatible = "cache";
-                       reg = <0>;
                        cache-unified;
                        cache-level = <2>;
                        power-domains = <&sysc R8A7792_PD_CA15_SCU>;
@@ -93,6 +92,9 @@
                              <0 0xf1006000 0 0x2000>;
                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
                                      IRQ_TYPE_LEVEL_HIGH)>;
+                       clocks = <&mstp4_clks R8A7792_CLK_INTC_SYS>;
+                       clock-names = "clk";
+                       power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
                };
 
                irqc: interrupt-controller@e61c0000 {
@@ -764,7 +766,7 @@
                        clocks = <&extal_clk>;
                        #clock-cells = <1>;
                        clock-output-names = "main", "pll0", "pll1", "pll3",
-                                            "lb", "qspi", "z";
+                                            "lb", "qspi";
                        #power-domain-cells = <0>;
                };
 
@@ -776,6 +778,13 @@
                        clock-div = <2>;
                        clock-mult = <1>;
                };
+               z_clk: z {
+                       compatible = "fixed-factor-clock";
+                       clocks = <&cpg_clocks R8A7792_CLK_PLL0>;
+                       #clock-cells = <0>;
+                       clock-div = <1>;
+                       clock-mult = <1>;
+               };
                zx_clk: zx {
                        compatible = "fixed-factor-clock";
                        clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
@@ -896,10 +905,12 @@
                        compatible = "renesas,r8a7792-mstp-clocks",
                                     "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
-                       clocks = <&cp_clk>;
+                       clocks = <&cp_clk>, <&zs_clk>;
                        #clock-cells = <1>;
-                       clock-indices = <R8A7792_CLK_IRQC>;
-                       clock-output-names = "irqc";
+                       clock-indices = <
+                               R8A7792_CLK_IRQC R8A7792_CLK_INTC_SYS
+                       >;
+                       clock-output-names = "irqc", "intc-sys";
                };
                mstp7_clks: mstp7_clks@e615014c {
                        compatible = "renesas,r8a7792-mstp-clocks",