#include <asm-offsets.h>
#include <config.h>
#include <version.h>
+
+#ifdef CONFIG_CPU_PXA25X
+#if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800)
+#error "Init SP address must be set to 0xfffff800 for PXA250"
+#endif
+#endif
+
.globl _start
_start: b reset
#ifdef CONFIG_SPL_BUILD
.globl _TEXT_BASE
_TEXT_BASE:
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
.word CONFIG_SPL_TEXT_BASE
#else
.word CONFIG_SYS_TEXT_BASE
_bss_start_ofs:
.word __bss_start - _start
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+ .word __image_copy_end - _start
+
.globl _bss_end_ofs
_bss_end_ofs:
- .word __bss_end__ - _start
+ .word __bss_end - _start
.globl _end_ofs
_end_ofs:
bl cpu_init_crit
#endif
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
- ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
- ldr r0, =0x00000000
- bl board_init_f
+#ifdef CONFIG_CPU_PXA25X
+ bl lock_cache_for_stack
+#endif
+
+ bl _main
/*------------------------------------------------------------------------------*/
#ifndef CONFIG_SPL_BUILD
/*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
*
+ * This function relocates the monitor code.
*/
.globl relocate_code
relocate_code:
- mov r4, r0 /* save addr_sp */
- mov r5, r1 /* save addr of gd */
- mov r6, r2 /* save addr of destination */
+ mov r6, r0 /* save addr of destination */
- /* Set up the stack */
-stack_setup:
- mov sp, r4
+/* Disable the Dcache RAM lock for stack now */
+#ifdef CONFIG_CPU_PXA25X
+ mov r12, lr
+ bl cpu_init_crit
+ mov lr, r12
+#endif
adr r0, _start
- cmp r0, r6
- beq clear_bss /* skip relocation */
+ subs r9, r6, r0 /* r9 <- relocation offset */
+ beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
- ldr r3, _bss_start_ofs
+ ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 <- source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0] */
- stmia r1!, {r9-r10} /* copy to target address [r1] */
+ ldmia r0!, {r10-r11} /* copy from source address [r0] */
+ stmia r1!, {r10-r11} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
- sub r9, r6, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
blo fixloop
#endif
-clear_bss:
-#ifndef CONFIG_SPL_BUILD
- ldr r0, _bss_start_ofs
- ldr r1, _bss_end_ofs
- mov r4, r6 /* reloc addr */
- add r0, r0, r4
- add r1, r1, r4
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-#endif /* #ifndef CONFIG_SPL_BUILD */
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_ONENAND_SPL
- ldr r0, _onenand_boot_ofs
- mov pc, r0
-
-_onenand_boot_ofs:
- .word onenand_boot
-#else
-jump_2_ram:
- ldr r0, _board_init_r_ofs
- ldr r1, _TEXT_BASE
- add lr, r0, r1
- add lr, lr, r9
- /* setup parameters for board_init_r */
- mov r0, r5 /* gd_t */
- mov r1, r6 /* dest_addr */
- /* jump to it ... */
- mov pc, lr
+relocate_done:
-_board_init_r_ofs:
- .word board_init_r - _start
-#endif
+ bx lr
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
+
#endif
+
+ .globl c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+ bx lr
+
/*
*************************************************************************
*
*
*************************************************************************
*/
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
cpu_init_crit:
/*
* flush v4 I/D caches
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT || CONFIG_CPU_PXA25X */
#ifndef CONFIG_SPL_BUILD
/*
#endif
.align 5
#endif /* CONFIG_SPL_BUILD */
+
+
+/*
+ * Enable MMU to use DCache as DRAM.
+ *
+ * This is useful on PXA25x and PXA26x in early bootstages, where there is no
+ * other possible memory available to hold stack.
+ */
+#ifdef CONFIG_CPU_PXA25X
+.macro CPWAIT reg
+ mrc p15, 0, \reg, c2, c0, 0
+ mov \reg, \reg
+ sub pc, pc, #4
+.endm
+lock_cache_for_stack:
+ /* Domain access -- enable for all CPs */
+ ldr r0, =0x0000ffff
+ mcr p15, 0, r0, c3, c0, 0
+
+ /* Point TTBR to MMU table */
+ ldr r0, =mmutable
+ mcr p15, 0, r0, c2, c0, 0
+
+ /* Kick in MMU, ICache, DCache, BTB */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, #0x1b00
+ bic r0, #0x0087
+ orr r0, #0x1800
+ orr r0, #0x0005
+ mcr p15, 0, r0, c1, c0, 0
+ CPWAIT r0
+
+ /* Unlock Icache, Dcache */
+ mcr p15, 0, r0, c9, c1, 1
+ mcr p15, 0, r0, c9, c2, 1
+
+ /* Flush Icache, Dcache, BTB */
+ mcr p15, 0, r0, c7, c7, 0
+
+ /* Unlock I-TLB, D-TLB */
+ mcr p15, 0, r0, c10, c4, 1
+ mcr p15, 0, r0, c10, c8, 1
+
+ /* Flush TLB */
+ mcr p15, 0, r0, c8, c7, 0
+
+ /* Allocate 4096 bytes of Dcache as RAM */
+
+ /* Drain pending loads and stores */
+ mcr p15, 0, r0, c7, c10, 4
+
+ mov r4, #0x00
+ mov r5, #0x00
+ mov r2, #0x01
+ mcr p15, 0, r0, c9, c2, 0
+ CPWAIT r0
+
+ /* 128 lines reserved (128 x 32bytes = 4096 bytes total) */
+ mov r0, #128
+ ldr r1, =0xfffff000
+
+alloc:
+ mcr p15, 0, r1, c7, c2, 5
+ /* Drain pending loads and stores */
+ mcr p15, 0, r0, c7, c10, 4
+ strd r4, [r1], #8
+ strd r4, [r1], #8
+ strd r4, [r1], #8
+ strd r4, [r1], #8
+ subs r0, #0x01
+ bne alloc
+ /* Drain pending loads and stores */
+ mcr p15, 0, r0, c7, c10, 4
+ mov r2, #0x00
+ mcr p15, 0, r2, c9, c2, 0
+ CPWAIT r0
+
+ mov pc, lr
+
+.section .mmutable, "a"
+mmutable:
+ .align 14
+ /* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */
+ .set __base, 0
+ .rept 0xfff
+ .word (__base << 20) | 0xc12
+ .set __base, __base + 1
+ .endr
+
+ /* 0xfff00000 : 1:1, cached mapping */
+ .word (0xfff << 20) | 0x1c1e
+#endif /* CONFIG_CPU_PXA25X */
projects / karo-tx-uboot.git / blobdiff