mx6: add OTP bank1 registers

[karo-tx-uboot.git] / arch / arm / include / asm / arch-mx6 / imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 8f47fd7803a4184dd4613fe2f07916d9b582f6d6..422f82bcf4f7748547a624e8bd455f0f45f9ae03 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -278,8 +278,7 @@
 #define UART3_BASE                     (AIPS2_OFF_BASE_ADDR + 0x6C000)
 #define UART4_BASE                     (AIPS2_OFF_BASE_ADDR + 0x70000)
 #define UART5_BASE                     (AIPS2_OFF_BASE_ADDR + 0x74000)
-#define IP2APB_USBPHY1_BASE_ADDR       (AIPS2_OFF_BASE_ADDR + 0x78000)
-#define IP2APB_USBPHY2_BASE_ADDR       (AIPS2_OFF_BASE_ADDR + 0x7C000)
+#define I2C4_BASE_ADDR                 (AIPS2_OFF_BASE_ADDR + 0x78000)
 
 #ifdef CONFIG_SOC_MX6SX
 #define GIS_BASE_ADDR                  (AIPS3_ARB_BASE_ADDR + 0x04000)
@@ -625,20 +624,27 @@ struct fuse_bank0_regs {
        reg_32(cfg6);
 };
 
+struct fuse_bank1_regs {
+       reg_32(mem0);
+       reg_32(mem1);
+       reg_32(mem2);
+       reg_32(mem3);
+       reg_32(mem4);
+       reg_32(ana0);
+       reg_32(ana1);
+       reg_32(ana2);
+};
+
 #ifdef CONFIG_SOC_MX6SX
 struct fuse_bank4_regs {
-       u32 sjc_resp_low;
-       u32 rsvd0[3];
-       u32 sjc_resp_high;
-       u32 rsvd1[3];
-       u32 mac_addr_low;
-       u32 rsvd2[3];
-       u32 mac_addr_high;
-       u32 rsvd3[3];
-       u32 mac_addr2;
-       u32 rsvd4[7];
-       u32 gp1;
-       u32 rsvd5[7];
+       reg_32(sjc_resp_low);
+       reg_32(sjc_resp_high);
+       reg_32(mac_addr_low);
+       reg_32(mac_addr_high);
+       reg_32(mac_addr2);
+       reg_32(rsvd1);
+       reg_32(gp1);
+       reg_32(rsvd2);
 };
 #else
 struct fuse_bank4_regs {