drivers: net: cpsw: add support to have phy address from cpsw platform data

[karo-tx-uboot.git] / board / esteem192e / esteem192e.c

diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c
index f3c8662cdba42b37693ffb90640ff5d6cad970dd..b54c61412a4d4146075d5e1049905ba222380221 100644 (file)
--- a/board/esteem192e/esteem192e.c
+++ b/board/esteem192e/esteem192e.c
@@ -2,27 +2,9 @@
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  *
  * Modified By Conn Clark to work with Esteem 192E 7/31/00
- *
  */
 
 #include <common.h>
@@ -103,7 +85,7 @@ int checkboard (void)
 
 phys_size_t initdram (int board_type)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        long int size_b0, size_b1;
 
@@ -113,7 +95,7 @@ phys_size_t initdram (int board_type)
 
        memctl->memc_mptpr = 0x0200;    /* divide by 32 */
 
-       memctl->memc_mamr = 0x18003112; /*CFG_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
+       memctl->memc_mamr = 0x18003112; /*CONFIG_SYS_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
 
        upmconfig (UPMA, (uint *) sdram_table,
                   sizeof (sdram_table) / sizeof (uint));
@@ -124,11 +106,11 @@ phys_size_t initdram (int board_type)
         * SDRAM size has been determined.
         */
 
-       memctl->memc_or2 = CFG_OR2_PRELIM;      /* not defined yet */
-       memctl->memc_br2 = CFG_BR2_PRELIM;
+       memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;       /* not defined yet */
+       memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
 
-       memctl->memc_or3 = CFG_OR3_PRELIM;
-       memctl->memc_br3 = CFG_BR3_PRELIM;
+       memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
+       memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
 
 
        /* perform SDRAM initializsation sequence */
@@ -139,7 +121,7 @@ phys_size_t initdram (int board_type)
        memctl->memc_mcr = 0x80006830;  /* SDRAM bank 1 execute 8 refresh */
        memctl->memc_mcr = 0x80006105;  /* SDRAM bank 1 */
 
-       memctl->memc_mamr = CFG_MAMR_8COL;      /* 0x18803112  start refresh timer TODO: explain here */
+       memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;       /* 0x18803112  start refresh timer TODO: explain here */
 
 /* printf ("banks 0 and 1 are programed\n"); */