#include <nand.h>
#include <netdev.h>
#include <miiphy.h>
+#include <spi.h>
#include <asm/io.h>
+#include <asm/arch/cpu.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
}
#endif
-#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
+#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
+ defined(CONFIG_KM_PIGGY4_88E6352))
/*
- * These two boards have always ethernet present. Its connected to the mv
- * switch.
+ * All boards with PIGGY4 connected via a simple switch have ethernet always
+ * present.
*/
int ethernet_present(void)
{
if (wait_for_ne != NULL) {
if (strcmp(wait_for_ne, "true") == 0) {
int cnt = 0;
+ int abort = 0;
puts("NE go: ");
while (startup_allowed() == 0) {
+ if (tstc()) {
+ (void) getc(); /* consume input */
+ abort = 1;
+ break;
+ }
udelay(200000);
cnt++;
if (cnt == 5)
puts(" \b\b\b\b");
}
}
- puts("OK\n");
+ if (abort == 1)
+ printf("\nAbort waiting for ne\n");
+ else
+ puts("OK\n");
}
}
#endif
{
u32 tmp;
- kirkwood_mpp_conf(kwmpp_config);
+ kirkwood_mpp_conf(kwmpp_config, NULL);
/*
* The FLASH_GPIO_PIN switches between using a
kw_gpio_set_valid(KM_KIRKWOOD_ENV_WP, 38);
kw_gpio_direction_output(KM_KIRKWOOD_ENV_WP, 1);
#endif
-
+#if defined(CONFIG_KM_RECONFIG_XLX)
+ /* trigger the reconfiguration of the xilinx fpga */
+ kw_gpio_set_valid(KM_XLX_PROGRAM_B_PIN, 1);
+ kw_gpio_direction_output(KM_XLX_PROGRAM_B_PIN, 0);
+ kw_gpio_direction_input(KM_XLX_PROGRAM_B_PIN);
+#endif
return 0;
}
int board_init(void)
{
- /*
- * arch number of board
- */
- gd->bd->bi_arch_number = MACH_TYPE_KM_KIRKWOOD;
-
/* address of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
return 0;
}
-#if defined(CONFIG_CMD_SF)
-int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int board_spi_claim_bus(struct spi_slave *slave)
{
- u32 tmp;
- if (argc < 2)
- return cmd_usage(cmdtp);
-
- if ((strcmp(argv[1], "off") == 0)) {
- printf("SPI FLASH disabled, NAND enabled\n");
- /* Multi-Purpose Pins Functionality configuration */
- kwmpp_config[0] = MPP0_NF_IO2;
- kwmpp_config[1] = MPP1_NF_IO3;
- kwmpp_config[2] = MPP2_NF_IO4;
- kwmpp_config[3] = MPP3_NF_IO5;
-
- kirkwood_mpp_conf(kwmpp_config);
- tmp = readl(KW_GPIO0_BASE);
- writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
- } else if ((strcmp(argv[1], "on") == 0)) {
- printf("SPI FLASH enabled, NAND disabled\n");
- /* Multi-Purpose Pins Functionality configuration */
- kwmpp_config[0] = MPP0_SPI_SCn;
- kwmpp_config[1] = MPP1_SPI_MOSI;
- kwmpp_config[2] = MPP2_SPI_SCK;
- kwmpp_config[3] = MPP3_SPI_MISO;
-
- kirkwood_mpp_conf(kwmpp_config);
- tmp = readl(KW_GPIO0_BASE);
- writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
- } else {
- return cmd_usage(cmdtp);
- }
+ kw_gpio_set_value(KM_FLASH_GPIO_PIN, 0);
return 0;
}
-U_BOOT_CMD(
- spitoggle, 2, 0, do_spi_toggle,
- "En-/disable SPI FLASH access",
- "<on|off> - Enable (on) or disable (off) SPI FLASH access\n"
- );
-#endif
+void board_spi_release_bus(struct spi_slave *slave)
+{
+ kw_gpio_set_value(KM_FLASH_GPIO_PIN, 1);
+}
int dram_init(void)
{
#endif
#if defined(CONFIG_BOOTCOUNT_LIMIT)
+const ulong patterns[] = { 0x00000000,
+ 0xFFFFFFFF,
+ 0xFF00FF00,
+ 0x0F0F0F0F,
+ 0xF0F0F0F0};
+const ulong NBR_OF_PATTERNS = ARRAY_SIZE(patterns);
+const ulong OFFS_PATTERN = 3;
+const ulong REPEAT_PATTERN = 1000;
+
void bootcount_store(ulong a)
{
- volatile ulong *save_addr;
- volatile ulong size = 0;
+ ulong *save_addr;
+ ulong size = 0;
int i;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
size += gd->bd->bi_dram[i].size;
- }
- save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
+ save_addr = (ulong *)(size - BOOTCOUNT_ADDR);
writel(a, save_addr);
writel(BOOTCOUNT_MAGIC, &save_addr[1]);
+
+ for (i = 0; i < REPEAT_PATTERN; i++)
+ writel(patterns[i % NBR_OF_PATTERNS],
+ &save_addr[i+OFFS_PATTERN]);
+
}
ulong bootcount_load(void)
{
- volatile ulong *save_addr;
- volatile ulong size = 0;
- int i;
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ ulong *save_addr;
+ ulong size = 0;
+ ulong counter = 0;
+ int i, tmp;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
size += gd->bd->bi_dram[i].size;
+ save_addr = (ulong *)(size - BOOTCOUNT_ADDR);
+
+ counter = readl(&save_addr[0]);
+
+ /* Is the counter reliable, check in the big pattern for bit errors */
+ for (i = 0; (i < REPEAT_PATTERN) && (counter != 0); i++) {
+ tmp = readl(&save_addr[i+OFFS_PATTERN]);
+ if (tmp != patterns[i % NBR_OF_PATTERNS])
+ counter = 0;
}
- save_addr = (ulong*)(size - BOOTCOUNT_ADDR);
- if (readl(&save_addr[1]) != BOOTCOUNT_MAGIC)
- return 0;
- else
- return readl(save_addr);
+ return counter;
}
#endif
}
#endif
+#if defined(CONFIG_POST)
+
+#define KM_POST_EN_L 44
+#define POST_WORD_OFF 8
+
+int post_hotkeys_pressed(void)
+{
+#if defined(CONFIG_KM_COGE5UN)
+ return kw_gpio_get_value(KM_POST_EN_L);
+#else
+ return !kw_gpio_get_value(KM_POST_EN_L);
+#endif
+}
+
+ulong post_word_load(void)
+{
+ void* addr = (void *) (gd->ram_size - BOOTCOUNT_ADDR + POST_WORD_OFF);
+ return in_le32(addr);
+
+}
+void post_word_store(ulong value)
+{
+ void* addr = (void *) (gd->ram_size - BOOTCOUNT_ADDR + POST_WORD_OFF);
+ out_le32(addr, value);
+}
+
+int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
+{
+ *vstart = CONFIG_SYS_SDRAM_BASE;
+
+ /* we go up to relocation plus a 1 MB margin */
+ *size = CONFIG_SYS_TEXT_BASE - (1<<20);
+
+ return 0;
+}
+#endif
+
#if defined(CONFIG_SYS_EEPROM_WREN)
int eeprom_write_enable(unsigned dev_addr, int state)
{
projects / karo-tx-uboot.git / blobdiff