#include <i2c.h>
#include <initcall.h>
#include <logbuff.h>
+#include <mapmem.h>
/* TODO: Can we move these into arch/ headers? */
#ifdef CONFIG_8xx
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/sections.h>
-#ifdef CONFIG_X86
+#if defined(CONFIG_X86) || defined(CONFIG_ARC)
#include <asm/init_helpers.h>
#include <asm/relocate.h>
#endif
{
# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
- defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG))
+ defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
+ defined(CONFIG_IMX_WATCHDOG))
hw_watchdog_init();
# endif
puts(" Watchdog enabled\n");
return 0;
}
-#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
+#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int init_func_ram(void)
{
#ifdef CONFIG_BOARD_TYPES
/* Get the top of usable RAM */
__weak ulong board_get_usable_ram_top(ulong total_size)
{
+#ifdef CONFIG_SYS_SDRAM_BASE
+ /*
+ * Detect whether we have so much RAM it goes past the end of our
+ * 32-bit address space. If so, clip the usable RAM so it doesn't.
+ */
+ if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
+ /*
+ * Will wrap back to top of 32-bit space when reservations
+ * are made.
+ */
+ return 0;
+#endif
return gd->ram_top;
}
#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
- !defined(CONFIG_BLACKFIN)
+ !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
static int reserve_video(void)
{
/* reserve memory for video display (always full pages) */
return 0;
}
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int setup_board_part1(void)
{
bd_t *bd = gd->bd;
defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
-#if defined(CONFIG_MPC5xxx)
+#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
#endif
#if defined(CONFIG_MPC83xx)
bd->bi_ipbfreq = gd->arch.ipb_clk;
bd->bi_pcifreq = gd->pci_clk;
#endif /* CONFIG_MPC5xxx */
+#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
+ bd->bi_pcifreq = gd->pci_clk;
+#endif
+#if defined(CONFIG_EXTRA_CLOCK)
+ bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
+ bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
+ bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
+#endif
return 0;
}
static int setup_reloc(void)
{
#ifdef CONFIG_SYS_TEXT_BASE
-#ifndef CONFIG_ARM
- gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
-#else
+#if defined(CONFIG_M68K)
+ /*
+ * On all ColdFire arch cpu, monitor code starts always
+ * just after the default vector table location, so at 0x400
+ */
+ gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
+#elif defined(CONFIG_ARM)
gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
+#else
+ gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
+#ifdef CONFIG_M68K
+ /*
+ * On all ColdFire arch cpu, monitor code starts always
+ * just after the default vector table location, so at 0x400
+ */
+ gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
+#endif
#endif
#endif
memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
* similarly for all archs. When we do generic relocation, hopefully
* we can make all archs enable the dcache prior to relocation.
*/
-#ifdef CONFIG_X86
+#if defined(CONFIG_X86) || defined(CONFIG_ARC)
/*
* SDRAM and console are now initialised. The final stack can now
* be setup in SDRAM. Code execution will continue in Flash, but
return 0;
}
+__weak int arch_cpu_init_dm(void)
+{
+ return 0;
+}
+
static init_fnc_t init_sequence_f[] = {
#ifdef CONFIG_SANDBOX
setup_ram_buf,
fdtdec_check_fdt,
#endif
initf_dm,
+ arch_cpu_init_dm,
#if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f,
#endif
#endif
#ifdef CONFIG_FSL_ESDHC
get_clocks,
+#endif
+#ifdef CONFIG_M68K
+ get_clocks,
#endif
env_init, /* initialize environment */
#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
checkcpu,
#endif
print_cpuinfo, /* display cpu info (and speed) */
#endif
announce_dram_init,
/* TODO: unify all these dram functions? */
-#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE)
+#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
dram_init, /* configure available RAM banks */
#endif
-#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
+#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
init_func_ram,
#endif
#ifdef CONFIG_POST
/* TODO: Why the dependency on CONFIG_8xx? */
#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
- !defined(CONFIG_BLACKFIN)
+ !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
reserve_video,
#endif
#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
reserve_stacks,
setup_dram_config,
show_dram_config,
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
setup_board_part1,
INIT_FUNC_WATCHDOG_RESET
setup_board_part2,
INIT_FUNC_WATCHDOG_RESET
reloc_fdt,
setup_reloc,
-#ifdef CONFIG_X86
+#if defined(CONFIG_X86) || defined(CONFIG_ARC)
copy_uboot_to_ram,
clear_bss,
do_elf_reloc_fixups,
#endif
}
-#ifdef CONFIG_X86
+#if defined(CONFIG_X86) || defined(CONFIG_ARC)
/*
* For now this code is only used on x86.
*
* Transfer execution from Flash to RAM by calculating the address
* of the in-RAM copy of board_init_r() and calling it
*/
- (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
+ (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
/* NOTREACHED - board_init_r() does not return */
hang();
}
-#else
+#endif /* CONFIG_X86 */
+
+#ifndef CONFIG_X86
ulong board_init_f_mem(ulong top)
{
/* Leave space for the stack we are running with now */
return top;
}
-#endif /* CONFIG_X86 */
+#endif /* !CONFIG_X86 */
projects / karo-tx-uboot.git / blobdiff