clk: cdce925: add support for CDCE913, CDCE937, and CDCE949

[karo-tx-linux.git] / drivers / clk / Kconfig

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index e2d9bd760c84a04e94290c3f4d523f8c0f1266df..664abe9e085baeec557fee6750bcbf51030186da 100644 (file)
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -31,22 +31,12 @@ config COMMON_CLK_WM831X
 
 source "drivers/clk/versatile/Kconfig"
 
-config COMMON_CLK_MAX_GEN
-        bool
-
 config COMMON_CLK_MAX77686
-       tristate "Clock driver for Maxim 77686 MFD"
-       depends on MFD_MAX77686
-       select COMMON_CLK_MAX_GEN
-       ---help---
-         This driver supports Maxim 77686 crystal oscillator clock. 
-
-config COMMON_CLK_MAX77802
-       tristate "Clock driver for Maxim 77802 PMIC"
-       depends on MFD_MAX77686
-       select COMMON_CLK_MAX_GEN
+       tristate "Clock driver for Maxim 77620/77686/77802 MFD"
+       depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
        ---help---
-         This driver supports Maxim 77802 crystal oscillator clock.
+         This driver supports Maxim 77620/77686/77802 crystal oscillator
+         clock.
 
 config COMMON_CLK_RK808
        tristate "Clock driver for RK808/RK818"
@@ -105,16 +95,17 @@ config COMMON_CLK_CDCE706
          This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
 
 config COMMON_CLK_CDCE925
-       tristate "Clock driver for TI CDCE925 devices"
+       tristate "Clock driver for TI CDCE913/925/937/949 devices"
        depends on I2C
        depends on OF
        select REGMAP_I2C
        help
        ---help---
-         This driver supports the TI CDCE925 programmable clock synthesizer.
-         The chip contains two PLLs with spread-spectrum clocking support and
-         five output dividers. The driver only supports the following setup,
-         and uses a fixed setting for the output muxes.
+         This driver supports the TI CDCE913/925/937/949 programmable clock
+         synthesizer. Each chip has different number of PLLs and outputs.
+         For example, the CDCE925 contains two PLLs with spread-spectrum
+         clocking support and five output dividers. The driver only supports
+         the following setup, and uses a fixed setting for the output muxes.
          Y1 is derived from the input clock
          Y2 and Y3 derive from PLL1
          Y4 and Y5 derive from PLL2
@@ -129,7 +120,7 @@ config COMMON_CLK_CS2000_CP
 
 config COMMON_CLK_S2MPS11
        tristate "Clock driver for S2MPS1X/S5M8767 MFD"
-       depends on MFD_SEC_CORE
+       depends on MFD_SEC_CORE || COMPILE_TEST
        ---help---
          This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
          clock. These multi-function devices have two (S2MPS14) or three
@@ -210,6 +201,7 @@ config COMMON_CLK_OXNAS
 
 source "drivers/clk/bcm/Kconfig"
 source "drivers/clk/hisilicon/Kconfig"
+source "drivers/clk/mediatek/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/qcom/Kconfig"
@@ -218,5 +210,6 @@ source "drivers/clk/samsung/Kconfig"
 source "drivers/clk/sunxi-ng/Kconfig"
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/ti/Kconfig"
+source "drivers/clk/uniphier/Kconfig"
 
 endmenu