clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs

[karo-tx-linux.git] / drivers / clk / ti / dpll44xx.c

diff --git a/drivers/clk/ti/dpll44xx.c b/drivers/clk/ti/dpll44xx.c
index 660d7436ac243a89a2ac2573a8b67a019bac0301..82c05b55a7be83808b20e5da172900ba63c0a26e 100644 (file)
--- a/drivers/clk/ti/dpll44xx.c
+++ b/drivers/clk/ti/dpll44xx.c
@@ -94,7 +94,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
 {
        long fint, fout;
 
-       fint = clk_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);
+       fint = clk_hw_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);
        fout = fint * dd->last_rounded_m;
 
        if ((fint < OMAP4_DPLL_LP_FINT_MAX) && (fout < OMAP4_DPLL_LP_FOUT_MAX))
@@ -212,13 +212,13 @@ int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
        if (!dd)
                return -EINVAL;
 
-       if (clk_get_rate(dd->clk_bypass) == req->rate &&
+       if (clk_hw_get_rate(dd->clk_bypass) == req->rate &&
            (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
-               req->best_parent_hw = __clk_get_hw(dd->clk_bypass);
+               req->best_parent_hw = dd->clk_bypass;
        } else {
                req->rate = omap4_dpll_regm4xen_round_rate(hw, req->rate,
                                                &req->best_parent_rate);
-               req->best_parent_hw = __clk_get_hw(dd->clk_ref);
+               req->best_parent_hw = dd->clk_ref;
        }
 
        req->best_parent_rate = req->rate;