ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS

[karo-tx-uboot.git] / drivers / serial / arm_dcc.c

diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index 5dfb02f47045a173ea83816893e7474881d5d5d9..df7eb05e82460e998be15e56734e8ff8ff83f5e3 100644 (file)
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -29,9 +29,9 @@
 #include <common.h>
 #include <serial.h>
 
-#if defined(CONFIG_CPU_V6)
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
 /*
- * ARMV6
+ * ARMV6 & ARMV7
  */
 #define DCC_RBIT       (1 << 30)
 #define DCC_WBIT       (1 << 29)
@@ -61,6 +61,22 @@
 #define status_dcc(x)  \
                __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
 
+#elif defined(CONFIG_CPU_ARMV8)
+/*
+ * ARMV8
+ */
+#define DCC_RBIT       (1 << 30)
+#define DCC_WBIT       (1 << 29)
+
+#define write_dcc(x)   \
+               __asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
+
+#define read_dcc(x)    \
+               __asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
+
+#define status_dcc(x)  \
+               __asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
+
 #else
 #define DCC_RBIT       (1 << 0)
 #define DCC_WBIT       (1 << 1)