Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

[karo-tx-uboot.git] / drivers / spi / mxs_spi.c

diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 31cd77d31cf5477b5017b1bc933f9296658a1bcc..db98a136e6565f4019d7fe5ec23ac2e3ca91a3d9 100644 (file)
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -31,7 +31,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/arch/dma.h>
+#include <asm/imx-common/dma.h>
 
 #define        MXS_SPI_MAX_TIMEOUT     1000000
 #define        MXS_SPI_PORT_OFFSET     0x2000
@@ -40,17 +40,6 @@
 
 #define MXSSSP_SMALL_TRANSFER  512
 
-/*
- * CONFIG_MXS_SPI_DMA_ENABLE: Experimental mixed PIO/DMA support for MXS SPI
- *                            host. Use with utmost caution!
- *
- *                            Enabling this is not yet recommended since this
- *                            still doesn't support transfers to/from unaligned
- *                            addresses. Therefore this driver will not work
- *                            for example with saving environment. This is
- *                            caused by DMA alignment constraints on MXS.
- */
-
 struct mxs_spi_slave {
        struct spi_slave        slave;
        uint32_t                max_khz;
@@ -70,7 +59,7 @@ void spi_init(void)
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
        /* MXS SPI: 4 ports and 3 chip selects maximum */
-       if (bus > 3 || cs > 2)
+       if (!mxs_ssp_bus_id_valid(bus) || cs > 2)
                return 0;
        else
                return 1;
@@ -88,15 +77,13 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                return NULL;
        }
 
-       mxs_slave = calloc(sizeof(struct mxs_spi_slave), 1);
+       mxs_slave = spi_alloc_slave(struct mxs_spi_slave, bus, cs);
        if (!mxs_slave)
                return NULL;
 
-       if (mxs_dma_init_channel(bus))
+       if (mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + bus))
                goto err_init;
 
-       mxs_slave->slave.bus = bus;
-       mxs_slave->slave.cs = cs;
        mxs_slave->max_khz = max_hz / 1000;
        mxs_slave->mode = mode;
        mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
@@ -137,7 +124,7 @@ int spi_claim_bus(struct spi_slave *slave)
 
        writel(0, &ssp_regs->hw_ssp_cmd0);
 
-       mx28_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
+       mxs_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
 
        return 0;
 }
@@ -168,7 +155,12 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
 
        while (length--) {
                /* We transfer 1 byte */
+#if defined(CONFIG_MX23)
+               writel(SSP_CTRL0_XFER_COUNT_MASK, &ssp_regs->hw_ssp_ctrl0_clr);
+               writel(1, &ssp_regs->hw_ssp_ctrl0_set);
+#elif defined(CONFIG_MX28)
                writel(1, &ssp_regs->hw_ssp_xfer_size);
+#endif
 
                if ((flags & SPI_XFER_END) && !length)
                        mxs_spi_end_xfer(ssp_regs);
@@ -226,6 +218,12 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
        int tl;
        int ret = 0;
 
+#if defined(CONFIG_MX23)
+       const int mxs_spi_pio_words = 1;
+#elif defined(CONFIG_MX28)
+       const int mxs_spi_pio_words = 4;
+#endif
+
        ALLOC_CACHE_ALIGN_BUFFER(struct mxs_dma_desc, desc, desc_count);
 
        memset(desc, 0, sizeof(struct mxs_dma_desc) * desc_count);
@@ -281,7 +279,7 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
 
                dp->cmd.data |=
                        ((tl & 0xffff) << MXS_DMA_DESC_BYTES_OFFSET) |
-                       (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET) |
+                       (mxs_spi_pio_words << MXS_DMA_DESC_PIO_WORDS_OFFSET) |
                        MXS_DMA_DESC_HALT_ON_TERMINATE |
                        MXS_DMA_DESC_TERMINATE_FLUSH;
 
@@ -298,15 +296,19 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
                }
 
                /*
-                * Write CTRL0, CMD0, CMD1, XFER_SIZE registers. It is
+                * Write CTRL0, CMD0, CMD1 and XFER_SIZE registers in
+                * case of MX28, write only CTRL0 in case of MX23 due
+                * to the difference in register layout. It is utterly
                 * essential that the XFER_SIZE register is written on
                 * a per-descriptor basis with the same size as is the
                 * descriptor!
                 */
                dp->cmd.pio_words[0] = ctrl0;
+#ifdef CONFIG_MX28
                dp->cmd.pio_words[1] = 0;
                dp->cmd.pio_words[2] = 0;
                dp->cmd.pio_words[3] = tl;
+#endif
 
                mxs_dma_desc_append(dmach, dp);
 
@@ -332,12 +334,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
        char dummy;
        int write = 0;
        char *data = NULL;
-
-#ifdef CONFIG_MXS_SPI_DMA_ENABLE
        int dma = 1;
-#else
-       int dma = 0;
-#endif
 
        if (bitlen == 0) {
                if (flags & SPI_XFER_END) {